blob: af327f17c09a24eb1b837801d7dffefd39c092ef [file] [log] [blame]
Ajay Singh Parmard7019152016-06-10 16:46:47 -07001ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/msm -Idrivers/gpu/drm/msm/dsi-staging
Hai Li5c829022015-08-13 17:45:52 -04002ccflags-$(CONFIG_DRM_MSM_DSI) += -Idrivers/gpu/drm/msm/dsi
Clarence Ipae4e60c2016-06-26 22:44:04 -04003ccflags-$(CONFIG_SYNC) += -Idrivers/staging/android
Ajay Singh Parmard7019152016-06-10 16:46:47 -07004ccflags-$(CONFIG_DRM_MSM_DSI_PLL) += -Idrivers/gpu/drm/msm/dsi
Clarence Ipdd8021c2016-07-20 16:39:47 -04005ccflags-y += -Idrivers/gpu/drm/msm/sde
Rob Clarkc8afe682013-06-26 12:44:06 -04006
Clarence Ipc3797e62016-09-22 14:51:39 -04007msm_drm-y := \
Rob Clarkc8afe682013-06-26 12:44:06 -04008 hdmi/hdmi.o \
Rob Clarkc0c0d9e2013-12-11 14:44:02 -05009 hdmi/hdmi_audio.o \
Rob Clarka3376e32013-08-30 13:02:15 -040010 hdmi/hdmi_bridge.o \
Rob Clarkc8afe682013-06-26 12:44:06 -040011 hdmi/hdmi_connector.o \
12 hdmi/hdmi_i2c.o \
Archit Taneja15b4a452016-02-25 11:22:38 +053013 hdmi/hdmi_phy.o \
Rob Clarkc8afe682013-06-26 12:44:06 -040014 hdmi/hdmi_phy_8960.o \
15 hdmi/hdmi_phy_8x60.o \
Rob Clarkdada25b2013-12-01 12:12:54 -050016 hdmi/hdmi_phy_8x74.o \
Hai Liab5b0102015-01-07 18:47:44 -050017 edp/edp.o \
18 edp/edp_aux.o \
19 edp/edp_bridge.o \
20 edp/edp_connector.o \
21 edp/edp_ctrl.o \
22 edp/edp_phy.o \
Rob Clark10a02eb2013-11-30 14:58:23 -050023 mdp/mdp_format.o \
Rob Clark9e0efa62013-11-30 17:24:22 -050024 mdp/mdp_kms.o \
Stephane Viau2e362e12014-11-18 12:49:48 -050025 mdp/mdp5/mdp5_cfg.o \
Stephane Viau0deed252014-11-18 12:49:49 -050026 mdp/mdp5/mdp5_ctl.o \
Rob Clark06c0dd92013-11-30 17:51:47 -050027 mdp/mdp5/mdp5_crtc.o \
28 mdp/mdp5/mdp5_encoder.o \
29 mdp/mdp5/mdp5_irq.o \
Archit Taneja990a4002016-05-07 23:11:25 +053030 mdp/mdp5/mdp5_mdss.o \
Rob Clark06c0dd92013-11-30 17:51:47 -050031 mdp/mdp5/mdp5_kms.o \
32 mdp/mdp5/mdp5_plane.o \
33 mdp/mdp5/mdp5_smp.o \
Narendra Muppalla1b0b3352015-09-29 10:16:51 -070034 sde/sde_crtc.o \
35 sde/sde_encoder.o \
Lloyd Atkinson09fed912016-06-24 18:14:13 -040036 sde/sde_encoder_phys_vid.o \
37 sde/sde_encoder_phys_cmd.o \
Narendra Muppalla1b0b3352015-09-29 10:16:51 -070038 sde/sde_irq.o \
Alan Kwongf5dd86c2016-08-09 18:08:17 -040039 sde/sde_core_irq.o \
Alan Kwong67a3f792016-11-01 23:16:53 -040040 sde/sde_core_perf.o \
Lloyd Atkinson11f34442016-08-11 11:19:52 -040041 sde/sde_rm.o \
Abhijit Kulkarni40e38162016-06-26 22:12:09 -040042 sde/sde_kms_utils.o \
Narendra Muppalla1b0b3352015-09-29 10:16:51 -070043 sde/sde_kms.o \
44 sde/sde_plane.o \
Clarence Ipdd8021c2016-07-20 16:39:47 -040045 sde/sde_connector.o \
Vishnuvardhan Prodduturi75b96802016-10-17 18:45:55 +053046 sde/sde_backlight.o \
Gopikrishnaiah Anandane0e5e0c2016-05-25 11:05:33 -070047 sde/sde_color_processing.o \
Lloyd Atkinson5d40d312016-09-06 08:34:13 -040048 sde/sde_vbif.o \
Lloyd Atkinson113aefd2016-10-23 13:15:18 -040049 sde_dbg.o \
Dhaval Patel1ac91032016-09-26 19:25:39 -070050 sde_dbg_evtlog.o \
51 sde_io_util.o \
Gopikrishnaiah Anandaned189cd2016-12-27 14:31:02 -080052 sde/sde_hw_reg_dma_v1_color_proc.o \
Gopikrishnaiah Anandane6ef01c2017-01-13 16:26:13 -080053 sde/sde_hw_color_proc_v4.o \
Rob Clarkc8afe682013-06-26 12:44:06 -040054
Stephane Viau32f13f62015-04-29 15:57:29 -040055# use drm gpu driver only if qcom_kgsl driver not available
56ifneq ($(CONFIG_QCOM_KGSL),y)
Clarence Ipc3797e62016-09-22 14:51:39 -040057msm_drm-y += adreno/adreno_device.o \
Stephane Viau32f13f62015-04-29 15:57:29 -040058 adreno/adreno_gpu.o \
59 adreno/a3xx_gpu.o \
60 adreno/a4xx_gpu.o
61endif
62
Clarence Ipc3797e62016-09-22 14:51:39 -040063msm_drm-$(CONFIG_DRM_MSM_MDP4) += mdp/mdp4/mdp4_crtc.o \
Stephane Viauee935002015-04-29 14:57:31 -040064 mdp/mdp4/mdp4_dtv_encoder.o \
65 mdp/mdp4/mdp4_lcdc_encoder.o \
66 mdp/mdp4/mdp4_lvds_connector.o \
67 mdp/mdp4/mdp4_irq.o \
68 mdp/mdp4/mdp4_kms.o \
Dhaval Patel04c7e8e2016-09-26 20:14:31 -070069 mdp/mdp4/mdp4_dsi_encoder.o \
Stephane Viauee935002015-04-29 14:57:31 -040070 mdp/mdp4/mdp4_plane.o
71
Clarence Ipc3797e62016-09-22 14:51:39 -040072msm_drm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
73msm_drm-$(CONFIG_SYNC) += sde/sde_fence.o
74msm_drm-$(CONFIG_COMMON_CLK) += mdp/mdp4/mdp4_lvds_pll.o
75msm_drm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o
76msm_drm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_phy_8996.o
Hai Li825637b2015-05-15 13:04:04 -040077
Clarence Ipc3797e62016-09-22 14:51:39 -040078msm_drm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
Rob Clarkfeb46f02016-03-20 10:16:29 -040079
Clarence Ipc3797e62016-09-22 14:51:39 -040080msm_drm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
Vinay Simha BN776638e2015-10-19 12:27:11 +053081 mdp/mdp4/mdp4_dsi_encoder.o \
Hai Lid248b612015-08-13 17:49:29 -040082 dsi/dsi_cfg.o \
Hai Lia6895542015-03-31 14:36:33 -040083 dsi/dsi_host.o \
84 dsi/dsi_manager.o \
Hai Li5c829022015-08-13 17:45:52 -040085 dsi/phy/dsi_phy.o \
Ajay Singh Parmard7019152016-06-10 16:46:47 -070086 dsi/dsi_manager.o \
Hai Lid5af49c2015-03-26 19:25:17 -040087 mdp/mdp5/mdp5_cmd_encoder.o
Rob Clarkc8afe682013-06-26 12:44:06 -040088
Clarence Ipc3797e62016-09-22 14:51:39 -040089msm_drm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
90msm_drm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
91msm_drm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
Hai Li1bf4d7c2015-08-13 17:45:53 -040092
93ifeq ($(CONFIG_DRM_MSM_DSI_PLL),y)
Clarence Ipc3797e62016-09-22 14:51:39 -040094msm_drm-y += dsi/pll/dsi_pll.o
95msm_drm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/pll/dsi_pll_28nm.o
96msm_drm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/pll/dsi_pll_28nm_8960.o
Hai Li1bf4d7c2015-08-13 17:45:53 -040097endif
Clarence Ipc3797e62016-09-22 14:51:39 -040098msm_drm-$(CONFIG_DRM_MSM_DSI_STAGING) += dsi-staging/dsi_phy.o \
Padmanabhan Komandurudbd2fb02016-12-02 15:18:49 +053099 dsi-staging/dsi_pwr.o \
Ajay Singh Parmard7019152016-06-10 16:46:47 -0700100 dsi-staging/dsi_phy.o \
Padmanabhan Komanduru56611ef2016-12-19 12:21:11 +0530101 dsi-staging/dsi_phy_hw_v2_0.o \
102 dsi-staging/dsi_phy_hw_v3_0.o \
103 dsi-staging/dsi_phy_timing_calc.o \
104 dsi-staging/dsi_phy_timing_v2_0.o \
105 dsi-staging/dsi_phy_timing_v3_0.o \
Padmanabhan Komanduru8ee8ee52016-12-19 12:10:51 +0530106 dsi-staging/dsi_ctrl_hw_cmn.o \
Ajay Singh Parmard7019152016-06-10 16:46:47 -0700107 dsi-staging/dsi_ctrl_hw_1_4.o \
Padmanabhan Komanduru8ee8ee52016-12-19 12:10:51 +0530108 dsi-staging/dsi_ctrl_hw_2_0.o \
Ajay Singh Parmard7019152016-06-10 16:46:47 -0700109 dsi-staging/dsi_ctrl.o \
110 dsi-staging/dsi_catalog.o \
111 dsi-staging/dsi_drm.o \
Ajay Singh Parmard7019152016-06-10 16:46:47 -0700112 dsi-staging/dsi_display.o \
113 dsi-staging/dsi_panel.o \
Padmanabhan Komandurudbd2fb02016-12-02 15:18:49 +0530114 dsi-staging/dsi_clk_manager.o \
Ajay Singh Parmard7019152016-06-10 16:46:47 -0700115 dsi-staging/dsi_display_test.o
Hai Li825637b2015-05-15 13:04:04 -0400116
Clarence Ip3649f8b2016-10-31 09:59:44 -0400117msm_drm-$(CONFIG_DRM_MSM_DSI_PLL) += dsi/pll/dsi_pll.o \
118 dsi/pll/dsi_pll_28nm.o
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700119
Clarence Ip3649f8b2016-10-31 09:59:44 -0400120msm_drm-$(CONFIG_DRM_MSM) += \
121 sde/sde_hw_catalog.o \
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700122 sde/sde_hw_cdm.o \
123 sde/sde_hw_dspp.o \
124 sde/sde_hw_intf.o \
125 sde/sde_hw_lm.o \
Clarence Ipc475b082016-06-26 09:27:23 -0400126 sde/sde_hw_ctl.o \
127 sde/sde_hw_util.o \
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700128 sde/sde_hw_sspp.o \
129 sde/sde_hw_wb.o \
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400130 sde/sde_hw_pingpong.o \
Clarence Ipc475b082016-06-26 09:27:23 -0400131 sde/sde_hw_top.o \
Ben Chan78647cd2016-06-26 22:02:47 -0400132 sde/sde_hw_interrupts.o \
Alan Kwong5d324e42016-07-28 22:56:18 -0400133 sde/sde_hw_vbif.o \
Lloyd Atkinson8772e202016-09-26 17:52:16 -0400134 sde/sde_formats.o \
Benet Clarkeb1b4462016-06-27 14:43:06 -0700135 sde_power_handle.o \
Gopikrishnaiah Anandan7e3e3f52016-12-22 11:13:05 -0800136 sde/sde_hw_color_processing_v1_7.o \
137 sde/sde_reg_dma.o \
138 sde/sde_hw_reg_dma_v1.o \
139
Clarence Ip8d5cbea2016-07-19 14:00:52 -0400140
Clarence Ip3649f8b2016-10-31 09:59:44 -0400141msm_drm-$(CONFIG_DRM_SDE_WB) += sde/sde_wb.o \
Alan Kwongbb27c092016-07-20 16:41:25 -0400142 sde/sde_encoder_phys_wb.o
Clarence Ip3649f8b2016-10-31 09:59:44 -0400143
144msm_drm-$(CONFIG_DRM_MSM) += \
145 msm_atomic.o \
146 msm_drv.o \
147 msm_fb.o \
148 msm_gem.o \
149 msm_gem_prime.o \
150 msm_gem_submit.o \
Dhaval Patel04c7e8e2016-09-26 20:14:31 -0700151 msm_gem_shrinker.o \
Clarence Ip3649f8b2016-10-31 09:59:44 -0400152 msm_gpu.o \
153 msm_iommu.o \
154 msm_smmu.o \
155 msm_perf.o \
156 msm_rd.o \
157 msm_ringbuffer.o \
Dhaval Patel04c7e8e2016-09-26 20:14:31 -0700158 msm_prop.o \
159 msm_fence.o \
160 msm_debugfs.o
Clarence Ip3649f8b2016-10-31 09:59:44 -0400161
162obj-$(CONFIG_DRM_MSM) += msm_drm.o