Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1 | /* |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 2 | * Support functions for OMAP GPIO |
| 3 | * |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 4 | * Copyright (C) 2003-2005 Nokia Corporation |
Jan Engelhardt | 96de0e2 | 2007-10-19 23:21:04 +0200 | [diff] [blame] | 5 | * Written by Juha Yrjölä <juha.yrjola@nokia.com> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 6 | * |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 7 | * Copyright (C) 2009 Texas Instruments |
| 8 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 9 | * |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 15 | #include <linux/init.h> |
| 16 | #include <linux/module.h> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 17 | #include <linux/interrupt.h> |
Rafael J. Wysocki | 3c437ff | 2011-04-22 22:02:46 +0200 | [diff] [blame] | 18 | #include <linux/syscore_ops.h> |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 19 | #include <linux/err.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 20 | #include <linux/clk.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 21 | #include <linux/io.h> |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 22 | #include <linux/device.h> |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 23 | #include <linux/pm_runtime.h> |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 24 | #include <linux/pm.h> |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 25 | #include <linux/of.h> |
| 26 | #include <linux/of_device.h> |
| 27 | #include <linux/irqdomain.h> |
Tony Lindgren | 4b25408 | 2012-08-30 15:37:24 -0700 | [diff] [blame] | 28 | #include <linux/gpio.h> |
| 29 | #include <linux/platform_data/gpio-omap.h> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 30 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 31 | #include <asm/mach/irq.h> |
| 32 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 33 | #define OFF_MODE 1 |
| 34 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 35 | static LIST_HEAD(omap_gpio_list); |
| 36 | |
Charulatha V | 6d62e21 | 2011-04-18 15:06:51 +0000 | [diff] [blame] | 37 | struct gpio_regs { |
| 38 | u32 irqenable1; |
| 39 | u32 irqenable2; |
| 40 | u32 wake_en; |
| 41 | u32 ctrl; |
| 42 | u32 oe; |
| 43 | u32 leveldetect0; |
| 44 | u32 leveldetect1; |
| 45 | u32 risingdetect; |
| 46 | u32 fallingdetect; |
| 47 | u32 dataout; |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 48 | u32 debounce; |
| 49 | u32 debounce_en; |
Charulatha V | 6d62e21 | 2011-04-18 15:06:51 +0000 | [diff] [blame] | 50 | }; |
| 51 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 52 | struct gpio_bank { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 53 | struct list_head node; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 54 | void __iomem *base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 55 | u16 irq; |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 56 | int irq_base; |
| 57 | struct irq_domain *domain; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 58 | u32 non_wakeup_gpios; |
| 59 | u32 enabled_non_wakeup_gpios; |
Charulatha V | 6d62e21 | 2011-04-18 15:06:51 +0000 | [diff] [blame] | 60 | struct gpio_regs context; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 61 | u32 saved_datain; |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 62 | u32 level_mask; |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 63 | u32 toggle_mask; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 64 | spinlock_t lock; |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 65 | struct gpio_chip chip; |
Jouni Hogander | 89db948 | 2008-12-10 17:35:24 -0800 | [diff] [blame] | 66 | struct clk *dbck; |
Charulatha V | 058af1e | 2009-11-22 10:11:25 -0800 | [diff] [blame] | 67 | u32 mod_usage; |
Kevin Hilman | 8865b9b | 2009-01-27 11:15:34 -0800 | [diff] [blame] | 68 | u32 dbck_enable_mask; |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 69 | bool dbck_enabled; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 70 | struct device *dev; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 71 | bool is_mpuio; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 72 | bool dbck_flag; |
Charulatha V | 0cde8d0 | 2011-05-05 20:15:16 +0530 | [diff] [blame] | 73 | bool loses_context; |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 74 | int stride; |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 75 | u32 width; |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 76 | int context_loss_count; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 77 | int power_mode; |
| 78 | bool workaround_enabled; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 79 | |
| 80 | void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 81 | int (*get_context_loss_count)(struct device *dev); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 82 | |
| 83 | struct omap_gpio_reg_offs *regs; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 84 | }; |
| 85 | |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 86 | #define GPIO_INDEX(bank, gpio) (gpio % bank->width) |
| 87 | #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio)) |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 88 | #define GPIO_MOD_CTRL_BIT BIT(0) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 89 | |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 90 | static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) |
| 91 | { |
| 92 | return gpio_irq - bank->irq_base + bank->chip.base; |
| 93 | } |
| 94 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 95 | static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) |
| 96 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 97 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 98 | u32 l; |
| 99 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 100 | reg += bank->regs->direction; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 101 | l = __raw_readl(reg); |
| 102 | if (is_input) |
| 103 | l |= 1 << gpio; |
| 104 | else |
| 105 | l &= ~(1 << gpio); |
| 106 | __raw_writel(l, reg); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 107 | bank->context.oe = l; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 108 | } |
| 109 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 110 | |
| 111 | /* set data out value using dedicate set/clear register */ |
| 112 | static void _set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, int enable) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 113 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 114 | void __iomem *reg = bank->base; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 115 | u32 l = GPIO_BIT(bank, gpio); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 116 | |
Tarun Kanti DebBarma | 2c836f7 | 2012-03-02 12:52:52 +0530 | [diff] [blame] | 117 | if (enable) { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 118 | reg += bank->regs->set_dataout; |
Tarun Kanti DebBarma | 2c836f7 | 2012-03-02 12:52:52 +0530 | [diff] [blame] | 119 | bank->context.dataout |= l; |
| 120 | } else { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 121 | reg += bank->regs->clr_dataout; |
Tarun Kanti DebBarma | 2c836f7 | 2012-03-02 12:52:52 +0530 | [diff] [blame] | 122 | bank->context.dataout &= ~l; |
| 123 | } |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 124 | |
| 125 | __raw_writel(l, reg); |
| 126 | } |
| 127 | |
| 128 | /* set data out value using mask register */ |
| 129 | static void _set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, int enable) |
| 130 | { |
| 131 | void __iomem *reg = bank->base + bank->regs->dataout; |
| 132 | u32 gpio_bit = GPIO_BIT(bank, gpio); |
| 133 | u32 l; |
| 134 | |
| 135 | l = __raw_readl(reg); |
| 136 | if (enable) |
| 137 | l |= gpio_bit; |
| 138 | else |
| 139 | l &= ~gpio_bit; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 140 | __raw_writel(l, reg); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 141 | bank->context.dataout = l; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 142 | } |
| 143 | |
Tarun Kanti DebBarma | 7fcca71 | 2012-02-27 11:46:09 +0530 | [diff] [blame] | 144 | static int _get_gpio_datain(struct gpio_bank *bank, int offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 145 | { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 146 | void __iomem *reg = bank->base + bank->regs->datain; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 147 | |
Tarun Kanti DebBarma | 7fcca71 | 2012-02-27 11:46:09 +0530 | [diff] [blame] | 148 | return (__raw_readl(reg) & (1 << offset)) != 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 149 | } |
| 150 | |
Tarun Kanti DebBarma | 7fcca71 | 2012-02-27 11:46:09 +0530 | [diff] [blame] | 151 | static int _get_gpio_dataout(struct gpio_bank *bank, int offset) |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 152 | { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 153 | void __iomem *reg = bank->base + bank->regs->dataout; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 154 | |
Tarun Kanti DebBarma | 7fcca71 | 2012-02-27 11:46:09 +0530 | [diff] [blame] | 155 | return (__raw_readl(reg) & (1 << offset)) != 0; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 156 | } |
| 157 | |
Kevin Hilman | ece9528 | 2011-07-12 08:18:15 -0700 | [diff] [blame] | 158 | static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) |
| 159 | { |
| 160 | int l = __raw_readl(base + reg); |
| 161 | |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 162 | if (set) |
Kevin Hilman | ece9528 | 2011-07-12 08:18:15 -0700 | [diff] [blame] | 163 | l |= mask; |
| 164 | else |
| 165 | l &= ~mask; |
| 166 | |
| 167 | __raw_writel(l, base + reg); |
| 168 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 169 | |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 170 | static inline void _gpio_dbck_enable(struct gpio_bank *bank) |
| 171 | { |
| 172 | if (bank->dbck_enable_mask && !bank->dbck_enabled) { |
| 173 | clk_enable(bank->dbck); |
| 174 | bank->dbck_enabled = true; |
Grazvydas Ignotas | 9e303f2 | 2012-06-16 22:01:25 +0300 | [diff] [blame] | 175 | |
| 176 | __raw_writel(bank->dbck_enable_mask, |
| 177 | bank->base + bank->regs->debounce_en); |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 178 | } |
| 179 | } |
| 180 | |
| 181 | static inline void _gpio_dbck_disable(struct gpio_bank *bank) |
| 182 | { |
| 183 | if (bank->dbck_enable_mask && bank->dbck_enabled) { |
Grazvydas Ignotas | 9e303f2 | 2012-06-16 22:01:25 +0300 | [diff] [blame] | 184 | /* |
| 185 | * Disable debounce before cutting it's clock. If debounce is |
| 186 | * enabled but the clock is not, GPIO module seems to be unable |
| 187 | * to detect events and generate interrupts at least on OMAP3. |
| 188 | */ |
| 189 | __raw_writel(0, bank->base + bank->regs->debounce_en); |
| 190 | |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 191 | clk_disable(bank->dbck); |
| 192 | bank->dbck_enabled = false; |
| 193 | } |
| 194 | } |
| 195 | |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 196 | /** |
| 197 | * _set_gpio_debounce - low level gpio debounce time |
| 198 | * @bank: the gpio bank we're acting upon |
| 199 | * @gpio: the gpio number on this @gpio |
| 200 | * @debounce: debounce time to use |
| 201 | * |
| 202 | * OMAP's debounce time is in 31us steps so we need |
| 203 | * to convert and round up to the closest unit. |
| 204 | */ |
| 205 | static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, |
| 206 | unsigned debounce) |
| 207 | { |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 208 | void __iomem *reg; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 209 | u32 val; |
| 210 | u32 l; |
| 211 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 212 | if (!bank->dbck_flag) |
| 213 | return; |
| 214 | |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 215 | if (debounce < 32) |
| 216 | debounce = 0x01; |
| 217 | else if (debounce > 7936) |
| 218 | debounce = 0xff; |
| 219 | else |
| 220 | debounce = (debounce / 0x1f) - 1; |
| 221 | |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 222 | l = GPIO_BIT(bank, gpio); |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 223 | |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame] | 224 | clk_enable(bank->dbck); |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 225 | reg = bank->base + bank->regs->debounce; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 226 | __raw_writel(debounce, reg); |
| 227 | |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 228 | reg = bank->base + bank->regs->debounce_en; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 229 | val = __raw_readl(reg); |
| 230 | |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame] | 231 | if (debounce) |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 232 | val |= l; |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame] | 233 | else |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 234 | val &= ~l; |
Kevin Hilman | f7ec0b0 | 2010-06-09 13:53:07 +0300 | [diff] [blame] | 235 | bank->dbck_enable_mask = val; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 236 | |
| 237 | __raw_writel(val, reg); |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame] | 238 | clk_disable(bank->dbck); |
| 239 | /* |
| 240 | * Enable debounce clock per module. |
| 241 | * This call is mandatory because in omap_gpio_request() when |
| 242 | * *_runtime_get_sync() is called, _gpio_dbck_enable() within |
| 243 | * runtime callbck fails to turn on dbck because dbck_enable_mask |
| 244 | * used within _gpio_dbck_enable() is still not initialized at |
| 245 | * that point. Therefore we have to enable dbck here. |
| 246 | */ |
| 247 | _gpio_dbck_enable(bank); |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 248 | if (bank->dbck_enable_mask) { |
| 249 | bank->context.debounce = debounce; |
| 250 | bank->context.debounce_en = val; |
| 251 | } |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 252 | } |
| 253 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 254 | static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio, |
Tarun Kanti DebBarma | 00ece7e | 2011-11-25 15:41:06 +0530 | [diff] [blame] | 255 | unsigned trigger) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 256 | { |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 257 | void __iomem *base = bank->base; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 258 | u32 gpio_bit = 1 << gpio; |
| 259 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 260 | _gpio_rmw(base, bank->regs->leveldetect0, gpio_bit, |
| 261 | trigger & IRQ_TYPE_LEVEL_LOW); |
| 262 | _gpio_rmw(base, bank->regs->leveldetect1, gpio_bit, |
| 263 | trigger & IRQ_TYPE_LEVEL_HIGH); |
| 264 | _gpio_rmw(base, bank->regs->risingdetect, gpio_bit, |
| 265 | trigger & IRQ_TYPE_EDGE_RISING); |
| 266 | _gpio_rmw(base, bank->regs->fallingdetect, gpio_bit, |
| 267 | trigger & IRQ_TYPE_EDGE_FALLING); |
| 268 | |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 269 | bank->context.leveldetect0 = |
| 270 | __raw_readl(bank->base + bank->regs->leveldetect0); |
| 271 | bank->context.leveldetect1 = |
| 272 | __raw_readl(bank->base + bank->regs->leveldetect1); |
| 273 | bank->context.risingdetect = |
| 274 | __raw_readl(bank->base + bank->regs->risingdetect); |
| 275 | bank->context.fallingdetect = |
| 276 | __raw_readl(bank->base + bank->regs->fallingdetect); |
| 277 | |
| 278 | if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 279 | _gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 280 | bank->context.wake_en = |
| 281 | __raw_readl(bank->base + bank->regs->wkup_en); |
| 282 | } |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 283 | |
Ambresh K | 55b220c | 2011-06-15 13:40:45 -0700 | [diff] [blame] | 284 | /* This part needs to be executed always for OMAP{34xx, 44xx} */ |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 285 | if (!bank->regs->irqctrl) { |
| 286 | /* On omap24xx proceed only when valid GPIO bit is set */ |
| 287 | if (bank->non_wakeup_gpios) { |
| 288 | if (!(bank->non_wakeup_gpios & gpio_bit)) |
| 289 | goto exit; |
| 290 | } |
| 291 | |
Chunqiu Wang | 699117a6 | 2009-06-24 17:13:39 +0000 | [diff] [blame] | 292 | /* |
| 293 | * Log the edge gpio and manually trigger the IRQ |
| 294 | * after resume if the input level changes |
| 295 | * to avoid irq lost during PER RET/OFF mode |
| 296 | * Applies for omap2 non-wakeup gpio and all omap3 gpios |
| 297 | */ |
| 298 | if (trigger & IRQ_TYPE_EDGE_BOTH) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 299 | bank->enabled_non_wakeup_gpios |= gpio_bit; |
| 300 | else |
| 301 | bank->enabled_non_wakeup_gpios &= ~gpio_bit; |
| 302 | } |
Kevin Hilman | 5eb3bb9 | 2007-05-05 11:40:29 -0700 | [diff] [blame] | 303 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 304 | exit: |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 305 | bank->level_mask = |
| 306 | __raw_readl(bank->base + bank->regs->leveldetect0) | |
| 307 | __raw_readl(bank->base + bank->regs->leveldetect1); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 308 | } |
| 309 | |
Uwe Kleine-König | 9198bcd | 2010-01-29 14:20:05 -0800 | [diff] [blame] | 310 | #ifdef CONFIG_ARCH_OMAP1 |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 311 | /* |
| 312 | * This only applies to chips that can't do both rising and falling edge |
| 313 | * detection at once. For all other chips, this function is a noop. |
| 314 | */ |
| 315 | static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) |
| 316 | { |
| 317 | void __iomem *reg = bank->base; |
| 318 | u32 l = 0; |
| 319 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 320 | if (!bank->regs->irqctrl) |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 321 | return; |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 322 | |
| 323 | reg += bank->regs->irqctrl; |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 324 | |
| 325 | l = __raw_readl(reg); |
| 326 | if ((l >> gpio) & 1) |
| 327 | l &= ~(1 << gpio); |
| 328 | else |
| 329 | l |= 1 << gpio; |
| 330 | |
| 331 | __raw_writel(l, reg); |
| 332 | } |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 333 | #else |
| 334 | static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {} |
Uwe Kleine-König | 9198bcd | 2010-01-29 14:20:05 -0800 | [diff] [blame] | 335 | #endif |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 336 | |
Tarun Kanti DebBarma | 00ece7e | 2011-11-25 15:41:06 +0530 | [diff] [blame] | 337 | static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, |
| 338 | unsigned trigger) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 339 | { |
| 340 | void __iomem *reg = bank->base; |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 341 | void __iomem *base = bank->base; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 342 | u32 l = 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 343 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 344 | if (bank->regs->leveldetect0 && bank->regs->wkup_en) { |
| 345 | set_gpio_trigger(bank, gpio, trigger); |
| 346 | } else if (bank->regs->irqctrl) { |
| 347 | reg += bank->regs->irqctrl; |
| 348 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 349 | l = __raw_readl(reg); |
Janusz Krzysztofik | 2950157 | 2010-04-05 11:38:06 +0000 | [diff] [blame] | 350 | if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 351 | bank->toggle_mask |= 1 << gpio; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 352 | if (trigger & IRQ_TYPE_EDGE_RISING) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 353 | l |= 1 << gpio; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 354 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 355 | l &= ~(1 << gpio); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 356 | else |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 357 | return -EINVAL; |
| 358 | |
| 359 | __raw_writel(l, reg); |
| 360 | } else if (bank->regs->edgectrl1) { |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 361 | if (gpio & 0x08) |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 362 | reg += bank->regs->edgectrl2; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 363 | else |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 364 | reg += bank->regs->edgectrl1; |
| 365 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 366 | gpio &= 0x07; |
| 367 | l = __raw_readl(reg); |
| 368 | l &= ~(3 << (gpio << 1)); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 369 | if (trigger & IRQ_TYPE_EDGE_RISING) |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 370 | l |= 2 << (gpio << 1); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 371 | if (trigger & IRQ_TYPE_EDGE_FALLING) |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 372 | l |= 1 << (gpio << 1); |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 373 | |
| 374 | /* Enable wake-up during idle for dynamic tick */ |
| 375 | _gpio_rmw(base, bank->regs->wkup_en, 1 << gpio, trigger); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 376 | bank->context.wake_en = |
| 377 | __raw_readl(bank->base + bank->regs->wkup_en); |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 378 | __raw_writel(l, reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 379 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 380 | return 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 381 | } |
| 382 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 383 | static int gpio_irq_type(struct irq_data *d, unsigned type) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 384 | { |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 385 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
Tony Lindgren | 4b25408 | 2012-08-30 15:37:24 -0700 | [diff] [blame] | 386 | unsigned gpio = 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 387 | int retval; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 388 | unsigned long flags; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 389 | |
Tony Lindgren | 4b25408 | 2012-08-30 15:37:24 -0700 | [diff] [blame] | 390 | #ifdef CONFIG_ARCH_OMAP1 |
| 391 | if (d->irq > IH_MPUIO_BASE) |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 392 | gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE); |
Tony Lindgren | 4b25408 | 2012-08-30 15:37:24 -0700 | [diff] [blame] | 393 | #endif |
| 394 | |
| 395 | if (!gpio) |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 396 | gpio = irq_to_gpio(bank, d->irq); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 397 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 398 | if (type & ~IRQ_TYPE_SENSE_MASK) |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 399 | return -EINVAL; |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 400 | |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 401 | if (!bank->regs->leveldetect0 && |
| 402 | (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 403 | return -EINVAL; |
| 404 | |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 405 | spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 406 | retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 407 | spin_unlock_irqrestore(&bank->lock, flags); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 408 | |
| 409 | if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 410 | __irq_set_handler_locked(d->irq, handle_level_irq); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 411 | else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 412 | __irq_set_handler_locked(d->irq, handle_edge_irq); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 413 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 414 | return retval; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 415 | } |
| 416 | |
| 417 | static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
| 418 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 419 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 420 | |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 421 | reg += bank->regs->irqstatus; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 422 | __raw_writel(gpio_mask, reg); |
Hiroshi DOYU | bee7930 | 2006-09-25 12:41:46 +0300 | [diff] [blame] | 423 | |
| 424 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 425 | if (bank->regs->irqstatus2) { |
| 426 | reg = bank->base + bank->regs->irqstatus2; |
Roger Quadros | bedfd15 | 2009-04-23 11:10:50 -0700 | [diff] [blame] | 427 | __raw_writel(gpio_mask, reg); |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 428 | } |
Roger Quadros | bedfd15 | 2009-04-23 11:10:50 -0700 | [diff] [blame] | 429 | |
| 430 | /* Flush posted write for the irq status to avoid spurious interrupts */ |
| 431 | __raw_readl(reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 432 | } |
| 433 | |
| 434 | static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) |
| 435 | { |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 436 | _clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 437 | } |
| 438 | |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 439 | static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) |
| 440 | { |
| 441 | void __iomem *reg = bank->base; |
Imre Deak | 99c4770 | 2006-06-26 16:16:07 -0700 | [diff] [blame] | 442 | u32 l; |
Kevin Hilman | c390aad0 | 2011-04-21 09:33:36 -0700 | [diff] [blame] | 443 | u32 mask = (1 << bank->width) - 1; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 444 | |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 445 | reg += bank->regs->irqenable; |
Imre Deak | 99c4770 | 2006-06-26 16:16:07 -0700 | [diff] [blame] | 446 | l = __raw_readl(reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 447 | if (bank->regs->irqenable_inv) |
Imre Deak | 99c4770 | 2006-06-26 16:16:07 -0700 | [diff] [blame] | 448 | l = ~l; |
| 449 | l &= mask; |
| 450 | return l; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 451 | } |
| 452 | |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 453 | static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 454 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 455 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 456 | u32 l; |
| 457 | |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 458 | if (bank->regs->set_irqenable) { |
| 459 | reg += bank->regs->set_irqenable; |
| 460 | l = gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 461 | bank->context.irqenable1 |= gpio_mask; |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 462 | } else { |
| 463 | reg += bank->regs->irqenable; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 464 | l = __raw_readl(reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 465 | if (bank->regs->irqenable_inv) |
| 466 | l &= ~gpio_mask; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 467 | else |
| 468 | l |= gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 469 | bank->context.irqenable1 = l; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 470 | } |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 471 | |
| 472 | __raw_writel(l, reg); |
| 473 | } |
| 474 | |
| 475 | static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
| 476 | { |
| 477 | void __iomem *reg = bank->base; |
| 478 | u32 l; |
| 479 | |
| 480 | if (bank->regs->clr_irqenable) { |
| 481 | reg += bank->regs->clr_irqenable; |
| 482 | l = gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 483 | bank->context.irqenable1 &= ~gpio_mask; |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 484 | } else { |
| 485 | reg += bank->regs->irqenable; |
| 486 | l = __raw_readl(reg); |
| 487 | if (bank->regs->irqenable_inv) |
| 488 | l |= gpio_mask; |
| 489 | else |
| 490 | l &= ~gpio_mask; |
Tarun Kanti DebBarma | 2a900eb | 2012-03-06 12:08:16 +0530 | [diff] [blame] | 491 | bank->context.irqenable1 = l; |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 492 | } |
| 493 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 494 | __raw_writel(l, reg); |
| 495 | } |
| 496 | |
| 497 | static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable) |
| 498 | { |
Tarun Kanti DebBarma | 8276536c | 2011-11-25 15:27:37 +0530 | [diff] [blame] | 499 | if (enable) |
| 500 | _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); |
| 501 | else |
| 502 | _disable_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 503 | } |
| 504 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 505 | /* |
| 506 | * Note that ENAWAKEUP needs to be enabled in GPIO_SYSCONFIG register. |
| 507 | * 1510 does not seem to have a wake-up register. If JTAG is connected |
| 508 | * to the target, system will wake up always on GPIO events. While |
| 509 | * system is running all registered GPIO interrupts need to have wake-up |
| 510 | * enabled. When system is suspended, only selected GPIO interrupts need |
| 511 | * to have wake-up enabled. |
| 512 | */ |
| 513 | static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) |
| 514 | { |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 515 | u32 gpio_bit = GPIO_BIT(bank, gpio); |
| 516 | unsigned long flags; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 517 | |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 518 | if (bank->non_wakeup_gpios & gpio_bit) { |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 519 | dev_err(bank->dev, |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 520 | "Unable to modify wakeup on non-wakeup GPIO%d\n", gpio); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 521 | return -EINVAL; |
| 522 | } |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 523 | |
| 524 | spin_lock_irqsave(&bank->lock, flags); |
| 525 | if (enable) |
Tarun Kanti DebBarma | 0aa2727 | 2012-04-27 19:43:33 +0530 | [diff] [blame] | 526 | bank->context.wake_en |= gpio_bit; |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 527 | else |
Tarun Kanti DebBarma | 0aa2727 | 2012-04-27 19:43:33 +0530 | [diff] [blame] | 528 | bank->context.wake_en &= ~gpio_bit; |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 529 | |
Tarun Kanti DebBarma | 0aa2727 | 2012-04-27 19:43:33 +0530 | [diff] [blame] | 530 | __raw_writel(bank->context.wake_en, bank->base + bank->regs->wkup_en); |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 531 | spin_unlock_irqrestore(&bank->lock, flags); |
| 532 | |
| 533 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 534 | } |
| 535 | |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 536 | static void _reset_gpio(struct gpio_bank *bank, int gpio) |
| 537 | { |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 538 | _set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 539 | _set_gpio_irqenable(bank, gpio, 0); |
| 540 | _clear_gpio_irqstatus(bank, gpio); |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 541 | _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 542 | } |
| 543 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 544 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 545 | static int gpio_wake_enable(struct irq_data *d, unsigned int enable) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 546 | { |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 547 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
| 548 | unsigned int gpio = irq_to_gpio(bank, d->irq); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 549 | |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 550 | return _set_gpio_wakeup(bank, gpio, enable); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 551 | } |
| 552 | |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 553 | static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 554 | { |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 555 | struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 556 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 557 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 558 | /* |
| 559 | * If this is the first gpio_request for the bank, |
| 560 | * enable the bank module. |
| 561 | */ |
| 562 | if (!bank->mod_usage) |
| 563 | pm_runtime_get_sync(bank->dev); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 564 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 565 | spin_lock_irqsave(&bank->lock, flags); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 566 | /* Set trigger to none. You need to enable the desired trigger with |
| 567 | * request_irq() or set_irq_type(). |
| 568 | */ |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 569 | _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 570 | |
Charulatha V | fad96ea | 2011-05-25 11:23:50 +0530 | [diff] [blame] | 571 | if (bank->regs->pinctrl) { |
| 572 | void __iomem *reg = bank->base + bank->regs->pinctrl; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 573 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 574 | /* Claim the pin for MPU */ |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 575 | __raw_writel(__raw_readl(reg) | (1 << offset), reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 576 | } |
Charulatha V | fad96ea | 2011-05-25 11:23:50 +0530 | [diff] [blame] | 577 | |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 578 | if (bank->regs->ctrl && !bank->mod_usage) { |
| 579 | void __iomem *reg = bank->base + bank->regs->ctrl; |
| 580 | u32 ctrl; |
Charulatha V | 9f09686 | 2010-05-14 12:05:27 -0700 | [diff] [blame] | 581 | |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 582 | ctrl = __raw_readl(reg); |
| 583 | /* Module is enabled, clocks are not gated */ |
| 584 | ctrl &= ~GPIO_MOD_CTRL_BIT; |
| 585 | __raw_writel(ctrl, reg); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 586 | bank->context.ctrl = ctrl; |
Charulatha V | 058af1e | 2009-11-22 10:11:25 -0800 | [diff] [blame] | 587 | } |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 588 | |
| 589 | bank->mod_usage |= 1 << offset; |
| 590 | |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 591 | spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 592 | |
| 593 | return 0; |
| 594 | } |
| 595 | |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 596 | static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 597 | { |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 598 | struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 599 | void __iomem *base = bank->base; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 600 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 601 | |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 602 | spin_lock_irqsave(&bank->lock, flags); |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 603 | |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 604 | if (bank->regs->wkup_en) { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 605 | /* Disable wake-up during idle for dynamic tick */ |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 606 | _gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 607 | bank->context.wake_en = |
| 608 | __raw_readl(bank->base + bank->regs->wkup_en); |
| 609 | } |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 610 | |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 611 | bank->mod_usage &= ~(1 << offset); |
Charulatha V | 9f09686 | 2010-05-14 12:05:27 -0700 | [diff] [blame] | 612 | |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 613 | if (bank->regs->ctrl && !bank->mod_usage) { |
| 614 | void __iomem *reg = bank->base + bank->regs->ctrl; |
| 615 | u32 ctrl; |
| 616 | |
| 617 | ctrl = __raw_readl(reg); |
| 618 | /* Module is disabled, clocks are gated */ |
| 619 | ctrl |= GPIO_MOD_CTRL_BIT; |
| 620 | __raw_writel(ctrl, reg); |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 621 | bank->context.ctrl = ctrl; |
Charulatha V | 058af1e | 2009-11-22 10:11:25 -0800 | [diff] [blame] | 622 | } |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 623 | |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 624 | _reset_gpio(bank, bank->chip.base + offset); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 625 | spin_unlock_irqrestore(&bank->lock, flags); |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 626 | |
| 627 | /* |
| 628 | * If this is the last gpio to be freed in the bank, |
| 629 | * disable the bank module. |
| 630 | */ |
| 631 | if (!bank->mod_usage) |
| 632 | pm_runtime_put(bank->dev); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 633 | } |
| 634 | |
| 635 | /* |
| 636 | * We need to unmask the GPIO bank interrupt as soon as possible to |
| 637 | * avoid missing GPIO interrupts for other lines in the bank. |
| 638 | * Then we need to mask-read-clear-unmask the triggered GPIO lines |
| 639 | * in the bank to avoid missing nested interrupts for a GPIO line. |
| 640 | * If we wait to unmask individual GPIO lines in the bank after the |
| 641 | * line's interrupt handler has been run, we may miss some nested |
| 642 | * interrupts. |
| 643 | */ |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 644 | static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 645 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 646 | void __iomem *isr_reg = NULL; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 647 | u32 isr; |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 648 | unsigned int gpio_irq, gpio_index; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 649 | struct gpio_bank *bank; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 650 | int unmasked = 0; |
Will Deacon | ee14418 | 2011-02-21 13:46:08 +0000 | [diff] [blame] | 651 | struct irq_chip *chip = irq_desc_get_chip(desc); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 652 | |
Will Deacon | ee14418 | 2011-02-21 13:46:08 +0000 | [diff] [blame] | 653 | chained_irq_enter(chip, desc); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 654 | |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 655 | bank = irq_get_handler_data(irq); |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 656 | isr_reg = bank->base + bank->regs->irqstatus; |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 657 | pm_runtime_get_sync(bank->dev); |
Evgeny Kuznetsov | b1cc4c5 | 2010-12-07 16:25:40 -0800 | [diff] [blame] | 658 | |
| 659 | if (WARN_ON(!isr_reg)) |
| 660 | goto exit; |
| 661 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 662 | while(1) { |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 663 | u32 isr_saved, level_mask = 0; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 664 | u32 enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 665 | |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 666 | enabled = _get_gpio_irqbank_mask(bank); |
| 667 | isr_saved = isr = __raw_readl(isr_reg) & enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 668 | |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 669 | if (bank->level_mask) |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 670 | level_mask = bank->level_mask & enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 671 | |
| 672 | /* clear edge sensitive interrupts before handler(s) are |
| 673 | called so that we don't miss any interrupt occurred while |
| 674 | executing them */ |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 675 | _disable_gpio_irqbank(bank, isr_saved & ~level_mask); |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 676 | _clear_gpio_irqbank(bank, isr_saved & ~level_mask); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 677 | _enable_gpio_irqbank(bank, isr_saved & ~level_mask); |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 678 | |
| 679 | /* if there is only edge sensitive GPIO pin interrupts |
| 680 | configured, we could unmask GPIO bank interrupt immediately */ |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 681 | if (!level_mask && !unmasked) { |
| 682 | unmasked = 1; |
Will Deacon | ee14418 | 2011-02-21 13:46:08 +0000 | [diff] [blame] | 683 | chained_irq_exit(chip, desc); |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 684 | } |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 685 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 686 | if (!isr) |
| 687 | break; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 688 | |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 689 | gpio_irq = bank->irq_base; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 690 | for (; isr != 0; isr >>= 1, gpio_irq++) { |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 691 | int gpio = irq_to_gpio(bank, gpio_irq); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 692 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 693 | if (!(isr & 1)) |
| 694 | continue; |
Thomas Gleixner | 29454dd | 2006-07-03 02:22:22 +0200 | [diff] [blame] | 695 | |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 696 | gpio_index = GPIO_INDEX(bank, gpio); |
| 697 | |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 698 | /* |
| 699 | * Some chips can't respond to both rising and falling |
| 700 | * at the same time. If this irq was requested with |
| 701 | * both flags, we need to flip the ICR data for the IRQ |
| 702 | * to respond to the IRQ for the opposite direction. |
| 703 | * This will be indicated in the bank toggle_mask. |
| 704 | */ |
| 705 | if (bank->toggle_mask & (1 << gpio_index)) |
| 706 | _toggle_gpio_edge_triggering(bank, gpio_index); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 707 | |
Dmitry Baryshkov | d8aa025 | 2008-10-09 13:36:24 +0100 | [diff] [blame] | 708 | generic_handle_irq(gpio_irq); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 709 | } |
Tony Lindgren | 1a8bfa1 | 2005-11-10 14:26:50 +0000 | [diff] [blame] | 710 | } |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 711 | /* if bank has any level sensitive GPIO pin interrupt |
| 712 | configured, we must unmask the bank interrupt only after |
| 713 | handler(s) are executed in order to avoid spurious bank |
| 714 | interrupt */ |
Evgeny Kuznetsov | b1cc4c5 | 2010-12-07 16:25:40 -0800 | [diff] [blame] | 715 | exit: |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 716 | if (!unmasked) |
Will Deacon | ee14418 | 2011-02-21 13:46:08 +0000 | [diff] [blame] | 717 | chained_irq_exit(chip, desc); |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 718 | pm_runtime_put(bank->dev); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 719 | } |
| 720 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 721 | static void gpio_irq_shutdown(struct irq_data *d) |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 722 | { |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 723 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 724 | unsigned int gpio = irq_to_gpio(bank, d->irq); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 725 | unsigned long flags; |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 726 | |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 727 | spin_lock_irqsave(&bank->lock, flags); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 728 | _reset_gpio(bank, gpio); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 729 | spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 730 | } |
| 731 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 732 | static void gpio_ack_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 733 | { |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 734 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 735 | unsigned int gpio = irq_to_gpio(bank, d->irq); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 736 | |
| 737 | _clear_gpio_irqstatus(bank, gpio); |
| 738 | } |
| 739 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 740 | static void gpio_mask_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 741 | { |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 742 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 743 | unsigned int gpio = irq_to_gpio(bank, d->irq); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 744 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 745 | |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 746 | spin_lock_irqsave(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 747 | _set_gpio_irqenable(bank, gpio, 0); |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 748 | _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 749 | spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 750 | } |
| 751 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 752 | static void gpio_unmask_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 753 | { |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 754 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
Benoit Cousson | 25db711 | 2012-02-23 21:50:10 +0100 | [diff] [blame] | 755 | unsigned int gpio = irq_to_gpio(bank, d->irq); |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 756 | unsigned int irq_mask = GPIO_BIT(bank, gpio); |
Thomas Gleixner | 8c04a17 | 2011-03-24 12:40:15 +0100 | [diff] [blame] | 757 | u32 trigger = irqd_get_trigger_type(d); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 758 | unsigned long flags; |
Kevin Hilman | 55b6019 | 2009-06-04 15:57:10 -0700 | [diff] [blame] | 759 | |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 760 | spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | 55b6019 | 2009-06-04 15:57:10 -0700 | [diff] [blame] | 761 | if (trigger) |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 762 | _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger); |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 763 | |
| 764 | /* For level-triggered GPIOs, the clearing must be done after |
| 765 | * the HW source is cleared, thus after the handler has run */ |
| 766 | if (bank->level_mask & irq_mask) { |
| 767 | _set_gpio_irqenable(bank, gpio, 0); |
| 768 | _clear_gpio_irqstatus(bank, gpio); |
| 769 | } |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 770 | |
Kevin Hilman | 4de8c75 | 2008-01-16 21:56:14 -0800 | [diff] [blame] | 771 | _set_gpio_irqenable(bank, gpio, 1); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 772 | spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 773 | } |
| 774 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 775 | static struct irq_chip gpio_irq_chip = { |
| 776 | .name = "GPIO", |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 777 | .irq_shutdown = gpio_irq_shutdown, |
| 778 | .irq_ack = gpio_ack_irq, |
| 779 | .irq_mask = gpio_mask_irq, |
| 780 | .irq_unmask = gpio_unmask_irq, |
| 781 | .irq_set_type = gpio_irq_type, |
| 782 | .irq_set_wake = gpio_wake_enable, |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 783 | }; |
| 784 | |
| 785 | /*---------------------------------------------------------------------*/ |
| 786 | |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 787 | static int omap_mpuio_suspend_noirq(struct device *dev) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 788 | { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 789 | struct platform_device *pdev = to_platform_device(dev); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 790 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 791 | void __iomem *mask_reg = bank->base + |
| 792 | OMAP_MPUIO_GPIO_MASKIT / bank->stride; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 793 | unsigned long flags; |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 794 | |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 795 | spin_lock_irqsave(&bank->lock, flags); |
Tarun Kanti DebBarma | 0aa2727 | 2012-04-27 19:43:33 +0530 | [diff] [blame] | 796 | __raw_writel(0xffff & ~bank->context.wake_en, mask_reg); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 797 | spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 798 | |
| 799 | return 0; |
| 800 | } |
| 801 | |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 802 | static int omap_mpuio_resume_noirq(struct device *dev) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 803 | { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 804 | struct platform_device *pdev = to_platform_device(dev); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 805 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 806 | void __iomem *mask_reg = bank->base + |
| 807 | OMAP_MPUIO_GPIO_MASKIT / bank->stride; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 808 | unsigned long flags; |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 809 | |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 810 | spin_lock_irqsave(&bank->lock, flags); |
Tarun Kanti DebBarma | 499fa28 | 2012-04-27 19:43:34 +0530 | [diff] [blame] | 811 | __raw_writel(bank->context.wake_en, mask_reg); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 812 | spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 813 | |
| 814 | return 0; |
| 815 | } |
| 816 | |
Alexey Dobriyan | 4714521 | 2009-12-14 18:00:08 -0800 | [diff] [blame] | 817 | static const struct dev_pm_ops omap_mpuio_dev_pm_ops = { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 818 | .suspend_noirq = omap_mpuio_suspend_noirq, |
| 819 | .resume_noirq = omap_mpuio_resume_noirq, |
| 820 | }; |
| 821 | |
Rafael J. Wysocki | 3c437ff | 2011-04-22 22:02:46 +0200 | [diff] [blame] | 822 | /* use platform_driver for this. */ |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 823 | static struct platform_driver omap_mpuio_driver = { |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 824 | .driver = { |
| 825 | .name = "mpuio", |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 826 | .pm = &omap_mpuio_dev_pm_ops, |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 827 | }, |
| 828 | }; |
| 829 | |
| 830 | static struct platform_device omap_mpuio_device = { |
| 831 | .name = "mpuio", |
| 832 | .id = -1, |
| 833 | .dev = { |
| 834 | .driver = &omap_mpuio_driver.driver, |
| 835 | } |
| 836 | /* could list the /proc/iomem resources */ |
| 837 | }; |
| 838 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 839 | static inline void mpuio_init(struct gpio_bank *bank) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 840 | { |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 841 | platform_set_drvdata(&omap_mpuio_device, bank); |
David Brownell | fcf126d | 2007-04-02 12:46:47 -0700 | [diff] [blame] | 842 | |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 843 | if (platform_driver_register(&omap_mpuio_driver) == 0) |
| 844 | (void) platform_device_register(&omap_mpuio_device); |
| 845 | } |
| 846 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 847 | /*---------------------------------------------------------------------*/ |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 848 | |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 849 | static int gpio_input(struct gpio_chip *chip, unsigned offset) |
| 850 | { |
| 851 | struct gpio_bank *bank; |
| 852 | unsigned long flags; |
| 853 | |
| 854 | bank = container_of(chip, struct gpio_bank, chip); |
| 855 | spin_lock_irqsave(&bank->lock, flags); |
| 856 | _set_gpio_direction(bank, offset, 1); |
| 857 | spin_unlock_irqrestore(&bank->lock, flags); |
| 858 | return 0; |
| 859 | } |
| 860 | |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 861 | static int gpio_is_input(struct gpio_bank *bank, int mask) |
| 862 | { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 863 | void __iomem *reg = bank->base + bank->regs->direction; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 864 | |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 865 | return __raw_readl(reg) & mask; |
| 866 | } |
| 867 | |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 868 | static int gpio_get(struct gpio_chip *chip, unsigned offset) |
| 869 | { |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 870 | struct gpio_bank *bank; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 871 | u32 mask; |
| 872 | |
Charulatha V | a8be8da | 2011-04-22 16:38:16 +0530 | [diff] [blame] | 873 | bank = container_of(chip, struct gpio_bank, chip); |
Tarun Kanti DebBarma | 7fcca71 | 2012-02-27 11:46:09 +0530 | [diff] [blame] | 874 | mask = (1 << offset); |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 875 | |
| 876 | if (gpio_is_input(bank, mask)) |
Tarun Kanti DebBarma | 7fcca71 | 2012-02-27 11:46:09 +0530 | [diff] [blame] | 877 | return _get_gpio_datain(bank, offset); |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 878 | else |
Tarun Kanti DebBarma | 7fcca71 | 2012-02-27 11:46:09 +0530 | [diff] [blame] | 879 | return _get_gpio_dataout(bank, offset); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 880 | } |
| 881 | |
| 882 | static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) |
| 883 | { |
| 884 | struct gpio_bank *bank; |
| 885 | unsigned long flags; |
| 886 | |
| 887 | bank = container_of(chip, struct gpio_bank, chip); |
| 888 | spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 889 | bank->set_dataout(bank, offset, value); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 890 | _set_gpio_direction(bank, offset, 0); |
| 891 | spin_unlock_irqrestore(&bank->lock, flags); |
| 892 | return 0; |
| 893 | } |
| 894 | |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 895 | static int gpio_debounce(struct gpio_chip *chip, unsigned offset, |
| 896 | unsigned debounce) |
| 897 | { |
| 898 | struct gpio_bank *bank; |
| 899 | unsigned long flags; |
| 900 | |
| 901 | bank = container_of(chip, struct gpio_bank, chip); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 902 | |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 903 | spin_lock_irqsave(&bank->lock, flags); |
| 904 | _set_gpio_debounce(bank, offset, debounce); |
| 905 | spin_unlock_irqrestore(&bank->lock, flags); |
| 906 | |
| 907 | return 0; |
| 908 | } |
| 909 | |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 910 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
| 911 | { |
| 912 | struct gpio_bank *bank; |
| 913 | unsigned long flags; |
| 914 | |
| 915 | bank = container_of(chip, struct gpio_bank, chip); |
| 916 | spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 917 | bank->set_dataout(bank, offset, value); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 918 | spin_unlock_irqrestore(&bank->lock, flags); |
| 919 | } |
| 920 | |
David Brownell | a007b70 | 2008-12-10 17:35:25 -0800 | [diff] [blame] | 921 | static int gpio_2irq(struct gpio_chip *chip, unsigned offset) |
| 922 | { |
| 923 | struct gpio_bank *bank; |
| 924 | |
| 925 | bank = container_of(chip, struct gpio_bank, chip); |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 926 | return bank->irq_base + offset; |
David Brownell | a007b70 | 2008-12-10 17:35:25 -0800 | [diff] [blame] | 927 | } |
| 928 | |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 929 | /*---------------------------------------------------------------------*/ |
| 930 | |
Tony Lindgren | 9a74805 | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 931 | static void __init omap_gpio_show_rev(struct gpio_bank *bank) |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 932 | { |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 933 | static bool called; |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 934 | u32 rev; |
| 935 | |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 936 | if (called || bank->regs->revision == USHRT_MAX) |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 937 | return; |
| 938 | |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 939 | rev = __raw_readw(bank->base + bank->regs->revision); |
| 940 | pr_info("OMAP GPIO hardware version %d.%d\n", |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 941 | (rev >> 4) & 0x0f, rev & 0x0f); |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 942 | |
| 943 | called = true; |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 944 | } |
| 945 | |
David Brownell | 8ba55c5 | 2008-02-26 11:10:50 -0800 | [diff] [blame] | 946 | /* This lock class tells lockdep that GPIO irqs are in a different |
| 947 | * category than their parents, so it won't report false recursion. |
| 948 | */ |
| 949 | static struct lock_class_key gpio_lock_class; |
| 950 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 951 | static void omap_gpio_mod_init(struct gpio_bank *bank) |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 952 | { |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 953 | void __iomem *base = bank->base; |
| 954 | u32 l = 0xffffffff; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 955 | |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 956 | if (bank->width == 16) |
| 957 | l = 0xffff; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 958 | |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 959 | if (bank->is_mpuio) { |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 960 | __raw_writel(l, bank->base + bank->regs->irqenable); |
| 961 | return; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 962 | } |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 963 | |
| 964 | _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv); |
Tarun Kanti DebBarma | 6edd94d | 2012-04-30 12:50:12 +0530 | [diff] [blame] | 965 | _gpio_rmw(base, bank->regs->irqstatus, l, !bank->regs->irqenable_inv); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 966 | if (bank->regs->debounce_en) |
Tarun Kanti DebBarma | 6edd94d | 2012-04-30 12:50:12 +0530 | [diff] [blame] | 967 | __raw_writel(0, base + bank->regs->debounce_en); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 968 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 969 | /* Save OE default value (0xffffffff) in the context */ |
| 970 | bank->context.oe = __raw_readl(bank->base + bank->regs->direction); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 971 | /* Initialize interface clk ungated, module enabled */ |
| 972 | if (bank->regs->ctrl) |
Tarun Kanti DebBarma | 6edd94d | 2012-04-30 12:50:12 +0530 | [diff] [blame] | 973 | __raw_writel(0, base + bank->regs->ctrl); |
Tarun Kanti DebBarma | 3467201 | 2012-07-11 14:43:14 +0530 | [diff] [blame] | 974 | |
| 975 | bank->dbck = clk_get(bank->dev, "dbclk"); |
| 976 | if (IS_ERR(bank->dbck)) |
| 977 | dev_err(bank->dev, "Could not get gpio dbck\n"); |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 978 | } |
| 979 | |
Tony Lindgren | 8805f41 | 2012-03-05 15:32:38 -0800 | [diff] [blame] | 980 | static __devinit void |
Kevin Hilman | f8b46b5 | 2011-04-21 13:23:34 -0700 | [diff] [blame] | 981 | omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start, |
| 982 | unsigned int num) |
| 983 | { |
| 984 | struct irq_chip_generic *gc; |
| 985 | struct irq_chip_type *ct; |
| 986 | |
| 987 | gc = irq_alloc_generic_chip("MPUIO", 1, irq_start, bank->base, |
| 988 | handle_simple_irq); |
Todd Poynor | 8323374 | 2011-07-18 07:43:14 -0700 | [diff] [blame] | 989 | if (!gc) { |
| 990 | dev_err(bank->dev, "Memory alloc failed for gc\n"); |
| 991 | return; |
| 992 | } |
| 993 | |
Kevin Hilman | f8b46b5 | 2011-04-21 13:23:34 -0700 | [diff] [blame] | 994 | ct = gc->chip_types; |
| 995 | |
| 996 | /* NOTE: No ack required, reading IRQ status clears it. */ |
| 997 | ct->chip.irq_mask = irq_gc_mask_set_bit; |
| 998 | ct->chip.irq_unmask = irq_gc_mask_clr_bit; |
| 999 | ct->chip.irq_set_type = gpio_irq_type; |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 1000 | |
| 1001 | if (bank->regs->wkup_en) |
Kevin Hilman | f8b46b5 | 2011-04-21 13:23:34 -0700 | [diff] [blame] | 1002 | ct->chip.irq_set_wake = gpio_wake_enable, |
| 1003 | |
| 1004 | ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride; |
| 1005 | irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, |
| 1006 | IRQ_NOREQUEST | IRQ_NOPROBE, 0); |
| 1007 | } |
| 1008 | |
Russell King | d52b31d | 2011-05-27 13:56:12 -0700 | [diff] [blame] | 1009 | static void __devinit omap_gpio_chip_init(struct gpio_bank *bank) |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1010 | { |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1011 | int j; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1012 | static int gpio; |
| 1013 | |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1014 | /* |
| 1015 | * REVISIT eventually switch from OMAP-specific gpio structs |
| 1016 | * over to the generic ones |
| 1017 | */ |
| 1018 | bank->chip.request = omap_gpio_request; |
| 1019 | bank->chip.free = omap_gpio_free; |
| 1020 | bank->chip.direction_input = gpio_input; |
| 1021 | bank->chip.get = gpio_get; |
| 1022 | bank->chip.direction_output = gpio_output; |
| 1023 | bank->chip.set_debounce = gpio_debounce; |
| 1024 | bank->chip.set = gpio_set; |
| 1025 | bank->chip.to_irq = gpio_2irq; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1026 | if (bank->is_mpuio) { |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1027 | bank->chip.label = "mpuio"; |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 1028 | if (bank->regs->wkup_en) |
| 1029 | bank->chip.dev = &omap_mpuio_device.dev; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1030 | bank->chip.base = OMAP_MPUIO(0); |
| 1031 | } else { |
| 1032 | bank->chip.label = "gpio"; |
| 1033 | bank->chip.base = gpio; |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 1034 | gpio += bank->width; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1035 | } |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 1036 | bank->chip.ngpio = bank->width; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1037 | |
| 1038 | gpiochip_add(&bank->chip); |
| 1039 | |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1040 | for (j = bank->irq_base; j < bank->irq_base + bank->width; j++) { |
Thomas Gleixner | 1475b85 | 2011-03-22 17:11:09 +0100 | [diff] [blame] | 1041 | irq_set_lockdep_class(j, &gpio_lock_class); |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 1042 | irq_set_chip_data(j, bank); |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1043 | if (bank->is_mpuio) { |
Kevin Hilman | f8b46b5 | 2011-04-21 13:23:34 -0700 | [diff] [blame] | 1044 | omap_mpuio_alloc_gc(bank, j, bank->width); |
| 1045 | } else { |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 1046 | irq_set_chip(j, &gpio_irq_chip); |
Kevin Hilman | f8b46b5 | 2011-04-21 13:23:34 -0700 | [diff] [blame] | 1047 | irq_set_handler(j, handle_simple_irq); |
| 1048 | set_irq_flags(j, IRQF_VALID); |
| 1049 | } |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1050 | } |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 1051 | irq_set_chained_handler(bank->irq, gpio_irq_handler); |
| 1052 | irq_set_handler_data(bank->irq, bank); |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1053 | } |
| 1054 | |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1055 | static const struct of_device_id omap_gpio_match[]; |
| 1056 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1057 | static int __devinit omap_gpio_probe(struct platform_device *pdev) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1058 | { |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 1059 | struct device *dev = &pdev->dev; |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1060 | struct device_node *node = dev->of_node; |
| 1061 | const struct of_device_id *match; |
Uwe Kleine-König | f6817a2 | 2012-05-21 21:57:39 +0200 | [diff] [blame] | 1062 | const struct omap_gpio_platform_data *pdata; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1063 | struct resource *res; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1064 | struct gpio_bank *bank; |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1065 | int ret = 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1066 | |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1067 | match = of_match_device(of_match_ptr(omap_gpio_match), dev); |
| 1068 | |
| 1069 | pdata = match ? match->data : dev->platform_data; |
| 1070 | if (!pdata) |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 1071 | return -EINVAL; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1072 | |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 1073 | bank = devm_kzalloc(&pdev->dev, sizeof(struct gpio_bank), GFP_KERNEL); |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1074 | if (!bank) { |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 1075 | dev_err(dev, "Memory alloc failed\n"); |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 1076 | return -ENOMEM; |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1077 | } |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1078 | |
| 1079 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 1080 | if (unlikely(!res)) { |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 1081 | dev_err(dev, "Invalid IRQ resource\n"); |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 1082 | return -ENODEV; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1083 | } |
| 1084 | |
| 1085 | bank->irq = res->start; |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 1086 | bank->dev = dev; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1087 | bank->dbck_flag = pdata->dbck_flag; |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 1088 | bank->stride = pdata->bank_stride; |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 1089 | bank->width = pdata->bank_width; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1090 | bank->is_mpuio = pdata->is_mpuio; |
Charulatha V | 803a243 | 2011-05-05 17:04:12 +0530 | [diff] [blame] | 1091 | bank->non_wakeup_gpios = pdata->non_wakeup_gpios; |
Charulatha V | 0cde8d0 | 2011-05-05 20:15:16 +0530 | [diff] [blame] | 1092 | bank->loses_context = pdata->loses_context; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 1093 | bank->regs = pdata->regs; |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1094 | #ifdef CONFIG_OF_GPIO |
| 1095 | bank->chip.of_node = of_node_get(node); |
| 1096 | #endif |
| 1097 | |
| 1098 | bank->irq_base = irq_alloc_descs(-1, 0, bank->width, 0); |
| 1099 | if (bank->irq_base < 0) { |
| 1100 | dev_err(dev, "Couldn't allocate IRQ numbers\n"); |
| 1101 | return -ENODEV; |
| 1102 | } |
| 1103 | |
| 1104 | bank->domain = irq_domain_add_legacy(node, bank->width, bank->irq_base, |
| 1105 | 0, &irq_domain_simple_ops, NULL); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 1106 | |
| 1107 | if (bank->regs->set_dataout && bank->regs->clr_dataout) |
| 1108 | bank->set_dataout = _set_gpio_dataout_reg; |
| 1109 | else |
| 1110 | bank->set_dataout = _set_gpio_dataout_mask; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1111 | |
| 1112 | spin_lock_init(&bank->lock); |
| 1113 | |
| 1114 | /* Static mapping, never released */ |
| 1115 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1116 | if (unlikely(!res)) { |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 1117 | dev_err(dev, "Invalid mem resource\n"); |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 1118 | return -ENODEV; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1119 | } |
| 1120 | |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 1121 | if (!devm_request_mem_region(dev, res->start, resource_size(res), |
| 1122 | pdev->name)) { |
| 1123 | dev_err(dev, "Region already claimed\n"); |
| 1124 | return -EBUSY; |
| 1125 | } |
| 1126 | |
| 1127 | bank->base = devm_ioremap(dev, res->start, resource_size(res)); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1128 | if (!bank->base) { |
Benoit Cousson | 862ff64 | 2012-02-01 15:58:56 +0100 | [diff] [blame] | 1129 | dev_err(dev, "Could not ioremap\n"); |
Benoit Cousson | 96751fc | 2012-02-01 16:01:39 +0100 | [diff] [blame] | 1130 | return -ENOMEM; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1131 | } |
| 1132 | |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1133 | platform_set_drvdata(pdev, bank); |
| 1134 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1135 | pm_runtime_enable(bank->dev); |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1136 | pm_runtime_irq_safe(bank->dev); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1137 | pm_runtime_get_sync(bank->dev); |
| 1138 | |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1139 | if (bank->is_mpuio) |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1140 | mpuio_init(bank); |
| 1141 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1142 | omap_gpio_mod_init(bank); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1143 | omap_gpio_chip_init(bank); |
Tony Lindgren | 9a74805 | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1144 | omap_gpio_show_rev(bank); |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1145 | |
Jon Hunter | 7b86cef | 2012-07-03 11:05:50 -0500 | [diff] [blame] | 1146 | if (bank->loses_context) |
| 1147 | bank->get_context_loss_count = pdata->get_context_loss_count; |
| 1148 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1149 | pm_runtime_put(bank->dev); |
| 1150 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1151 | list_add_tail(&bank->node, &omap_gpio_list); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1152 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1153 | return ret; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1154 | } |
| 1155 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1156 | #ifdef CONFIG_ARCH_OMAP2PLUS |
| 1157 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1158 | #if defined(CONFIG_PM_RUNTIME) |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1159 | static void omap_gpio_restore_context(struct gpio_bank *bank); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1160 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1161 | static int omap_gpio_runtime_suspend(struct device *dev) |
| 1162 | { |
| 1163 | struct platform_device *pdev = to_platform_device(dev); |
| 1164 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
| 1165 | u32 l1 = 0, l2 = 0; |
| 1166 | unsigned long flags; |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1167 | u32 wake_low, wake_hi; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1168 | |
| 1169 | spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1170 | |
| 1171 | /* |
| 1172 | * Only edges can generate a wakeup event to the PRCM. |
| 1173 | * |
| 1174 | * Therefore, ensure any wake-up capable GPIOs have |
| 1175 | * edge-detection enabled before going idle to ensure a wakeup |
| 1176 | * to the PRCM is generated on a GPIO transition. (c.f. 34xx |
| 1177 | * NDA TRM 25.5.3.1) |
| 1178 | * |
| 1179 | * The normal values will be restored upon ->runtime_resume() |
| 1180 | * by writing back the values saved in bank->context. |
| 1181 | */ |
| 1182 | wake_low = bank->context.leveldetect0 & bank->context.wake_en; |
| 1183 | if (wake_low) |
| 1184 | __raw_writel(wake_low | bank->context.fallingdetect, |
| 1185 | bank->base + bank->regs->fallingdetect); |
| 1186 | wake_hi = bank->context.leveldetect1 & bank->context.wake_en; |
| 1187 | if (wake_hi) |
| 1188 | __raw_writel(wake_hi | bank->context.risingdetect, |
| 1189 | bank->base + bank->regs->risingdetect); |
| 1190 | |
Kevin Hilman | b3c64bc | 2012-05-17 16:42:16 -0700 | [diff] [blame] | 1191 | if (!bank->enabled_non_wakeup_gpios) |
| 1192 | goto update_gpio_context_count; |
| 1193 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1194 | if (bank->power_mode != OFF_MODE) { |
| 1195 | bank->power_mode = 0; |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 1196 | goto update_gpio_context_count; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1197 | } |
| 1198 | /* |
| 1199 | * If going to OFF, remove triggering for all |
| 1200 | * non-wakeup GPIOs. Otherwise spurious IRQs will be |
| 1201 | * generated. See OMAP2420 Errata item 1.101. |
| 1202 | */ |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1203 | bank->saved_datain = __raw_readl(bank->base + |
| 1204 | bank->regs->datain); |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1205 | l1 = bank->context.fallingdetect; |
| 1206 | l2 = bank->context.risingdetect; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1207 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1208 | l1 &= ~bank->enabled_non_wakeup_gpios; |
| 1209 | l2 &= ~bank->enabled_non_wakeup_gpios; |
| 1210 | |
| 1211 | __raw_writel(l1, bank->base + bank->regs->fallingdetect); |
| 1212 | __raw_writel(l2, bank->base + bank->regs->risingdetect); |
| 1213 | |
| 1214 | bank->workaround_enabled = true; |
| 1215 | |
Tarun Kanti DebBarma | 41d87cb | 2011-11-15 12:52:38 +0530 | [diff] [blame] | 1216 | update_gpio_context_count: |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1217 | if (bank->get_context_loss_count) |
| 1218 | bank->context_loss_count = |
| 1219 | bank->get_context_loss_count(bank->dev); |
| 1220 | |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 1221 | _gpio_dbck_disable(bank); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1222 | spin_unlock_irqrestore(&bank->lock, flags); |
| 1223 | |
| 1224 | return 0; |
| 1225 | } |
| 1226 | |
| 1227 | static int omap_gpio_runtime_resume(struct device *dev) |
| 1228 | { |
| 1229 | struct platform_device *pdev = to_platform_device(dev); |
| 1230 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
| 1231 | int context_lost_cnt_after; |
| 1232 | u32 l = 0, gen, gen0, gen1; |
| 1233 | unsigned long flags; |
| 1234 | |
| 1235 | spin_lock_irqsave(&bank->lock, flags); |
Tarun Kanti DebBarma | 72f83af9 | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 1236 | _gpio_dbck_enable(bank); |
Kevin Hilman | 68942ed | 2012-03-05 15:10:04 -0800 | [diff] [blame] | 1237 | |
| 1238 | /* |
| 1239 | * In ->runtime_suspend(), level-triggered, wakeup-enabled |
| 1240 | * GPIOs were set to edge trigger also in order to be able to |
| 1241 | * generate a PRCM wakeup. Here we restore the |
| 1242 | * pre-runtime_suspend() values for edge triggering. |
| 1243 | */ |
| 1244 | __raw_writel(bank->context.fallingdetect, |
| 1245 | bank->base + bank->regs->fallingdetect); |
| 1246 | __raw_writel(bank->context.risingdetect, |
| 1247 | bank->base + bank->regs->risingdetect); |
| 1248 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1249 | if (bank->get_context_loss_count) { |
| 1250 | context_lost_cnt_after = |
| 1251 | bank->get_context_loss_count(bank->dev); |
Kevin Hilman | 22770de | 2012-05-17 14:52:56 -0700 | [diff] [blame] | 1252 | if (context_lost_cnt_after != bank->context_loss_count) { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1253 | omap_gpio_restore_context(bank); |
| 1254 | } else { |
| 1255 | spin_unlock_irqrestore(&bank->lock, flags); |
| 1256 | return 0; |
| 1257 | } |
| 1258 | } |
| 1259 | |
Tarun Kanti DebBarma | 1b128703 | 2012-04-27 19:43:38 +0530 | [diff] [blame] | 1260 | if (!bank->workaround_enabled) { |
| 1261 | spin_unlock_irqrestore(&bank->lock, flags); |
| 1262 | return 0; |
| 1263 | } |
| 1264 | |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1265 | __raw_writel(bank->context.fallingdetect, |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1266 | bank->base + bank->regs->fallingdetect); |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1267 | __raw_writel(bank->context.risingdetect, |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1268 | bank->base + bank->regs->risingdetect); |
| 1269 | l = __raw_readl(bank->base + bank->regs->datain); |
| 1270 | |
| 1271 | /* |
| 1272 | * Check if any of the non-wakeup interrupt GPIOs have changed |
| 1273 | * state. If so, generate an IRQ by software. This is |
| 1274 | * horribly racy, but it's the best we can do to work around |
| 1275 | * this silicon bug. |
| 1276 | */ |
| 1277 | l ^= bank->saved_datain; |
| 1278 | l &= bank->enabled_non_wakeup_gpios; |
| 1279 | |
| 1280 | /* |
| 1281 | * No need to generate IRQs for the rising edge for gpio IRQs |
| 1282 | * configured with falling edge only; and vice versa. |
| 1283 | */ |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1284 | gen0 = l & bank->context.fallingdetect; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1285 | gen0 &= bank->saved_datain; |
| 1286 | |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1287 | gen1 = l & bank->context.risingdetect; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1288 | gen1 &= ~(bank->saved_datain); |
| 1289 | |
| 1290 | /* FIXME: Consider GPIO IRQs with level detections properly! */ |
Tarun Kanti DebBarma | c6f31c9 | 2012-04-27 19:43:32 +0530 | [diff] [blame] | 1291 | gen = l & (~(bank->context.fallingdetect) & |
| 1292 | ~(bank->context.risingdetect)); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1293 | /* Consider all GPIO IRQs needed to be updated */ |
| 1294 | gen |= gen0 | gen1; |
| 1295 | |
| 1296 | if (gen) { |
| 1297 | u32 old0, old1; |
| 1298 | |
| 1299 | old0 = __raw_readl(bank->base + bank->regs->leveldetect0); |
| 1300 | old1 = __raw_readl(bank->base + bank->regs->leveldetect1); |
| 1301 | |
Tarun Kanti DebBarma | 4e962e8 | 2012-04-27 19:43:37 +0530 | [diff] [blame] | 1302 | if (!bank->regs->irqstatus_raw0) { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1303 | __raw_writel(old0 | gen, bank->base + |
| 1304 | bank->regs->leveldetect0); |
| 1305 | __raw_writel(old1 | gen, bank->base + |
| 1306 | bank->regs->leveldetect1); |
| 1307 | } |
| 1308 | |
Tarun Kanti DebBarma | 4e962e8 | 2012-04-27 19:43:37 +0530 | [diff] [blame] | 1309 | if (bank->regs->irqstatus_raw0) { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1310 | __raw_writel(old0 | l, bank->base + |
| 1311 | bank->regs->leveldetect0); |
| 1312 | __raw_writel(old1 | l, bank->base + |
| 1313 | bank->regs->leveldetect1); |
| 1314 | } |
| 1315 | __raw_writel(old0, bank->base + bank->regs->leveldetect0); |
| 1316 | __raw_writel(old1, bank->base + bank->regs->leveldetect1); |
| 1317 | } |
| 1318 | |
| 1319 | bank->workaround_enabled = false; |
| 1320 | spin_unlock_irqrestore(&bank->lock, flags); |
| 1321 | |
| 1322 | return 0; |
| 1323 | } |
| 1324 | #endif /* CONFIG_PM_RUNTIME */ |
| 1325 | |
| 1326 | void omap2_gpio_prepare_for_idle(int pwr_mode) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1327 | { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1328 | struct gpio_bank *bank; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1329 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1330 | list_for_each_entry(bank, &omap_gpio_list, node) { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1331 | if (!bank->mod_usage || !bank->loses_context) |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1332 | continue; |
| 1333 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1334 | bank->power_mode = pwr_mode; |
| 1335 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1336 | pm_runtime_put_sync_suspend(bank->dev); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1337 | } |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1338 | } |
| 1339 | |
Kevin Hilman | 43ffcd9 | 2009-01-27 11:09:24 -0800 | [diff] [blame] | 1340 | void omap2_gpio_resume_after_idle(void) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1341 | { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1342 | struct gpio_bank *bank; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1343 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1344 | list_for_each_entry(bank, &omap_gpio_list, node) { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1345 | if (!bank->mod_usage || !bank->loses_context) |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1346 | continue; |
| 1347 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1348 | pm_runtime_get_sync(bank->dev); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1349 | } |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1350 | } |
| 1351 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1352 | #if defined(CONFIG_PM_RUNTIME) |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1353 | static void omap_gpio_restore_context(struct gpio_bank *bank) |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1354 | { |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1355 | __raw_writel(bank->context.wake_en, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1356 | bank->base + bank->regs->wkup_en); |
| 1357 | __raw_writel(bank->context.ctrl, bank->base + bank->regs->ctrl); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1358 | __raw_writel(bank->context.leveldetect0, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1359 | bank->base + bank->regs->leveldetect0); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1360 | __raw_writel(bank->context.leveldetect1, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1361 | bank->base + bank->regs->leveldetect1); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1362 | __raw_writel(bank->context.risingdetect, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1363 | bank->base + bank->regs->risingdetect); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1364 | __raw_writel(bank->context.fallingdetect, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1365 | bank->base + bank->regs->fallingdetect); |
Nishanth Menon | f86bcc3 | 2011-09-09 19:14:08 +0530 | [diff] [blame] | 1366 | if (bank->regs->set_dataout && bank->regs->clr_dataout) |
| 1367 | __raw_writel(bank->context.dataout, |
| 1368 | bank->base + bank->regs->set_dataout); |
| 1369 | else |
| 1370 | __raw_writel(bank->context.dataout, |
| 1371 | bank->base + bank->regs->dataout); |
Nishanth Menon | 6d13eaa | 2011-08-29 18:54:50 +0530 | [diff] [blame] | 1372 | __raw_writel(bank->context.oe, bank->base + bank->regs->direction); |
| 1373 | |
Nishanth Menon | ae54735 | 2011-09-09 19:08:58 +0530 | [diff] [blame] | 1374 | if (bank->dbck_enable_mask) { |
| 1375 | __raw_writel(bank->context.debounce, bank->base + |
| 1376 | bank->regs->debounce); |
| 1377 | __raw_writel(bank->context.debounce_en, |
| 1378 | bank->base + bank->regs->debounce_en); |
| 1379 | } |
Nishanth Menon | ba805be | 2011-08-29 18:41:08 +0530 | [diff] [blame] | 1380 | |
| 1381 | __raw_writel(bank->context.irqenable1, |
| 1382 | bank->base + bank->regs->irqenable); |
| 1383 | __raw_writel(bank->context.irqenable2, |
| 1384 | bank->base + bank->regs->irqenable2); |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1385 | } |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1386 | #endif /* CONFIG_PM_RUNTIME */ |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1387 | #else |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1388 | #define omap_gpio_runtime_suspend NULL |
| 1389 | #define omap_gpio_runtime_resume NULL |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1390 | #endif |
| 1391 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1392 | static const struct dev_pm_ops gpio_pm_ops = { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1393 | SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume, |
| 1394 | NULL) |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1395 | }; |
| 1396 | |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1397 | #if defined(CONFIG_OF) |
| 1398 | static struct omap_gpio_reg_offs omap2_gpio_regs = { |
| 1399 | .revision = OMAP24XX_GPIO_REVISION, |
| 1400 | .direction = OMAP24XX_GPIO_OE, |
| 1401 | .datain = OMAP24XX_GPIO_DATAIN, |
| 1402 | .dataout = OMAP24XX_GPIO_DATAOUT, |
| 1403 | .set_dataout = OMAP24XX_GPIO_SETDATAOUT, |
| 1404 | .clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT, |
| 1405 | .irqstatus = OMAP24XX_GPIO_IRQSTATUS1, |
| 1406 | .irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2, |
| 1407 | .irqenable = OMAP24XX_GPIO_IRQENABLE1, |
| 1408 | .irqenable2 = OMAP24XX_GPIO_IRQENABLE2, |
| 1409 | .set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1, |
| 1410 | .clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1, |
| 1411 | .debounce = OMAP24XX_GPIO_DEBOUNCE_VAL, |
| 1412 | .debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN, |
| 1413 | .ctrl = OMAP24XX_GPIO_CTRL, |
| 1414 | .wkup_en = OMAP24XX_GPIO_WAKE_EN, |
| 1415 | .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0, |
| 1416 | .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1, |
| 1417 | .risingdetect = OMAP24XX_GPIO_RISINGDETECT, |
| 1418 | .fallingdetect = OMAP24XX_GPIO_FALLINGDETECT, |
| 1419 | }; |
| 1420 | |
| 1421 | static struct omap_gpio_reg_offs omap4_gpio_regs = { |
| 1422 | .revision = OMAP4_GPIO_REVISION, |
| 1423 | .direction = OMAP4_GPIO_OE, |
| 1424 | .datain = OMAP4_GPIO_DATAIN, |
| 1425 | .dataout = OMAP4_GPIO_DATAOUT, |
| 1426 | .set_dataout = OMAP4_GPIO_SETDATAOUT, |
| 1427 | .clr_dataout = OMAP4_GPIO_CLEARDATAOUT, |
| 1428 | .irqstatus = OMAP4_GPIO_IRQSTATUS0, |
| 1429 | .irqstatus2 = OMAP4_GPIO_IRQSTATUS1, |
| 1430 | .irqenable = OMAP4_GPIO_IRQSTATUSSET0, |
| 1431 | .irqenable2 = OMAP4_GPIO_IRQSTATUSSET1, |
| 1432 | .set_irqenable = OMAP4_GPIO_IRQSTATUSSET0, |
| 1433 | .clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0, |
| 1434 | .debounce = OMAP4_GPIO_DEBOUNCINGTIME, |
| 1435 | .debounce_en = OMAP4_GPIO_DEBOUNCENABLE, |
| 1436 | .ctrl = OMAP4_GPIO_CTRL, |
| 1437 | .wkup_en = OMAP4_GPIO_IRQWAKEN0, |
| 1438 | .leveldetect0 = OMAP4_GPIO_LEVELDETECT0, |
| 1439 | .leveldetect1 = OMAP4_GPIO_LEVELDETECT1, |
| 1440 | .risingdetect = OMAP4_GPIO_RISINGDETECT, |
| 1441 | .fallingdetect = OMAP4_GPIO_FALLINGDETECT, |
| 1442 | }; |
| 1443 | |
Uwe Kleine-König | c06e676 | 2012-07-06 22:20:15 +0200 | [diff] [blame] | 1444 | const static struct omap_gpio_platform_data omap2_pdata = { |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1445 | .regs = &omap2_gpio_regs, |
| 1446 | .bank_width = 32, |
| 1447 | .dbck_flag = false, |
| 1448 | }; |
| 1449 | |
Uwe Kleine-König | c06e676 | 2012-07-06 22:20:15 +0200 | [diff] [blame] | 1450 | const static struct omap_gpio_platform_data omap3_pdata = { |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1451 | .regs = &omap2_gpio_regs, |
| 1452 | .bank_width = 32, |
| 1453 | .dbck_flag = true, |
| 1454 | }; |
| 1455 | |
Uwe Kleine-König | c06e676 | 2012-07-06 22:20:15 +0200 | [diff] [blame] | 1456 | const static struct omap_gpio_platform_data omap4_pdata = { |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1457 | .regs = &omap4_gpio_regs, |
| 1458 | .bank_width = 32, |
| 1459 | .dbck_flag = true, |
| 1460 | }; |
| 1461 | |
| 1462 | static const struct of_device_id omap_gpio_match[] = { |
| 1463 | { |
| 1464 | .compatible = "ti,omap4-gpio", |
| 1465 | .data = &omap4_pdata, |
| 1466 | }, |
| 1467 | { |
| 1468 | .compatible = "ti,omap3-gpio", |
| 1469 | .data = &omap3_pdata, |
| 1470 | }, |
| 1471 | { |
| 1472 | .compatible = "ti,omap2-gpio", |
| 1473 | .data = &omap2_pdata, |
| 1474 | }, |
| 1475 | { }, |
| 1476 | }; |
| 1477 | MODULE_DEVICE_TABLE(of, omap_gpio_match); |
| 1478 | #endif |
| 1479 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1480 | static struct platform_driver omap_gpio_driver = { |
| 1481 | .probe = omap_gpio_probe, |
| 1482 | .driver = { |
| 1483 | .name = "omap_gpio", |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1484 | .pm = &gpio_pm_ops, |
Benoit Cousson | 384ebe1 | 2011-08-16 11:53:02 +0200 | [diff] [blame] | 1485 | .of_match_table = of_match_ptr(omap_gpio_match), |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1486 | }, |
| 1487 | }; |
| 1488 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1489 | /* |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1490 | * gpio driver register needs to be done before |
| 1491 | * machine_init functions access gpio APIs. |
| 1492 | * Hence omap_gpio_drv_reg() is a postcore_initcall. |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1493 | */ |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1494 | static int __init omap_gpio_drv_reg(void) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1495 | { |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1496 | return platform_driver_register(&omap_gpio_driver); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1497 | } |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1498 | postcore_initcall(omap_gpio_drv_reg); |