blob: 94cbc842fbc3a1363de61b8b7d08f2e4b56daeaf [file] [log] [blame]
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001/*
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01002 * Support functions for OMAP GPIO
3 *
Tony Lindgren92105bb2005-09-07 17:20:26 +01004 * Copyright (C) 2003-2005 Nokia Corporation
Jan Engelhardt96de0e22007-10-19 23:21:04 +02005 * Written by Juha Yrjölä <juha.yrjola@nokia.com>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01006 *
Santosh Shilimkar44169072009-05-28 14:16:04 -07007 * Copyright (C) 2009 Texas Instruments
8 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
9 *
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010010 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010015#include <linux/init.h>
16#include <linux/module.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010017#include <linux/interrupt.h>
Rafael J. Wysocki3c437ff2011-04-22 22:02:46 +020018#include <linux/syscore_ops.h>
Tony Lindgren92105bb2005-09-07 17:20:26 +010019#include <linux/err.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000020#include <linux/clk.h>
Russell Kingfced80c2008-09-06 12:10:45 +010021#include <linux/io.h>
Benoit Cousson96751fc2012-02-01 16:01:39 +010022#include <linux/device.h>
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -080023#include <linux/pm_runtime.h>
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +053024#include <linux/pm.h>
Benoit Cousson384ebe12011-08-16 11:53:02 +020025#include <linux/of.h>
26#include <linux/of_device.h>
27#include <linux/irqdomain.h>
Tony Lindgren4b254082012-08-30 15:37:24 -070028#include <linux/gpio.h>
29#include <linux/platform_data/gpio-omap.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010030
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010031#include <asm/mach/irq.h>
32
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +053033#define OFF_MODE 1
34
Charulatha V03e128c2011-05-05 19:58:01 +053035static LIST_HEAD(omap_gpio_list);
36
Charulatha V6d62e212011-04-18 15:06:51 +000037struct gpio_regs {
38 u32 irqenable1;
39 u32 irqenable2;
40 u32 wake_en;
41 u32 ctrl;
42 u32 oe;
43 u32 leveldetect0;
44 u32 leveldetect1;
45 u32 risingdetect;
46 u32 fallingdetect;
47 u32 dataout;
Nishanth Menonae547352011-09-09 19:08:58 +053048 u32 debounce;
49 u32 debounce_en;
Charulatha V6d62e212011-04-18 15:06:51 +000050};
51
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010052struct gpio_bank {
Charulatha V03e128c2011-05-05 19:58:01 +053053 struct list_head node;
Tony Lindgren92105bb2005-09-07 17:20:26 +010054 void __iomem *base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010055 u16 irq;
Benoit Cousson384ebe12011-08-16 11:53:02 +020056 int irq_base;
57 struct irq_domain *domain;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -080058 u32 non_wakeup_gpios;
59 u32 enabled_non_wakeup_gpios;
Charulatha V6d62e212011-04-18 15:06:51 +000060 struct gpio_regs context;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -080061 u32 saved_datain;
Kevin Hilmanb144ff62008-01-16 21:56:15 -080062 u32 level_mask;
Cory Maccarrone4318f362010-01-08 10:29:04 -080063 u32 toggle_mask;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010064 spinlock_t lock;
David Brownell52e31342008-03-03 12:43:23 -080065 struct gpio_chip chip;
Jouni Hogander89db9482008-12-10 17:35:24 -080066 struct clk *dbck;
Charulatha V058af1e2009-11-22 10:11:25 -080067 u32 mod_usage;
Kevin Hilman8865b9b2009-01-27 11:15:34 -080068 u32 dbck_enable_mask;
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +053069 bool dbck_enabled;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -080070 struct device *dev;
Charulatha Vd0d665a2011-08-31 00:02:21 +053071 bool is_mpuio;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -080072 bool dbck_flag;
Charulatha V0cde8d02011-05-05 20:15:16 +053073 bool loses_context;
Tony Lindgren5de62b82010-12-07 16:26:58 -080074 int stride;
Kevin Hilmand5f46242011-04-21 09:23:00 -070075 u32 width;
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +053076 int context_loss_count;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +053077 int power_mode;
78 bool workaround_enabled;
Kevin Hilmanfa87931a2011-04-20 16:31:23 -070079
80 void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +053081 int (*get_context_loss_count)(struct device *dev);
Kevin Hilmanfa87931a2011-04-20 16:31:23 -070082
83 struct omap_gpio_reg_offs *regs;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010084};
85
Kevin Hilman129fd222011-04-22 07:59:07 -070086#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
87#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
Charulatha Vc8eef652011-05-02 15:21:42 +053088#define GPIO_MOD_CTRL_BIT BIT(0)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010089
Benoit Cousson25db7112012-02-23 21:50:10 +010090static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq)
91{
92 return gpio_irq - bank->irq_base + bank->chip.base;
93}
94
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010095static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
96{
Tony Lindgren92105bb2005-09-07 17:20:26 +010097 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010098 u32 l;
99
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700100 reg += bank->regs->direction;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100101 l = __raw_readl(reg);
102 if (is_input)
103 l |= 1 << gpio;
104 else
105 l &= ~(1 << gpio);
106 __raw_writel(l, reg);
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530107 bank->context.oe = l;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100108}
109
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700110
111/* set data out value using dedicate set/clear register */
112static void _set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, int enable)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100113{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100114 void __iomem *reg = bank->base;
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700115 u32 l = GPIO_BIT(bank, gpio);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100116
Tarun Kanti DebBarma2c836f72012-03-02 12:52:52 +0530117 if (enable) {
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700118 reg += bank->regs->set_dataout;
Tarun Kanti DebBarma2c836f72012-03-02 12:52:52 +0530119 bank->context.dataout |= l;
120 } else {
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700121 reg += bank->regs->clr_dataout;
Tarun Kanti DebBarma2c836f72012-03-02 12:52:52 +0530122 bank->context.dataout &= ~l;
123 }
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700124
125 __raw_writel(l, reg);
126}
127
128/* set data out value using mask register */
129static void _set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, int enable)
130{
131 void __iomem *reg = bank->base + bank->regs->dataout;
132 u32 gpio_bit = GPIO_BIT(bank, gpio);
133 u32 l;
134
135 l = __raw_readl(reg);
136 if (enable)
137 l |= gpio_bit;
138 else
139 l &= ~gpio_bit;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100140 __raw_writel(l, reg);
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530141 bank->context.dataout = l;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100142}
143
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530144static int _get_gpio_datain(struct gpio_bank *bank, int offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100145{
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700146 void __iomem *reg = bank->base + bank->regs->datain;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100147
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530148 return (__raw_readl(reg) & (1 << offset)) != 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100149}
150
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530151static int _get_gpio_dataout(struct gpio_bank *bank, int offset)
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300152{
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700153 void __iomem *reg = bank->base + bank->regs->dataout;
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300154
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530155 return (__raw_readl(reg) & (1 << offset)) != 0;
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300156}
157
Kevin Hilmanece95282011-07-12 08:18:15 -0700158static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set)
159{
160 int l = __raw_readl(base + reg);
161
Benoit Cousson862ff642012-02-01 15:58:56 +0100162 if (set)
Kevin Hilmanece95282011-07-12 08:18:15 -0700163 l |= mask;
164 else
165 l &= ~mask;
166
167 __raw_writel(l, base + reg);
168}
Tony Lindgren92105bb2005-09-07 17:20:26 +0100169
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +0530170static inline void _gpio_dbck_enable(struct gpio_bank *bank)
171{
172 if (bank->dbck_enable_mask && !bank->dbck_enabled) {
173 clk_enable(bank->dbck);
174 bank->dbck_enabled = true;
Grazvydas Ignotas9e303f22012-06-16 22:01:25 +0300175
176 __raw_writel(bank->dbck_enable_mask,
177 bank->base + bank->regs->debounce_en);
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +0530178 }
179}
180
181static inline void _gpio_dbck_disable(struct gpio_bank *bank)
182{
183 if (bank->dbck_enable_mask && bank->dbck_enabled) {
Grazvydas Ignotas9e303f22012-06-16 22:01:25 +0300184 /*
185 * Disable debounce before cutting it's clock. If debounce is
186 * enabled but the clock is not, GPIO module seems to be unable
187 * to detect events and generate interrupts at least on OMAP3.
188 */
189 __raw_writel(0, bank->base + bank->regs->debounce_en);
190
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +0530191 clk_disable(bank->dbck);
192 bank->dbck_enabled = false;
193 }
194}
195
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700196/**
197 * _set_gpio_debounce - low level gpio debounce time
198 * @bank: the gpio bank we're acting upon
199 * @gpio: the gpio number on this @gpio
200 * @debounce: debounce time to use
201 *
202 * OMAP's debounce time is in 31us steps so we need
203 * to convert and round up to the closest unit.
204 */
205static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
206 unsigned debounce)
207{
Kevin Hilman9942da02011-04-22 12:02:05 -0700208 void __iomem *reg;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700209 u32 val;
210 u32 l;
211
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -0800212 if (!bank->dbck_flag)
213 return;
214
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700215 if (debounce < 32)
216 debounce = 0x01;
217 else if (debounce > 7936)
218 debounce = 0xff;
219 else
220 debounce = (debounce / 0x1f) - 1;
221
Kevin Hilman129fd222011-04-22 07:59:07 -0700222 l = GPIO_BIT(bank, gpio);
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700223
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530224 clk_enable(bank->dbck);
Kevin Hilman9942da02011-04-22 12:02:05 -0700225 reg = bank->base + bank->regs->debounce;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700226 __raw_writel(debounce, reg);
227
Kevin Hilman9942da02011-04-22 12:02:05 -0700228 reg = bank->base + bank->regs->debounce_en;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700229 val = __raw_readl(reg);
230
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530231 if (debounce)
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700232 val |= l;
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530233 else
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700234 val &= ~l;
Kevin Hilmanf7ec0b02010-06-09 13:53:07 +0300235 bank->dbck_enable_mask = val;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700236
237 __raw_writel(val, reg);
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530238 clk_disable(bank->dbck);
239 /*
240 * Enable debounce clock per module.
241 * This call is mandatory because in omap_gpio_request() when
242 * *_runtime_get_sync() is called, _gpio_dbck_enable() within
243 * runtime callbck fails to turn on dbck because dbck_enable_mask
244 * used within _gpio_dbck_enable() is still not initialized at
245 * that point. Therefore we have to enable dbck here.
246 */
247 _gpio_dbck_enable(bank);
Nishanth Menonae547352011-09-09 19:08:58 +0530248 if (bank->dbck_enable_mask) {
249 bank->context.debounce = debounce;
250 bank->context.debounce_en = val;
251 }
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700252}
253
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530254static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
Tarun Kanti DebBarma00ece7e2011-11-25 15:41:06 +0530255 unsigned trigger)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100256{
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800257 void __iomem *base = bank->base;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100258 u32 gpio_bit = 1 << gpio;
259
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530260 _gpio_rmw(base, bank->regs->leveldetect0, gpio_bit,
261 trigger & IRQ_TYPE_LEVEL_LOW);
262 _gpio_rmw(base, bank->regs->leveldetect1, gpio_bit,
263 trigger & IRQ_TYPE_LEVEL_HIGH);
264 _gpio_rmw(base, bank->regs->risingdetect, gpio_bit,
265 trigger & IRQ_TYPE_EDGE_RISING);
266 _gpio_rmw(base, bank->regs->fallingdetect, gpio_bit,
267 trigger & IRQ_TYPE_EDGE_FALLING);
268
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530269 bank->context.leveldetect0 =
270 __raw_readl(bank->base + bank->regs->leveldetect0);
271 bank->context.leveldetect1 =
272 __raw_readl(bank->base + bank->regs->leveldetect1);
273 bank->context.risingdetect =
274 __raw_readl(bank->base + bank->regs->risingdetect);
275 bank->context.fallingdetect =
276 __raw_readl(bank->base + bank->regs->fallingdetect);
277
278 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530279 _gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0);
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530280 bank->context.wake_en =
281 __raw_readl(bank->base + bank->regs->wkup_en);
282 }
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530283
Ambresh K55b220c2011-06-15 13:40:45 -0700284 /* This part needs to be executed always for OMAP{34xx, 44xx} */
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530285 if (!bank->regs->irqctrl) {
286 /* On omap24xx proceed only when valid GPIO bit is set */
287 if (bank->non_wakeup_gpios) {
288 if (!(bank->non_wakeup_gpios & gpio_bit))
289 goto exit;
290 }
291
Chunqiu Wang699117a62009-06-24 17:13:39 +0000292 /*
293 * Log the edge gpio and manually trigger the IRQ
294 * after resume if the input level changes
295 * to avoid irq lost during PER RET/OFF mode
296 * Applies for omap2 non-wakeup gpio and all omap3 gpios
297 */
298 if (trigger & IRQ_TYPE_EDGE_BOTH)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800299 bank->enabled_non_wakeup_gpios |= gpio_bit;
300 else
301 bank->enabled_non_wakeup_gpios &= ~gpio_bit;
302 }
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700303
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530304exit:
Tarun Kanti DebBarma9ea14d82011-08-30 15:05:44 +0530305 bank->level_mask =
306 __raw_readl(bank->base + bank->regs->leveldetect0) |
307 __raw_readl(bank->base + bank->regs->leveldetect1);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100308}
309
Uwe Kleine-König9198bcd2010-01-29 14:20:05 -0800310#ifdef CONFIG_ARCH_OMAP1
Cory Maccarrone4318f362010-01-08 10:29:04 -0800311/*
312 * This only applies to chips that can't do both rising and falling edge
313 * detection at once. For all other chips, this function is a noop.
314 */
315static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
316{
317 void __iomem *reg = bank->base;
318 u32 l = 0;
319
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530320 if (!bank->regs->irqctrl)
Cory Maccarrone4318f362010-01-08 10:29:04 -0800321 return;
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530322
323 reg += bank->regs->irqctrl;
Cory Maccarrone4318f362010-01-08 10:29:04 -0800324
325 l = __raw_readl(reg);
326 if ((l >> gpio) & 1)
327 l &= ~(1 << gpio);
328 else
329 l |= 1 << gpio;
330
331 __raw_writel(l, reg);
332}
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530333#else
334static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {}
Uwe Kleine-König9198bcd2010-01-29 14:20:05 -0800335#endif
Cory Maccarrone4318f362010-01-08 10:29:04 -0800336
Tarun Kanti DebBarma00ece7e2011-11-25 15:41:06 +0530337static int _set_gpio_triggering(struct gpio_bank *bank, int gpio,
338 unsigned trigger)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100339{
340 void __iomem *reg = bank->base;
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530341 void __iomem *base = bank->base;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100342 u32 l = 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100343
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530344 if (bank->regs->leveldetect0 && bank->regs->wkup_en) {
345 set_gpio_trigger(bank, gpio, trigger);
346 } else if (bank->regs->irqctrl) {
347 reg += bank->regs->irqctrl;
348
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100349 l = __raw_readl(reg);
Janusz Krzysztofik29501572010-04-05 11:38:06 +0000350 if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
Cory Maccarrone4318f362010-01-08 10:29:04 -0800351 bank->toggle_mask |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100352 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100353 l |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100354 else if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100355 l &= ~(1 << gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100356 else
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530357 return -EINVAL;
358
359 __raw_writel(l, reg);
360 } else if (bank->regs->edgectrl1) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100361 if (gpio & 0x08)
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530362 reg += bank->regs->edgectrl2;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100363 else
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530364 reg += bank->regs->edgectrl1;
365
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100366 gpio &= 0x07;
367 l = __raw_readl(reg);
368 l &= ~(3 << (gpio << 1));
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100369 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100370 l |= 2 << (gpio << 1);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100371 if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100372 l |= 1 << (gpio << 1);
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530373
374 /* Enable wake-up during idle for dynamic tick */
375 _gpio_rmw(base, bank->regs->wkup_en, 1 << gpio, trigger);
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530376 bank->context.wake_en =
377 __raw_readl(bank->base + bank->regs->wkup_en);
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530378 __raw_writel(l, reg);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100379 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100380 return 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100381}
382
Lennert Buytenheke9191022010-11-29 11:17:17 +0100383static int gpio_irq_type(struct irq_data *d, unsigned type)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100384{
Benoit Cousson25db7112012-02-23 21:50:10 +0100385 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Tony Lindgren4b254082012-08-30 15:37:24 -0700386 unsigned gpio = 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100387 int retval;
David Brownella6472532008-03-03 04:33:30 -0800388 unsigned long flags;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100389
Tony Lindgren4b254082012-08-30 15:37:24 -0700390#ifdef CONFIG_ARCH_OMAP1
391 if (d->irq > IH_MPUIO_BASE)
Lennert Buytenheke9191022010-11-29 11:17:17 +0100392 gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
Tony Lindgren4b254082012-08-30 15:37:24 -0700393#endif
394
395 if (!gpio)
Benoit Cousson25db7112012-02-23 21:50:10 +0100396 gpio = irq_to_gpio(bank, d->irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100397
David Brownelle5c56ed2006-12-06 17:13:59 -0800398 if (type & ~IRQ_TYPE_SENSE_MASK)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100399 return -EINVAL;
David Brownelle5c56ed2006-12-06 17:13:59 -0800400
Tarun Kanti DebBarma9ea14d82011-08-30 15:05:44 +0530401 if (!bank->regs->leveldetect0 &&
402 (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
Tony Lindgren92105bb2005-09-07 17:20:26 +0100403 return -EINVAL;
404
David Brownella6472532008-03-03 04:33:30 -0800405 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilman129fd222011-04-22 07:59:07 -0700406 retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
David Brownella6472532008-03-03 04:33:30 -0800407 spin_unlock_irqrestore(&bank->lock, flags);
Kevin Hilman672e3022008-01-16 21:56:16 -0800408
409 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100410 __irq_set_handler_locked(d->irq, handle_level_irq);
Kevin Hilman672e3022008-01-16 21:56:16 -0800411 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100412 __irq_set_handler_locked(d->irq, handle_edge_irq);
Kevin Hilman672e3022008-01-16 21:56:16 -0800413
Tony Lindgren92105bb2005-09-07 17:20:26 +0100414 return retval;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100415}
416
417static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
418{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100419 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100420
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700421 reg += bank->regs->irqstatus;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100422 __raw_writel(gpio_mask, reg);
Hiroshi DOYUbee79302006-09-25 12:41:46 +0300423
424 /* Workaround for clearing DSP GPIO interrupts to allow retention */
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700425 if (bank->regs->irqstatus2) {
426 reg = bank->base + bank->regs->irqstatus2;
Roger Quadrosbedfd152009-04-23 11:10:50 -0700427 __raw_writel(gpio_mask, reg);
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700428 }
Roger Quadrosbedfd152009-04-23 11:10:50 -0700429
430 /* Flush posted write for the irq status to avoid spurious interrupts */
431 __raw_readl(reg);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100432}
433
434static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
435{
Kevin Hilman129fd222011-04-22 07:59:07 -0700436 _clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100437}
438
Imre Deakea6dedd2006-06-26 16:16:00 -0700439static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
440{
441 void __iomem *reg = bank->base;
Imre Deak99c47702006-06-26 16:16:07 -0700442 u32 l;
Kevin Hilmanc390aad02011-04-21 09:33:36 -0700443 u32 mask = (1 << bank->width) - 1;
Imre Deakea6dedd2006-06-26 16:16:00 -0700444
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700445 reg += bank->regs->irqenable;
Imre Deak99c47702006-06-26 16:16:07 -0700446 l = __raw_readl(reg);
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700447 if (bank->regs->irqenable_inv)
Imre Deak99c47702006-06-26 16:16:07 -0700448 l = ~l;
449 l &= mask;
450 return l;
Imre Deakea6dedd2006-06-26 16:16:00 -0700451}
452
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700453static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100454{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100455 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100456 u32 l;
457
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700458 if (bank->regs->set_irqenable) {
459 reg += bank->regs->set_irqenable;
460 l = gpio_mask;
Tarun Kanti DebBarma2a900eb2012-03-06 12:08:16 +0530461 bank->context.irqenable1 |= gpio_mask;
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700462 } else {
463 reg += bank->regs->irqenable;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100464 l = __raw_readl(reg);
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700465 if (bank->regs->irqenable_inv)
466 l &= ~gpio_mask;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100467 else
468 l |= gpio_mask;
Tarun Kanti DebBarma2a900eb2012-03-06 12:08:16 +0530469 bank->context.irqenable1 = l;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100470 }
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700471
472 __raw_writel(l, reg);
473}
474
475static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
476{
477 void __iomem *reg = bank->base;
478 u32 l;
479
480 if (bank->regs->clr_irqenable) {
481 reg += bank->regs->clr_irqenable;
482 l = gpio_mask;
Tarun Kanti DebBarma2a900eb2012-03-06 12:08:16 +0530483 bank->context.irqenable1 &= ~gpio_mask;
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700484 } else {
485 reg += bank->regs->irqenable;
486 l = __raw_readl(reg);
487 if (bank->regs->irqenable_inv)
488 l |= gpio_mask;
489 else
490 l &= ~gpio_mask;
Tarun Kanti DebBarma2a900eb2012-03-06 12:08:16 +0530491 bank->context.irqenable1 = l;
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700492 }
493
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100494 __raw_writel(l, reg);
495}
496
497static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable)
498{
Tarun Kanti DebBarma8276536c2011-11-25 15:27:37 +0530499 if (enable)
500 _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
501 else
502 _disable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100503}
504
Tony Lindgren92105bb2005-09-07 17:20:26 +0100505/*
506 * Note that ENAWAKEUP needs to be enabled in GPIO_SYSCONFIG register.
507 * 1510 does not seem to have a wake-up register. If JTAG is connected
508 * to the target, system will wake up always on GPIO events. While
509 * system is running all registered GPIO interrupts need to have wake-up
510 * enabled. When system is suspended, only selected GPIO interrupts need
511 * to have wake-up enabled.
512 */
513static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
514{
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700515 u32 gpio_bit = GPIO_BIT(bank, gpio);
516 unsigned long flags;
David Brownella6472532008-03-03 04:33:30 -0800517
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700518 if (bank->non_wakeup_gpios & gpio_bit) {
Benoit Cousson862ff642012-02-01 15:58:56 +0100519 dev_err(bank->dev,
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700520 "Unable to modify wakeup on non-wakeup GPIO%d\n", gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100521 return -EINVAL;
522 }
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700523
524 spin_lock_irqsave(&bank->lock, flags);
525 if (enable)
Tarun Kanti DebBarma0aa27272012-04-27 19:43:33 +0530526 bank->context.wake_en |= gpio_bit;
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700527 else
Tarun Kanti DebBarma0aa27272012-04-27 19:43:33 +0530528 bank->context.wake_en &= ~gpio_bit;
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700529
Tarun Kanti DebBarma0aa27272012-04-27 19:43:33 +0530530 __raw_writel(bank->context.wake_en, bank->base + bank->regs->wkup_en);
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700531 spin_unlock_irqrestore(&bank->lock, flags);
532
533 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100534}
535
Tony Lindgren4196dd62006-09-25 12:41:38 +0300536static void _reset_gpio(struct gpio_bank *bank, int gpio)
537{
Kevin Hilman129fd222011-04-22 07:59:07 -0700538 _set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300539 _set_gpio_irqenable(bank, gpio, 0);
540 _clear_gpio_irqstatus(bank, gpio);
Kevin Hilman129fd222011-04-22 07:59:07 -0700541 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300542}
543
Tony Lindgren92105bb2005-09-07 17:20:26 +0100544/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
Lennert Buytenheke9191022010-11-29 11:17:17 +0100545static int gpio_wake_enable(struct irq_data *d, unsigned int enable)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100546{
Benoit Cousson25db7112012-02-23 21:50:10 +0100547 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
548 unsigned int gpio = irq_to_gpio(bank, d->irq);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100549
Benoit Cousson25db7112012-02-23 21:50:10 +0100550 return _set_gpio_wakeup(bank, gpio, enable);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100551}
552
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800553static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100554{
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800555 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
David Brownella6472532008-03-03 04:33:30 -0800556 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100557
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530558 /*
559 * If this is the first gpio_request for the bank,
560 * enable the bank module.
561 */
562 if (!bank->mod_usage)
563 pm_runtime_get_sync(bank->dev);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100564
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530565 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300566 /* Set trigger to none. You need to enable the desired trigger with
567 * request_irq() or set_irq_type().
568 */
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800569 _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100570
Charulatha Vfad96ea2011-05-25 11:23:50 +0530571 if (bank->regs->pinctrl) {
572 void __iomem *reg = bank->base + bank->regs->pinctrl;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100573
Tony Lindgren92105bb2005-09-07 17:20:26 +0100574 /* Claim the pin for MPU */
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800575 __raw_writel(__raw_readl(reg) | (1 << offset), reg);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100576 }
Charulatha Vfad96ea2011-05-25 11:23:50 +0530577
Charulatha Vc8eef652011-05-02 15:21:42 +0530578 if (bank->regs->ctrl && !bank->mod_usage) {
579 void __iomem *reg = bank->base + bank->regs->ctrl;
580 u32 ctrl;
Charulatha V9f096862010-05-14 12:05:27 -0700581
Charulatha Vc8eef652011-05-02 15:21:42 +0530582 ctrl = __raw_readl(reg);
583 /* Module is enabled, clocks are not gated */
584 ctrl &= ~GPIO_MOD_CTRL_BIT;
585 __raw_writel(ctrl, reg);
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530586 bank->context.ctrl = ctrl;
Charulatha V058af1e2009-11-22 10:11:25 -0800587 }
Charulatha Vc8eef652011-05-02 15:21:42 +0530588
589 bank->mod_usage |= 1 << offset;
590
David Brownella6472532008-03-03 04:33:30 -0800591 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100592
593 return 0;
594}
595
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800596static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100597{
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800598 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +0530599 void __iomem *base = bank->base;
David Brownella6472532008-03-03 04:33:30 -0800600 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100601
David Brownella6472532008-03-03 04:33:30 -0800602 spin_lock_irqsave(&bank->lock, flags);
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +0530603
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530604 if (bank->regs->wkup_en) {
Tony Lindgren92105bb2005-09-07 17:20:26 +0100605 /* Disable wake-up during idle for dynamic tick */
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +0530606 _gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0);
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530607 bank->context.wake_en =
608 __raw_readl(bank->base + bank->regs->wkup_en);
609 }
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +0530610
Charulatha Vc8eef652011-05-02 15:21:42 +0530611 bank->mod_usage &= ~(1 << offset);
Charulatha V9f096862010-05-14 12:05:27 -0700612
Charulatha Vc8eef652011-05-02 15:21:42 +0530613 if (bank->regs->ctrl && !bank->mod_usage) {
614 void __iomem *reg = bank->base + bank->regs->ctrl;
615 u32 ctrl;
616
617 ctrl = __raw_readl(reg);
618 /* Module is disabled, clocks are gated */
619 ctrl |= GPIO_MOD_CTRL_BIT;
620 __raw_writel(ctrl, reg);
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530621 bank->context.ctrl = ctrl;
Charulatha V058af1e2009-11-22 10:11:25 -0800622 }
Charulatha Vc8eef652011-05-02 15:21:42 +0530623
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800624 _reset_gpio(bank, bank->chip.base + offset);
David Brownella6472532008-03-03 04:33:30 -0800625 spin_unlock_irqrestore(&bank->lock, flags);
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530626
627 /*
628 * If this is the last gpio to be freed in the bank,
629 * disable the bank module.
630 */
631 if (!bank->mod_usage)
632 pm_runtime_put(bank->dev);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100633}
634
635/*
636 * We need to unmask the GPIO bank interrupt as soon as possible to
637 * avoid missing GPIO interrupts for other lines in the bank.
638 * Then we need to mask-read-clear-unmask the triggered GPIO lines
639 * in the bank to avoid missing nested interrupts for a GPIO line.
640 * If we wait to unmask individual GPIO lines in the bank after the
641 * line's interrupt handler has been run, we may miss some nested
642 * interrupts.
643 */
Russell King10dd5ce2006-11-23 11:41:32 +0000644static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100645{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100646 void __iomem *isr_reg = NULL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100647 u32 isr;
Cory Maccarrone4318f362010-01-08 10:29:04 -0800648 unsigned int gpio_irq, gpio_index;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100649 struct gpio_bank *bank;
Imre Deakea6dedd2006-06-26 16:16:00 -0700650 int unmasked = 0;
Will Deaconee144182011-02-21 13:46:08 +0000651 struct irq_chip *chip = irq_desc_get_chip(desc);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100652
Will Deaconee144182011-02-21 13:46:08 +0000653 chained_irq_enter(chip, desc);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100654
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100655 bank = irq_get_handler_data(irq);
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700656 isr_reg = bank->base + bank->regs->irqstatus;
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530657 pm_runtime_get_sync(bank->dev);
Evgeny Kuznetsovb1cc4c52010-12-07 16:25:40 -0800658
659 if (WARN_ON(!isr_reg))
660 goto exit;
661
Tony Lindgren92105bb2005-09-07 17:20:26 +0100662 while(1) {
Tony Lindgren6e60e792006-04-02 17:46:23 +0100663 u32 isr_saved, level_mask = 0;
Imre Deakea6dedd2006-06-26 16:16:00 -0700664 u32 enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +0100665
Imre Deakea6dedd2006-06-26 16:16:00 -0700666 enabled = _get_gpio_irqbank_mask(bank);
667 isr_saved = isr = __raw_readl(isr_reg) & enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +0100668
Tarun Kanti DebBarma9ea14d82011-08-30 15:05:44 +0530669 if (bank->level_mask)
Kevin Hilmanb144ff62008-01-16 21:56:15 -0800670 level_mask = bank->level_mask & enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +0100671
672 /* clear edge sensitive interrupts before handler(s) are
673 called so that we don't miss any interrupt occurred while
674 executing them */
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700675 _disable_gpio_irqbank(bank, isr_saved & ~level_mask);
Tony Lindgren6e60e792006-04-02 17:46:23 +0100676 _clear_gpio_irqbank(bank, isr_saved & ~level_mask);
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700677 _enable_gpio_irqbank(bank, isr_saved & ~level_mask);
Tony Lindgren6e60e792006-04-02 17:46:23 +0100678
679 /* if there is only edge sensitive GPIO pin interrupts
680 configured, we could unmask GPIO bank interrupt immediately */
Imre Deakea6dedd2006-06-26 16:16:00 -0700681 if (!level_mask && !unmasked) {
682 unmasked = 1;
Will Deaconee144182011-02-21 13:46:08 +0000683 chained_irq_exit(chip, desc);
Imre Deakea6dedd2006-06-26 16:16:00 -0700684 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100685
Tony Lindgren92105bb2005-09-07 17:20:26 +0100686 if (!isr)
687 break;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100688
Benoit Cousson384ebe12011-08-16 11:53:02 +0200689 gpio_irq = bank->irq_base;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100690 for (; isr != 0; isr >>= 1, gpio_irq++) {
Benoit Cousson25db7112012-02-23 21:50:10 +0100691 int gpio = irq_to_gpio(bank, gpio_irq);
Cory Maccarrone4318f362010-01-08 10:29:04 -0800692
Tony Lindgren92105bb2005-09-07 17:20:26 +0100693 if (!(isr & 1))
694 continue;
Thomas Gleixner29454dd2006-07-03 02:22:22 +0200695
Benoit Cousson25db7112012-02-23 21:50:10 +0100696 gpio_index = GPIO_INDEX(bank, gpio);
697
Cory Maccarrone4318f362010-01-08 10:29:04 -0800698 /*
699 * Some chips can't respond to both rising and falling
700 * at the same time. If this irq was requested with
701 * both flags, we need to flip the ICR data for the IRQ
702 * to respond to the IRQ for the opposite direction.
703 * This will be indicated in the bank toggle_mask.
704 */
705 if (bank->toggle_mask & (1 << gpio_index))
706 _toggle_gpio_edge_triggering(bank, gpio_index);
Cory Maccarrone4318f362010-01-08 10:29:04 -0800707
Dmitry Baryshkovd8aa0252008-10-09 13:36:24 +0100708 generic_handle_irq(gpio_irq);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100709 }
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000710 }
Imre Deakea6dedd2006-06-26 16:16:00 -0700711 /* if bank has any level sensitive GPIO pin interrupt
712 configured, we must unmask the bank interrupt only after
713 handler(s) are executed in order to avoid spurious bank
714 interrupt */
Evgeny Kuznetsovb1cc4c52010-12-07 16:25:40 -0800715exit:
Imre Deakea6dedd2006-06-26 16:16:00 -0700716 if (!unmasked)
Will Deaconee144182011-02-21 13:46:08 +0000717 chained_irq_exit(chip, desc);
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530718 pm_runtime_put(bank->dev);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100719}
720
Lennert Buytenheke9191022010-11-29 11:17:17 +0100721static void gpio_irq_shutdown(struct irq_data *d)
Tony Lindgren4196dd62006-09-25 12:41:38 +0300722{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100723 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Benoit Cousson25db7112012-02-23 21:50:10 +0100724 unsigned int gpio = irq_to_gpio(bank, d->irq);
Colin Cross85ec7b92011-06-06 13:38:18 -0700725 unsigned long flags;
Tony Lindgren4196dd62006-09-25 12:41:38 +0300726
Colin Cross85ec7b92011-06-06 13:38:18 -0700727 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300728 _reset_gpio(bank, gpio);
Colin Cross85ec7b92011-06-06 13:38:18 -0700729 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300730}
731
Lennert Buytenheke9191022010-11-29 11:17:17 +0100732static void gpio_ack_irq(struct irq_data *d)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100733{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100734 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Benoit Cousson25db7112012-02-23 21:50:10 +0100735 unsigned int gpio = irq_to_gpio(bank, d->irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100736
737 _clear_gpio_irqstatus(bank, gpio);
738}
739
Lennert Buytenheke9191022010-11-29 11:17:17 +0100740static void gpio_mask_irq(struct irq_data *d)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100741{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100742 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Benoit Cousson25db7112012-02-23 21:50:10 +0100743 unsigned int gpio = irq_to_gpio(bank, d->irq);
Colin Cross85ec7b92011-06-06 13:38:18 -0700744 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100745
Colin Cross85ec7b92011-06-06 13:38:18 -0700746 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100747 _set_gpio_irqenable(bank, gpio, 0);
Kevin Hilman129fd222011-04-22 07:59:07 -0700748 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
Colin Cross85ec7b92011-06-06 13:38:18 -0700749 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100750}
751
Lennert Buytenheke9191022010-11-29 11:17:17 +0100752static void gpio_unmask_irq(struct irq_data *d)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100753{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100754 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Benoit Cousson25db7112012-02-23 21:50:10 +0100755 unsigned int gpio = irq_to_gpio(bank, d->irq);
Kevin Hilman129fd222011-04-22 07:59:07 -0700756 unsigned int irq_mask = GPIO_BIT(bank, gpio);
Thomas Gleixner8c04a172011-03-24 12:40:15 +0100757 u32 trigger = irqd_get_trigger_type(d);
Colin Cross85ec7b92011-06-06 13:38:18 -0700758 unsigned long flags;
Kevin Hilman55b60192009-06-04 15:57:10 -0700759
Colin Cross85ec7b92011-06-06 13:38:18 -0700760 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilman55b60192009-06-04 15:57:10 -0700761 if (trigger)
Kevin Hilman129fd222011-04-22 07:59:07 -0700762 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger);
Kevin Hilmanb144ff62008-01-16 21:56:15 -0800763
764 /* For level-triggered GPIOs, the clearing must be done after
765 * the HW source is cleared, thus after the handler has run */
766 if (bank->level_mask & irq_mask) {
767 _set_gpio_irqenable(bank, gpio, 0);
768 _clear_gpio_irqstatus(bank, gpio);
769 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100770
Kevin Hilman4de8c752008-01-16 21:56:14 -0800771 _set_gpio_irqenable(bank, gpio, 1);
Colin Cross85ec7b92011-06-06 13:38:18 -0700772 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100773}
774
David Brownelle5c56ed2006-12-06 17:13:59 -0800775static struct irq_chip gpio_irq_chip = {
776 .name = "GPIO",
Lennert Buytenheke9191022010-11-29 11:17:17 +0100777 .irq_shutdown = gpio_irq_shutdown,
778 .irq_ack = gpio_ack_irq,
779 .irq_mask = gpio_mask_irq,
780 .irq_unmask = gpio_unmask_irq,
781 .irq_set_type = gpio_irq_type,
782 .irq_set_wake = gpio_wake_enable,
David Brownelle5c56ed2006-12-06 17:13:59 -0800783};
784
785/*---------------------------------------------------------------------*/
786
Magnus Damm79ee0312009-07-08 13:22:04 +0200787static int omap_mpuio_suspend_noirq(struct device *dev)
David Brownell11a78b72006-12-06 17:14:11 -0800788{
Magnus Damm79ee0312009-07-08 13:22:04 +0200789 struct platform_device *pdev = to_platform_device(dev);
David Brownell11a78b72006-12-06 17:14:11 -0800790 struct gpio_bank *bank = platform_get_drvdata(pdev);
Tony Lindgren5de62b82010-12-07 16:26:58 -0800791 void __iomem *mask_reg = bank->base +
792 OMAP_MPUIO_GPIO_MASKIT / bank->stride;
David Brownella6472532008-03-03 04:33:30 -0800793 unsigned long flags;
David Brownell11a78b72006-12-06 17:14:11 -0800794
David Brownella6472532008-03-03 04:33:30 -0800795 spin_lock_irqsave(&bank->lock, flags);
Tarun Kanti DebBarma0aa27272012-04-27 19:43:33 +0530796 __raw_writel(0xffff & ~bank->context.wake_en, mask_reg);
David Brownella6472532008-03-03 04:33:30 -0800797 spin_unlock_irqrestore(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -0800798
799 return 0;
800}
801
Magnus Damm79ee0312009-07-08 13:22:04 +0200802static int omap_mpuio_resume_noirq(struct device *dev)
David Brownell11a78b72006-12-06 17:14:11 -0800803{
Magnus Damm79ee0312009-07-08 13:22:04 +0200804 struct platform_device *pdev = to_platform_device(dev);
David Brownell11a78b72006-12-06 17:14:11 -0800805 struct gpio_bank *bank = platform_get_drvdata(pdev);
Tony Lindgren5de62b82010-12-07 16:26:58 -0800806 void __iomem *mask_reg = bank->base +
807 OMAP_MPUIO_GPIO_MASKIT / bank->stride;
David Brownella6472532008-03-03 04:33:30 -0800808 unsigned long flags;
David Brownell11a78b72006-12-06 17:14:11 -0800809
David Brownella6472532008-03-03 04:33:30 -0800810 spin_lock_irqsave(&bank->lock, flags);
Tarun Kanti DebBarma499fa282012-04-27 19:43:34 +0530811 __raw_writel(bank->context.wake_en, mask_reg);
David Brownella6472532008-03-03 04:33:30 -0800812 spin_unlock_irqrestore(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -0800813
814 return 0;
815}
816
Alexey Dobriyan47145212009-12-14 18:00:08 -0800817static const struct dev_pm_ops omap_mpuio_dev_pm_ops = {
Magnus Damm79ee0312009-07-08 13:22:04 +0200818 .suspend_noirq = omap_mpuio_suspend_noirq,
819 .resume_noirq = omap_mpuio_resume_noirq,
820};
821
Rafael J. Wysocki3c437ff2011-04-22 22:02:46 +0200822/* use platform_driver for this. */
David Brownell11a78b72006-12-06 17:14:11 -0800823static struct platform_driver omap_mpuio_driver = {
David Brownell11a78b72006-12-06 17:14:11 -0800824 .driver = {
825 .name = "mpuio",
Magnus Damm79ee0312009-07-08 13:22:04 +0200826 .pm = &omap_mpuio_dev_pm_ops,
David Brownell11a78b72006-12-06 17:14:11 -0800827 },
828};
829
830static struct platform_device omap_mpuio_device = {
831 .name = "mpuio",
832 .id = -1,
833 .dev = {
834 .driver = &omap_mpuio_driver.driver,
835 }
836 /* could list the /proc/iomem resources */
837};
838
Charulatha V03e128c2011-05-05 19:58:01 +0530839static inline void mpuio_init(struct gpio_bank *bank)
David Brownell11a78b72006-12-06 17:14:11 -0800840{
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -0800841 platform_set_drvdata(&omap_mpuio_device, bank);
David Brownellfcf126d2007-04-02 12:46:47 -0700842
David Brownell11a78b72006-12-06 17:14:11 -0800843 if (platform_driver_register(&omap_mpuio_driver) == 0)
844 (void) platform_device_register(&omap_mpuio_device);
845}
846
David Brownelle5c56ed2006-12-06 17:13:59 -0800847/*---------------------------------------------------------------------*/
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100848
David Brownell52e31342008-03-03 12:43:23 -0800849static int gpio_input(struct gpio_chip *chip, unsigned offset)
850{
851 struct gpio_bank *bank;
852 unsigned long flags;
853
854 bank = container_of(chip, struct gpio_bank, chip);
855 spin_lock_irqsave(&bank->lock, flags);
856 _set_gpio_direction(bank, offset, 1);
857 spin_unlock_irqrestore(&bank->lock, flags);
858 return 0;
859}
860
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300861static int gpio_is_input(struct gpio_bank *bank, int mask)
862{
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700863 void __iomem *reg = bank->base + bank->regs->direction;
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300864
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300865 return __raw_readl(reg) & mask;
866}
867
David Brownell52e31342008-03-03 12:43:23 -0800868static int gpio_get(struct gpio_chip *chip, unsigned offset)
869{
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300870 struct gpio_bank *bank;
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300871 u32 mask;
872
Charulatha Va8be8da2011-04-22 16:38:16 +0530873 bank = container_of(chip, struct gpio_bank, chip);
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530874 mask = (1 << offset);
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300875
876 if (gpio_is_input(bank, mask))
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530877 return _get_gpio_datain(bank, offset);
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300878 else
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530879 return _get_gpio_dataout(bank, offset);
David Brownell52e31342008-03-03 12:43:23 -0800880}
881
882static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
883{
884 struct gpio_bank *bank;
885 unsigned long flags;
886
887 bank = container_of(chip, struct gpio_bank, chip);
888 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700889 bank->set_dataout(bank, offset, value);
David Brownell52e31342008-03-03 12:43:23 -0800890 _set_gpio_direction(bank, offset, 0);
891 spin_unlock_irqrestore(&bank->lock, flags);
892 return 0;
893}
894
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700895static int gpio_debounce(struct gpio_chip *chip, unsigned offset,
896 unsigned debounce)
897{
898 struct gpio_bank *bank;
899 unsigned long flags;
900
901 bank = container_of(chip, struct gpio_bank, chip);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -0800902
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700903 spin_lock_irqsave(&bank->lock, flags);
904 _set_gpio_debounce(bank, offset, debounce);
905 spin_unlock_irqrestore(&bank->lock, flags);
906
907 return 0;
908}
909
David Brownell52e31342008-03-03 12:43:23 -0800910static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
911{
912 struct gpio_bank *bank;
913 unsigned long flags;
914
915 bank = container_of(chip, struct gpio_bank, chip);
916 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700917 bank->set_dataout(bank, offset, value);
David Brownell52e31342008-03-03 12:43:23 -0800918 spin_unlock_irqrestore(&bank->lock, flags);
919}
920
David Brownella007b702008-12-10 17:35:25 -0800921static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
922{
923 struct gpio_bank *bank;
924
925 bank = container_of(chip, struct gpio_bank, chip);
Benoit Cousson384ebe12011-08-16 11:53:02 +0200926 return bank->irq_base + offset;
David Brownella007b702008-12-10 17:35:25 -0800927}
928
David Brownell52e31342008-03-03 12:43:23 -0800929/*---------------------------------------------------------------------*/
930
Tony Lindgren9a748052010-12-07 16:26:56 -0800931static void __init omap_gpio_show_rev(struct gpio_bank *bank)
Tony Lindgren9f7065d2009-10-19 15:25:20 -0700932{
Kevin Hilmane5ff4442011-04-22 14:37:16 -0700933 static bool called;
Tony Lindgren9f7065d2009-10-19 15:25:20 -0700934 u32 rev;
935
Kevin Hilmane5ff4442011-04-22 14:37:16 -0700936 if (called || bank->regs->revision == USHRT_MAX)
Tony Lindgren9f7065d2009-10-19 15:25:20 -0700937 return;
938
Kevin Hilmane5ff4442011-04-22 14:37:16 -0700939 rev = __raw_readw(bank->base + bank->regs->revision);
940 pr_info("OMAP GPIO hardware version %d.%d\n",
Tony Lindgren9f7065d2009-10-19 15:25:20 -0700941 (rev >> 4) & 0x0f, rev & 0x0f);
Kevin Hilmane5ff4442011-04-22 14:37:16 -0700942
943 called = true;
Tony Lindgren9f7065d2009-10-19 15:25:20 -0700944}
945
David Brownell8ba55c52008-02-26 11:10:50 -0800946/* This lock class tells lockdep that GPIO irqs are in a different
947 * category than their parents, so it won't report false recursion.
948 */
949static struct lock_class_key gpio_lock_class;
950
Charulatha V03e128c2011-05-05 19:58:01 +0530951static void omap_gpio_mod_init(struct gpio_bank *bank)
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800952{
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530953 void __iomem *base = bank->base;
954 u32 l = 0xffffffff;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800955
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530956 if (bank->width == 16)
957 l = 0xffff;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800958
Charulatha Vd0d665a2011-08-31 00:02:21 +0530959 if (bank->is_mpuio) {
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530960 __raw_writel(l, bank->base + bank->regs->irqenable);
961 return;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800962 }
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530963
964 _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv);
Tarun Kanti DebBarma6edd94d2012-04-30 12:50:12 +0530965 _gpio_rmw(base, bank->regs->irqstatus, l, !bank->regs->irqenable_inv);
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530966 if (bank->regs->debounce_en)
Tarun Kanti DebBarma6edd94d2012-04-30 12:50:12 +0530967 __raw_writel(0, base + bank->regs->debounce_en);
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530968
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +0530969 /* Save OE default value (0xffffffff) in the context */
970 bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530971 /* Initialize interface clk ungated, module enabled */
972 if (bank->regs->ctrl)
Tarun Kanti DebBarma6edd94d2012-04-30 12:50:12 +0530973 __raw_writel(0, base + bank->regs->ctrl);
Tarun Kanti DebBarma34672012012-07-11 14:43:14 +0530974
975 bank->dbck = clk_get(bank->dev, "dbclk");
976 if (IS_ERR(bank->dbck))
977 dev_err(bank->dev, "Could not get gpio dbck\n");
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800978}
979
Tony Lindgren8805f412012-03-05 15:32:38 -0800980static __devinit void
Kevin Hilmanf8b46b52011-04-21 13:23:34 -0700981omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start,
982 unsigned int num)
983{
984 struct irq_chip_generic *gc;
985 struct irq_chip_type *ct;
986
987 gc = irq_alloc_generic_chip("MPUIO", 1, irq_start, bank->base,
988 handle_simple_irq);
Todd Poynor83233742011-07-18 07:43:14 -0700989 if (!gc) {
990 dev_err(bank->dev, "Memory alloc failed for gc\n");
991 return;
992 }
993
Kevin Hilmanf8b46b52011-04-21 13:23:34 -0700994 ct = gc->chip_types;
995
996 /* NOTE: No ack required, reading IRQ status clears it. */
997 ct->chip.irq_mask = irq_gc_mask_set_bit;
998 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
999 ct->chip.irq_set_type = gpio_irq_type;
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +05301000
1001 if (bank->regs->wkup_en)
Kevin Hilmanf8b46b52011-04-21 13:23:34 -07001002 ct->chip.irq_set_wake = gpio_wake_enable,
1003
1004 ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride;
1005 irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
1006 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
1007}
1008
Russell Kingd52b31d2011-05-27 13:56:12 -07001009static void __devinit omap_gpio_chip_init(struct gpio_bank *bank)
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001010{
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001011 int j;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001012 static int gpio;
1013
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001014 /*
1015 * REVISIT eventually switch from OMAP-specific gpio structs
1016 * over to the generic ones
1017 */
1018 bank->chip.request = omap_gpio_request;
1019 bank->chip.free = omap_gpio_free;
1020 bank->chip.direction_input = gpio_input;
1021 bank->chip.get = gpio_get;
1022 bank->chip.direction_output = gpio_output;
1023 bank->chip.set_debounce = gpio_debounce;
1024 bank->chip.set = gpio_set;
1025 bank->chip.to_irq = gpio_2irq;
Charulatha Vd0d665a2011-08-31 00:02:21 +05301026 if (bank->is_mpuio) {
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001027 bank->chip.label = "mpuio";
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +05301028 if (bank->regs->wkup_en)
1029 bank->chip.dev = &omap_mpuio_device.dev;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001030 bank->chip.base = OMAP_MPUIO(0);
1031 } else {
1032 bank->chip.label = "gpio";
1033 bank->chip.base = gpio;
Kevin Hilmand5f46242011-04-21 09:23:00 -07001034 gpio += bank->width;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001035 }
Kevin Hilmand5f46242011-04-21 09:23:00 -07001036 bank->chip.ngpio = bank->width;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001037
1038 gpiochip_add(&bank->chip);
1039
Benoit Cousson384ebe12011-08-16 11:53:02 +02001040 for (j = bank->irq_base; j < bank->irq_base + bank->width; j++) {
Thomas Gleixner1475b852011-03-22 17:11:09 +01001041 irq_set_lockdep_class(j, &gpio_lock_class);
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001042 irq_set_chip_data(j, bank);
Charulatha Vd0d665a2011-08-31 00:02:21 +05301043 if (bank->is_mpuio) {
Kevin Hilmanf8b46b52011-04-21 13:23:34 -07001044 omap_mpuio_alloc_gc(bank, j, bank->width);
1045 } else {
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001046 irq_set_chip(j, &gpio_irq_chip);
Kevin Hilmanf8b46b52011-04-21 13:23:34 -07001047 irq_set_handler(j, handle_simple_irq);
1048 set_irq_flags(j, IRQF_VALID);
1049 }
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001050 }
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001051 irq_set_chained_handler(bank->irq, gpio_irq_handler);
1052 irq_set_handler_data(bank->irq, bank);
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001053}
1054
Benoit Cousson384ebe12011-08-16 11:53:02 +02001055static const struct of_device_id omap_gpio_match[];
1056
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001057static int __devinit omap_gpio_probe(struct platform_device *pdev)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001058{
Benoit Cousson862ff642012-02-01 15:58:56 +01001059 struct device *dev = &pdev->dev;
Benoit Cousson384ebe12011-08-16 11:53:02 +02001060 struct device_node *node = dev->of_node;
1061 const struct of_device_id *match;
Uwe Kleine-Königf6817a22012-05-21 21:57:39 +02001062 const struct omap_gpio_platform_data *pdata;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001063 struct resource *res;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001064 struct gpio_bank *bank;
Charulatha V03e128c2011-05-05 19:58:01 +05301065 int ret = 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001066
Benoit Cousson384ebe12011-08-16 11:53:02 +02001067 match = of_match_device(of_match_ptr(omap_gpio_match), dev);
1068
1069 pdata = match ? match->data : dev->platform_data;
1070 if (!pdata)
Benoit Cousson96751fc2012-02-01 16:01:39 +01001071 return -EINVAL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001072
Benoit Cousson96751fc2012-02-01 16:01:39 +01001073 bank = devm_kzalloc(&pdev->dev, sizeof(struct gpio_bank), GFP_KERNEL);
Charulatha V03e128c2011-05-05 19:58:01 +05301074 if (!bank) {
Benoit Cousson862ff642012-02-01 15:58:56 +01001075 dev_err(dev, "Memory alloc failed\n");
Benoit Cousson96751fc2012-02-01 16:01:39 +01001076 return -ENOMEM;
Charulatha V03e128c2011-05-05 19:58:01 +05301077 }
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001078
1079 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1080 if (unlikely(!res)) {
Benoit Cousson862ff642012-02-01 15:58:56 +01001081 dev_err(dev, "Invalid IRQ resource\n");
Benoit Cousson96751fc2012-02-01 16:01:39 +01001082 return -ENODEV;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001083 }
1084
1085 bank->irq = res->start;
Benoit Cousson862ff642012-02-01 15:58:56 +01001086 bank->dev = dev;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001087 bank->dbck_flag = pdata->dbck_flag;
Tony Lindgren5de62b82010-12-07 16:26:58 -08001088 bank->stride = pdata->bank_stride;
Kevin Hilmand5f46242011-04-21 09:23:00 -07001089 bank->width = pdata->bank_width;
Charulatha Vd0d665a2011-08-31 00:02:21 +05301090 bank->is_mpuio = pdata->is_mpuio;
Charulatha V803a2432011-05-05 17:04:12 +05301091 bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
Charulatha V0cde8d02011-05-05 20:15:16 +05301092 bank->loses_context = pdata->loses_context;
Kevin Hilmanfa87931a2011-04-20 16:31:23 -07001093 bank->regs = pdata->regs;
Benoit Cousson384ebe12011-08-16 11:53:02 +02001094#ifdef CONFIG_OF_GPIO
1095 bank->chip.of_node = of_node_get(node);
1096#endif
1097
1098 bank->irq_base = irq_alloc_descs(-1, 0, bank->width, 0);
1099 if (bank->irq_base < 0) {
1100 dev_err(dev, "Couldn't allocate IRQ numbers\n");
1101 return -ENODEV;
1102 }
1103
1104 bank->domain = irq_domain_add_legacy(node, bank->width, bank->irq_base,
1105 0, &irq_domain_simple_ops, NULL);
Kevin Hilmanfa87931a2011-04-20 16:31:23 -07001106
1107 if (bank->regs->set_dataout && bank->regs->clr_dataout)
1108 bank->set_dataout = _set_gpio_dataout_reg;
1109 else
1110 bank->set_dataout = _set_gpio_dataout_mask;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001111
1112 spin_lock_init(&bank->lock);
1113
1114 /* Static mapping, never released */
1115 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1116 if (unlikely(!res)) {
Benoit Cousson862ff642012-02-01 15:58:56 +01001117 dev_err(dev, "Invalid mem resource\n");
Benoit Cousson96751fc2012-02-01 16:01:39 +01001118 return -ENODEV;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001119 }
1120
Benoit Cousson96751fc2012-02-01 16:01:39 +01001121 if (!devm_request_mem_region(dev, res->start, resource_size(res),
1122 pdev->name)) {
1123 dev_err(dev, "Region already claimed\n");
1124 return -EBUSY;
1125 }
1126
1127 bank->base = devm_ioremap(dev, res->start, resource_size(res));
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001128 if (!bank->base) {
Benoit Cousson862ff642012-02-01 15:58:56 +01001129 dev_err(dev, "Could not ioremap\n");
Benoit Cousson96751fc2012-02-01 16:01:39 +01001130 return -ENOMEM;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001131 }
1132
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301133 platform_set_drvdata(pdev, bank);
1134
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001135 pm_runtime_enable(bank->dev);
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301136 pm_runtime_irq_safe(bank->dev);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001137 pm_runtime_get_sync(bank->dev);
1138
Charulatha Vd0d665a2011-08-31 00:02:21 +05301139 if (bank->is_mpuio)
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +05301140 mpuio_init(bank);
1141
Charulatha V03e128c2011-05-05 19:58:01 +05301142 omap_gpio_mod_init(bank);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001143 omap_gpio_chip_init(bank);
Tony Lindgren9a748052010-12-07 16:26:56 -08001144 omap_gpio_show_rev(bank);
Tony Lindgren9f7065d2009-10-19 15:25:20 -07001145
Jon Hunter7b86cef2012-07-03 11:05:50 -05001146 if (bank->loses_context)
1147 bank->get_context_loss_count = pdata->get_context_loss_count;
1148
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301149 pm_runtime_put(bank->dev);
1150
Charulatha V03e128c2011-05-05 19:58:01 +05301151 list_add_tail(&bank->node, &omap_gpio_list);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001152
Charulatha V03e128c2011-05-05 19:58:01 +05301153 return ret;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001154}
1155
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301156#ifdef CONFIG_ARCH_OMAP2PLUS
1157
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301158#if defined(CONFIG_PM_RUNTIME)
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301159static void omap_gpio_restore_context(struct gpio_bank *bank);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001160
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301161static int omap_gpio_runtime_suspend(struct device *dev)
1162{
1163 struct platform_device *pdev = to_platform_device(dev);
1164 struct gpio_bank *bank = platform_get_drvdata(pdev);
1165 u32 l1 = 0, l2 = 0;
1166 unsigned long flags;
Kevin Hilman68942ed2012-03-05 15:10:04 -08001167 u32 wake_low, wake_hi;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301168
1169 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilman68942ed2012-03-05 15:10:04 -08001170
1171 /*
1172 * Only edges can generate a wakeup event to the PRCM.
1173 *
1174 * Therefore, ensure any wake-up capable GPIOs have
1175 * edge-detection enabled before going idle to ensure a wakeup
1176 * to the PRCM is generated on a GPIO transition. (c.f. 34xx
1177 * NDA TRM 25.5.3.1)
1178 *
1179 * The normal values will be restored upon ->runtime_resume()
1180 * by writing back the values saved in bank->context.
1181 */
1182 wake_low = bank->context.leveldetect0 & bank->context.wake_en;
1183 if (wake_low)
1184 __raw_writel(wake_low | bank->context.fallingdetect,
1185 bank->base + bank->regs->fallingdetect);
1186 wake_hi = bank->context.leveldetect1 & bank->context.wake_en;
1187 if (wake_hi)
1188 __raw_writel(wake_hi | bank->context.risingdetect,
1189 bank->base + bank->regs->risingdetect);
1190
Kevin Hilmanb3c64bc2012-05-17 16:42:16 -07001191 if (!bank->enabled_non_wakeup_gpios)
1192 goto update_gpio_context_count;
1193
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301194 if (bank->power_mode != OFF_MODE) {
1195 bank->power_mode = 0;
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +05301196 goto update_gpio_context_count;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301197 }
1198 /*
1199 * If going to OFF, remove triggering for all
1200 * non-wakeup GPIOs. Otherwise spurious IRQs will be
1201 * generated. See OMAP2420 Errata item 1.101.
1202 */
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301203 bank->saved_datain = __raw_readl(bank->base +
1204 bank->regs->datain);
Tarun Kanti DebBarmac6f31c92012-04-27 19:43:32 +05301205 l1 = bank->context.fallingdetect;
1206 l2 = bank->context.risingdetect;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301207
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301208 l1 &= ~bank->enabled_non_wakeup_gpios;
1209 l2 &= ~bank->enabled_non_wakeup_gpios;
1210
1211 __raw_writel(l1, bank->base + bank->regs->fallingdetect);
1212 __raw_writel(l2, bank->base + bank->regs->risingdetect);
1213
1214 bank->workaround_enabled = true;
1215
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +05301216update_gpio_context_count:
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301217 if (bank->get_context_loss_count)
1218 bank->context_loss_count =
1219 bank->get_context_loss_count(bank->dev);
1220
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +05301221 _gpio_dbck_disable(bank);
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301222 spin_unlock_irqrestore(&bank->lock, flags);
1223
1224 return 0;
1225}
1226
1227static int omap_gpio_runtime_resume(struct device *dev)
1228{
1229 struct platform_device *pdev = to_platform_device(dev);
1230 struct gpio_bank *bank = platform_get_drvdata(pdev);
1231 int context_lost_cnt_after;
1232 u32 l = 0, gen, gen0, gen1;
1233 unsigned long flags;
1234
1235 spin_lock_irqsave(&bank->lock, flags);
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +05301236 _gpio_dbck_enable(bank);
Kevin Hilman68942ed2012-03-05 15:10:04 -08001237
1238 /*
1239 * In ->runtime_suspend(), level-triggered, wakeup-enabled
1240 * GPIOs were set to edge trigger also in order to be able to
1241 * generate a PRCM wakeup. Here we restore the
1242 * pre-runtime_suspend() values for edge triggering.
1243 */
1244 __raw_writel(bank->context.fallingdetect,
1245 bank->base + bank->regs->fallingdetect);
1246 __raw_writel(bank->context.risingdetect,
1247 bank->base + bank->regs->risingdetect);
1248
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301249 if (bank->get_context_loss_count) {
1250 context_lost_cnt_after =
1251 bank->get_context_loss_count(bank->dev);
Kevin Hilman22770de2012-05-17 14:52:56 -07001252 if (context_lost_cnt_after != bank->context_loss_count) {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301253 omap_gpio_restore_context(bank);
1254 } else {
1255 spin_unlock_irqrestore(&bank->lock, flags);
1256 return 0;
1257 }
1258 }
1259
Tarun Kanti DebBarma1b1287032012-04-27 19:43:38 +05301260 if (!bank->workaround_enabled) {
1261 spin_unlock_irqrestore(&bank->lock, flags);
1262 return 0;
1263 }
1264
Tarun Kanti DebBarmac6f31c92012-04-27 19:43:32 +05301265 __raw_writel(bank->context.fallingdetect,
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301266 bank->base + bank->regs->fallingdetect);
Tarun Kanti DebBarmac6f31c92012-04-27 19:43:32 +05301267 __raw_writel(bank->context.risingdetect,
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301268 bank->base + bank->regs->risingdetect);
1269 l = __raw_readl(bank->base + bank->regs->datain);
1270
1271 /*
1272 * Check if any of the non-wakeup interrupt GPIOs have changed
1273 * state. If so, generate an IRQ by software. This is
1274 * horribly racy, but it's the best we can do to work around
1275 * this silicon bug.
1276 */
1277 l ^= bank->saved_datain;
1278 l &= bank->enabled_non_wakeup_gpios;
1279
1280 /*
1281 * No need to generate IRQs for the rising edge for gpio IRQs
1282 * configured with falling edge only; and vice versa.
1283 */
Tarun Kanti DebBarmac6f31c92012-04-27 19:43:32 +05301284 gen0 = l & bank->context.fallingdetect;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301285 gen0 &= bank->saved_datain;
1286
Tarun Kanti DebBarmac6f31c92012-04-27 19:43:32 +05301287 gen1 = l & bank->context.risingdetect;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301288 gen1 &= ~(bank->saved_datain);
1289
1290 /* FIXME: Consider GPIO IRQs with level detections properly! */
Tarun Kanti DebBarmac6f31c92012-04-27 19:43:32 +05301291 gen = l & (~(bank->context.fallingdetect) &
1292 ~(bank->context.risingdetect));
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301293 /* Consider all GPIO IRQs needed to be updated */
1294 gen |= gen0 | gen1;
1295
1296 if (gen) {
1297 u32 old0, old1;
1298
1299 old0 = __raw_readl(bank->base + bank->regs->leveldetect0);
1300 old1 = __raw_readl(bank->base + bank->regs->leveldetect1);
1301
Tarun Kanti DebBarma4e962e82012-04-27 19:43:37 +05301302 if (!bank->regs->irqstatus_raw0) {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301303 __raw_writel(old0 | gen, bank->base +
1304 bank->regs->leveldetect0);
1305 __raw_writel(old1 | gen, bank->base +
1306 bank->regs->leveldetect1);
1307 }
1308
Tarun Kanti DebBarma4e962e82012-04-27 19:43:37 +05301309 if (bank->regs->irqstatus_raw0) {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301310 __raw_writel(old0 | l, bank->base +
1311 bank->regs->leveldetect0);
1312 __raw_writel(old1 | l, bank->base +
1313 bank->regs->leveldetect1);
1314 }
1315 __raw_writel(old0, bank->base + bank->regs->leveldetect0);
1316 __raw_writel(old1, bank->base + bank->regs->leveldetect1);
1317 }
1318
1319 bank->workaround_enabled = false;
1320 spin_unlock_irqrestore(&bank->lock, flags);
1321
1322 return 0;
1323}
1324#endif /* CONFIG_PM_RUNTIME */
1325
1326void omap2_gpio_prepare_for_idle(int pwr_mode)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001327{
Charulatha V03e128c2011-05-05 19:58:01 +05301328 struct gpio_bank *bank;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001329
Charulatha V03e128c2011-05-05 19:58:01 +05301330 list_for_each_entry(bank, &omap_gpio_list, node) {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301331 if (!bank->mod_usage || !bank->loses_context)
Charulatha V03e128c2011-05-05 19:58:01 +05301332 continue;
1333
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301334 bank->power_mode = pwr_mode;
1335
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301336 pm_runtime_put_sync_suspend(bank->dev);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001337 }
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001338}
1339
Kevin Hilman43ffcd92009-01-27 11:09:24 -08001340void omap2_gpio_resume_after_idle(void)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001341{
Charulatha V03e128c2011-05-05 19:58:01 +05301342 struct gpio_bank *bank;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001343
Charulatha V03e128c2011-05-05 19:58:01 +05301344 list_for_each_entry(bank, &omap_gpio_list, node) {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301345 if (!bank->mod_usage || !bank->loses_context)
Charulatha V03e128c2011-05-05 19:58:01 +05301346 continue;
1347
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301348 pm_runtime_get_sync(bank->dev);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001349 }
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001350}
1351
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301352#if defined(CONFIG_PM_RUNTIME)
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301353static void omap_gpio_restore_context(struct gpio_bank *bank)
Rajendra Nayak40c670f2008-09-26 17:47:48 +05301354{
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301355 __raw_writel(bank->context.wake_en,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301356 bank->base + bank->regs->wkup_en);
1357 __raw_writel(bank->context.ctrl, bank->base + bank->regs->ctrl);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301358 __raw_writel(bank->context.leveldetect0,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301359 bank->base + bank->regs->leveldetect0);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301360 __raw_writel(bank->context.leveldetect1,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301361 bank->base + bank->regs->leveldetect1);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301362 __raw_writel(bank->context.risingdetect,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301363 bank->base + bank->regs->risingdetect);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301364 __raw_writel(bank->context.fallingdetect,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301365 bank->base + bank->regs->fallingdetect);
Nishanth Menonf86bcc32011-09-09 19:14:08 +05301366 if (bank->regs->set_dataout && bank->regs->clr_dataout)
1367 __raw_writel(bank->context.dataout,
1368 bank->base + bank->regs->set_dataout);
1369 else
1370 __raw_writel(bank->context.dataout,
1371 bank->base + bank->regs->dataout);
Nishanth Menon6d13eaa2011-08-29 18:54:50 +05301372 __raw_writel(bank->context.oe, bank->base + bank->regs->direction);
1373
Nishanth Menonae547352011-09-09 19:08:58 +05301374 if (bank->dbck_enable_mask) {
1375 __raw_writel(bank->context.debounce, bank->base +
1376 bank->regs->debounce);
1377 __raw_writel(bank->context.debounce_en,
1378 bank->base + bank->regs->debounce_en);
1379 }
Nishanth Menonba805be2011-08-29 18:41:08 +05301380
1381 __raw_writel(bank->context.irqenable1,
1382 bank->base + bank->regs->irqenable);
1383 __raw_writel(bank->context.irqenable2,
1384 bank->base + bank->regs->irqenable2);
Rajendra Nayak40c670f2008-09-26 17:47:48 +05301385}
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301386#endif /* CONFIG_PM_RUNTIME */
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301387#else
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301388#define omap_gpio_runtime_suspend NULL
1389#define omap_gpio_runtime_resume NULL
Rajendra Nayak40c670f2008-09-26 17:47:48 +05301390#endif
1391
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301392static const struct dev_pm_ops gpio_pm_ops = {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301393 SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume,
1394 NULL)
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301395};
1396
Benoit Cousson384ebe12011-08-16 11:53:02 +02001397#if defined(CONFIG_OF)
1398static struct omap_gpio_reg_offs omap2_gpio_regs = {
1399 .revision = OMAP24XX_GPIO_REVISION,
1400 .direction = OMAP24XX_GPIO_OE,
1401 .datain = OMAP24XX_GPIO_DATAIN,
1402 .dataout = OMAP24XX_GPIO_DATAOUT,
1403 .set_dataout = OMAP24XX_GPIO_SETDATAOUT,
1404 .clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT,
1405 .irqstatus = OMAP24XX_GPIO_IRQSTATUS1,
1406 .irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2,
1407 .irqenable = OMAP24XX_GPIO_IRQENABLE1,
1408 .irqenable2 = OMAP24XX_GPIO_IRQENABLE2,
1409 .set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1,
1410 .clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1,
1411 .debounce = OMAP24XX_GPIO_DEBOUNCE_VAL,
1412 .debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN,
1413 .ctrl = OMAP24XX_GPIO_CTRL,
1414 .wkup_en = OMAP24XX_GPIO_WAKE_EN,
1415 .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0,
1416 .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1,
1417 .risingdetect = OMAP24XX_GPIO_RISINGDETECT,
1418 .fallingdetect = OMAP24XX_GPIO_FALLINGDETECT,
1419};
1420
1421static struct omap_gpio_reg_offs omap4_gpio_regs = {
1422 .revision = OMAP4_GPIO_REVISION,
1423 .direction = OMAP4_GPIO_OE,
1424 .datain = OMAP4_GPIO_DATAIN,
1425 .dataout = OMAP4_GPIO_DATAOUT,
1426 .set_dataout = OMAP4_GPIO_SETDATAOUT,
1427 .clr_dataout = OMAP4_GPIO_CLEARDATAOUT,
1428 .irqstatus = OMAP4_GPIO_IRQSTATUS0,
1429 .irqstatus2 = OMAP4_GPIO_IRQSTATUS1,
1430 .irqenable = OMAP4_GPIO_IRQSTATUSSET0,
1431 .irqenable2 = OMAP4_GPIO_IRQSTATUSSET1,
1432 .set_irqenable = OMAP4_GPIO_IRQSTATUSSET0,
1433 .clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0,
1434 .debounce = OMAP4_GPIO_DEBOUNCINGTIME,
1435 .debounce_en = OMAP4_GPIO_DEBOUNCENABLE,
1436 .ctrl = OMAP4_GPIO_CTRL,
1437 .wkup_en = OMAP4_GPIO_IRQWAKEN0,
1438 .leveldetect0 = OMAP4_GPIO_LEVELDETECT0,
1439 .leveldetect1 = OMAP4_GPIO_LEVELDETECT1,
1440 .risingdetect = OMAP4_GPIO_RISINGDETECT,
1441 .fallingdetect = OMAP4_GPIO_FALLINGDETECT,
1442};
1443
Uwe Kleine-Königc06e6762012-07-06 22:20:15 +02001444const static struct omap_gpio_platform_data omap2_pdata = {
Benoit Cousson384ebe12011-08-16 11:53:02 +02001445 .regs = &omap2_gpio_regs,
1446 .bank_width = 32,
1447 .dbck_flag = false,
1448};
1449
Uwe Kleine-Königc06e6762012-07-06 22:20:15 +02001450const static struct omap_gpio_platform_data omap3_pdata = {
Benoit Cousson384ebe12011-08-16 11:53:02 +02001451 .regs = &omap2_gpio_regs,
1452 .bank_width = 32,
1453 .dbck_flag = true,
1454};
1455
Uwe Kleine-Königc06e6762012-07-06 22:20:15 +02001456const static struct omap_gpio_platform_data omap4_pdata = {
Benoit Cousson384ebe12011-08-16 11:53:02 +02001457 .regs = &omap4_gpio_regs,
1458 .bank_width = 32,
1459 .dbck_flag = true,
1460};
1461
1462static const struct of_device_id omap_gpio_match[] = {
1463 {
1464 .compatible = "ti,omap4-gpio",
1465 .data = &omap4_pdata,
1466 },
1467 {
1468 .compatible = "ti,omap3-gpio",
1469 .data = &omap3_pdata,
1470 },
1471 {
1472 .compatible = "ti,omap2-gpio",
1473 .data = &omap2_pdata,
1474 },
1475 { },
1476};
1477MODULE_DEVICE_TABLE(of, omap_gpio_match);
1478#endif
1479
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001480static struct platform_driver omap_gpio_driver = {
1481 .probe = omap_gpio_probe,
1482 .driver = {
1483 .name = "omap_gpio",
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301484 .pm = &gpio_pm_ops,
Benoit Cousson384ebe12011-08-16 11:53:02 +02001485 .of_match_table = of_match_ptr(omap_gpio_match),
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001486 },
1487};
1488
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001489/*
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001490 * gpio driver register needs to be done before
1491 * machine_init functions access gpio APIs.
1492 * Hence omap_gpio_drv_reg() is a postcore_initcall.
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001493 */
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001494static int __init omap_gpio_drv_reg(void)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001495{
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001496 return platform_driver_register(&omap_gpio_driver);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001497}
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001498postcore_initcall(omap_gpio_drv_reg);