blob: 7f9bcaac467e6639e4106831344af3dde7c1de37 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1992 Ross Biro
7 * Copyright (C) Linus Torvalds
8 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9 * Copyright (C) 1996 David S. Miller
10 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11 * Copyright (C) 1999 MIPS Technologies, Inc.
12 * Copyright (C) 2000 Ulf Carlsson
13 *
14 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15 * binaries.
16 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <linux/compiler.h>
Ralf Baechlec3fc5cd2013-05-29 01:07:19 +020018#include <linux/context_tracking.h>
Ralf Baechle7aeb7532012-08-02 14:44:11 +020019#include <linux/elf.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/mm.h>
23#include <linux/errno.h>
24#include <linux/ptrace.h>
Ralf Baechle7aeb7532012-08-02 14:44:11 +020025#include <linux/regset.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/smp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <linux/user.h>
28#include <linux/security.h>
Ralf Baechlebc3d22c2012-07-17 19:43:58 +020029#include <linux/tracehook.h>
Ralf Baechle293c5bd2007-07-25 16:19:33 +010030#include <linux/audit.h>
31#include <linux/seccomp.h>
Ralf Baechle1d7bf992013-09-06 20:24:48 +020032#include <linux/ftrace.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033
Ralf Baechlef8280c82005-05-19 12:08:04 +000034#include <asm/byteorder.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#include <asm/cpu.h>
Ralf Baechlee50c0a82005-05-31 11:49:19 +000036#include <asm/dsp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070037#include <asm/fpu.h>
38#include <asm/mipsregs.h>
Ralf Baechle101b3532005-10-06 17:39:32 +010039#include <asm/mipsmtregs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070040#include <asm/pgtable.h>
41#include <asm/page.h>
Ralf Baechlebec9b2b2012-09-26 20:16:47 +020042#include <asm/syscall.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043#include <asm/uaccess.h>
44#include <asm/bootinfo.h>
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040045#include <asm/reg.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046
Ralf Baechle1d7bf992013-09-06 20:24:48 +020047#define CREATE_TRACE_POINTS
48#include <trace/events/syscalls.h>
49
Linus Torvalds1da177e2005-04-16 15:20:36 -070050/*
51 * Called by kernel/ptrace.c when detaching..
52 *
53 * Make sure single step bits etc are not set.
54 */
55void ptrace_disable(struct task_struct *child)
56{
David Daney0926bf92008-09-23 00:11:26 -070057 /* Don't load the watchpoint registers for the ex-child. */
58 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
Linus Torvalds1da177e2005-04-16 15:20:36 -070059}
60
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040061/*
Ralf Baechle70342282013-01-22 12:59:30 +010062 * Read a general register set. We always use the 64-bit format, even
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040063 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
64 * Registers are sign extended to fill the available space.
65 */
Ralf Baechle49a89ef2007-10-11 23:46:15 +010066int ptrace_getregs(struct task_struct *child, __s64 __user *data)
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040067{
68 struct pt_regs *regs;
69 int i;
70
71 if (!access_ok(VERIFY_WRITE, data, 38 * 8))
72 return -EIO;
73
Al Viro40bc9c62006-01-12 01:06:07 -080074 regs = task_pt_regs(child);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040075
76 for (i = 0; i < 32; i++)
Atsushi Nemoto62b14c22007-10-26 00:53:02 +090077 __put_user((long)regs->regs[i], data + i);
78 __put_user((long)regs->lo, data + EF_LO - EF_R0);
79 __put_user((long)regs->hi, data + EF_HI - EF_R0);
80 __put_user((long)regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
81 __put_user((long)regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
82 __put_user((long)regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
83 __put_user((long)regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040084
85 return 0;
86}
87
88/*
89 * Write a general register set. As for PTRACE_GETREGS, we always use
90 * the 64-bit format. On a 32-bit kernel only the lower order half
91 * (according to endianness) will be used.
92 */
Ralf Baechle49a89ef2007-10-11 23:46:15 +010093int ptrace_setregs(struct task_struct *child, __s64 __user *data)
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040094{
95 struct pt_regs *regs;
96 int i;
97
98 if (!access_ok(VERIFY_READ, data, 38 * 8))
99 return -EIO;
100
Al Viro40bc9c62006-01-12 01:06:07 -0800101 regs = task_pt_regs(child);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400102
103 for (i = 0; i < 32; i++)
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100104 __get_user(regs->regs[i], data + i);
105 __get_user(regs->lo, data + EF_LO - EF_R0);
106 __get_user(regs->hi, data + EF_HI - EF_R0);
107 __get_user(regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400108
109 /* badvaddr, status, and cause may not be written. */
110
111 return 0;
112}
113
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100114int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400115{
116 int i;
Atsushi Nemotoe04582b2006-10-09 00:10:01 +0900117 unsigned int tmp;
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400118
119 if (!access_ok(VERIFY_WRITE, data, 33 * 8))
120 return -EIO;
121
122 if (tsk_used_math(child)) {
123 fpureg_t *fregs = get_fpu_regs(child);
124 for (i = 0; i < 32; i++)
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100125 __put_user(fregs[i], i + (__u64 __user *) data);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400126 } else {
127 for (i = 0; i < 32; i++)
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100128 __put_user((__u64) -1, i + (__u64 __user *) data);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400129 }
130
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100131 __put_user(child->thread.fpu.fcr31, data + 64);
Atsushi Nemotoeae89072006-05-16 01:26:03 +0900132
Atsushi Nemotoe04582b2006-10-09 00:10:01 +0900133 preempt_disable();
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400134 if (cpu_has_fpu) {
Atsushi Nemotoe04582b2006-10-09 00:10:01 +0900135 unsigned int flags;
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400136
Ralf Baechle101b3532005-10-06 17:39:32 +0100137 if (cpu_has_mipsmt) {
138 unsigned int vpflags = dvpe();
139 flags = read_c0_status();
Paul Burton597ce172013-11-22 13:12:07 +0000140 __enable_fpu(FPU_AS_IS);
Ralf Baechle101b3532005-10-06 17:39:32 +0100141 __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
142 write_c0_status(flags);
143 evpe(vpflags);
144 } else {
145 flags = read_c0_status();
Paul Burton597ce172013-11-22 13:12:07 +0000146 __enable_fpu(FPU_AS_IS);
Ralf Baechle101b3532005-10-06 17:39:32 +0100147 __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
148 write_c0_status(flags);
149 }
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400150 } else {
Atsushi Nemotoe04582b2006-10-09 00:10:01 +0900151 tmp = 0;
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400152 }
Atsushi Nemotoe04582b2006-10-09 00:10:01 +0900153 preempt_enable();
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100154 __put_user(tmp, data + 65);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400155
156 return 0;
157}
158
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100159int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400160{
161 fpureg_t *fregs;
162 int i;
163
164 if (!access_ok(VERIFY_READ, data, 33 * 8))
165 return -EIO;
166
167 fregs = get_fpu_regs(child);
168
169 for (i = 0; i < 32; i++)
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100170 __get_user(fregs[i], i + (__u64 __user *) data);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400171
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100172 __get_user(child->thread.fpu.fcr31, data + 64);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400173
174 /* FIR may not be written. */
175
176 return 0;
177}
178
David Daney0926bf92008-09-23 00:11:26 -0700179int ptrace_get_watch_regs(struct task_struct *child,
180 struct pt_watch_regs __user *addr)
181{
182 enum pt_watch_style style;
183 int i;
184
185 if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0)
186 return -EIO;
187 if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
188 return -EIO;
189
190#ifdef CONFIG_32BIT
191 style = pt_watch_style_mips32;
192#define WATCH_STYLE mips32
193#else
194 style = pt_watch_style_mips64;
195#define WATCH_STYLE mips64
196#endif
197
198 __put_user(style, &addr->style);
199 __put_user(current_cpu_data.watch_reg_use_cnt,
200 &addr->WATCH_STYLE.num_valid);
201 for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {
202 __put_user(child->thread.watch.mips3264.watchlo[i],
203 &addr->WATCH_STYLE.watchlo[i]);
204 __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,
205 &addr->WATCH_STYLE.watchhi[i]);
206 __put_user(current_cpu_data.watch_reg_masks[i],
207 &addr->WATCH_STYLE.watch_masks[i]);
208 }
209 for (; i < 8; i++) {
210 __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
211 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
212 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
213 }
214
215 return 0;
216}
217
218int ptrace_set_watch_regs(struct task_struct *child,
219 struct pt_watch_regs __user *addr)
220{
221 int i;
222 int watch_active = 0;
223 unsigned long lt[NUM_WATCH_REGS];
224 u16 ht[NUM_WATCH_REGS];
225
226 if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0)
227 return -EIO;
228 if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
229 return -EIO;
230 /* Check the values. */
231 for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {
232 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
233#ifdef CONFIG_32BIT
234 if (lt[i] & __UA_LIMIT)
235 return -EINVAL;
236#else
237 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
238 if (lt[i] & 0xffffffff80000000UL)
239 return -EINVAL;
240 } else {
241 if (lt[i] & __UA_LIMIT)
242 return -EINVAL;
243 }
244#endif
245 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
246 if (ht[i] & ~0xff8)
247 return -EINVAL;
248 }
249 /* Install them. */
250 for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {
251 if (lt[i] & 7)
252 watch_active = 1;
253 child->thread.watch.mips3264.watchlo[i] = lt[i];
254 /* Set the G bit. */
255 child->thread.watch.mips3264.watchhi[i] = ht[i];
256 }
257
258 if (watch_active)
259 set_tsk_thread_flag(child, TIF_LOAD_WATCH);
260 else
261 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
262
263 return 0;
264}
265
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200266/* regset get/set implementations */
267
268static int gpr_get(struct task_struct *target,
269 const struct user_regset *regset,
270 unsigned int pos, unsigned int count,
271 void *kbuf, void __user *ubuf)
272{
273 struct pt_regs *regs = task_pt_regs(target);
274
275 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
276 regs, 0, sizeof(*regs));
277}
278
279static int gpr_set(struct task_struct *target,
280 const struct user_regset *regset,
281 unsigned int pos, unsigned int count,
282 const void *kbuf, const void __user *ubuf)
283{
284 struct pt_regs newregs;
285 int ret;
286
287 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
288 &newregs,
289 0, sizeof(newregs));
290 if (ret)
291 return ret;
292
293 *task_pt_regs(target) = newregs;
294
295 return 0;
296}
297
298static int fpr_get(struct task_struct *target,
299 const struct user_regset *regset,
300 unsigned int pos, unsigned int count,
301 void *kbuf, void __user *ubuf)
302{
303 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
304 &target->thread.fpu,
305 0, sizeof(elf_fpregset_t));
306 /* XXX fcr31 */
307}
308
309static int fpr_set(struct task_struct *target,
310 const struct user_regset *regset,
311 unsigned int pos, unsigned int count,
312 const void *kbuf, const void __user *ubuf)
313{
314 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
315 &target->thread.fpu,
316 0, sizeof(elf_fpregset_t));
317 /* XXX fcr31 */
318}
319
320enum mips_regset {
321 REGSET_GPR,
322 REGSET_FPR,
323};
324
325static const struct user_regset mips_regsets[] = {
326 [REGSET_GPR] = {
327 .core_note_type = NT_PRSTATUS,
328 .n = ELF_NGREG,
329 .size = sizeof(unsigned int),
330 .align = sizeof(unsigned int),
331 .get = gpr_get,
332 .set = gpr_set,
333 },
334 [REGSET_FPR] = {
335 .core_note_type = NT_PRFPREG,
336 .n = ELF_NFPREG,
337 .size = sizeof(elf_fpreg_t),
338 .align = sizeof(elf_fpreg_t),
339 .get = fpr_get,
340 .set = fpr_set,
341 },
342};
343
344static const struct user_regset_view user_mips_view = {
345 .name = "mips",
346 .e_machine = ELF_ARCH,
347 .ei_osabi = ELF_OSABI,
348 .regsets = mips_regsets,
349 .n = ARRAY_SIZE(mips_regsets),
350};
351
352static const struct user_regset mips64_regsets[] = {
353 [REGSET_GPR] = {
354 .core_note_type = NT_PRSTATUS,
355 .n = ELF_NGREG,
356 .size = sizeof(unsigned long),
357 .align = sizeof(unsigned long),
358 .get = gpr_get,
359 .set = gpr_set,
360 },
361 [REGSET_FPR] = {
362 .core_note_type = NT_PRFPREG,
363 .n = ELF_NFPREG,
364 .size = sizeof(elf_fpreg_t),
365 .align = sizeof(elf_fpreg_t),
366 .get = fpr_get,
367 .set = fpr_set,
368 },
369};
370
371static const struct user_regset_view user_mips64_view = {
372 .name = "mips",
373 .e_machine = ELF_ARCH,
374 .ei_osabi = ELF_OSABI,
375 .regsets = mips64_regsets,
376 .n = ARRAY_SIZE(mips_regsets),
377};
378
379const struct user_regset_view *task_user_regset_view(struct task_struct *task)
380{
381#ifdef CONFIG_32BIT
382 return &user_mips_view;
383#endif
384
385#ifdef CONFIG_MIPS32_O32
386 if (test_thread_flag(TIF_32BIT_REGS))
387 return &user_mips_view;
388#endif
389
390 return &user_mips64_view;
391}
392
Namhyung Kim9b05a692010-10-27 15:33:47 -0700393long arch_ptrace(struct task_struct *child, long request,
394 unsigned long addr, unsigned long data)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396 int ret;
Namhyung Kimfb671132010-10-27 15:33:58 -0700397 void __user *addrp = (void __user *) addr;
398 void __user *datavp = (void __user *) data;
399 unsigned long __user *datalp = (void __user *) data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401 switch (request) {
402 /* when I and D space are separate, these will need to be fixed. */
403 case PTRACE_PEEKTEXT: /* read word at location addr. */
Alexey Dobriyan76647322007-07-17 04:03:43 -0700404 case PTRACE_PEEKDATA:
405 ret = generic_ptrace_peekdata(child, addr, data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700406 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407
408 /* Read the word at location addr in the USER area. */
409 case PTRACE_PEEKUSR: {
410 struct pt_regs *regs;
Paul Burton597ce172013-11-22 13:12:07 +0000411 fpureg_t *fregs;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700412 unsigned long tmp = 0;
413
Al Viro40bc9c62006-01-12 01:06:07 -0800414 regs = task_pt_regs(child);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415 ret = 0; /* Default return value. */
416
417 switch (addr) {
418 case 0 ... 31:
419 tmp = regs->regs[addr];
420 break;
421 case FPR_BASE ... FPR_BASE + 31:
Paul Burton597ce172013-11-22 13:12:07 +0000422 if (!tsk_used_math(child)) {
423 /* FP not yet used */
424 tmp = -1;
425 break;
426 }
427 fregs = get_fpu_regs(child);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700428
Ralf Baechle875d43e2005-09-03 15:56:16 -0700429#ifdef CONFIG_32BIT
Paul Burton597ce172013-11-22 13:12:07 +0000430 if (test_thread_flag(TIF_32BIT_FPREGS)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431 /*
432 * The odd registers are actually the high
433 * order bits of the values stored in the even
434 * registers - unless we're using r2k_switch.S.
435 */
436 if (addr & 1)
Paul Burton597ce172013-11-22 13:12:07 +0000437 tmp = fregs[(addr & ~1) - 32] >> 32;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438 else
Paul Burton597ce172013-11-22 13:12:07 +0000439 tmp = fregs[addr - 32];
440 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441 }
Paul Burton597ce172013-11-22 13:12:07 +0000442#endif
443 tmp = fregs[addr - FPR_BASE];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444 break;
445 case PC:
446 tmp = regs->cp0_epc;
447 break;
448 case CAUSE:
449 tmp = regs->cp0_cause;
450 break;
451 case BADVADDR:
452 tmp = regs->cp0_badvaddr;
453 break;
454 case MMHI:
455 tmp = regs->hi;
456 break;
457 case MMLO:
458 tmp = regs->lo;
459 break;
Franck Bui-Huu9693a852007-02-02 17:41:47 +0100460#ifdef CONFIG_CPU_HAS_SMARTMIPS
461 case ACX:
462 tmp = regs->acx;
463 break;
464#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700465 case FPC_CSR:
Atsushi Nemotoeae89072006-05-16 01:26:03 +0900466 tmp = child->thread.fpu.fcr31;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700467 break;
Ralf Baechle70342282013-01-22 12:59:30 +0100468 case FPC_EIR: { /* implementation / version register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469 unsigned int flags;
Ralf Baechle41c594a2006-04-05 09:45:45 +0100470#ifdef CONFIG_MIPS_MT_SMTC
Ralf Baechleb7e42262008-10-01 21:52:41 +0100471 unsigned long irqflags;
Ralf Baechle41c594a2006-04-05 09:45:45 +0100472 unsigned int mtflags;
473#endif /* CONFIG_MIPS_MT_SMTC */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700474
Atsushi Nemotoe04582b2006-10-09 00:10:01 +0900475 preempt_disable();
476 if (!cpu_has_fpu) {
477 preempt_enable();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478 break;
Atsushi Nemotoe04582b2006-10-09 00:10:01 +0900479 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700480
Ralf Baechle41c594a2006-04-05 09:45:45 +0100481#ifdef CONFIG_MIPS_MT_SMTC
482 /* Read-modify-write of Status must be atomic */
483 local_irq_save(irqflags);
484 mtflags = dmt();
485#endif /* CONFIG_MIPS_MT_SMTC */
Ralf Baechle101b3532005-10-06 17:39:32 +0100486 if (cpu_has_mipsmt) {
487 unsigned int vpflags = dvpe();
488 flags = read_c0_status();
Paul Burton597ce172013-11-22 13:12:07 +0000489 __enable_fpu(FPU_AS_IS);
Ralf Baechle101b3532005-10-06 17:39:32 +0100490 __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
491 write_c0_status(flags);
492 evpe(vpflags);
493 } else {
494 flags = read_c0_status();
Paul Burton597ce172013-11-22 13:12:07 +0000495 __enable_fpu(FPU_AS_IS);
Ralf Baechle101b3532005-10-06 17:39:32 +0100496 __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
497 write_c0_status(flags);
498 }
Ralf Baechle41c594a2006-04-05 09:45:45 +0100499#ifdef CONFIG_MIPS_MT_SMTC
500 emt(mtflags);
501 local_irq_restore(irqflags);
502#endif /* CONFIG_MIPS_MT_SMTC */
Ralf Baechle101b3532005-10-06 17:39:32 +0100503 preempt_enable();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700504 break;
505 }
Ralf Baechlec134a5e2005-06-30 09:42:00 +0000506 case DSP_BASE ... DSP_BASE + 5: {
507 dspreg_t *dregs;
508
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000509 if (!cpu_has_dsp) {
510 tmp = 0;
511 ret = -EIO;
Christoph Hellwig481bed42005-11-07 00:59:47 -0800512 goto out;
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000513 }
Ralf Baechle6c355852005-12-05 13:47:25 +0000514 dregs = __get_dsp_regs(child);
515 tmp = (unsigned long) (dregs[addr - DSP_BASE]);
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000516 break;
Ralf Baechlec134a5e2005-06-30 09:42:00 +0000517 }
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000518 case DSP_CONTROL:
519 if (!cpu_has_dsp) {
520 tmp = 0;
521 ret = -EIO;
Christoph Hellwig481bed42005-11-07 00:59:47 -0800522 goto out;
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000523 }
524 tmp = child->thread.dsp.dspcontrol;
525 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700526 default:
527 tmp = 0;
528 ret = -EIO;
Christoph Hellwig481bed42005-11-07 00:59:47 -0800529 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530 }
Namhyung Kimfb671132010-10-27 15:33:58 -0700531 ret = put_user(tmp, datalp);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532 break;
533 }
534
535 /* when I and D space are separate, this will have to be fixed. */
536 case PTRACE_POKETEXT: /* write the word at location addr. */
537 case PTRACE_POKEDATA:
Alexey Dobriyanf284ce72007-07-17 04:03:44 -0700538 ret = generic_ptrace_pokedata(child, addr, data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700539 break;
540
541 case PTRACE_POKEUSR: {
542 struct pt_regs *regs;
543 ret = 0;
Al Viro40bc9c62006-01-12 01:06:07 -0800544 regs = task_pt_regs(child);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700545
546 switch (addr) {
547 case 0 ... 31:
548 regs->regs[addr] = data;
549 break;
550 case FPR_BASE ... FPR_BASE + 31: {
551 fpureg_t *fregs = get_fpu_regs(child);
552
553 if (!tsk_used_math(child)) {
554 /* FP not yet used */
Atsushi Nemotoeae89072006-05-16 01:26:03 +0900555 memset(&child->thread.fpu, ~0,
556 sizeof(child->thread.fpu));
557 child->thread.fpu.fcr31 = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558 }
Ralf Baechle875d43e2005-09-03 15:56:16 -0700559#ifdef CONFIG_32BIT
Paul Burton597ce172013-11-22 13:12:07 +0000560 if (test_thread_flag(TIF_32BIT_FPREGS)) {
561 /*
562 * The odd registers are actually the high
563 * order bits of the values stored in the even
564 * registers - unless we're using r2k_switch.S.
565 */
566 if (addr & 1) {
567 fregs[(addr & ~1) - FPR_BASE] &=
568 0xffffffff;
569 fregs[(addr & ~1) - FPR_BASE] |=
570 ((u64)data) << 32;
571 } else {
572 fregs[addr - FPR_BASE] &= ~0xffffffffLL;
573 fregs[addr - FPR_BASE] |= data;
574 }
575 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700576 }
577#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700578 fregs[addr - FPR_BASE] = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579 break;
580 }
581 case PC:
582 regs->cp0_epc = data;
583 break;
584 case MMHI:
585 regs->hi = data;
586 break;
587 case MMLO:
588 regs->lo = data;
589 break;
Franck Bui-Huu9693a852007-02-02 17:41:47 +0100590#ifdef CONFIG_CPU_HAS_SMARTMIPS
591 case ACX:
592 regs->acx = data;
593 break;
594#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595 case FPC_CSR:
Atsushi Nemotoeae89072006-05-16 01:26:03 +0900596 child->thread.fpu.fcr31 = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700597 break;
Ralf Baechlec134a5e2005-06-30 09:42:00 +0000598 case DSP_BASE ... DSP_BASE + 5: {
599 dspreg_t *dregs;
600
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000601 if (!cpu_has_dsp) {
602 ret = -EIO;
603 break;
604 }
605
Ralf Baechlec134a5e2005-06-30 09:42:00 +0000606 dregs = __get_dsp_regs(child);
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000607 dregs[addr - DSP_BASE] = data;
608 break;
Ralf Baechlec134a5e2005-06-30 09:42:00 +0000609 }
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000610 case DSP_CONTROL:
611 if (!cpu_has_dsp) {
612 ret = -EIO;
613 break;
614 }
615 child->thread.dsp.dspcontrol = data;
616 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700617 default:
618 /* The rest are not allowed. */
619 ret = -EIO;
620 break;
621 }
622 break;
623 }
624
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400625 case PTRACE_GETREGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700626 ret = ptrace_getregs(child, datavp);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400627 break;
628
629 case PTRACE_SETREGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700630 ret = ptrace_setregs(child, datavp);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400631 break;
632
633 case PTRACE_GETFPREGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700634 ret = ptrace_getfpregs(child, datavp);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400635 break;
636
637 case PTRACE_SETFPREGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700638 ret = ptrace_setfpregs(child, datavp);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400639 break;
640
Ralf Baechle3c370262005-04-13 17:43:59 +0000641 case PTRACE_GET_THREAD_AREA:
Namhyung Kimfb671132010-10-27 15:33:58 -0700642 ret = put_user(task_thread_info(child)->tp_value, datalp);
Ralf Baechle3c370262005-04-13 17:43:59 +0000643 break;
644
David Daney0926bf92008-09-23 00:11:26 -0700645 case PTRACE_GET_WATCH_REGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700646 ret = ptrace_get_watch_regs(child, addrp);
David Daney0926bf92008-09-23 00:11:26 -0700647 break;
648
649 case PTRACE_SET_WATCH_REGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700650 ret = ptrace_set_watch_regs(child, addrp);
David Daney0926bf92008-09-23 00:11:26 -0700651 break;
652
Linus Torvalds1da177e2005-04-16 15:20:36 -0700653 default:
654 ret = ptrace_request(child, request, addr, data);
655 break;
656 }
Christoph Hellwig481bed42005-11-07 00:59:47 -0800657 out:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700658 return ret;
659}
660
661/*
662 * Notification of system call entry/exit
663 * - triggered by current->work.syscall_trace
664 */
Markos Chandras1225eb82014-01-22 14:40:01 +0000665asmlinkage long syscall_trace_enter(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700666{
Markos Chandras1225eb82014-01-22 14:40:01 +0000667 long syscall = regs->regs[2];
Ralf Baechle0dfa95a2012-09-26 21:30:47 +0200668 long ret = 0;
Ralf Baechlec3fc5cd2013-05-29 01:07:19 +0200669 user_exit();
670
Markos Chandras1225eb82014-01-22 14:40:01 +0000671 if (secure_computing(syscall) == -1)
672 return -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700673
Ralf Baechle0dfa95a2012-09-26 21:30:47 +0200674 if (test_thread_flag(TIF_SYSCALL_TRACE) &&
675 tracehook_report_syscall_entry(regs))
676 ret = -1;
Ralf Baechle293c5bd2007-07-25 16:19:33 +0100677
Ralf Baechle1d7bf992013-09-06 20:24:48 +0200678 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
679 trace_sys_enter(regs, regs->regs[2]);
680
Markos Chandras6e345742014-01-22 14:39:59 +0000681 audit_syscall_entry(syscall_get_arch(current, regs),
Markos Chandras1225eb82014-01-22 14:40:01 +0000682 syscall,
Eric Parisb05d8442012-01-03 14:23:06 -0500683 regs->regs[4], regs->regs[5],
684 regs->regs[6], regs->regs[7]);
Markos Chandras1225eb82014-01-22 14:40:01 +0000685 return syscall;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700686}
Ralf Baechle8b659a32011-05-19 09:21:29 +0100687
688/*
689 * Notification of system call entry/exit
690 * - triggered by current->work.syscall_trace
691 */
692asmlinkage void syscall_trace_leave(struct pt_regs *regs)
693{
Ralf Baechlec3fc5cd2013-05-29 01:07:19 +0200694 /*
695 * We may come here right after calling schedule_user()
696 * or do_notify_resume(), in which case we can be in RCU
697 * user mode.
698 */
699 user_exit();
700
Eric Parisd7e75282012-01-03 14:23:06 -0500701 audit_syscall_exit(regs);
Ralf Baechle8b659a32011-05-19 09:21:29 +0100702
Ralf Baechle1d7bf992013-09-06 20:24:48 +0200703 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
704 trace_sys_exit(regs, regs->regs[2]);
705
Ralf Baechlebc3d22c2012-07-17 19:43:58 +0200706 if (test_thread_flag(TIF_SYSCALL_TRACE))
707 tracehook_report_syscall_exit(regs, 0);
Ralf Baechlec3fc5cd2013-05-29 01:07:19 +0200708
709 user_enter();
Ralf Baechle8b659a32011-05-19 09:21:29 +0100710}