Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1 | /************************************************************************** |
| 2 | * |
| 3 | * Copyright (C) 2000-2008 Alacritech, Inc. All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above |
| 12 | * copyright notice, this list of conditions and the following |
| 13 | * disclaimer in the documentation and/or other materials provided |
| 14 | * with the distribution. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY |
| 17 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 19 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR |
| 20 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 21 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 23 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 24 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 25 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 26 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | * |
| 29 | * The views and conclusions contained in the software and documentation |
| 30 | * are those of the authors and should not be interpreted as representing |
| 31 | * official policies, either expressed or implied, of Alacritech, Inc. |
| 32 | * |
| 33 | **************************************************************************/ |
| 34 | |
| 35 | /* |
| 36 | * FILENAME: sxg.c |
| 37 | * |
| 38 | * The SXG driver for Alacritech's 10Gbe products. |
| 39 | * |
| 40 | * NOTE: This is the standard, non-accelerated version of Alacritech's |
| 41 | * IS-NIC driver. |
| 42 | */ |
| 43 | |
| 44 | #include <linux/kernel.h> |
| 45 | #include <linux/string.h> |
| 46 | #include <linux/errno.h> |
| 47 | #include <linux/module.h> |
| 48 | #include <linux/moduleparam.h> |
| 49 | #include <linux/ioport.h> |
| 50 | #include <linux/slab.h> |
| 51 | #include <linux/interrupt.h> |
| 52 | #include <linux/timer.h> |
| 53 | #include <linux/pci.h> |
| 54 | #include <linux/spinlock.h> |
| 55 | #include <linux/init.h> |
| 56 | #include <linux/netdevice.h> |
| 57 | #include <linux/etherdevice.h> |
| 58 | #include <linux/ethtool.h> |
| 59 | #include <linux/skbuff.h> |
| 60 | #include <linux/delay.h> |
| 61 | #include <linux/types.h> |
| 62 | #include <linux/dma-mapping.h> |
| 63 | #include <linux/mii.h> |
| 64 | |
| 65 | #define SLIC_DUMP_ENABLED 0 |
| 66 | #define SLIC_GET_STATS_ENABLED 0 |
| 67 | #define LINUX_FREES_ADAPTER_RESOURCES 1 |
| 68 | #define SXG_OFFLOAD_IP_CHECKSUM 0 |
| 69 | #define SXG_POWER_MANAGEMENT_ENABLED 0 |
| 70 | #define VPCI 0 |
| 71 | #define DBG 1 |
| 72 | #define ATK_DEBUG 1 |
| 73 | |
| 74 | #include "sxg_os.h" |
| 75 | #include "sxghw.h" |
| 76 | #include "sxghif.h" |
| 77 | #include "sxg.h" |
| 78 | #include "sxgdbg.h" |
| 79 | |
| 80 | #include "sxgphycode.h" |
| 81 | #include "saharadbgdownload.h" |
| 82 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 83 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, u32 Size, |
| 84 | enum SXG_BUFFER_TYPE BufferType); |
| 85 | static void sxg_allocate_rcvblock_complete(struct adapter_t *adapter, void *RcvBlock, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 86 | dma_addr_t PhysicalAddress, |
| 87 | u32 Length); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 88 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
| 89 | struct SXG_SCATTER_GATHER *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 90 | dma_addr_t PhysicalAddress, |
| 91 | u32 Length); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 92 | |
| 93 | static void sxg_mcast_init_crc32(void); |
| 94 | |
| 95 | static int sxg_entry_open(p_net_device dev); |
| 96 | static int sxg_entry_halt(p_net_device dev); |
| 97 | static int sxg_ioctl(p_net_device dev, struct ifreq *rq, int cmd); |
| 98 | static int sxg_send_packets(struct sk_buff *skb, p_net_device dev); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 99 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 100 | static void sxg_dumb_sgl(struct SXG_X64_SGL *pSgl, struct SXG_SCATTER_GATHER *SxgSgl); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 101 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 102 | static void sxg_handle_interrupt(struct adapter_t *adapter); |
| 103 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId); |
| 104 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId); |
| 105 | static void sxg_complete_slow_send(struct adapter_t *adapter); |
| 106 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, struct SXG_EVENT *Event); |
| 107 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus); |
| 108 | static bool sxg_mac_filter(struct adapter_t *adapter, |
| 109 | struct ether_header *EtherHdr, ushort length); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 110 | |
| 111 | #if SLIC_GET_STATS_ENABLED |
| 112 | static struct net_device_stats *sxg_get_stats(p_net_device dev); |
| 113 | #endif |
| 114 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 115 | #define XXXTODO 0 |
| 116 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 117 | static int sxg_mac_set_address(p_net_device dev, void *ptr); |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 118 | static void sxg_mcast_set_list(p_net_device dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 119 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 120 | static void sxg_adapter_set_hwaddr(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 121 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 122 | static void sxg_unmap_mmio_space(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 123 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 124 | static int sxg_initialize_adapter(struct adapter_t *adapter); |
| 125 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter); |
| 126 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 127 | unsigned char Index); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 128 | static int sxg_initialize_link(struct adapter_t *adapter); |
| 129 | static int sxg_phy_init(struct adapter_t *adapter); |
| 130 | static void sxg_link_event(struct adapter_t *adapter); |
| 131 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter); |
| 132 | static void sxg_link_state(struct adapter_t *adapter, enum SXG_LINK_STATE LinkState); |
| 133 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 134 | u32 DevAddr, u32 RegAddr, u32 Value); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 135 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 136 | u32 DevAddr, u32 RegAddr, u32 *pValue); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 137 | |
| 138 | static unsigned int sxg_first_init = 1; |
| 139 | static char *sxg_banner = |
| 140 | "Alacritech SLIC Technology(tm) Server and Storage 10Gbe Accelerator (Non-Accelerated)\n"; |
| 141 | |
| 142 | static int sxg_debug = 1; |
| 143 | static int debug = -1; |
| 144 | static p_net_device head_netdevice = NULL; |
| 145 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 146 | static struct sxgbase_driver_t sxg_global = { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 147 | .dynamic_intagg = 1, |
| 148 | }; |
| 149 | static int intagg_delay = 100; |
| 150 | static u32 dynamic_intagg = 0; |
| 151 | |
| 152 | #define DRV_NAME "sxg" |
| 153 | #define DRV_VERSION "1.0.1" |
| 154 | #define DRV_AUTHOR "Alacritech, Inc. Engineering" |
| 155 | #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) Non-Accelerated 10Gbe Driver" |
| 156 | #define DRV_COPYRIGHT "Copyright 2000-2008 Alacritech, Inc. All rights reserved." |
| 157 | |
| 158 | MODULE_AUTHOR(DRV_AUTHOR); |
| 159 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
| 160 | MODULE_LICENSE("GPL"); |
| 161 | |
| 162 | module_param(dynamic_intagg, int, 0); |
| 163 | MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting"); |
| 164 | module_param(intagg_delay, int, 0); |
| 165 | MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); |
| 166 | |
| 167 | static struct pci_device_id sxg_pci_tbl[] __devinitdata = { |
| 168 | {PCI_DEVICE(SXG_VENDOR_ID, SXG_DEVICE_ID)}, |
| 169 | {0,} |
| 170 | }; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 171 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 172 | MODULE_DEVICE_TABLE(pci, sxg_pci_tbl); |
| 173 | |
| 174 | /*********************************************************************** |
| 175 | ************************************************************************ |
| 176 | ************************************************************************ |
| 177 | ************************************************************************ |
| 178 | ************************************************************************/ |
| 179 | |
| 180 | static inline void sxg_reg32_write(void __iomem *reg, u32 value, bool flush) |
| 181 | { |
| 182 | writel(value, reg); |
| 183 | if (flush) |
| 184 | mb(); |
| 185 | } |
| 186 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 187 | static inline void sxg_reg64_write(struct adapter_t *adapter, void __iomem *reg, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 188 | u64 value, u32 cpu) |
| 189 | { |
| 190 | u32 value_high = (u32) (value >> 32); |
| 191 | u32 value_low = (u32) (value & 0x00000000FFFFFFFF); |
| 192 | unsigned long flags; |
| 193 | |
| 194 | spin_lock_irqsave(&adapter->Bit64RegLock, flags); |
| 195 | writel(value_high, (void __iomem *)(&adapter->UcodeRegs[cpu].Upper)); |
| 196 | writel(value_low, reg); |
| 197 | spin_unlock_irqrestore(&adapter->Bit64RegLock, flags); |
| 198 | } |
| 199 | |
| 200 | static void sxg_init_driver(void) |
| 201 | { |
| 202 | if (sxg_first_init) { |
| 203 | DBG_ERROR("sxg: %s sxg_first_init set jiffies[%lx]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 204 | __func__, jiffies); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 205 | sxg_first_init = 0; |
| 206 | spin_lock_init(&sxg_global.driver_lock); |
| 207 | } |
| 208 | } |
| 209 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 210 | static void sxg_dbg_macaddrs(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 211 | { |
| 212 | DBG_ERROR(" (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 213 | adapter->netdev->name, adapter->currmacaddr[0], |
| 214 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 215 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 216 | adapter->currmacaddr[5]); |
| 217 | DBG_ERROR(" (%s) mac %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 218 | adapter->netdev->name, adapter->macaddr[0], |
| 219 | adapter->macaddr[1], adapter->macaddr[2], |
| 220 | adapter->macaddr[3], adapter->macaddr[4], |
| 221 | adapter->macaddr[5]); |
| 222 | return; |
| 223 | } |
| 224 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 225 | /* SXG Globals */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 226 | static struct SXG_DRIVER SxgDriver; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 227 | |
| 228 | #ifdef ATKDBG |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 229 | static struct sxg_trace_buffer_t LSxgTraceBuffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 230 | #endif /* ATKDBG */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 231 | static struct sxg_trace_buffer_t *SxgTraceBuffer = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 232 | |
| 233 | /* |
| 234 | * sxg_download_microcode |
| 235 | * |
| 236 | * Download Microcode to Sahara adapter |
| 237 | * |
| 238 | * Arguments - |
| 239 | * adapter - A pointer to our adapter structure |
| 240 | * UcodeSel - microcode file selection |
| 241 | * |
| 242 | * Return |
| 243 | * int |
| 244 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 245 | static bool sxg_download_microcode(struct adapter_t *adapter, enum SXG_UCODE_SEL UcodeSel) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 246 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 247 | struct SXG_HW_REGS *HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 248 | u32 Section; |
| 249 | u32 ThisSectionSize; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 250 | u32 *Instruction = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 251 | u32 BaseAddress, AddressOffset, Address; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 252 | /* u32 Failure; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 253 | u32 ValueRead; |
| 254 | u32 i; |
| 255 | u32 numSections = 0; |
| 256 | u32 sectionSize[16]; |
| 257 | u32 sectionStart[16]; |
| 258 | |
| 259 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DnldUcod", |
| 260 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 261 | DBG_ERROR("sxg: %s ENTER\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 262 | |
| 263 | switch (UcodeSel) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 264 | case SXG_UCODE_SAHARA: /* Sahara operational ucode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 265 | numSections = SNumSections; |
| 266 | for (i = 0; i < numSections; i++) { |
| 267 | sectionSize[i] = SSectionSize[i]; |
| 268 | sectionStart[i] = SSectionStart[i]; |
| 269 | } |
| 270 | break; |
| 271 | default: |
| 272 | printk(KERN_ERR KBUILD_MODNAME |
| 273 | ": Woah, big error with the microcode!\n"); |
| 274 | break; |
| 275 | } |
| 276 | |
| 277 | DBG_ERROR("sxg: RESET THE CARD\n"); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 278 | /* First, reset the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 279 | WRITE_REG(HwRegs->Reset, 0xDEAD, FLUSH); |
| 280 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 281 | /* Download each section of the microcode as specified in */ |
| 282 | /* its download file. The *download.c file is generated using */ |
| 283 | /* the saharaobjtoc facility which converts the metastep .obj */ |
| 284 | /* file to a .c file which contains a two dimentional array. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 285 | for (Section = 0; Section < numSections; Section++) { |
| 286 | DBG_ERROR("sxg: SECTION # %d\n", Section); |
| 287 | switch (UcodeSel) { |
| 288 | case SXG_UCODE_SAHARA: |
| 289 | Instruction = (u32 *) & SaharaUCode[Section][0]; |
| 290 | break; |
| 291 | default: |
| 292 | ASSERT(0); |
| 293 | break; |
| 294 | } |
| 295 | BaseAddress = sectionStart[Section]; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 296 | ThisSectionSize = sectionSize[Section] / 12; /* Size in instructions */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 297 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 298 | AddressOffset++) { |
| 299 | Address = BaseAddress + AddressOffset; |
| 300 | ASSERT((Address & ~MICROCODE_ADDRESS_MASK) == 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 301 | /* Write instruction bits 31 - 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 302 | WRITE_REG(HwRegs->UcodeDataLow, *Instruction, FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 303 | /* Write instruction bits 63-32 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 304 | WRITE_REG(HwRegs->UcodeDataMiddle, *(Instruction + 1), |
| 305 | FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 306 | /* Write instruction bits 95-64 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 307 | WRITE_REG(HwRegs->UcodeDataHigh, *(Instruction + 2), |
| 308 | FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 309 | /* Write instruction address with the WRITE bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 310 | WRITE_REG(HwRegs->UcodeAddr, |
| 311 | (Address | MICROCODE_ADDRESS_WRITE), FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 312 | /* Sahara bug in the ucode download logic - the write to DataLow */ |
| 313 | /* for the next instruction could get corrupted. To avoid this, */ |
| 314 | /* write to DataLow again for this instruction (which may get */ |
| 315 | /* corrupted, but it doesn't matter), then increment the address */ |
| 316 | /* and write the data for the next instruction to DataLow. That */ |
| 317 | /* write should succeed. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 318 | WRITE_REG(HwRegs->UcodeDataLow, *Instruction, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 319 | /* Advance 3 u32S to start of next instruction */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 320 | Instruction += 3; |
| 321 | } |
| 322 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 323 | /* Now repeat the entire operation reading the instruction back and */ |
| 324 | /* checking for parity errors */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 325 | for (Section = 0; Section < numSections; Section++) { |
| 326 | DBG_ERROR("sxg: check SECTION # %d\n", Section); |
| 327 | switch (UcodeSel) { |
| 328 | case SXG_UCODE_SAHARA: |
| 329 | Instruction = (u32 *) & SaharaUCode[Section][0]; |
| 330 | break; |
| 331 | default: |
| 332 | ASSERT(0); |
| 333 | break; |
| 334 | } |
| 335 | BaseAddress = sectionStart[Section]; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 336 | ThisSectionSize = sectionSize[Section] / 12; /* Size in instructions */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 337 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 338 | AddressOffset++) { |
| 339 | Address = BaseAddress + AddressOffset; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 340 | /* Write the address with the READ bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 341 | WRITE_REG(HwRegs->UcodeAddr, |
| 342 | (Address | MICROCODE_ADDRESS_READ), FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 343 | /* Read it back and check parity bit. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 344 | READ_REG(HwRegs->UcodeAddr, ValueRead); |
| 345 | if (ValueRead & MICROCODE_ADDRESS_PARITY) { |
| 346 | DBG_ERROR("sxg: %s PARITY ERROR\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 347 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 348 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 349 | return (FALSE); /* Parity error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 350 | } |
| 351 | ASSERT((ValueRead & MICROCODE_ADDRESS_MASK) == Address); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 352 | /* Read the instruction back and compare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 353 | READ_REG(HwRegs->UcodeDataLow, ValueRead); |
| 354 | if (ValueRead != *Instruction) { |
| 355 | DBG_ERROR("sxg: %s MISCOMPARE LOW\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 356 | __func__); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 357 | return (FALSE); /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 358 | } |
| 359 | READ_REG(HwRegs->UcodeDataMiddle, ValueRead); |
| 360 | if (ValueRead != *(Instruction + 1)) { |
| 361 | DBG_ERROR("sxg: %s MISCOMPARE MIDDLE\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 362 | __func__); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 363 | return (FALSE); /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 364 | } |
| 365 | READ_REG(HwRegs->UcodeDataHigh, ValueRead); |
| 366 | if (ValueRead != *(Instruction + 2)) { |
| 367 | DBG_ERROR("sxg: %s MISCOMPARE HIGH\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 368 | __func__); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 369 | return (FALSE); /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 370 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 371 | /* Advance 3 u32S to start of next instruction */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 372 | Instruction += 3; |
| 373 | } |
| 374 | } |
| 375 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 376 | /* Everything OK, Go. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 377 | WRITE_REG(HwRegs->UcodeAddr, MICROCODE_ADDRESS_GO, FLUSH); |
| 378 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 379 | /* Poll the CardUp register to wait for microcode to initialize */ |
| 380 | /* Give up after 10,000 attemps (500ms). */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 381 | for (i = 0; i < 10000; i++) { |
| 382 | udelay(50); |
| 383 | READ_REG(adapter->UcodeRegs[0].CardUp, ValueRead); |
| 384 | if (ValueRead == 0xCAFE) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 385 | DBG_ERROR("sxg: %s BOO YA 0xCAFE\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 386 | break; |
| 387 | } |
| 388 | } |
| 389 | if (i == 10000) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 390 | DBG_ERROR("sxg: %s TIMEOUT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 391 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 392 | return (FALSE); /* Timeout */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 393 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 394 | /* Now write the LoadSync register. This is used to */ |
| 395 | /* synchronize with the card so it can scribble on the memory */ |
| 396 | /* that contained 0xCAFE from the "CardUp" step above */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 397 | if (UcodeSel == SXG_UCODE_SAHARA) { |
| 398 | WRITE_REG(adapter->UcodeRegs[0].LoadSync, 0, FLUSH); |
| 399 | } |
| 400 | |
| 401 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDnldUcd", |
| 402 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 403 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 404 | |
| 405 | return (TRUE); |
| 406 | } |
| 407 | |
| 408 | /* |
| 409 | * sxg_allocate_resources - Allocate memory and locks |
| 410 | * |
| 411 | * Arguments - |
| 412 | * adapter - A pointer to our adapter structure |
| 413 | * |
| 414 | * Return |
| 415 | * int |
| 416 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 417 | static int sxg_allocate_resources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 418 | { |
| 419 | int status; |
| 420 | u32 i; |
| 421 | u32 RssIds, IsrCount; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 422 | /* struct SXG_XMT_RING *XmtRing; */ |
| 423 | /* struct SXG_RCV_RING *RcvRing; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 424 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 425 | DBG_ERROR("%s ENTER\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 426 | |
| 427 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocRes", |
| 428 | adapter, 0, 0, 0); |
| 429 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 430 | /* Windows tells us how many CPUs it plans to use for */ |
| 431 | /* RSS */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 432 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
| 433 | IsrCount = adapter->MsiEnabled ? RssIds : 1; |
| 434 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 435 | DBG_ERROR("%s Setup the spinlocks\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 436 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 437 | /* Allocate spinlocks and initialize listheads first. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 438 | spin_lock_init(&adapter->RcvQLock); |
| 439 | spin_lock_init(&adapter->SglQLock); |
| 440 | spin_lock_init(&adapter->XmtZeroLock); |
| 441 | spin_lock_init(&adapter->Bit64RegLock); |
| 442 | spin_lock_init(&adapter->AdapterLock); |
| 443 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 444 | DBG_ERROR("%s Setup the lists\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 445 | |
| 446 | InitializeListHead(&adapter->FreeRcvBuffers); |
| 447 | InitializeListHead(&adapter->FreeRcvBlocks); |
| 448 | InitializeListHead(&adapter->AllRcvBlocks); |
| 449 | InitializeListHead(&adapter->FreeSglBuffers); |
| 450 | InitializeListHead(&adapter->AllSglBuffers); |
| 451 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 452 | /* Mark these basic allocations done. This flags essentially */ |
| 453 | /* tells the SxgFreeResources routine that it can grab spinlocks */ |
| 454 | /* and reference listheads. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 455 | adapter->BasicAllocations = TRUE; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 456 | /* Main allocation loop. Start with the maximum supported by */ |
| 457 | /* the microcode and back off if memory allocation */ |
| 458 | /* fails. If we hit a minimum, fail. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 459 | |
| 460 | for (;;) { |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 461 | DBG_ERROR("%s Allocate XmtRings size[%x]\n", __func__, |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 462 | (unsigned int)(sizeof(struct SXG_XMT_RING) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 463 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 464 | /* Start with big items first - receive and transmit rings. At the moment */ |
| 465 | /* I'm going to keep the ring size fixed and adjust the number of */ |
| 466 | /* TCBs if we fail. Later we might consider reducing the ring size as well.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 467 | adapter->XmtRings = pci_alloc_consistent(adapter->pcidev, |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 468 | sizeof(struct SXG_XMT_RING) * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 469 | 1, |
| 470 | &adapter->PXmtRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 471 | DBG_ERROR("%s XmtRings[%p]\n", __func__, adapter->XmtRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 472 | |
| 473 | if (!adapter->XmtRings) { |
| 474 | goto per_tcb_allocation_failed; |
| 475 | } |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 476 | memset(adapter->XmtRings, 0, sizeof(struct SXG_XMT_RING) * 1); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 477 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 478 | DBG_ERROR("%s Allocate RcvRings size[%x]\n", __func__, |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 479 | (unsigned int)(sizeof(struct SXG_RCV_RING) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 480 | adapter->RcvRings = |
| 481 | pci_alloc_consistent(adapter->pcidev, |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 482 | sizeof(struct SXG_RCV_RING) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 483 | &adapter->PRcvRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 484 | DBG_ERROR("%s RcvRings[%p]\n", __func__, adapter->RcvRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 485 | if (!adapter->RcvRings) { |
| 486 | goto per_tcb_allocation_failed; |
| 487 | } |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 488 | memset(adapter->RcvRings, 0, sizeof(struct SXG_RCV_RING) * 1); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 489 | break; |
| 490 | |
| 491 | per_tcb_allocation_failed: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 492 | /* an allocation failed. Free any successful allocations. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 493 | if (adapter->XmtRings) { |
| 494 | pci_free_consistent(adapter->pcidev, |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 495 | sizeof(struct SXG_XMT_RING) * 4096, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 496 | adapter->XmtRings, |
| 497 | adapter->PXmtRings); |
| 498 | adapter->XmtRings = NULL; |
| 499 | } |
| 500 | if (adapter->RcvRings) { |
| 501 | pci_free_consistent(adapter->pcidev, |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 502 | sizeof(struct SXG_RCV_RING) * 4096, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 503 | adapter->RcvRings, |
| 504 | adapter->PRcvRings); |
| 505 | adapter->RcvRings = NULL; |
| 506 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 507 | /* Loop around and try again.... */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 508 | } |
| 509 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 510 | DBG_ERROR("%s Initialize RCV ZERO and XMT ZERO rings\n", __func__); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 511 | /* Initialize rcv zero and xmt zero rings */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 512 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, SXG_RCV_RING_SIZE); |
| 513 | SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE); |
| 514 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 515 | /* Sanity check receive data structure format */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 516 | ASSERT((adapter->ReceiveBufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 517 | (adapter->ReceiveBufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 518 | ASSERT(sizeof(struct SXG_RCV_DESCRIPTOR_BLOCK) == |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 519 | SXG_RCV_DESCRIPTOR_BLOCK_SIZE); |
| 520 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 521 | /* Allocate receive data buffers. We allocate a block of buffers and */ |
| 522 | /* a corresponding descriptor block at once. See sxghw.h:SXG_RCV_BLOCK */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 523 | for (i = 0; i < SXG_INITIAL_RCV_DATA_BUFFERS; |
| 524 | i += SXG_RCV_DESCRIPTORS_PER_BLOCK) { |
| 525 | sxg_allocate_buffer_memory(adapter, |
| 526 | SXG_RCV_BLOCK_SIZE(adapter-> |
| 527 | ReceiveBufferSize), |
| 528 | SXG_BUFFER_TYPE_RCV); |
| 529 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 530 | /* NBL resource allocation can fail in the 'AllocateComplete' routine, which */ |
| 531 | /* doesn't return status. Make sure we got the number of buffers we requested */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 532 | if (adapter->FreeRcvBufferCount < SXG_INITIAL_RCV_DATA_BUFFERS) { |
| 533 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF6", |
| 534 | adapter, adapter->FreeRcvBufferCount, SXG_MAX_ENTRIES, |
| 535 | 0); |
| 536 | return (STATUS_RESOURCES); |
| 537 | } |
| 538 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 539 | DBG_ERROR("%s Allocate EventRings size[%x]\n", __func__, |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 540 | (unsigned int)(sizeof(struct SXG_EVENT_RING) * RssIds)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 541 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 542 | /* Allocate event queues. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 543 | adapter->EventRings = pci_alloc_consistent(adapter->pcidev, |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 544 | sizeof(struct SXG_EVENT_RING) * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 545 | RssIds, |
| 546 | &adapter->PEventRings); |
| 547 | |
| 548 | if (!adapter->EventRings) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 549 | /* Caller will call SxgFreeAdapter to clean up above allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 550 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF8", |
| 551 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 552 | status = STATUS_RESOURCES; |
| 553 | goto per_tcb_allocation_failed; |
| 554 | } |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 555 | memset(adapter->EventRings, 0, sizeof(struct SXG_EVENT_RING) * RssIds); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 556 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 557 | DBG_ERROR("%s Allocate ISR size[%x]\n", __func__, IsrCount); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 558 | /* Allocate ISR */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 559 | adapter->Isr = pci_alloc_consistent(adapter->pcidev, |
| 560 | IsrCount, &adapter->PIsr); |
| 561 | if (!adapter->Isr) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 562 | /* Caller will call SxgFreeAdapter to clean up above allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 563 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF9", |
| 564 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 565 | status = STATUS_RESOURCES; |
| 566 | goto per_tcb_allocation_failed; |
| 567 | } |
| 568 | memset(adapter->Isr, 0, sizeof(u32) * IsrCount); |
| 569 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 570 | DBG_ERROR("%s Allocate shared XMT ring zero index location size[%x]\n", |
| 571 | __func__, (unsigned int)sizeof(u32)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 572 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 573 | /* Allocate shared XMT ring zero index location */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 574 | adapter->XmtRingZeroIndex = pci_alloc_consistent(adapter->pcidev, |
| 575 | sizeof(u32), |
| 576 | &adapter-> |
| 577 | PXmtRingZeroIndex); |
| 578 | if (!adapter->XmtRingZeroIndex) { |
| 579 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF10", |
| 580 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 581 | status = STATUS_RESOURCES; |
| 582 | goto per_tcb_allocation_failed; |
| 583 | } |
| 584 | memset(adapter->XmtRingZeroIndex, 0, sizeof(u32)); |
| 585 | |
| 586 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlcResS", |
| 587 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 588 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 589 | DBG_ERROR("%s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 590 | return (STATUS_SUCCESS); |
| 591 | } |
| 592 | |
| 593 | /* |
| 594 | * sxg_config_pci - |
| 595 | * |
| 596 | * Set up PCI Configuration space |
| 597 | * |
| 598 | * Arguments - |
| 599 | * pcidev - A pointer to our adapter structure |
| 600 | * |
| 601 | */ |
| 602 | static void sxg_config_pci(struct pci_dev *pcidev) |
| 603 | { |
| 604 | u16 pci_command; |
| 605 | u16 new_command; |
| 606 | |
| 607 | pci_read_config_word(pcidev, PCI_COMMAND, &pci_command); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 608 | DBG_ERROR("sxg: %s PCI command[%4.4x]\n", __func__, pci_command); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 609 | /* Set the command register */ |
| 610 | new_command = pci_command | (PCI_COMMAND_MEMORY | /* Memory Space Enable */ |
| 611 | PCI_COMMAND_MASTER | /* Bus master enable */ |
| 612 | PCI_COMMAND_INVALIDATE | /* Memory write and invalidate */ |
| 613 | PCI_COMMAND_PARITY | /* Parity error response */ |
| 614 | PCI_COMMAND_SERR | /* System ERR */ |
| 615 | PCI_COMMAND_FAST_BACK); /* Fast back-to-back */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 616 | if (pci_command != new_command) { |
| 617 | DBG_ERROR("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 618 | __func__, pci_command, new_command); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 619 | pci_write_config_word(pcidev, PCI_COMMAND, new_command); |
| 620 | } |
| 621 | } |
| 622 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 623 | static unsigned char temp_mac_address[6] = { 0x00, 0xab, 0xcd, 0xef, 0x12, 0x69 }; |
| 624 | /* |
| 625 | * sxg_read_config |
| 626 | * @adapter : Pointer to the adapter structure for the card |
| 627 | * This function will read the configuration data from EEPROM/FLASH |
| 628 | */ |
| 629 | static inline int sxg_read_config(struct adapter_t *adapter) |
| 630 | { |
| 631 | //struct sxg_config data; |
| 632 | struct SW_CFG_DATA *data; |
| 633 | dma_addr_t p_addr; |
| 634 | unsigned long status; |
| 635 | unsigned long i; |
| 636 | |
| 637 | data = pci_alloc_consistent(adapter->pcidev, sizeof(struct SW_CFG_DATA), &p_addr); |
| 638 | if(!data) { |
| 639 | /* We cant get even this much memory. Raise a hell |
| 640 | * Get out of here |
| 641 | */ |
| 642 | printk(KERN_ERR"%s : Could not allocate memory for reading EEPROM\n", __FUNCTION__); |
| 643 | return -ENOMEM; |
| 644 | } |
| 645 | |
| 646 | WRITE_REG(adapter->UcodeRegs[0].ConfigStat, SXG_CFG_TIMEOUT, TRUE); |
| 647 | |
| 648 | WRITE_REG64(adapter, adapter->UcodeRegs[0].Config, p_addr, 0); |
| 649 | for(i=0; i<1000; i++) { |
| 650 | READ_REG(adapter->UcodeRegs[0].ConfigStat, status); |
| 651 | if (status != SXG_CFG_TIMEOUT) |
| 652 | break; |
| 653 | mdelay(1); /* Do we really need this */ |
| 654 | } |
| 655 | |
| 656 | switch(status) { |
| 657 | case SXG_CFG_LOAD_EEPROM: /*Config read from EEPROM succeeded */ |
| 658 | case SXG_CFG_LOAD_FLASH: /* onfig read from Flash succeeded */ |
| 659 | /* Copy the MAC address to adapter structure */ |
| 660 | memcpy(temp_mac_address, data->MacAddr[0].MacAddr, 6); |
| 661 | /* TODO: We are not doing the remaining part : FRU, etc */ |
| 662 | break; |
| 663 | |
| 664 | case SXG_CFG_TIMEOUT: |
| 665 | case SXG_CFG_LOAD_INVALID: |
| 666 | case SXG_CFG_LOAD_ERROR: |
| 667 | default: /* Fix default handler later */ |
| 668 | printk(KERN_WARNING"%s : We could not read the config word." |
| 669 | "Status = %ld\n", __FUNCTION__, status); |
| 670 | break; |
| 671 | } |
| 672 | pci_free_consistent(adapter->pcidev, sizeof(struct SW_CFG_DATA), data, p_addr); |
| 673 | if (adapter->netdev) { |
| 674 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
| 675 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
| 676 | } |
| 677 | printk("LINSYS : These are the new MAC address\n"); |
| 678 | sxg_dbg_macaddrs(adapter); |
| 679 | |
| 680 | return status; |
| 681 | } |
| 682 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 683 | static int sxg_entry_probe(struct pci_dev *pcidev, |
| 684 | const struct pci_device_id *pci_tbl_entry) |
| 685 | { |
| 686 | static int did_version = 0; |
| 687 | int err; |
| 688 | struct net_device *netdev; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 689 | struct adapter_t *adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 690 | void __iomem *memmapped_ioaddr; |
| 691 | u32 status = 0; |
| 692 | ulong mmio_start = 0; |
| 693 | ulong mmio_len = 0; |
| 694 | |
| 695 | DBG_ERROR("sxg: %s 2.6 VERSION ENTER jiffies[%lx] cpu %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 696 | __func__, jiffies, smp_processor_id()); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 697 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 698 | /* Initialize trace buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 699 | #ifdef ATKDBG |
| 700 | SxgTraceBuffer = &LSxgTraceBuffer; |
| 701 | SXG_TRACE_INIT(SxgTraceBuffer, TRACE_NOISY); |
| 702 | #endif |
| 703 | |
| 704 | sxg_global.dynamic_intagg = dynamic_intagg; |
| 705 | |
| 706 | err = pci_enable_device(pcidev); |
| 707 | |
| 708 | DBG_ERROR("Call pci_enable_device(%p) status[%x]\n", pcidev, err); |
| 709 | if (err) { |
| 710 | return err; |
| 711 | } |
| 712 | |
| 713 | if (sxg_debug > 0 && did_version++ == 0) { |
| 714 | printk(KERN_INFO "%s\n", sxg_banner); |
| 715 | printk(KERN_INFO "%s\n", DRV_VERSION); |
| 716 | } |
| 717 | |
| 718 | if (!(err = pci_set_dma_mask(pcidev, DMA_64BIT_MASK))) { |
| 719 | DBG_ERROR("pci_set_dma_mask(DMA_64BIT_MASK) successful\n"); |
| 720 | } else { |
| 721 | if ((err = pci_set_dma_mask(pcidev, DMA_32BIT_MASK))) { |
| 722 | DBG_ERROR |
| 723 | ("No usable DMA configuration, aborting err[%x]\n", |
| 724 | err); |
| 725 | return err; |
| 726 | } |
| 727 | DBG_ERROR("pci_set_dma_mask(DMA_32BIT_MASK) successful\n"); |
| 728 | } |
| 729 | |
| 730 | DBG_ERROR("Call pci_request_regions\n"); |
| 731 | |
| 732 | err = pci_request_regions(pcidev, DRV_NAME); |
| 733 | if (err) { |
| 734 | DBG_ERROR("pci_request_regions FAILED err[%x]\n", err); |
| 735 | return err; |
| 736 | } |
| 737 | |
| 738 | DBG_ERROR("call pci_set_master\n"); |
| 739 | pci_set_master(pcidev); |
| 740 | |
| 741 | DBG_ERROR("call alloc_etherdev\n"); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 742 | netdev = alloc_etherdev(sizeof(struct adapter_t)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 743 | if (!netdev) { |
| 744 | err = -ENOMEM; |
| 745 | goto err_out_exit_sxg_probe; |
| 746 | } |
| 747 | DBG_ERROR("alloc_etherdev for slic netdev[%p]\n", netdev); |
| 748 | |
| 749 | SET_NETDEV_DEV(netdev, &pcidev->dev); |
| 750 | |
| 751 | pci_set_drvdata(pcidev, netdev); |
| 752 | adapter = netdev_priv(netdev); |
| 753 | adapter->netdev = netdev; |
| 754 | adapter->pcidev = pcidev; |
| 755 | |
| 756 | mmio_start = pci_resource_start(pcidev, 0); |
| 757 | mmio_len = pci_resource_len(pcidev, 0); |
| 758 | |
| 759 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 760 | mmio_start, mmio_len); |
| 761 | |
| 762 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 763 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 764 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 765 | if (!memmapped_ioaddr) { |
| 766 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 767 | __func__, mmio_len, mmio_start); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 768 | goto err_out_free_mmio_region; |
| 769 | } |
| 770 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 771 | DBG_ERROR |
| 772 | ("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] len[%lx], IRQ %d.\n", |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 773 | __func__, memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq); |
| 774 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 775 | adapter->HwRegs = (void *)memmapped_ioaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 776 | adapter->base_addr = memmapped_ioaddr; |
| 777 | |
| 778 | mmio_start = pci_resource_start(pcidev, 2); |
| 779 | mmio_len = pci_resource_len(pcidev, 2); |
| 780 | |
| 781 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 782 | mmio_start, mmio_len); |
| 783 | |
| 784 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 785 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
| 786 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 787 | if (!memmapped_ioaddr) { |
| 788 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 789 | __func__, mmio_len, mmio_start); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 790 | goto err_out_free_mmio_region; |
| 791 | } |
| 792 | |
| 793 | DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, " |
| 794 | "start[%lx] len[%lx], IRQ %d.\n", __func__, |
| 795 | memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq); |
| 796 | |
| 797 | adapter->UcodeRegs = (void *)memmapped_ioaddr; |
| 798 | |
| 799 | adapter->State = SXG_STATE_INITIALIZING; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 800 | /* Maintain a list of all adapters anchored by */ |
| 801 | /* the global SxgDriver structure. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 802 | adapter->Next = SxgDriver.Adapters; |
| 803 | SxgDriver.Adapters = adapter; |
| 804 | adapter->AdapterID = ++SxgDriver.AdapterID; |
| 805 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 806 | /* Initialize CRC table used to determine multicast hash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 807 | sxg_mcast_init_crc32(); |
| 808 | |
| 809 | adapter->JumboEnabled = FALSE; |
| 810 | adapter->RssEnabled = FALSE; |
| 811 | if (adapter->JumboEnabled) { |
| 812 | adapter->FrameSize = JUMBOMAXFRAME; |
| 813 | adapter->ReceiveBufferSize = SXG_RCV_JUMBO_BUFFER_SIZE; |
| 814 | } else { |
| 815 | adapter->FrameSize = ETHERMAXFRAME; |
| 816 | adapter->ReceiveBufferSize = SXG_RCV_DATA_BUFFER_SIZE; |
| 817 | } |
| 818 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 819 | /* status = SXG_READ_EEPROM(adapter); */ |
| 820 | /* if (!status) { */ |
| 821 | /* goto sxg_init_bad; */ |
| 822 | /* } */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 823 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 824 | DBG_ERROR("sxg: %s ENTER sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 825 | sxg_config_pci(pcidev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 826 | DBG_ERROR("sxg: %s EXIT sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 827 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 828 | DBG_ERROR("sxg: %s ENTER sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 829 | sxg_init_driver(); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 830 | DBG_ERROR("sxg: %s EXIT sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 831 | |
| 832 | adapter->vendid = pci_tbl_entry->vendor; |
| 833 | adapter->devid = pci_tbl_entry->device; |
| 834 | adapter->subsysid = pci_tbl_entry->subdevice; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 835 | adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F); |
| 836 | adapter->functionnumber = (pcidev->devfn & 0x7); |
| 837 | adapter->memorylength = pci_resource_len(pcidev, 0); |
| 838 | adapter->irq = pcidev->irq; |
| 839 | adapter->next_netdevice = head_netdevice; |
| 840 | head_netdevice = netdev; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 841 | adapter->port = 0; /*adapter->functionnumber; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 842 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 843 | /* Allocate memory and other resources */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 844 | DBG_ERROR("sxg: %s ENTER sxg_allocate_resources\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 845 | status = sxg_allocate_resources(adapter); |
| 846 | DBG_ERROR("sxg: %s EXIT sxg_allocate_resources status %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 847 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 848 | if (status != STATUS_SUCCESS) { |
| 849 | goto err_out_unmap; |
| 850 | } |
| 851 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 852 | DBG_ERROR("sxg: %s ENTER sxg_download_microcode\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 853 | if (sxg_download_microcode(adapter, SXG_UCODE_SAHARA)) { |
| 854 | DBG_ERROR("sxg: %s ENTER sxg_adapter_set_hwaddr\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 855 | __func__); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 856 | sxg_read_config(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 857 | sxg_adapter_set_hwaddr(adapter); |
| 858 | } else { |
| 859 | adapter->state = ADAPT_FAIL; |
| 860 | adapter->linkstate = LINK_DOWN; |
| 861 | DBG_ERROR("sxg_download_microcode FAILED status[%x]\n", status); |
| 862 | } |
| 863 | |
| 864 | netdev->base_addr = (unsigned long)adapter->base_addr; |
| 865 | netdev->irq = adapter->irq; |
| 866 | netdev->open = sxg_entry_open; |
| 867 | netdev->stop = sxg_entry_halt; |
| 868 | netdev->hard_start_xmit = sxg_send_packets; |
| 869 | netdev->do_ioctl = sxg_ioctl; |
| 870 | #if XXXTODO |
| 871 | netdev->set_mac_address = sxg_mac_set_address; |
| 872 | #if SLIC_GET_STATS_ENABLED |
| 873 | netdev->get_stats = sxg_get_stats; |
| 874 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 875 | #endif |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 876 | netdev->set_multicast_list = sxg_mcast_set_list; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 877 | |
| 878 | strcpy(netdev->name, "eth%d"); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 879 | /* strcpy(netdev->name, pci_name(pcidev)); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 880 | if ((err = register_netdev(netdev))) { |
| 881 | DBG_ERROR("Cannot register net device, aborting. %s\n", |
| 882 | netdev->name); |
| 883 | goto err_out_unmap; |
| 884 | } |
| 885 | |
| 886 | DBG_ERROR |
| 887 | ("sxg: %s addr 0x%lx, irq %d, MAC addr %02X:%02X:%02X:%02X:%02X:%02X\n", |
| 888 | netdev->name, netdev->base_addr, pcidev->irq, netdev->dev_addr[0], |
| 889 | netdev->dev_addr[1], netdev->dev_addr[2], netdev->dev_addr[3], |
| 890 | netdev->dev_addr[4], netdev->dev_addr[5]); |
| 891 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 892 | /*sxg_init_bad: */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 893 | ASSERT(status == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 894 | /* sxg_free_adapter(adapter); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 895 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 896 | DBG_ERROR("sxg: %s EXIT status[%x] jiffies[%lx] cpu %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 897 | status, jiffies, smp_processor_id()); |
| 898 | return status; |
| 899 | |
| 900 | err_out_unmap: |
| 901 | iounmap((void *)memmapped_ioaddr); |
| 902 | |
| 903 | err_out_free_mmio_region: |
| 904 | release_mem_region(mmio_start, mmio_len); |
| 905 | |
| 906 | err_out_exit_sxg_probe: |
| 907 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 908 | DBG_ERROR("%s EXIT jiffies[%lx] cpu %d\n", __func__, jiffies, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 909 | smp_processor_id()); |
| 910 | |
| 911 | return -ENODEV; |
| 912 | } |
| 913 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 914 | /*********************************************************************** |
| 915 | * LINE BASE Interrupt routines.. |
| 916 | ***********************************************************************/ |
| 917 | /* |
| 918 | * |
| 919 | * sxg_disable_interrupt |
| 920 | * |
| 921 | * DisableInterrupt Handler |
| 922 | * |
| 923 | * Arguments: |
| 924 | * |
| 925 | * adapter: Our adapter structure |
| 926 | * |
| 927 | * Return Value: |
| 928 | * None. |
| 929 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 930 | static void sxg_disable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 931 | { |
| 932 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DisIntr", |
| 933 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 934 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 935 | ASSERT(adapter->RssEnabled == FALSE); |
| 936 | ASSERT(adapter->MsiEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 937 | /* */ |
| 938 | /* Turn off interrupts by writing to the icr register. */ |
| 939 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 940 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_DISABLE), TRUE); |
| 941 | |
| 942 | adapter->InterruptsEnabled = 0; |
| 943 | |
| 944 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDisIntr", |
| 945 | adapter, adapter->InterruptsEnabled, 0, 0); |
| 946 | } |
| 947 | |
| 948 | /* |
| 949 | * |
| 950 | * sxg_enable_interrupt |
| 951 | * |
| 952 | * EnableInterrupt Handler |
| 953 | * |
| 954 | * Arguments: |
| 955 | * |
| 956 | * adapter: Our adapter structure |
| 957 | * |
| 958 | * Return Value: |
| 959 | * None. |
| 960 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 961 | static void sxg_enable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 962 | { |
| 963 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "EnIntr", |
| 964 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 965 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 966 | ASSERT(adapter->RssEnabled == FALSE); |
| 967 | ASSERT(adapter->MsiEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 968 | /* */ |
| 969 | /* Turn on interrupts by writing to the icr register. */ |
| 970 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 971 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_ENABLE), TRUE); |
| 972 | |
| 973 | adapter->InterruptsEnabled = 1; |
| 974 | |
| 975 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XEnIntr", |
| 976 | adapter, 0, 0, 0); |
| 977 | } |
| 978 | |
| 979 | /* |
| 980 | * |
| 981 | * sxg_isr - Process an line-based interrupt |
| 982 | * |
| 983 | * Arguments: |
| 984 | * Context - Our adapter structure |
| 985 | * QueueDefault - Output parameter to queue to default CPU |
| 986 | * TargetCpus - Output bitmap to schedule DPC's |
| 987 | * |
| 988 | * Return Value: |
| 989 | * TRUE if our interrupt |
| 990 | */ |
| 991 | static irqreturn_t sxg_isr(int irq, void *dev_id) |
| 992 | { |
| 993 | p_net_device dev = (p_net_device) dev_id; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 994 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 995 | /* u32 CpuMask = 0, i; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 996 | |
| 997 | adapter->Stats.NumInts++; |
| 998 | if (adapter->Isr[0] == 0) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 999 | /* The SLIC driver used to experience a number of spurious interrupts */ |
| 1000 | /* due to the delay associated with the masking of the interrupt */ |
| 1001 | /* (we'd bounce back in here). If we see that again with Sahara, */ |
| 1002 | /* add a READ_REG of the Icr register after the WRITE_REG below. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1003 | adapter->Stats.FalseInts++; |
| 1004 | return IRQ_NONE; |
| 1005 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1006 | /* */ |
| 1007 | /* Move the Isr contents and clear the value in */ |
| 1008 | /* shared memory, and mask interrupts */ |
| 1009 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1010 | adapter->IsrCopy[0] = adapter->Isr[0]; |
| 1011 | adapter->Isr[0] = 0; |
| 1012 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_MASK), TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1013 | /* ASSERT(adapter->IsrDpcsPending == 0); */ |
| 1014 | #if XXXTODO /* RSS Stuff */ |
| 1015 | /* If RSS is enabled and the ISR specifies */ |
| 1016 | /* SXG_ISR_EVENT, then schedule DPC's */ |
| 1017 | /* based on event queues. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1018 | if (adapter->RssEnabled && (adapter->IsrCopy[0] & SXG_ISR_EVENT)) { |
| 1019 | for (i = 0; |
| 1020 | i < adapter->RssSystemInfo->ProcessorInfo.RssCpuCount; |
| 1021 | i++) { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1022 | struct XG_EVENT_RING *EventRing = &adapter->EventRings[i]; |
| 1023 | struct SXG_EVENT *Event = |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1024 | &EventRing->Ring[adapter->NextEvent[i]]; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1025 | unsigned char Cpu = |
| 1026 | adapter->RssSystemInfo->RssIdToCpu[i]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1027 | if (Event->Status & EVENT_STATUS_VALID) { |
| 1028 | adapter->IsrDpcsPending++; |
| 1029 | CpuMask |= (1 << Cpu); |
| 1030 | } |
| 1031 | } |
| 1032 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1033 | /* Now, either schedule the CPUs specified by the CpuMask, */ |
| 1034 | /* or queue default */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1035 | if (CpuMask) { |
| 1036 | *QueueDefault = FALSE; |
| 1037 | } else { |
| 1038 | adapter->IsrDpcsPending = 1; |
| 1039 | *QueueDefault = TRUE; |
| 1040 | } |
| 1041 | *TargetCpus = CpuMask; |
| 1042 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1043 | /* */ |
| 1044 | /* There are no DPCs in Linux, so call the handler now */ |
| 1045 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1046 | sxg_handle_interrupt(adapter); |
| 1047 | |
| 1048 | return IRQ_HANDLED; |
| 1049 | } |
| 1050 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1051 | int debug_inthandler = 0; |
| 1052 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1053 | static void sxg_handle_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1054 | { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1055 | /* unsigned char RssId = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1056 | u32 NewIsr; |
| 1057 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1058 | if (++debug_inthandler < 20) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1059 | DBG_ERROR("Enter sxg_handle_interrupt ISR[%x]\n", |
| 1060 | adapter->IsrCopy[0]); |
| 1061 | } |
| 1062 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "HndlIntr", |
| 1063 | adapter, adapter->IsrCopy[0], 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1064 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1065 | ASSERT(adapter->RssEnabled == FALSE); |
| 1066 | ASSERT(adapter->MsiEnabled == FALSE); |
| 1067 | ASSERT(adapter->IsrCopy[0]); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1068 | /*/////////////////////////// */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1069 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1070 | /* Always process the event queue. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1071 | sxg_process_event_queue(adapter, |
| 1072 | (adapter->RssEnabled ? /*RssId */ 0 : 0)); |
| 1073 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1074 | #if XXXTODO /* RSS stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1075 | if (--adapter->IsrDpcsPending) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1076 | /* We're done. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1077 | ASSERT(adapter->RssEnabled); |
| 1078 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DPCsPend", |
| 1079 | adapter, 0, 0, 0); |
| 1080 | return; |
| 1081 | } |
| 1082 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1083 | /* */ |
| 1084 | /* Last (or only) DPC processes the ISR and clears the interrupt. */ |
| 1085 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1086 | NewIsr = sxg_process_isr(adapter, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1087 | /* */ |
| 1088 | /* Reenable interrupts */ |
| 1089 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1090 | adapter->IsrCopy[0] = 0; |
| 1091 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ClearIsr", |
| 1092 | adapter, NewIsr, 0, 0); |
| 1093 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1094 | if (debug_inthandler < 20) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1095 | DBG_ERROR |
| 1096 | ("Exit sxg_handle_interrupt2 after enabling interrupt\n"); |
| 1097 | } |
| 1098 | |
| 1099 | WRITE_REG(adapter->UcodeRegs[0].Isr, NewIsr, TRUE); |
| 1100 | |
| 1101 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XHndlInt", |
| 1102 | adapter, 0, 0, 0); |
| 1103 | } |
| 1104 | |
| 1105 | /* |
| 1106 | * |
| 1107 | * sxg_process_isr - Process an interrupt. Called from the line-based and |
| 1108 | * message based interrupt DPC routines |
| 1109 | * |
| 1110 | * Arguments: |
| 1111 | * adapter - Our adapter structure |
| 1112 | * Queue - The ISR that needs processing |
| 1113 | * |
| 1114 | * Return Value: |
| 1115 | * None |
| 1116 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1117 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1118 | { |
| 1119 | u32 Isr = adapter->IsrCopy[MessageId]; |
| 1120 | u32 NewIsr = 0; |
| 1121 | |
| 1122 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ProcIsr", |
| 1123 | adapter, Isr, 0, 0); |
| 1124 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1125 | /* Error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1126 | if (Isr & SXG_ISR_ERR) { |
| 1127 | if (Isr & SXG_ISR_PDQF) { |
| 1128 | adapter->Stats.PdqFull++; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1129 | DBG_ERROR("%s: SXG_ISR_ERR PDQF!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1130 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1131 | /* No host buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1132 | if (Isr & SXG_ISR_RMISS) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1133 | /* There is a bunch of code in the SLIC driver which */ |
| 1134 | /* attempts to process more receive events per DPC */ |
| 1135 | /* if we start to fall behind. We'll probably */ |
| 1136 | /* need to do something similar here, but hold */ |
| 1137 | /* off for now. I don't want to make the code more */ |
| 1138 | /* complicated than strictly needed. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1139 | adapter->Stats.RcvNoBuffer++; |
| 1140 | if (adapter->Stats.RcvNoBuffer < 5) { |
| 1141 | DBG_ERROR("%s: SXG_ISR_ERR RMISS!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1142 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1143 | } |
| 1144 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1145 | /* Card crash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1146 | if (Isr & SXG_ISR_DEAD) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1147 | /* Set aside the crash info and set the adapter state to RESET */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1148 | adapter->CrashCpu = |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1149 | (unsigned char)((Isr & SXG_ISR_CPU) >> |
| 1150 | SXG_ISR_CPU_SHIFT); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1151 | adapter->CrashLocation = (ushort) (Isr & SXG_ISR_CRASH); |
| 1152 | adapter->Dead = TRUE; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1153 | DBG_ERROR("%s: ISR_DEAD %x, CPU: %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1154 | adapter->CrashLocation, adapter->CrashCpu); |
| 1155 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1156 | /* Event ring full */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1157 | if (Isr & SXG_ISR_ERFULL) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1158 | /* Same issue as RMISS, really. This means the */ |
| 1159 | /* host is falling behind the card. Need to increase */ |
| 1160 | /* event ring size, process more events per interrupt, */ |
| 1161 | /* and/or reduce/remove interrupt aggregation. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1162 | adapter->Stats.EventRingFull++; |
| 1163 | DBG_ERROR("%s: SXG_ISR_ERR EVENT RING FULL!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1164 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1165 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1166 | /* Transmit drop - no DRAM buffers or XMT error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1167 | if (Isr & SXG_ISR_XDROP) { |
| 1168 | adapter->Stats.XmtDrops++; |
| 1169 | adapter->Stats.XmtErrors++; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1170 | DBG_ERROR("%s: SXG_ISR_ERR XDROP!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1171 | } |
| 1172 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1173 | /* Slowpath send completions */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1174 | if (Isr & SXG_ISR_SPSEND) { |
| 1175 | sxg_complete_slow_send(adapter); |
| 1176 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1177 | /* Dump */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1178 | if (Isr & SXG_ISR_UPC) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1179 | ASSERT(adapter->DumpCmdRunning); /* Maybe change when debug is added.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1180 | adapter->DumpCmdRunning = FALSE; |
| 1181 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1182 | /* Link event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1183 | if (Isr & SXG_ISR_LINK) { |
| 1184 | sxg_link_event(adapter); |
| 1185 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1186 | /* Debug - breakpoint hit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1187 | if (Isr & SXG_ISR_BREAK) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1188 | /* At the moment AGDB isn't written to support interactive */ |
| 1189 | /* debug sessions. When it is, this interrupt will be used */ |
| 1190 | /* to signal AGDB that it has hit a breakpoint. For now, ASSERT. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1191 | ASSERT(0); |
| 1192 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1193 | /* Heartbeat response */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1194 | if (Isr & SXG_ISR_PING) { |
| 1195 | adapter->PingOutstanding = FALSE; |
| 1196 | } |
| 1197 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XProcIsr", |
| 1198 | adapter, Isr, NewIsr, 0); |
| 1199 | |
| 1200 | return (NewIsr); |
| 1201 | } |
| 1202 | |
| 1203 | /* |
| 1204 | * |
| 1205 | * sxg_process_event_queue - Process our event queue |
| 1206 | * |
| 1207 | * Arguments: |
| 1208 | * - adapter - Adapter structure |
| 1209 | * - RssId - The event queue requiring processing |
| 1210 | * |
| 1211 | * Return Value: |
| 1212 | * None. |
| 1213 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1214 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1215 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1216 | struct SXG_EVENT_RING *EventRing = &adapter->EventRings[RssId]; |
| 1217 | struct SXG_EVENT *Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1218 | u32 EventsProcessed = 0, Batches = 0; |
| 1219 | u32 num_skbs = 0; |
| 1220 | struct sk_buff *skb; |
| 1221 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
| 1222 | struct sk_buff *prev_skb = NULL; |
| 1223 | struct sk_buff *IndicationList[SXG_RCV_ARRAYSIZE]; |
| 1224 | u32 Index; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1225 | struct SXG_RCV_DATA_BUFFER_HDR *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1226 | #endif |
| 1227 | u32 ReturnStatus = 0; |
| 1228 | |
| 1229 | ASSERT((adapter->State == SXG_STATE_RUNNING) || |
| 1230 | (adapter->State == SXG_STATE_PAUSING) || |
| 1231 | (adapter->State == SXG_STATE_PAUSED) || |
| 1232 | (adapter->State == SXG_STATE_HALTING)); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1233 | /* We may still have unprocessed events on the queue if */ |
| 1234 | /* the card crashed. Don't process them. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1235 | if (adapter->Dead) { |
| 1236 | return (0); |
| 1237 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1238 | /* In theory there should only be a single processor that */ |
| 1239 | /* accesses this queue, and only at interrupt-DPC time. So */ |
| 1240 | /* we shouldn't need a lock for any of this. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1241 | while (Event->Status & EVENT_STATUS_VALID) { |
| 1242 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "Event", |
| 1243 | Event, Event->Code, Event->Status, |
| 1244 | adapter->NextEvent); |
| 1245 | switch (Event->Code) { |
| 1246 | case EVENT_CODE_BUFFERS: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1247 | ASSERT(!(Event->CommandIndex & 0xFF00)); /* SXG_RING_INFO Head & Tail == unsigned char */ |
| 1248 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1249 | sxg_complete_descriptor_blocks(adapter, |
| 1250 | Event->CommandIndex); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1251 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1252 | break; |
| 1253 | case EVENT_CODE_SLOWRCV: |
| 1254 | --adapter->RcvBuffersOnCard; |
| 1255 | if ((skb = sxg_slow_receive(adapter, Event))) { |
| 1256 | u32 rx_bytes; |
| 1257 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1258 | /* Add it to our indication list */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1259 | SXG_ADD_RCV_PACKET(adapter, skb, prev_skb, |
| 1260 | IndicationList, num_skbs); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1261 | /* In Linux, we just pass up each skb to the protocol above at this point, */ |
| 1262 | /* there is no capability of an indication list. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1263 | #else |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1264 | /* CHECK skb_pull(skb, INIC_RCVBUF_HEADSIZE); */ |
| 1265 | rx_bytes = Event->Length; /* (rcvbuf->length & IRHDDR_FLEN_MSK); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1266 | adapter->stats.rx_packets++; |
| 1267 | adapter->stats.rx_bytes += rx_bytes; |
| 1268 | #if SXG_OFFLOAD_IP_CHECKSUM |
| 1269 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 1270 | #endif |
| 1271 | skb->dev = adapter->netdev; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1272 | netif_rx(skb); |
| 1273 | #endif |
| 1274 | } |
| 1275 | break; |
| 1276 | default: |
| 1277 | DBG_ERROR("%s: ERROR Invalid EventCode %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1278 | __func__, Event->Code); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1279 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1280 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1281 | /* See if we need to restock card receive buffers. */ |
| 1282 | /* There are two things to note here: */ |
| 1283 | /* First - This test is not SMP safe. The */ |
| 1284 | /* adapter->BuffersOnCard field is protected via atomic interlocked calls, but */ |
| 1285 | /* we do not protect it with respect to these tests. The only way to do that */ |
| 1286 | /* is with a lock, and I don't want to grab a lock every time we adjust the */ |
| 1287 | /* BuffersOnCard count. Instead, we allow the buffer replenishment to be off */ |
| 1288 | /* once in a while. The worst that can happen is the card is given one */ |
| 1289 | /* more-or-less descriptor block than the arbitrary value we've chosen. */ |
| 1290 | /* No big deal */ |
| 1291 | /* In short DO NOT ADD A LOCK HERE, OR WHERE RcvBuffersOnCard is adjusted. */ |
| 1292 | /* Second - We expect this test to rarely evaluate to true. We attempt to */ |
| 1293 | /* refill descriptor blocks as they are returned to us */ |
| 1294 | /* (sxg_complete_descriptor_blocks), so The only time this should evaluate */ |
| 1295 | /* to true is when sxg_complete_descriptor_blocks failed to allocate */ |
| 1296 | /* receive buffers. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1297 | if (adapter->RcvBuffersOnCard < SXG_RCV_DATA_BUFFERS) { |
| 1298 | sxg_stock_rcv_buffers(adapter); |
| 1299 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1300 | /* It's more efficient to just set this to zero. */ |
| 1301 | /* But clearing the top bit saves potential debug info... */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1302 | Event->Status &= ~EVENT_STATUS_VALID; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1303 | /* Advanct to the next event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1304 | SXG_ADVANCE_INDEX(adapter->NextEvent[RssId], EVENT_RING_SIZE); |
| 1305 | Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
| 1306 | EventsProcessed++; |
| 1307 | if (EventsProcessed == EVENT_RING_BATCH) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1308 | /* Release a batch of events back to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1309 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1310 | EVENT_RING_BATCH, FALSE); |
| 1311 | EventsProcessed = 0; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1312 | /* If we've processed our batch limit, break out of the */ |
| 1313 | /* loop and return SXG_ISR_EVENT to arrange for us to */ |
| 1314 | /* be called again */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1315 | if (Batches++ == EVENT_BATCH_LIMIT) { |
| 1316 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1317 | TRACE_NOISY, "EvtLimit", Batches, |
| 1318 | adapter->NextEvent, 0, 0); |
| 1319 | ReturnStatus = SXG_ISR_EVENT; |
| 1320 | break; |
| 1321 | } |
| 1322 | } |
| 1323 | } |
| 1324 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1325 | /* */ |
| 1326 | /* Indicate any received dumb-nic frames */ |
| 1327 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1328 | SXG_INDICATE_PACKETS(adapter, IndicationList, num_skbs); |
| 1329 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1330 | /* */ |
| 1331 | /* Release events back to the card. */ |
| 1332 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1333 | if (EventsProcessed) { |
| 1334 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1335 | EventsProcessed, FALSE); |
| 1336 | } |
| 1337 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XPrcEvnt", |
| 1338 | Batches, EventsProcessed, adapter->NextEvent, num_skbs); |
| 1339 | |
| 1340 | return (ReturnStatus); |
| 1341 | } |
| 1342 | |
| 1343 | /* |
| 1344 | * sxg_complete_slow_send - Complete slowpath or dumb-nic sends |
| 1345 | * |
| 1346 | * Arguments - |
| 1347 | * adapter - A pointer to our adapter structure |
| 1348 | |
| 1349 | * Return |
| 1350 | * None |
| 1351 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1352 | static void sxg_complete_slow_send(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1353 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1354 | struct SXG_XMT_RING *XmtRing = &adapter->XmtRings[0]; |
| 1355 | struct SXG_RING_INFO *XmtRingInfo = &adapter->XmtRingZeroInfo; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1356 | u32 *ContextType; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1357 | struct SXG_CMD *XmtCmd; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1358 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1359 | /* NOTE - This lock is dropped and regrabbed in this loop. */ |
| 1360 | /* This means two different processors can both be running */ |
| 1361 | /* through this loop. Be *very* careful. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1362 | spin_lock(&adapter->XmtZeroLock); |
| 1363 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnds", |
| 1364 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1365 | |
| 1366 | while (XmtRingInfo->Tail != *adapter->XmtRingZeroIndex) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1367 | /* Locate the current Cmd (ring descriptor entry), and */ |
| 1368 | /* associated SGL, and advance the tail */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1369 | SXG_RETURN_CMD(XmtRing, XmtRingInfo, XmtCmd, ContextType); |
| 1370 | ASSERT(ContextType); |
| 1371 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1372 | XmtRingInfo->Head, XmtRingInfo->Tail, XmtCmd, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1373 | /* Clear the SGL field. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1374 | XmtCmd->Sgl = 0; |
| 1375 | |
| 1376 | switch (*ContextType) { |
| 1377 | case SXG_SGL_DUMB: |
| 1378 | { |
| 1379 | struct sk_buff *skb; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1380 | struct SXG_SCATTER_GATHER *SxgSgl = (struct SXG_SCATTER_GATHER *)ContextType; |
| 1381 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1382 | /* Dumb-nic send. Command context is the dumb-nic SGL */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1383 | skb = (struct sk_buff *)ContextType; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1384 | skb = SxgSgl->DumbPacket; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1385 | /* Complete the send */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1386 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1387 | TRACE_IMPORTANT, "DmSndCmp", skb, 0, |
| 1388 | 0, 0); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1389 | printk("ASK:sxg_complete_slow_send: freeing an skb [%p]\n", skb); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1390 | ASSERT(adapter->Stats.XmtQLen); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1391 | adapter->Stats.XmtQLen--; /* within XmtZeroLock */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1392 | adapter->Stats.XmtOk++; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1393 | /* Now drop the lock and complete the send back to */ |
| 1394 | /* Microsoft. We need to drop the lock because */ |
| 1395 | /* Microsoft can come back with a chimney send, which */ |
| 1396 | /* results in a double trip in SxgTcpOuput */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1397 | spin_unlock(&adapter->XmtZeroLock); |
| 1398 | SXG_COMPLETE_DUMB_SEND(adapter, skb); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1399 | /* and reacquire.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1400 | spin_lock(&adapter->XmtZeroLock); |
| 1401 | } |
| 1402 | break; |
| 1403 | default: |
| 1404 | ASSERT(0); |
| 1405 | } |
| 1406 | } |
| 1407 | spin_unlock(&adapter->XmtZeroLock); |
| 1408 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1409 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1410 | } |
| 1411 | |
| 1412 | /* |
| 1413 | * sxg_slow_receive |
| 1414 | * |
| 1415 | * Arguments - |
| 1416 | * adapter - A pointer to our adapter structure |
| 1417 | * Event - Receive event |
| 1418 | * |
| 1419 | * Return |
| 1420 | * skb |
| 1421 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1422 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, struct SXG_EVENT *Event) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1423 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1424 | struct SXG_RCV_DATA_BUFFER_HDR *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1425 | struct sk_buff *Packet; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1426 | unsigned char*data; |
| 1427 | int i; |
| 1428 | char dstr[128]; |
| 1429 | char *dptr = dstr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1430 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1431 | RcvDataBufferHdr = (struct SXG_RCV_DATA_BUFFER_HDR*) Event->HostHandle; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1432 | ASSERT(RcvDataBufferHdr); |
| 1433 | ASSERT(RcvDataBufferHdr->State == SXG_BUFFER_ONCARD); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1434 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "SlowRcv", Event, |
| 1435 | RcvDataBufferHdr, RcvDataBufferHdr->State, |
| 1436 | RcvDataBufferHdr->VirtualAddress); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1437 | /* Drop rcv frames in non-running state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1438 | switch (adapter->State) { |
| 1439 | case SXG_STATE_RUNNING: |
| 1440 | break; |
| 1441 | case SXG_STATE_PAUSING: |
| 1442 | case SXG_STATE_PAUSED: |
| 1443 | case SXG_STATE_HALTING: |
| 1444 | goto drop; |
| 1445 | default: |
| 1446 | ASSERT(0); |
| 1447 | goto drop; |
| 1448 | } |
| 1449 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1450 | printk("ASK:sxg_slow_receive: event host handle %p\n", RcvDataBufferHdr); |
| 1451 | data = SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr); |
| 1452 | for (i = 0; i < 32; i++) |
| 1453 | dptr += sprintf(dptr, "%02x ", (unsigned)data[i]); |
| 1454 | printk("ASK:sxg_slow_receive: data %s\n", dstr); |
| 1455 | //memcpy(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), RcvDataBufferHdr->VirtualAddress, Event->Length); |
| 1456 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1457 | /* Change buffer state to UPSTREAM */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1458 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; |
| 1459 | if (Event->Status & EVENT_STATUS_RCVERR) { |
| 1460 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvError", |
| 1461 | Event, Event->Status, Event->HostHandle, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1462 | /* XXXTODO - Remove this print later */ |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1463 | DBG_ERROR("SXG: Receive error %x\n", *(u32 *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1464 | SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1465 | sxg_process_rcv_error(adapter, *(u32 *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1466 | SXG_RECEIVE_DATA_LOCATION |
| 1467 | (RcvDataBufferHdr)); |
| 1468 | goto drop; |
| 1469 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1470 | #if XXXTODO /* VLAN stuff */ |
| 1471 | /* If there's a VLAN tag, extract it and validate it */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1472 | if (((struct ether_header*) (SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)))-> |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1473 | EtherType == ETHERTYPE_VLAN) { |
| 1474 | if (SxgExtractVlanHeader(adapter, RcvDataBufferHdr, Event) != |
| 1475 | STATUS_SUCCESS) { |
| 1476 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, |
| 1477 | "BadVlan", Event, |
| 1478 | SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1479 | Event->Length, 0); |
| 1480 | goto drop; |
| 1481 | } |
| 1482 | } |
| 1483 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1484 | /* */ |
| 1485 | /* Dumb-nic frame. See if it passes our mac filter and update stats */ |
| 1486 | /* */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1487 | /* ASK if (!sxg_mac_filter(adapter, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1488 | SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1489 | Event->Length)) { |
| 1490 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvFiltr", |
| 1491 | Event, SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1492 | Event->Length, 0); |
| 1493 | goto drop; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1494 | } */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1495 | |
| 1496 | Packet = RcvDataBufferHdr->SxgDumbRcvPacket; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1497 | SXG_ADJUST_RCV_PACKET(Packet, RcvDataBufferHdr, Event); |
| 1498 | Packet->protocol = eth_type_trans(Packet, adapter->netdev); |
| 1499 | printk("ASK:sxg_slow_receive: protocol %x\n", (unsigned) Packet->protocol); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1500 | |
| 1501 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumbRcv", |
| 1502 | RcvDataBufferHdr, Packet, Event->Length, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1503 | /* */ |
| 1504 | /* Lastly adjust the receive packet length. */ |
| 1505 | /* */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1506 | RcvDataBufferHdr->SxgDumbRcvPacket = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1507 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1508 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1509 | return (Packet); |
| 1510 | |
| 1511 | drop: |
| 1512 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DropRcv", |
| 1513 | RcvDataBufferHdr, Event->Length, 0, 0); |
| 1514 | adapter->Stats.RcvDiscards++; |
| 1515 | spin_lock(&adapter->RcvQLock); |
| 1516 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 1517 | spin_unlock(&adapter->RcvQLock); |
| 1518 | return (NULL); |
| 1519 | } |
| 1520 | |
| 1521 | /* |
| 1522 | * sxg_process_rcv_error - process receive error and update |
| 1523 | * stats |
| 1524 | * |
| 1525 | * Arguments: |
| 1526 | * adapter - Adapter structure |
| 1527 | * ErrorStatus - 4-byte receive error status |
| 1528 | * |
| 1529 | * Return Value: |
| 1530 | * None |
| 1531 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1532 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1533 | { |
| 1534 | u32 Error; |
| 1535 | |
| 1536 | adapter->Stats.RcvErrors++; |
| 1537 | |
| 1538 | if (ErrorStatus & SXG_RCV_STATUS_TRANSPORT_ERROR) { |
| 1539 | Error = ErrorStatus & SXG_RCV_STATUS_TRANSPORT_MASK; |
| 1540 | switch (Error) { |
| 1541 | case SXG_RCV_STATUS_TRANSPORT_CSUM: |
| 1542 | adapter->Stats.TransportCsum++; |
| 1543 | break; |
| 1544 | case SXG_RCV_STATUS_TRANSPORT_UFLOW: |
| 1545 | adapter->Stats.TransportUflow++; |
| 1546 | break; |
| 1547 | case SXG_RCV_STATUS_TRANSPORT_HDRLEN: |
| 1548 | adapter->Stats.TransportHdrLen++; |
| 1549 | break; |
| 1550 | } |
| 1551 | } |
| 1552 | if (ErrorStatus & SXG_RCV_STATUS_NETWORK_ERROR) { |
| 1553 | Error = ErrorStatus & SXG_RCV_STATUS_NETWORK_MASK; |
| 1554 | switch (Error) { |
| 1555 | case SXG_RCV_STATUS_NETWORK_CSUM: |
| 1556 | adapter->Stats.NetworkCsum++; |
| 1557 | break; |
| 1558 | case SXG_RCV_STATUS_NETWORK_UFLOW: |
| 1559 | adapter->Stats.NetworkUflow++; |
| 1560 | break; |
| 1561 | case SXG_RCV_STATUS_NETWORK_HDRLEN: |
| 1562 | adapter->Stats.NetworkHdrLen++; |
| 1563 | break; |
| 1564 | } |
| 1565 | } |
| 1566 | if (ErrorStatus & SXG_RCV_STATUS_PARITY) { |
| 1567 | adapter->Stats.Parity++; |
| 1568 | } |
| 1569 | if (ErrorStatus & SXG_RCV_STATUS_LINK_ERROR) { |
| 1570 | Error = ErrorStatus & SXG_RCV_STATUS_LINK_MASK; |
| 1571 | switch (Error) { |
| 1572 | case SXG_RCV_STATUS_LINK_PARITY: |
| 1573 | adapter->Stats.LinkParity++; |
| 1574 | break; |
| 1575 | case SXG_RCV_STATUS_LINK_EARLY: |
| 1576 | adapter->Stats.LinkEarly++; |
| 1577 | break; |
| 1578 | case SXG_RCV_STATUS_LINK_BUFOFLOW: |
| 1579 | adapter->Stats.LinkBufOflow++; |
| 1580 | break; |
| 1581 | case SXG_RCV_STATUS_LINK_CODE: |
| 1582 | adapter->Stats.LinkCode++; |
| 1583 | break; |
| 1584 | case SXG_RCV_STATUS_LINK_DRIBBLE: |
| 1585 | adapter->Stats.LinkDribble++; |
| 1586 | break; |
| 1587 | case SXG_RCV_STATUS_LINK_CRC: |
| 1588 | adapter->Stats.LinkCrc++; |
| 1589 | break; |
| 1590 | case SXG_RCV_STATUS_LINK_OFLOW: |
| 1591 | adapter->Stats.LinkOflow++; |
| 1592 | break; |
| 1593 | case SXG_RCV_STATUS_LINK_UFLOW: |
| 1594 | adapter->Stats.LinkUflow++; |
| 1595 | break; |
| 1596 | } |
| 1597 | } |
| 1598 | } |
| 1599 | |
| 1600 | /* |
| 1601 | * sxg_mac_filter |
| 1602 | * |
| 1603 | * Arguments: |
| 1604 | * adapter - Adapter structure |
| 1605 | * pether - Ethernet header |
| 1606 | * length - Frame length |
| 1607 | * |
| 1608 | * Return Value: |
| 1609 | * TRUE if the frame is to be allowed |
| 1610 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1611 | static bool sxg_mac_filter(struct adapter_t *adapter, struct ether_header *EtherHdr, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1612 | ushort length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1613 | { |
| 1614 | bool EqualAddr; |
| 1615 | |
| 1616 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 1617 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1618 | /* broadcast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1619 | if (adapter->MacFilter & MAC_BCAST) { |
| 1620 | adapter->Stats.DumbRcvBcastPkts++; |
| 1621 | adapter->Stats.DumbRcvBcastBytes += length; |
| 1622 | adapter->Stats.DumbRcvPkts++; |
| 1623 | adapter->Stats.DumbRcvBytes += length; |
| 1624 | return (TRUE); |
| 1625 | } |
| 1626 | } else { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1627 | /* multicast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1628 | if (adapter->MacFilter & MAC_ALLMCAST) { |
| 1629 | adapter->Stats.DumbRcvMcastPkts++; |
| 1630 | adapter->Stats.DumbRcvMcastBytes += length; |
| 1631 | adapter->Stats.DumbRcvPkts++; |
| 1632 | adapter->Stats.DumbRcvBytes += length; |
| 1633 | return (TRUE); |
| 1634 | } |
| 1635 | if (adapter->MacFilter & MAC_MCAST) { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1636 | struct SXG_MULTICAST_ADDRESS *MulticastAddrs = |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1637 | adapter->MulticastAddrs; |
| 1638 | while (MulticastAddrs) { |
| 1639 | ETHER_EQ_ADDR(MulticastAddrs->Address, |
| 1640 | EtherHdr->ether_dhost, |
| 1641 | EqualAddr); |
| 1642 | if (EqualAddr) { |
| 1643 | adapter->Stats. |
| 1644 | DumbRcvMcastPkts++; |
| 1645 | adapter->Stats. |
| 1646 | DumbRcvMcastBytes += length; |
| 1647 | adapter->Stats.DumbRcvPkts++; |
| 1648 | adapter->Stats.DumbRcvBytes += |
| 1649 | length; |
| 1650 | return (TRUE); |
| 1651 | } |
| 1652 | MulticastAddrs = MulticastAddrs->Next; |
| 1653 | } |
| 1654 | } |
| 1655 | } |
| 1656 | } else if (adapter->MacFilter & MAC_DIRECTED) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1657 | /* Not broadcast or multicast. Must be directed at us or */ |
| 1658 | /* the card is in promiscuous mode. Either way, consider it */ |
| 1659 | /* ours if MAC_DIRECTED is set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1660 | adapter->Stats.DumbRcvUcastPkts++; |
| 1661 | adapter->Stats.DumbRcvUcastBytes += length; |
| 1662 | adapter->Stats.DumbRcvPkts++; |
| 1663 | adapter->Stats.DumbRcvBytes += length; |
| 1664 | return (TRUE); |
| 1665 | } |
| 1666 | if (adapter->MacFilter & MAC_PROMISC) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1667 | /* Whatever it is, keep it. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1668 | adapter->Stats.DumbRcvPkts++; |
| 1669 | adapter->Stats.DumbRcvBytes += length; |
| 1670 | return (TRUE); |
| 1671 | } |
| 1672 | adapter->Stats.RcvDiscards++; |
| 1673 | return (FALSE); |
| 1674 | } |
| 1675 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1676 | static int sxg_register_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1677 | { |
| 1678 | if (!adapter->intrregistered) { |
| 1679 | int retval; |
| 1680 | |
| 1681 | DBG_ERROR |
| 1682 | ("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x] %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1683 | __func__, adapter, adapter->netdev->irq, NR_IRQS); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1684 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1685 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 1686 | sxg_global.flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1687 | |
| 1688 | retval = request_irq(adapter->netdev->irq, |
| 1689 | &sxg_isr, |
| 1690 | IRQF_SHARED, |
| 1691 | adapter->netdev->name, adapter->netdev); |
| 1692 | |
| 1693 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 1694 | |
| 1695 | if (retval) { |
| 1696 | DBG_ERROR("sxg: request_irq (%s) FAILED [%x]\n", |
| 1697 | adapter->netdev->name, retval); |
| 1698 | return (retval); |
| 1699 | } |
| 1700 | adapter->intrregistered = 1; |
| 1701 | adapter->IntRegistered = TRUE; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1702 | /* Disable RSS with line-based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1703 | adapter->MsiEnabled = FALSE; |
| 1704 | adapter->RssEnabled = FALSE; |
| 1705 | DBG_ERROR("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1706 | __func__, adapter, adapter->netdev->irq); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1707 | } |
| 1708 | return (STATUS_SUCCESS); |
| 1709 | } |
| 1710 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1711 | static void sxg_deregister_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1712 | { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1713 | DBG_ERROR("sxg: %s ENTER adapter[%p]\n", __func__, adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1714 | #if XXXTODO |
| 1715 | slic_init_cleanup(adapter); |
| 1716 | #endif |
| 1717 | memset(&adapter->stats, 0, sizeof(struct net_device_stats)); |
| 1718 | adapter->error_interrupts = 0; |
| 1719 | adapter->rcv_interrupts = 0; |
| 1720 | adapter->xmit_interrupts = 0; |
| 1721 | adapter->linkevent_interrupts = 0; |
| 1722 | adapter->upr_interrupts = 0; |
| 1723 | adapter->num_isrs = 0; |
| 1724 | adapter->xmit_completes = 0; |
| 1725 | adapter->rcv_broadcasts = 0; |
| 1726 | adapter->rcv_multicasts = 0; |
| 1727 | adapter->rcv_unicasts = 0; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1728 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1729 | } |
| 1730 | |
| 1731 | /* |
| 1732 | * sxg_if_init |
| 1733 | * |
| 1734 | * Perform initialization of our slic interface. |
| 1735 | * |
| 1736 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1737 | static int sxg_if_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1738 | { |
| 1739 | p_net_device dev = adapter->netdev; |
| 1740 | int status = 0; |
| 1741 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1742 | DBG_ERROR("sxg: %s (%s) ENTER states[%d:%d] flags[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1743 | __func__, adapter->netdev->name, |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1744 | adapter->state, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1745 | adapter->linkstate, dev->flags); |
| 1746 | |
| 1747 | /* adapter should be down at this point */ |
| 1748 | if (adapter->state != ADAPT_DOWN) { |
| 1749 | DBG_ERROR("sxg_if_init adapter->state != ADAPT_DOWN\n"); |
| 1750 | return (-EIO); |
| 1751 | } |
| 1752 | ASSERT(adapter->linkstate == LINK_DOWN); |
| 1753 | |
| 1754 | adapter->devflags_prev = dev->flags; |
| 1755 | adapter->macopts = MAC_DIRECTED; |
| 1756 | if (dev->flags) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1757 | DBG_ERROR("sxg: %s (%s) Set MAC options: ", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1758 | adapter->netdev->name); |
| 1759 | if (dev->flags & IFF_BROADCAST) { |
| 1760 | adapter->macopts |= MAC_BCAST; |
| 1761 | DBG_ERROR("BCAST "); |
| 1762 | } |
| 1763 | if (dev->flags & IFF_PROMISC) { |
| 1764 | adapter->macopts |= MAC_PROMISC; |
| 1765 | DBG_ERROR("PROMISC "); |
| 1766 | } |
| 1767 | if (dev->flags & IFF_ALLMULTI) { |
| 1768 | adapter->macopts |= MAC_ALLMCAST; |
| 1769 | DBG_ERROR("ALL_MCAST "); |
| 1770 | } |
| 1771 | if (dev->flags & IFF_MULTICAST) { |
| 1772 | adapter->macopts |= MAC_MCAST; |
| 1773 | DBG_ERROR("MCAST "); |
| 1774 | } |
| 1775 | DBG_ERROR("\n"); |
| 1776 | } |
| 1777 | status = sxg_register_interrupt(adapter); |
| 1778 | if (status != STATUS_SUCCESS) { |
| 1779 | DBG_ERROR("sxg_if_init: sxg_register_interrupt FAILED %x\n", |
| 1780 | status); |
| 1781 | sxg_deregister_interrupt(adapter); |
| 1782 | return (status); |
| 1783 | } |
| 1784 | |
| 1785 | adapter->state = ADAPT_UP; |
| 1786 | |
| 1787 | /* |
| 1788 | * clear any pending events, then enable interrupts |
| 1789 | */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1790 | DBG_ERROR("sxg: %s ENABLE interrupts(slic)\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1791 | |
| 1792 | return (STATUS_SUCCESS); |
| 1793 | } |
| 1794 | |
| 1795 | static int sxg_entry_open(p_net_device dev) |
| 1796 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1797 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1798 | int status; |
| 1799 | |
| 1800 | ASSERT(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1801 | DBG_ERROR("sxg: %s adapter->activated[%d]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1802 | adapter->activated); |
| 1803 | DBG_ERROR |
| 1804 | ("sxg: %s (%s): [jiffies[%lx] cpu %d] dev[%p] adapt[%p] port[%d]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1805 | __func__, adapter->netdev->name, jiffies, smp_processor_id(), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1806 | adapter->netdev, adapter, adapter->port); |
| 1807 | |
| 1808 | netif_stop_queue(adapter->netdev); |
| 1809 | |
| 1810 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 1811 | if (!adapter->activated) { |
| 1812 | sxg_global.num_sxg_ports_active++; |
| 1813 | adapter->activated = 1; |
| 1814 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1815 | /* Initialize the adapter */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1816 | DBG_ERROR("sxg: %s ENTER sxg_initialize_adapter\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1817 | status = sxg_initialize_adapter(adapter); |
| 1818 | DBG_ERROR("sxg: %s EXIT sxg_initialize_adapter status[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1819 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1820 | |
| 1821 | if (status == STATUS_SUCCESS) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1822 | DBG_ERROR("sxg: %s ENTER sxg_if_init\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1823 | status = sxg_if_init(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1824 | DBG_ERROR("sxg: %s EXIT sxg_if_init status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1825 | status); |
| 1826 | } |
| 1827 | |
| 1828 | if (status != STATUS_SUCCESS) { |
| 1829 | if (adapter->activated) { |
| 1830 | sxg_global.num_sxg_ports_active--; |
| 1831 | adapter->activated = 0; |
| 1832 | } |
| 1833 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 1834 | sxg_global.flags); |
| 1835 | return (status); |
| 1836 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1837 | DBG_ERROR("sxg: %s ENABLE ALL INTERRUPTS\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1838 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1839 | /* Enable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1840 | SXG_ENABLE_ALL_INTERRUPTS(adapter); |
| 1841 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1842 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1843 | |
| 1844 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
| 1845 | return STATUS_SUCCESS; |
| 1846 | } |
| 1847 | |
| 1848 | static void __devexit sxg_entry_remove(struct pci_dev *pcidev) |
| 1849 | { |
| 1850 | p_net_device dev = pci_get_drvdata(pcidev); |
| 1851 | u32 mmio_start = 0; |
| 1852 | unsigned int mmio_len = 0; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1853 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1854 | |
| 1855 | ASSERT(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1856 | DBG_ERROR("sxg: %s ENTER dev[%p] adapter[%p]\n", __func__, dev, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1857 | adapter); |
| 1858 | sxg_deregister_interrupt(adapter); |
| 1859 | sxg_unmap_mmio_space(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1860 | DBG_ERROR("sxg: %s unregister_netdev\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1861 | unregister_netdev(dev); |
| 1862 | |
| 1863 | mmio_start = pci_resource_start(pcidev, 0); |
| 1864 | mmio_len = pci_resource_len(pcidev, 0); |
| 1865 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1866 | DBG_ERROR("sxg: %s rel_region(0) start[%x] len[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1867 | mmio_start, mmio_len); |
| 1868 | release_mem_region(mmio_start, mmio_len); |
| 1869 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1870 | DBG_ERROR("sxg: %s iounmap dev->base_addr[%x]\n", __func__, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1871 | (unsigned int)dev->base_addr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1872 | iounmap((char *)dev->base_addr); |
| 1873 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1874 | DBG_ERROR("sxg: %s deallocate device\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1875 | kfree(dev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1876 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1877 | } |
| 1878 | |
| 1879 | static int sxg_entry_halt(p_net_device dev) |
| 1880 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1881 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1882 | |
| 1883 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1884 | DBG_ERROR("sxg: %s (%s) ENTER\n", __func__, dev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1885 | |
| 1886 | netif_stop_queue(adapter->netdev); |
| 1887 | adapter->state = ADAPT_DOWN; |
| 1888 | adapter->linkstate = LINK_DOWN; |
| 1889 | adapter->devflags_prev = 0; |
| 1890 | DBG_ERROR("sxg: %s (%s) set adapter[%p] state to ADAPT_DOWN(%d)\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1891 | __func__, dev->name, adapter, adapter->state); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1892 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1893 | DBG_ERROR("sxg: %s (%s) EXIT\n", __func__, dev->name); |
| 1894 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1895 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
| 1896 | return (STATUS_SUCCESS); |
| 1897 | } |
| 1898 | |
| 1899 | static int sxg_ioctl(p_net_device dev, struct ifreq *rq, int cmd) |
| 1900 | { |
| 1901 | ASSERT(rq); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1902 | /* DBG_ERROR("sxg: %s cmd[%x] rq[%p] dev[%p]\n", __func__, cmd, rq, dev); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1903 | switch (cmd) { |
| 1904 | case SIOCSLICSETINTAGG: |
| 1905 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1906 | /* struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1907 | u32 data[7]; |
| 1908 | u32 intagg; |
| 1909 | |
| 1910 | if (copy_from_user(data, rq->ifr_data, 28)) { |
| 1911 | DBG_ERROR |
| 1912 | ("copy_from_user FAILED getting initial params\n"); |
| 1913 | return -EFAULT; |
| 1914 | } |
| 1915 | intagg = data[0]; |
| 1916 | printk(KERN_EMERG |
| 1917 | "%s: set interrupt aggregation to %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1918 | __func__, intagg); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1919 | return 0; |
| 1920 | } |
| 1921 | |
| 1922 | default: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1923 | /* DBG_ERROR("sxg: %s UNSUPPORTED[%x]\n", __func__, cmd); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1924 | return -EOPNOTSUPP; |
| 1925 | } |
| 1926 | return 0; |
| 1927 | } |
| 1928 | |
| 1929 | #define NORMAL_ETHFRAME 0 |
| 1930 | |
| 1931 | /* |
| 1932 | * |
| 1933 | * sxg_send_packets - Send a skb packet |
| 1934 | * |
| 1935 | * Arguments: |
| 1936 | * skb - The packet to send |
| 1937 | * dev - Our linux net device that refs our adapter |
| 1938 | * |
| 1939 | * Return: |
| 1940 | * 0 regardless of outcome XXXTODO refer to e1000 driver |
| 1941 | */ |
| 1942 | static int sxg_send_packets(struct sk_buff *skb, p_net_device dev) |
| 1943 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1944 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1945 | u32 status = STATUS_SUCCESS; |
| 1946 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 1947 | //DBG_ERROR("sxg: %s ENTER sxg_send_packets skb[%p]\n", __FUNCTION__, |
| 1948 | // skb); |
| 1949 | printk("ASK:sxg_send_packets: skb[%p]\n", skb); |
| 1950 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1951 | /* Check the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1952 | switch (adapter->State) { |
| 1953 | case SXG_STATE_INITIALIZING: |
| 1954 | case SXG_STATE_HALTED: |
| 1955 | case SXG_STATE_SHUTDOWN: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1956 | ASSERT(0); /* unexpected */ |
| 1957 | /* fall through */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1958 | case SXG_STATE_RESETTING: |
| 1959 | case SXG_STATE_SLEEP: |
| 1960 | case SXG_STATE_BOOTDIAG: |
| 1961 | case SXG_STATE_DIAG: |
| 1962 | case SXG_STATE_HALTING: |
| 1963 | status = STATUS_FAILURE; |
| 1964 | break; |
| 1965 | case SXG_STATE_RUNNING: |
| 1966 | if (adapter->LinkState != SXG_LINK_UP) { |
| 1967 | status = STATUS_FAILURE; |
| 1968 | } |
| 1969 | break; |
| 1970 | default: |
| 1971 | ASSERT(0); |
| 1972 | status = STATUS_FAILURE; |
| 1973 | } |
| 1974 | if (status != STATUS_SUCCESS) { |
| 1975 | goto xmit_fail; |
| 1976 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1977 | /* send a packet */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1978 | status = sxg_transmit_packet(adapter, skb); |
| 1979 | if (status == STATUS_SUCCESS) { |
| 1980 | goto xmit_done; |
| 1981 | } |
| 1982 | |
| 1983 | xmit_fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1984 | /* reject & complete all the packets if they cant be sent */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1985 | if (status != STATUS_SUCCESS) { |
| 1986 | #if XXXTODO |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1987 | /* sxg_send_packets_fail(adapter, skb, status); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1988 | #else |
| 1989 | SXG_DROP_DUMB_SEND(adapter, skb); |
| 1990 | adapter->stats.tx_dropped++; |
| 1991 | #endif |
| 1992 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1993 | DBG_ERROR("sxg: %s EXIT sxg_send_packets status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1994 | status); |
| 1995 | |
| 1996 | xmit_done: |
| 1997 | return 0; |
| 1998 | } |
| 1999 | |
| 2000 | /* |
| 2001 | * sxg_transmit_packet |
| 2002 | * |
| 2003 | * This function transmits a single packet. |
| 2004 | * |
| 2005 | * Arguments - |
| 2006 | * adapter - Pointer to our adapter structure |
| 2007 | * skb - The packet to be sent |
| 2008 | * |
| 2009 | * Return - |
| 2010 | * STATUS of send |
| 2011 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2012 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2013 | { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2014 | struct SXG_X64_SGL *pSgl; |
| 2015 | struct SXG_SCATTER_GATHER *SxgSgl; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2016 | void *SglBuffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2017 | u32 SglBufferLength; |
| 2018 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2019 | /* The vast majority of work is done in the shared */ |
| 2020 | /* sxg_dumb_sgl routine. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2021 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSend", |
| 2022 | adapter, skb, 0, 0); |
| 2023 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2024 | /* Allocate a SGL buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2025 | SXG_GET_SGL_BUFFER(adapter, SxgSgl); |
| 2026 | if (!SxgSgl) { |
| 2027 | adapter->Stats.NoSglBuf++; |
| 2028 | adapter->Stats.XmtErrors++; |
| 2029 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "SndPktF1", |
| 2030 | adapter, skb, 0, 0); |
| 2031 | return (STATUS_RESOURCES); |
| 2032 | } |
| 2033 | ASSERT(SxgSgl->adapter == adapter); |
| 2034 | SglBuffer = SXG_SGL_BUFFER(SxgSgl); |
| 2035 | SglBufferLength = SXG_SGL_BUF_SIZE; |
| 2036 | SxgSgl->VlanTag.VlanTci = 0; |
| 2037 | SxgSgl->VlanTag.VlanTpid = 0; |
| 2038 | SxgSgl->Type = SXG_SGL_DUMB; |
| 2039 | SxgSgl->DumbPacket = skb; |
| 2040 | pSgl = NULL; |
| 2041 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2042 | /* Call the common sxg_dumb_sgl routine to complete the send. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2043 | sxg_dumb_sgl(pSgl, SxgSgl); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2044 | /* Return success sxg_dumb_sgl (or something later) will complete it. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2045 | return (STATUS_SUCCESS); |
| 2046 | } |
| 2047 | |
| 2048 | /* |
| 2049 | * sxg_dumb_sgl |
| 2050 | * |
| 2051 | * Arguments: |
| 2052 | * pSgl - |
| 2053 | * SxgSgl - SXG_SCATTER_GATHER |
| 2054 | * |
| 2055 | * Return Value: |
| 2056 | * None. |
| 2057 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2058 | static void sxg_dumb_sgl(struct SXG_X64_SGL *pSgl, struct SXG_SCATTER_GATHER *SxgSgl) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2059 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2060 | struct adapter_t *adapter = SxgSgl->adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2061 | struct sk_buff *skb = SxgSgl->DumbPacket; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2062 | /* For now, all dumb-nic sends go on RSS queue zero */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2063 | struct SXG_XMT_RING *XmtRing = &adapter->XmtRings[0]; |
| 2064 | struct SXG_RING_INFO *XmtRingInfo = &adapter->XmtRingZeroInfo; |
| 2065 | struct SXG_CMD *XmtCmd = NULL; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2066 | /* u32 Index = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2067 | u32 DataLength = skb->len; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2068 | /* unsigned int BufLen; */ |
| 2069 | /* u32 SglOffset; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2070 | u64 phys_addr; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2071 | unsigned char*data; |
| 2072 | int i; |
| 2073 | char dstr[128]; |
| 2074 | char *dptr = dstr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2075 | |
| 2076 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSgl", |
| 2077 | pSgl, SxgSgl, 0, 0); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2078 | data = skb->data; |
| 2079 | for (i = 0; i < 32; i++) |
| 2080 | dptr += sprintf(dptr, "%02x ", (unsigned)data[i]); |
| 2081 | printk("ASK:sxg_dumb_sgl: data %s\n", dstr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2082 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2083 | /* Set aside a pointer to the sgl */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2084 | SxgSgl->pSgl = pSgl; |
| 2085 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2086 | /* Sanity check that our SGL format is as we expect. */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2087 | ASSERT(sizeof(struct SXG_X64_SGE) == sizeof(struct SXG_X64_SGE)); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2088 | /* Shouldn't be a vlan tag on this frame */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2089 | ASSERT(SxgSgl->VlanTag.VlanTci == 0); |
| 2090 | ASSERT(SxgSgl->VlanTag.VlanTpid == 0); |
| 2091 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2092 | /* From here below we work with the SGL placed in our */ |
| 2093 | /* buffer. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2094 | |
| 2095 | SxgSgl->Sgl.NumberOfElements = 1; |
| 2096 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2097 | /* Grab the spinlock and acquire a command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2098 | spin_lock(&adapter->XmtZeroLock); |
| 2099 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2100 | if (XmtCmd == NULL) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2101 | /* Call sxg_complete_slow_send to see if we can */ |
| 2102 | /* free up any XmtRingZero entries and then try again */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2103 | spin_unlock(&adapter->XmtZeroLock); |
| 2104 | sxg_complete_slow_send(adapter); |
| 2105 | spin_lock(&adapter->XmtZeroLock); |
| 2106 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2107 | if (XmtCmd == NULL) { |
| 2108 | adapter->Stats.XmtZeroFull++; |
| 2109 | goto abortcmd; |
| 2110 | } |
| 2111 | } |
| 2112 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbCmd", |
| 2113 | XmtCmd, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2114 | /* Update stats */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2115 | adapter->Stats.DumbXmtPkts++; |
| 2116 | adapter->Stats.DumbXmtBytes += DataLength; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2117 | #if XXXTODO /* Stats stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2118 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 2119 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
| 2120 | adapter->Stats.DumbXmtBcastPkts++; |
| 2121 | adapter->Stats.DumbXmtBcastBytes += DataLength; |
| 2122 | } else { |
| 2123 | adapter->Stats.DumbXmtMcastPkts++; |
| 2124 | adapter->Stats.DumbXmtMcastBytes += DataLength; |
| 2125 | } |
| 2126 | } else { |
| 2127 | adapter->Stats.DumbXmtUcastPkts++; |
| 2128 | adapter->Stats.DumbXmtUcastBytes += DataLength; |
| 2129 | } |
| 2130 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2131 | /* Fill in the command */ |
| 2132 | /* Copy out the first SGE to the command and adjust for offset */ |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2133 | phys_addr = |
| 2134 | pci_map_single(adapter->pcidev, skb->data, skb->len, |
| 2135 | PCI_DMA_TODEVICE); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2136 | memset(XmtCmd, '\0', sizeof(*XmtCmd)); |
| 2137 | XmtCmd->Buffer.FirstSgeAddress = phys_addr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2138 | XmtCmd->Buffer.FirstSgeLength = DataLength; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2139 | XmtCmd->Buffer.SgeOffset = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2140 | XmtCmd->Buffer.TotalLength = DataLength; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2141 | XmtCmd->SgEntries = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2142 | XmtCmd->Flags = 0; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2143 | printk("ASK:sxg_dumb_sgl: wrote to xmit register\n"); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2144 | /* */ |
| 2145 | /* Advance transmit cmd descripter by 1. */ |
| 2146 | /* NOTE - See comments in SxgTcpOutput where we write */ |
| 2147 | /* to the XmtCmd register regarding CPU ID values and/or */ |
| 2148 | /* multiple commands. */ |
| 2149 | /* */ |
| 2150 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2151 | WRITE_REG(adapter->UcodeRegs[0].XmtCmd, 1, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2152 | /* */ |
| 2153 | /* */ |
| 2154 | adapter->Stats.XmtQLen++; /* Stats within lock */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2155 | spin_unlock(&adapter->XmtZeroLock); |
| 2156 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDumSgl2", |
| 2157 | XmtCmd, pSgl, SxgSgl, 0); |
| 2158 | return; |
| 2159 | |
| 2160 | abortcmd: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2161 | /* NOTE - Only jump to this label AFTER grabbing the */ |
| 2162 | /* XmtZeroLock, and DO NOT DROP IT between the */ |
| 2163 | /* command allocation and the following abort. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2164 | if (XmtCmd) { |
| 2165 | SXG_ABORT_CMD(XmtRingInfo); |
| 2166 | } |
| 2167 | spin_unlock(&adapter->XmtZeroLock); |
| 2168 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2169 | /* failsgl: */ |
| 2170 | /* Jump to this label if failure occurs before the */ |
| 2171 | /* XmtZeroLock is grabbed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2172 | adapter->Stats.XmtErrors++; |
| 2173 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumSGFal", |
| 2174 | pSgl, SxgSgl, XmtRingInfo->Head, XmtRingInfo->Tail); |
| 2175 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2176 | SXG_COMPLETE_DUMB_SEND(adapter, SxgSgl->DumbPacket); /* SxgSgl->DumbPacket is the skb */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2177 | } |
| 2178 | |
| 2179 | /*************************************************************** |
| 2180 | * Link management functions |
| 2181 | ***************************************************************/ |
| 2182 | |
| 2183 | /* |
| 2184 | * sxg_initialize_link - Initialize the link stuff |
| 2185 | * |
| 2186 | * Arguments - |
| 2187 | * adapter - A pointer to our adapter structure |
| 2188 | * |
| 2189 | * Return |
| 2190 | * status |
| 2191 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2192 | static int sxg_initialize_link(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2193 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2194 | struct SXG_HW_REGS *HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2195 | u32 Value; |
| 2196 | u32 ConfigData; |
| 2197 | u32 MaxFrame; |
| 2198 | int status; |
| 2199 | |
| 2200 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitLink", |
| 2201 | adapter, 0, 0, 0); |
| 2202 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2203 | /* Reset PHY and XGXS module */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2204 | WRITE_REG(HwRegs->LinkStatus, LS_SERDES_POWER_DOWN, TRUE); |
| 2205 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2206 | /* Reset transmit configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2207 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_RESET, TRUE); |
| 2208 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2209 | /* Reset receive configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2210 | WRITE_REG(HwRegs->RcvConfig, RCV_CONFIG_RESET, TRUE); |
| 2211 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2212 | /* Reset all MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2213 | WRITE_REG(HwRegs->MacConfig0, AXGMAC_CFG0_SUB_RESET, TRUE); |
| 2214 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2215 | /* Link address 0 */ |
| 2216 | /* XXXTODO - This assumes the MAC address (0a:0b:0c:0d:0e:0f) */ |
| 2217 | /* is stored with the first nibble (0a) in the byte 0 */ |
| 2218 | /* of the Mac address. Possibly reverse? */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2219 | Value = *(u32 *) adapter->macaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2220 | WRITE_REG(HwRegs->LinkAddress0Low, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2221 | /* also write the MAC address to the MAC. Endian is reversed. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2222 | WRITE_REG(HwRegs->MacAddressLow, ntohl(Value), TRUE); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2223 | Value = (*(u16 *) & adapter->macaddr[4] & 0x0000FFFF); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2224 | WRITE_REG(HwRegs->LinkAddress0High, Value | LINK_ADDRESS_ENABLE, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2225 | /* endian swap for the MAC (put high bytes in bits [31:16], swapped) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2226 | Value = ntohl(Value); |
| 2227 | WRITE_REG(HwRegs->MacAddressHigh, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2228 | /* Link address 1 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2229 | WRITE_REG(HwRegs->LinkAddress1Low, 0, TRUE); |
| 2230 | WRITE_REG(HwRegs->LinkAddress1High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2231 | /* Link address 2 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2232 | WRITE_REG(HwRegs->LinkAddress2Low, 0, TRUE); |
| 2233 | WRITE_REG(HwRegs->LinkAddress2High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2234 | /* Link address 3 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2235 | WRITE_REG(HwRegs->LinkAddress3Low, 0, TRUE); |
| 2236 | WRITE_REG(HwRegs->LinkAddress3High, 0, TRUE); |
| 2237 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2238 | /* Enable MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2239 | WRITE_REG(HwRegs->MacConfig0, 0, TRUE); |
| 2240 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2241 | /* Configure MAC */ |
| 2242 | WRITE_REG(HwRegs->MacConfig1, (AXGMAC_CFG1_XMT_PAUSE | /* Allow sending of pause */ |
| 2243 | AXGMAC_CFG1_XMT_EN | /* Enable XMT */ |
| 2244 | AXGMAC_CFG1_RCV_PAUSE | /* Enable detection of pause */ |
| 2245 | AXGMAC_CFG1_RCV_EN | /* Enable receive */ |
| 2246 | AXGMAC_CFG1_SHORT_ASSERT | /* short frame detection */ |
| 2247 | AXGMAC_CFG1_CHECK_LEN | /* Verify frame length */ |
| 2248 | AXGMAC_CFG1_GEN_FCS | /* Generate FCS */ |
| 2249 | AXGMAC_CFG1_PAD_64), /* Pad frames to 64 bytes */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2250 | TRUE); |
| 2251 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2252 | /* Set AXGMAC max frame length if jumbo. Not needed for standard MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2253 | if (adapter->JumboEnabled) { |
| 2254 | WRITE_REG(HwRegs->MacMaxFrameLen, AXGMAC_MAXFRAME_JUMBO, TRUE); |
| 2255 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2256 | /* AMIIM Configuration Register - */ |
| 2257 | /* The value placed in the AXGMAC_AMIIM_CFG_HALF_CLOCK portion */ |
| 2258 | /* (bottom bits) of this register is used to determine the */ |
| 2259 | /* MDC frequency as specified in the A-XGMAC Design Document. */ |
| 2260 | /* This value must not be zero. The following value (62 or 0x3E) */ |
| 2261 | /* is based on our MAC transmit clock frequency (MTCLK) of 312.5 MHz. */ |
| 2262 | /* Given a maximum MDIO clock frequency of 2.5 MHz (see the PHY spec), */ |
| 2263 | /* we get: 312.5/(2*(X+1)) < 2.5 ==> X = 62. */ |
| 2264 | /* This value happens to be the default value for this register, */ |
| 2265 | /* so we really don't have to do this. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2266 | WRITE_REG(HwRegs->MacAmiimConfig, 0x0000003E, TRUE); |
| 2267 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2268 | /* Power up and enable PHY and XAUI/XGXS/Serdes logic */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2269 | WRITE_REG(HwRegs->LinkStatus, |
| 2270 | (LS_PHY_CLR_RESET | |
| 2271 | LS_XGXS_ENABLE | |
| 2272 | LS_XGXS_CTL | LS_PHY_CLK_EN | LS_ATTN_ALARM), TRUE); |
| 2273 | DBG_ERROR("After Power Up and enable PHY in sxg_initialize_link\n"); |
| 2274 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2275 | /* Per information given by Aeluros, wait 100 ms after removing reset. */ |
| 2276 | /* It's not enough to wait for the self-clearing reset bit in reg 0 to clear. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2277 | mdelay(100); |
| 2278 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2279 | /* Verify the PHY has come up by checking that the Reset bit has cleared. */ |
| 2280 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2281 | PHY_PMA_CONTROL1, /* PMA/PMD control register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2282 | &Value); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2283 | DBG_ERROR("After sxg_read_mdio_reg Value[%x] fail=%x\n", Value, (Value & PMA_CONTROL1_RESET)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2284 | if (status != STATUS_SUCCESS) |
| 2285 | return (STATUS_FAILURE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2286 | if (Value & PMA_CONTROL1_RESET) /* reset complete if bit is 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2287 | return (STATUS_FAILURE); |
| 2288 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2289 | /* The SERDES should be initialized by now - confirm */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2290 | READ_REG(HwRegs->LinkStatus, Value); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2291 | if (Value & LS_SERDES_DOWN) /* verify SERDES is initialized */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2292 | return (STATUS_FAILURE); |
| 2293 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2294 | /* The XAUI link should also be up - confirm */ |
| 2295 | if (!(Value & LS_XAUI_LINK_UP)) /* verify XAUI link is up */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2296 | return (STATUS_FAILURE); |
| 2297 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2298 | /* Initialize the PHY */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2299 | status = sxg_phy_init(adapter); |
| 2300 | if (status != STATUS_SUCCESS) |
| 2301 | return (STATUS_FAILURE); |
| 2302 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2303 | /* Enable the Link Alarm */ |
| 2304 | status = sxg_write_mdio_reg(adapter, MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2305 | LASI_CONTROL, /* LASI control register */ |
| 2306 | LASI_CTL_LS_ALARM_ENABLE); /* enable link alarm bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2307 | if (status != STATUS_SUCCESS) |
| 2308 | return (STATUS_FAILURE); |
| 2309 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2310 | /* XXXTODO - temporary - verify bit is set */ |
| 2311 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2312 | LASI_CONTROL, /* LASI control register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2313 | &Value); |
| 2314 | if (status != STATUS_SUCCESS) |
| 2315 | return (STATUS_FAILURE); |
| 2316 | if (!(Value & LASI_CTL_LS_ALARM_ENABLE)) { |
| 2317 | DBG_ERROR("Error! LASI Control Alarm Enable bit not set!\n"); |
| 2318 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2319 | /* Enable receive */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2320 | MaxFrame = adapter->JumboEnabled ? JUMBOMAXFRAME : ETHERMAXFRAME; |
| 2321 | ConfigData = (RCV_CONFIG_ENABLE | |
| 2322 | RCV_CONFIG_ENPARSE | |
| 2323 | RCV_CONFIG_RCVBAD | |
| 2324 | RCV_CONFIG_RCVPAUSE | |
| 2325 | RCV_CONFIG_TZIPV6 | |
| 2326 | RCV_CONFIG_TZIPV4 | |
| 2327 | RCV_CONFIG_HASH_16 | |
| 2328 | RCV_CONFIG_SOCKET | RCV_CONFIG_BUFSIZE(MaxFrame)); |
| 2329 | WRITE_REG(HwRegs->RcvConfig, ConfigData, TRUE); |
| 2330 | |
| 2331 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_ENABLE, TRUE); |
| 2332 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2333 | /* Mark the link as down. We'll get a link event when it comes up. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2334 | sxg_link_state(adapter, SXG_LINK_DOWN); |
| 2335 | |
| 2336 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInitLnk", |
| 2337 | adapter, 0, 0, 0); |
| 2338 | return (STATUS_SUCCESS); |
| 2339 | } |
| 2340 | |
| 2341 | /* |
| 2342 | * sxg_phy_init - Initialize the PHY |
| 2343 | * |
| 2344 | * Arguments - |
| 2345 | * adapter - A pointer to our adapter structure |
| 2346 | * |
| 2347 | * Return |
| 2348 | * status |
| 2349 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2350 | static int sxg_phy_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2351 | { |
| 2352 | u32 Value; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2353 | struct PHY_UCODE *p; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2354 | int status; |
| 2355 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2356 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2357 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2358 | /* Read a register to identify the PHY type */ |
| 2359 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2360 | 0xC205, /* PHY ID register (?) */ |
| 2361 | &Value); /* XXXTODO - add def */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2362 | if (status != STATUS_SUCCESS) |
| 2363 | return (STATUS_FAILURE); |
| 2364 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2365 | if (Value == 0x0012) { /* 0x0012 == AEL2005C PHY(?) - XXXTODO - add def */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2366 | DBG_ERROR |
| 2367 | ("AEL2005C PHY detected. Downloading PHY microcode.\n"); |
| 2368 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2369 | /* Initialize AEL2005C PHY and download PHY microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2370 | for (p = PhyUcode; p->Addr != 0xFFFF; p++) { |
| 2371 | if (p->Addr == 0) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2372 | /* if address == 0, data == sleep time in ms */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2373 | mdelay(p->Data); |
| 2374 | } else { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2375 | /* write the given data to the specified address */ |
| 2376 | status = sxg_write_mdio_reg(adapter, MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2377 | p->Addr, /* PHY address */ |
| 2378 | p->Data); /* PHY data */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2379 | if (status != STATUS_SUCCESS) |
| 2380 | return (STATUS_FAILURE); |
| 2381 | } |
| 2382 | } |
| 2383 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2384 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2385 | |
| 2386 | return (STATUS_SUCCESS); |
| 2387 | } |
| 2388 | |
| 2389 | /* |
| 2390 | * sxg_link_event - Process a link event notification from the card |
| 2391 | * |
| 2392 | * Arguments - |
| 2393 | * adapter - A pointer to our adapter structure |
| 2394 | * |
| 2395 | * Return |
| 2396 | * None |
| 2397 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2398 | static void sxg_link_event(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2399 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2400 | struct SXG_HW_REGS *HwRegs = adapter->HwRegs; |
| 2401 | enum SXG_LINK_STATE LinkState; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2402 | int status; |
| 2403 | u32 Value; |
| 2404 | |
| 2405 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "LinkEvnt", |
| 2406 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2407 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2408 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2409 | /* Check the Link Status register. We should have a Link Alarm. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2410 | READ_REG(HwRegs->LinkStatus, Value); |
| 2411 | if (Value & LS_LINK_ALARM) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2412 | /* We got a Link Status alarm. First, pause to let the */ |
| 2413 | /* link state settle (it can bounce a number of times) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2414 | mdelay(10); |
| 2415 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2416 | /* Now clear the alarm by reading the LASI status register. */ |
| 2417 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2418 | LASI_STATUS, /* LASI status register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2419 | &Value); |
| 2420 | if (status != STATUS_SUCCESS) { |
| 2421 | DBG_ERROR("Error reading LASI Status MDIO register!\n"); |
| 2422 | sxg_link_state(adapter, SXG_LINK_DOWN); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2423 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2424 | } |
| 2425 | ASSERT(Value & LASI_STATUS_LS_ALARM); |
| 2426 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2427 | /* Now get and set the link state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2428 | LinkState = sxg_get_link_state(adapter); |
| 2429 | sxg_link_state(adapter, LinkState); |
| 2430 | DBG_ERROR("SXG: Link Alarm occurred. Link is %s\n", |
| 2431 | ((LinkState == SXG_LINK_UP) ? "UP" : "DOWN")); |
| 2432 | } else { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2433 | /* XXXTODO - Assuming Link Attention is only being generated for the */ |
| 2434 | /* Link Alarm pin (and not for a XAUI Link Status change), then it's */ |
| 2435 | /* impossible to get here. Yet we've gotten here twice (under extreme */ |
| 2436 | /* conditions - bouncing the link up and down many times a second). */ |
| 2437 | /* Needs further investigation. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2438 | DBG_ERROR("SXG: sxg_link_event: Can't get here!\n"); |
| 2439 | DBG_ERROR("SXG: Link Status == 0x%08X.\n", Value); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2440 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2441 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2442 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2443 | |
| 2444 | } |
| 2445 | |
| 2446 | /* |
| 2447 | * sxg_get_link_state - Determine if the link is up or down |
| 2448 | * |
| 2449 | * Arguments - |
| 2450 | * adapter - A pointer to our adapter structure |
| 2451 | * |
| 2452 | * Return |
| 2453 | * Link State |
| 2454 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2455 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2456 | { |
| 2457 | int status; |
| 2458 | u32 Value; |
| 2459 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2460 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2461 | |
| 2462 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "GetLink", |
| 2463 | adapter, 0, 0, 0); |
| 2464 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2465 | /* Per the Xenpak spec (and the IEEE 10Gb spec?), the link is up if */ |
| 2466 | /* the following 3 bits (from 3 different MDIO registers) are all true. */ |
| 2467 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2468 | PHY_PMA_RCV_DET, /* PMA/PMD Receive Signal Detect register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2469 | &Value); |
| 2470 | if (status != STATUS_SUCCESS) |
| 2471 | goto bad; |
| 2472 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2473 | /* If PMA/PMD receive signal detect is 0, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2474 | if (!(Value & PMA_RCV_DETECT)) |
| 2475 | return (SXG_LINK_DOWN); |
| 2476 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2477 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PCS, /* PHY PCS module */ |
| 2478 | PHY_PCS_10G_STATUS1, /* PCS 10GBASE-R Status 1 register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2479 | &Value); |
| 2480 | if (status != STATUS_SUCCESS) |
| 2481 | goto bad; |
| 2482 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2483 | /* If PCS is not locked to receive blocks, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2484 | if (!(Value & PCS_10B_BLOCK_LOCK)) |
| 2485 | return (SXG_LINK_DOWN); |
| 2486 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2487 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_XS, /* PHY XS module */ |
| 2488 | PHY_XS_LANE_STATUS, /* XS Lane Status register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2489 | &Value); |
| 2490 | if (status != STATUS_SUCCESS) |
| 2491 | goto bad; |
| 2492 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2493 | /* If XS transmit lanes are not aligned, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2494 | if (!(Value & XS_LANE_ALIGN)) |
| 2495 | return (SXG_LINK_DOWN); |
| 2496 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2497 | /* All 3 bits are true, so the link is up */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2498 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2499 | |
| 2500 | return (SXG_LINK_UP); |
| 2501 | |
| 2502 | bad: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2503 | /* An error occurred reading an MDIO register. This shouldn't happen. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2504 | DBG_ERROR("Error reading an MDIO register!\n"); |
| 2505 | ASSERT(0); |
| 2506 | return (SXG_LINK_DOWN); |
| 2507 | } |
| 2508 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2509 | static void sxg_indicate_link_state(struct adapter_t *adapter, |
| 2510 | enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2511 | { |
| 2512 | if (adapter->LinkState == SXG_LINK_UP) { |
| 2513 | DBG_ERROR("%s: LINK now UP, call netif_start_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2514 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2515 | netif_start_queue(adapter->netdev); |
| 2516 | } else { |
| 2517 | DBG_ERROR("%s: LINK now DOWN, call netif_stop_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2518 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2519 | netif_stop_queue(adapter->netdev); |
| 2520 | } |
| 2521 | } |
| 2522 | |
| 2523 | /* |
| 2524 | * sxg_link_state - Set the link state and if necessary, indicate. |
| 2525 | * This routine the central point of processing for all link state changes. |
| 2526 | * Nothing else in the driver should alter the link state or perform |
| 2527 | * link state indications |
| 2528 | * |
| 2529 | * Arguments - |
| 2530 | * adapter - A pointer to our adapter structure |
| 2531 | * LinkState - The link state |
| 2532 | * |
| 2533 | * Return |
| 2534 | * None |
| 2535 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2536 | static void sxg_link_state(struct adapter_t *adapter, enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2537 | { |
| 2538 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "LnkINDCT", |
| 2539 | adapter, LinkState, adapter->LinkState, adapter->State); |
| 2540 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2541 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2542 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2543 | /* Hold the adapter lock during this routine. Maybe move */ |
| 2544 | /* the lock to the caller. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2545 | spin_lock(&adapter->AdapterLock); |
| 2546 | if (LinkState == adapter->LinkState) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2547 | /* Nothing changed.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2548 | spin_unlock(&adapter->AdapterLock); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2549 | DBG_ERROR("EXIT #0 %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2550 | return; |
| 2551 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2552 | /* Save the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2553 | adapter->LinkState = LinkState; |
| 2554 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2555 | /* Drop the lock and indicate link state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2556 | spin_unlock(&adapter->AdapterLock); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2557 | DBG_ERROR("EXIT #1 %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2558 | |
| 2559 | sxg_indicate_link_state(adapter, LinkState); |
| 2560 | } |
| 2561 | |
| 2562 | /* |
| 2563 | * sxg_write_mdio_reg - Write to a register on the MDIO bus |
| 2564 | * |
| 2565 | * Arguments - |
| 2566 | * adapter - A pointer to our adapter structure |
| 2567 | * DevAddr - MDIO device number being addressed |
| 2568 | * RegAddr - register address for the specified MDIO device |
| 2569 | * Value - value to write to the MDIO register |
| 2570 | * |
| 2571 | * Return |
| 2572 | * status |
| 2573 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2574 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2575 | u32 DevAddr, u32 RegAddr, u32 Value) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2576 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2577 | struct SXG_HW_REGS *HwRegs = adapter->HwRegs; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2578 | u32 AddrOp; /* Address operation (written to MIIM field reg) */ |
| 2579 | u32 WriteOp; /* Write operation (written to MIIM field reg) */ |
| 2580 | u32 Cmd; /* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2581 | u32 ValueRead; |
| 2582 | u32 Timeout; |
| 2583 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2584 | /* DBG_ERROR("ENTER %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2585 | |
| 2586 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 2587 | adapter, 0, 0, 0); |
| 2588 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2589 | /* Ensure values don't exceed field width */ |
| 2590 | DevAddr &= 0x001F; /* 5-bit field */ |
| 2591 | RegAddr &= 0xFFFF; /* 16-bit field */ |
| 2592 | Value &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2593 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2594 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2595 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 2596 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 2597 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 2598 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 2599 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2600 | /* Set MIIM field register bits for an MIIM write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2601 | WriteOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 2602 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 2603 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 2604 | (MIIM_OP_WRITE << AXGMAC_AMIIM_FIELD_OP_SHIFT) | Value; |
| 2605 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2606 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2607 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 2608 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2609 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2610 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 2611 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2612 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2613 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 2614 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2615 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2616 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 2617 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2618 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2619 | Timeout = SXG_LINK_TIMEOUT; |
| 2620 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2621 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2622 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 2623 | if (--Timeout == 0) { |
| 2624 | return (STATUS_FAILURE); |
| 2625 | } |
| 2626 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 2627 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2628 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2629 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 2630 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2631 | /* MIIM write to set up an MDIO write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2632 | WRITE_REG(HwRegs->MacAmiimField, WriteOp, TRUE); |
| 2633 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2634 | /* Write to MIIM Command Register to execute the write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2635 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 2636 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2637 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2638 | Timeout = SXG_LINK_TIMEOUT; |
| 2639 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2640 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2641 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 2642 | if (--Timeout == 0) { |
| 2643 | return (STATUS_FAILURE); |
| 2644 | } |
| 2645 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 2646 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2647 | /* DBG_ERROR("EXIT %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2648 | |
| 2649 | return (STATUS_SUCCESS); |
| 2650 | } |
| 2651 | |
| 2652 | /* |
| 2653 | * sxg_read_mdio_reg - Read a register on the MDIO bus |
| 2654 | * |
| 2655 | * Arguments - |
| 2656 | * adapter - A pointer to our adapter structure |
| 2657 | * DevAddr - MDIO device number being addressed |
| 2658 | * RegAddr - register address for the specified MDIO device |
| 2659 | * pValue - pointer to where to put data read from the MDIO register |
| 2660 | * |
| 2661 | * Return |
| 2662 | * status |
| 2663 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2664 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2665 | u32 DevAddr, u32 RegAddr, u32 *pValue) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2666 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2667 | struct SXG_HW_REGS *HwRegs = adapter->HwRegs; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2668 | u32 AddrOp; /* Address operation (written to MIIM field reg) */ |
| 2669 | u32 ReadOp; /* Read operation (written to MIIM field reg) */ |
| 2670 | u32 Cmd; /* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2671 | u32 ValueRead; |
| 2672 | u32 Timeout; |
| 2673 | |
| 2674 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 2675 | adapter, 0, 0, 0); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2676 | DBG_ERROR("ENTER %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2677 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2678 | /* Ensure values don't exceed field width */ |
| 2679 | DevAddr &= 0x001F; /* 5-bit field */ |
| 2680 | RegAddr &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2681 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2682 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2683 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 2684 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 2685 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 2686 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 2687 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2688 | /* Set MIIM field register bits for an MIIM read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2689 | ReadOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 2690 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 2691 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 2692 | (MIIM_OP_READ << AXGMAC_AMIIM_FIELD_OP_SHIFT); |
| 2693 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2694 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2695 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 2696 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2697 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2698 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 2699 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2700 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2701 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 2702 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2703 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2704 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 2705 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2706 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2707 | Timeout = SXG_LINK_TIMEOUT; |
| 2708 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2709 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2710 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 2711 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2712 | DBG_ERROR("EXIT %s with STATUS_FAILURE 1\n", __FUNCTION__); |
| 2713 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2714 | return (STATUS_FAILURE); |
| 2715 | } |
| 2716 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 2717 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2718 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2719 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 2720 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2721 | /* MIIM write to set up an MDIO register read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2722 | WRITE_REG(HwRegs->MacAmiimField, ReadOp, TRUE); |
| 2723 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2724 | /* Write to MIIM Command Register to execute the read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2725 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 2726 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2727 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2728 | Timeout = SXG_LINK_TIMEOUT; |
| 2729 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2730 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2731 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 2732 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2733 | DBG_ERROR("EXIT %s with STATUS_FAILURE 2\n", __FUNCTION__); |
| 2734 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2735 | return (STATUS_FAILURE); |
| 2736 | } |
| 2737 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 2738 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2739 | /* Read the MDIO register data back from the field register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2740 | READ_REG(HwRegs->MacAmiimField, *pValue); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2741 | *pValue &= 0xFFFF; /* data is in the lower 16 bits */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2742 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2743 | DBG_ERROR("EXIT %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2744 | |
| 2745 | return (STATUS_SUCCESS); |
| 2746 | } |
| 2747 | |
| 2748 | /* |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2749 | * Functions to obtain the CRC corresponding to the destination mac address. |
| 2750 | * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using |
| 2751 | * the polynomial: |
| 2752 | * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 + x^4 + x^2 + x^1. |
| 2753 | * |
| 2754 | * After the CRC for the 6 bytes is generated (but before the value is complemented), |
| 2755 | * we must then transpose the value and return bits 30-23. |
| 2756 | * |
| 2757 | */ |
| 2758 | static u32 sxg_crc_table[256]; /* Table of CRC's for all possible byte values */ |
| 2759 | |
| 2760 | /* |
| 2761 | * Contruct the CRC32 table |
| 2762 | */ |
| 2763 | static void sxg_mcast_init_crc32(void) |
| 2764 | { |
| 2765 | u32 c; /* CRC shit reg */ |
| 2766 | u32 e = 0; /* Poly X-or pattern */ |
| 2767 | int i; /* counter */ |
| 2768 | int k; /* byte being shifted into crc */ |
| 2769 | |
| 2770 | static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 }; |
| 2771 | |
| 2772 | for (i = 0; i < sizeof(p) / sizeof(int); i++) { |
| 2773 | e |= 1L << (31 - p[i]); |
| 2774 | } |
| 2775 | |
| 2776 | for (i = 1; i < 256; i++) { |
| 2777 | c = i; |
| 2778 | for (k = 8; k; k--) { |
| 2779 | c = c & 1 ? (c >> 1) ^ e : c >> 1; |
| 2780 | } |
| 2781 | sxg_crc_table[i] = c; |
| 2782 | } |
| 2783 | } |
| 2784 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2785 | static u32 sxg_crc_init; /* Is table initialized */ |
| 2786 | /* |
| 2787 | * Return the MAC hast as described above. |
| 2788 | */ |
| 2789 | static unsigned char sxg_mcast_get_mac_hash(char *macaddr) |
| 2790 | { |
| 2791 | u32 crc; |
| 2792 | char *p; |
| 2793 | int i; |
| 2794 | unsigned char machash = 0; |
| 2795 | |
| 2796 | if (!sxg_crc_init) { |
| 2797 | sxg_mcast_init_crc32(); |
| 2798 | sxg_crc_init = 1; |
| 2799 | } |
| 2800 | |
| 2801 | crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */ |
| 2802 | for (i = 0, p = macaddr; i < 6; ++p, ++i) { |
| 2803 | crc = (crc >> 8) ^ sxg_crc_table[(crc ^ *p) & 0xFF]; |
| 2804 | } |
| 2805 | |
| 2806 | /* Return bits 1-8, transposed */ |
| 2807 | for (i = 1; i < 9; i++) { |
| 2808 | machash |= (((crc >> i) & 1) << (8 - i)); |
| 2809 | } |
| 2810 | |
| 2811 | return (machash); |
| 2812 | } |
| 2813 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2814 | static void sxg_mcast_set_mask(struct adapter_t *adapter) |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2815 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2816 | struct SXG_UCODE_REGS *sxg_regs = adapter->UcodeRegs; |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2817 | |
| 2818 | DBG_ERROR("%s ENTER (%s) macopts[%x] mask[%llx]\n", __func__, |
| 2819 | adapter->netdev->name, (unsigned int)adapter->MacFilter, |
| 2820 | adapter->MulticastMask); |
| 2821 | |
| 2822 | if (adapter->MacFilter & (MAC_ALLMCAST | MAC_PROMISC)) { |
| 2823 | /* Turn on all multicast addresses. We have to do this for promiscuous |
| 2824 | * mode as well as ALLMCAST mode. It saves the Microcode from having |
| 2825 | * to keep state about the MAC configuration. |
| 2826 | */ |
| 2827 | /* DBG_ERROR("sxg: %s macopts = MAC_ALLMCAST | MAC_PROMISC\n SLUT MODE!!!\n",__func__); */ |
| 2828 | WRITE_REG(sxg_regs->McastLow, 0xFFFFFFFF, FLUSH); |
| 2829 | WRITE_REG(sxg_regs->McastHigh, 0xFFFFFFFF, FLUSH); |
| 2830 | /* DBG_ERROR("%s (%s) WRITE to slic_regs slic_mcastlow&high 0xFFFFFFFF\n",__func__, adapter->netdev->name); */ |
| 2831 | |
| 2832 | } else { |
| 2833 | /* Commit our multicast mast to the SLIC by writing to the multicast |
| 2834 | * address mask registers |
| 2835 | */ |
| 2836 | DBG_ERROR("%s (%s) WRITE mcastlow[%lx] mcasthigh[%lx]\n", |
| 2837 | __func__, adapter->netdev->name, |
| 2838 | ((ulong) (adapter->MulticastMask & 0xFFFFFFFF)), |
| 2839 | ((ulong) |
| 2840 | ((adapter->MulticastMask >> 32) & 0xFFFFFFFF))); |
| 2841 | |
| 2842 | WRITE_REG(sxg_regs->McastLow, |
| 2843 | (u32) (adapter->MulticastMask & 0xFFFFFFFF), FLUSH); |
| 2844 | WRITE_REG(sxg_regs->McastHigh, |
| 2845 | (u32) ((adapter-> |
| 2846 | MulticastMask >> 32) & 0xFFFFFFFF), FLUSH); |
| 2847 | } |
| 2848 | } |
| 2849 | |
| 2850 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2851 | * Allocate a mcast_address structure to hold the multicast address. |
| 2852 | * Link it in. |
| 2853 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2854 | static int sxg_mcast_add_list(struct adapter_t *adapter, char *address) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2855 | { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2856 | struct mcast_address_t *mcaddr, *mlist; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2857 | bool equaladdr; |
| 2858 | |
| 2859 | /* Check to see if it already exists */ |
| 2860 | mlist = adapter->mcastaddrs; |
| 2861 | while (mlist) { |
| 2862 | ETHER_EQ_ADDR(mlist->address, address, equaladdr); |
| 2863 | if (equaladdr) { |
| 2864 | return (STATUS_SUCCESS); |
| 2865 | } |
| 2866 | mlist = mlist->next; |
| 2867 | } |
| 2868 | |
| 2869 | /* Doesn't already exist. Allocate a structure to hold it */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2870 | mcaddr = kmalloc(sizeof(struct mcast_address_t), GFP_ATOMIC); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2871 | if (mcaddr == NULL) |
| 2872 | return 1; |
| 2873 | |
| 2874 | memcpy(mcaddr->address, address, 6); |
| 2875 | |
| 2876 | mcaddr->next = adapter->mcastaddrs; |
| 2877 | adapter->mcastaddrs = mcaddr; |
| 2878 | |
| 2879 | return (STATUS_SUCCESS); |
| 2880 | } |
| 2881 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2882 | static void sxg_mcast_set_bit(struct adapter_t *adapter, char *address) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2883 | { |
| 2884 | unsigned char crcpoly; |
| 2885 | |
| 2886 | /* Get the CRC polynomial for the mac address */ |
| 2887 | crcpoly = sxg_mcast_get_mac_hash(address); |
| 2888 | |
| 2889 | /* We only have space on the SLIC for 64 entries. Lop |
| 2890 | * off the top two bits. (2^6 = 64) |
| 2891 | */ |
| 2892 | crcpoly &= 0x3F; |
| 2893 | |
| 2894 | /* OR in the new bit into our 64 bit mask. */ |
| 2895 | adapter->MulticastMask |= (u64) 1 << crcpoly; |
| 2896 | } |
| 2897 | |
| 2898 | static void sxg_mcast_set_list(p_net_device dev) |
| 2899 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2900 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2901 | int status = STATUS_SUCCESS; |
| 2902 | int i; |
| 2903 | char *addresses; |
| 2904 | struct dev_mc_list *mc_list = dev->mc_list; |
| 2905 | int mc_count = dev->mc_count; |
| 2906 | |
| 2907 | ASSERT(adapter); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2908 | if (dev->flags & IFF_PROMISC) { |
| 2909 | adapter->MacFilter |= MAC_PROMISC; |
| 2910 | } |
| 2911 | //XXX handle other flags as well |
| 2912 | sxg_mcast_set_mask(adapter); |
| 2913 | |
| 2914 | #if 0 |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2915 | |
| 2916 | for (i = 1; i <= mc_count; i++) { |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2917 | addresses = (char *)&mc_list->dmi_addr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2918 | if (mc_list->dmi_addrlen == 6) { |
| 2919 | status = sxg_mcast_add_list(adapter, addresses); |
| 2920 | if (status != STATUS_SUCCESS) { |
| 2921 | break; |
| 2922 | } |
| 2923 | } else { |
| 2924 | status = -EINVAL; |
| 2925 | break; |
| 2926 | } |
| 2927 | sxg_mcast_set_bit(adapter, addresses); |
| 2928 | mc_list = mc_list->next; |
| 2929 | } |
| 2930 | |
| 2931 | DBG_ERROR("%s a->devflags_prev[%x] dev->flags[%x] status[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2932 | __func__, adapter->devflags_prev, dev->flags, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2933 | if (adapter->devflags_prev != dev->flags) { |
| 2934 | adapter->macopts = MAC_DIRECTED; |
| 2935 | if (dev->flags) { |
| 2936 | if (dev->flags & IFF_BROADCAST) { |
| 2937 | adapter->macopts |= MAC_BCAST; |
| 2938 | } |
| 2939 | if (dev->flags & IFF_PROMISC) { |
| 2940 | adapter->macopts |= MAC_PROMISC; |
| 2941 | } |
| 2942 | if (dev->flags & IFF_ALLMULTI) { |
| 2943 | adapter->macopts |= MAC_ALLMCAST; |
| 2944 | } |
| 2945 | if (dev->flags & IFF_MULTICAST) { |
| 2946 | adapter->macopts |= MAC_MCAST; |
| 2947 | } |
| 2948 | } |
| 2949 | adapter->devflags_prev = dev->flags; |
| 2950 | DBG_ERROR("%s call sxg_config_set adapter->macopts[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2951 | __func__, adapter->macopts); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2952 | sxg_config_set(adapter, TRUE); |
| 2953 | } else { |
| 2954 | if (status == STATUS_SUCCESS) { |
| 2955 | sxg_mcast_set_mask(adapter); |
| 2956 | } |
| 2957 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2958 | return; |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2959 | #endif |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 2960 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2961 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2962 | static void sxg_unmap_mmio_space(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2963 | { |
| 2964 | #if LINUX_FREES_ADAPTER_RESOURCES |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2965 | /* if (adapter->Regs) { */ |
| 2966 | /* iounmap(adapter->Regs); */ |
| 2967 | /* } */ |
| 2968 | /* adapter->slic_regs = NULL; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2969 | #endif |
| 2970 | } |
| 2971 | |
| 2972 | #if XXXTODO |
| 2973 | /* |
| 2974 | * SxgFreeResources - Free everything allocated in SxgAllocateResources |
| 2975 | * |
| 2976 | * Arguments - |
| 2977 | * adapter - A pointer to our adapter structure |
| 2978 | * |
| 2979 | * Return |
| 2980 | * none |
| 2981 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2982 | void SxgFreeResources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2983 | { |
| 2984 | u32 RssIds, IsrCount; |
| 2985 | PTCP_OBJECT TcpObject; |
| 2986 | u32 i; |
| 2987 | BOOLEAN TimerCancelled; |
| 2988 | |
| 2989 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FreeRes", |
| 2990 | adapter, adapter->MaxTcbs, 0, 0); |
| 2991 | |
| 2992 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
| 2993 | IsrCount = adapter->MsiEnabled ? RssIds : 1; |
| 2994 | |
| 2995 | if (adapter->BasicAllocations == FALSE) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2996 | /* No allocations have been made, including spinlocks, */ |
| 2997 | /* or listhead initializations. Return. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2998 | return; |
| 2999 | } |
| 3000 | |
| 3001 | if (!(IsListEmpty(&adapter->AllRcvBlocks))) { |
| 3002 | SxgFreeRcvBlocks(adapter); |
| 3003 | } |
| 3004 | if (!(IsListEmpty(&adapter->AllSglBuffers))) { |
| 3005 | SxgFreeSglBuffers(adapter); |
| 3006 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3007 | /* Free event queues. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3008 | if (adapter->EventRings) { |
| 3009 | pci_free_consistent(adapter->pcidev, |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3010 | sizeof(struct SXG_EVENT_RING) * RssIds, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3011 | adapter->EventRings, adapter->PEventRings); |
| 3012 | } |
| 3013 | if (adapter->Isr) { |
| 3014 | pci_free_consistent(adapter->pcidev, |
| 3015 | sizeof(u32) * IsrCount, |
| 3016 | adapter->Isr, adapter->PIsr); |
| 3017 | } |
| 3018 | if (adapter->XmtRingZeroIndex) { |
| 3019 | pci_free_consistent(adapter->pcidev, |
| 3020 | sizeof(u32), |
| 3021 | adapter->XmtRingZeroIndex, |
| 3022 | adapter->PXmtRingZeroIndex); |
| 3023 | } |
| 3024 | if (adapter->IndirectionTable) { |
| 3025 | pci_free_consistent(adapter->pcidev, |
| 3026 | SXG_MAX_RSS_TABLE_SIZE, |
| 3027 | adapter->IndirectionTable, |
| 3028 | adapter->PIndirectionTable); |
| 3029 | } |
| 3030 | |
| 3031 | SXG_FREE_PACKET_POOL(adapter->PacketPoolHandle); |
| 3032 | SXG_FREE_BUFFER_POOL(adapter->BufferPoolHandle); |
| 3033 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3034 | /* Unmap register spaces */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3035 | SxgUnmapResources(adapter); |
| 3036 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3037 | /* Deregister DMA */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3038 | if (adapter->DmaHandle) { |
| 3039 | SXG_DEREGISTER_DMA(adapter->DmaHandle); |
| 3040 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3041 | /* Deregister interrupt */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3042 | SxgDeregisterInterrupt(adapter); |
| 3043 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3044 | /* Possibly free system info (5.2 only) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3045 | SXG_RELEASE_SYSTEM_INFO(adapter); |
| 3046 | |
| 3047 | SxgDiagFreeResources(adapter); |
| 3048 | |
| 3049 | SxgFreeMCastAddrs(adapter); |
| 3050 | |
| 3051 | if (SXG_TIMER_ALLOCATED(adapter->ResetTimer)) { |
| 3052 | SXG_CANCEL_TIMER(adapter->ResetTimer, TimerCancelled); |
| 3053 | SXG_FREE_TIMER(adapter->ResetTimer); |
| 3054 | } |
| 3055 | if (SXG_TIMER_ALLOCATED(adapter->RssTimer)) { |
| 3056 | SXG_CANCEL_TIMER(adapter->RssTimer, TimerCancelled); |
| 3057 | SXG_FREE_TIMER(adapter->RssTimer); |
| 3058 | } |
| 3059 | if (SXG_TIMER_ALLOCATED(adapter->OffloadTimer)) { |
| 3060 | SXG_CANCEL_TIMER(adapter->OffloadTimer, TimerCancelled); |
| 3061 | SXG_FREE_TIMER(adapter->OffloadTimer); |
| 3062 | } |
| 3063 | |
| 3064 | adapter->BasicAllocations = FALSE; |
| 3065 | |
| 3066 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFreeRes", |
| 3067 | adapter, adapter->MaxTcbs, 0, 0); |
| 3068 | } |
| 3069 | #endif |
| 3070 | |
| 3071 | /* |
| 3072 | * sxg_allocate_complete - |
| 3073 | * |
| 3074 | * This routine is called when a memory allocation has completed. |
| 3075 | * |
| 3076 | * Arguments - |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3077 | * struct adapter_t * - Our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3078 | * VirtualAddress - Memory virtual address |
| 3079 | * PhysicalAddress - Memory physical address |
| 3080 | * Length - Length of memory allocated (or 0) |
| 3081 | * Context - The type of buffer allocated |
| 3082 | * |
| 3083 | * Return |
| 3084 | * None. |
| 3085 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3086 | static void sxg_allocate_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3087 | void *VirtualAddress, |
| 3088 | dma_addr_t PhysicalAddress, |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3089 | u32 Length, enum SXG_BUFFER_TYPE Context) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3090 | { |
| 3091 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocCmp", |
| 3092 | adapter, VirtualAddress, Length, Context); |
| 3093 | ASSERT(adapter->AllocationsPending); |
| 3094 | --adapter->AllocationsPending; |
| 3095 | |
| 3096 | switch (Context) { |
| 3097 | |
| 3098 | case SXG_BUFFER_TYPE_RCV: |
| 3099 | sxg_allocate_rcvblock_complete(adapter, |
| 3100 | VirtualAddress, |
| 3101 | PhysicalAddress, Length); |
| 3102 | break; |
| 3103 | case SXG_BUFFER_TYPE_SGL: |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3104 | sxg_allocate_sgl_buffer_complete(adapter, (struct SXG_SCATTER_GATHER*) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3105 | VirtualAddress, |
| 3106 | PhysicalAddress, Length); |
| 3107 | break; |
| 3108 | } |
| 3109 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocCmp", |
| 3110 | adapter, VirtualAddress, Length, Context); |
| 3111 | } |
| 3112 | |
| 3113 | /* |
| 3114 | * sxg_allocate_buffer_memory - Shared memory allocation routine used for |
| 3115 | * synchronous and asynchronous buffer allocations |
| 3116 | * |
| 3117 | * Arguments - |
| 3118 | * adapter - A pointer to our adapter structure |
| 3119 | * Size - block size to allocate |
| 3120 | * BufferType - Type of buffer to allocate |
| 3121 | * |
| 3122 | * Return |
| 3123 | * int |
| 3124 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3125 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, |
| 3126 | u32 Size, enum SXG_BUFFER_TYPE BufferType) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3127 | { |
| 3128 | int status; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3129 | void *Buffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3130 | dma_addr_t pBuffer; |
| 3131 | |
| 3132 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocMem", |
| 3133 | adapter, Size, BufferType, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3134 | /* Grab the adapter lock and check the state. */ |
| 3135 | /* If we're in anything other than INITIALIZING or */ |
| 3136 | /* RUNNING state, fail. This is to prevent */ |
| 3137 | /* allocations in an improper driver state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3138 | spin_lock(&adapter->AdapterLock); |
| 3139 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3140 | /* Increment the AllocationsPending count while holding */ |
| 3141 | /* the lock. Pause processing relies on this */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3142 | ++adapter->AllocationsPending; |
| 3143 | spin_unlock(&adapter->AdapterLock); |
| 3144 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3145 | /* At initialization time allocate resources synchronously. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3146 | Buffer = pci_alloc_consistent(adapter->pcidev, Size, &pBuffer); |
| 3147 | if (Buffer == NULL) { |
| 3148 | spin_lock(&adapter->AdapterLock); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3149 | /* Decrement the AllocationsPending count while holding */ |
| 3150 | /* the lock. Pause processing relies on this */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3151 | --adapter->AllocationsPending; |
| 3152 | spin_unlock(&adapter->AdapterLock); |
| 3153 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlcMemF1", |
| 3154 | adapter, Size, BufferType, 0); |
| 3155 | return (STATUS_RESOURCES); |
| 3156 | } |
| 3157 | sxg_allocate_complete(adapter, Buffer, pBuffer, Size, BufferType); |
| 3158 | status = STATUS_SUCCESS; |
| 3159 | |
| 3160 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocMem", |
| 3161 | adapter, Size, BufferType, status); |
| 3162 | return (status); |
| 3163 | } |
| 3164 | |
| 3165 | /* |
| 3166 | * sxg_allocate_rcvblock_complete - Complete a receive descriptor block allocation |
| 3167 | * |
| 3168 | * Arguments - |
| 3169 | * adapter - A pointer to our adapter structure |
| 3170 | * RcvBlock - receive block virtual address |
| 3171 | * PhysicalAddress - Physical address |
| 3172 | * Length - Memory length |
| 3173 | * |
| 3174 | * Return |
| 3175 | * |
| 3176 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3177 | static void sxg_allocate_rcvblock_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3178 | void *RcvBlock, |
| 3179 | dma_addr_t PhysicalAddress, |
| 3180 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3181 | { |
| 3182 | u32 i; |
| 3183 | u32 BufferSize = adapter->ReceiveBufferSize; |
| 3184 | u64 Paddr; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3185 | struct SXG_RCV_BLOCK_HDR *RcvBlockHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3186 | unsigned char *RcvDataBuffer; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3187 | struct SXG_RCV_DATA_BUFFER_HDR *RcvDataBufferHdr; |
| 3188 | struct SXG_RCV_DESCRIPTOR_BLOCK *RcvDescriptorBlock; |
| 3189 | struct SXG_RCV_DESCRIPTOR_BLOCK_HDR *RcvDescriptorBlockHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3190 | |
| 3191 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlRcvBlk", |
| 3192 | adapter, RcvBlock, Length, 0); |
| 3193 | if (RcvBlock == NULL) { |
| 3194 | goto fail; |
| 3195 | } |
| 3196 | memset(RcvBlock, 0, Length); |
| 3197 | ASSERT((BufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 3198 | (BufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); |
| 3199 | ASSERT(Length == SXG_RCV_BLOCK_SIZE(BufferSize)); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3200 | /* First, initialize the contained pool of receive data */ |
| 3201 | /* buffers. This initialization requires NBL/NB/MDL allocations, */ |
| 3202 | /* If any of them fail, free the block and return without */ |
| 3203 | /* queueing the shared memory */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3204 | RcvDataBuffer = RcvBlock; |
| 3205 | #if 0 |
| 3206 | for (i = 0, Paddr = *PhysicalAddress; |
| 3207 | i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3208 | i++, Paddr.LowPart += BufferSize, RcvDataBuffer += BufferSize) |
| 3209 | #endif |
| 3210 | for (i = 0, Paddr = PhysicalAddress; |
| 3211 | i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3212 | i++, Paddr += BufferSize, RcvDataBuffer += BufferSize) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3213 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3214 | RcvDataBufferHdr = |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3215 | (struct SXG_RCV_DATA_BUFFER_HDR*) (RcvDataBuffer + |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3216 | SXG_RCV_DATA_BUFFER_HDR_OFFSET |
| 3217 | (BufferSize)); |
| 3218 | RcvDataBufferHdr->VirtualAddress = RcvDataBuffer; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3219 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; /* For FREE macro assertion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3220 | RcvDataBufferHdr->Size = |
| 3221 | SXG_RCV_BUFFER_DATA_SIZE(BufferSize); |
| 3222 | |
| 3223 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 3224 | //ASK hardcoded 2048 |
| 3225 | RcvDataBufferHdr->PhysicalAddress = pci_map_single(adapter->pcidev, |
| 3226 | RcvDataBufferHdr->SxgDumbRcvPacket->data, |
| 3227 | 2048, |
| 3228 | PCI_DMA_FROMDEVICE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3229 | if (RcvDataBufferHdr->SxgDumbRcvPacket == NULL) |
| 3230 | goto fail; |
| 3231 | |
| 3232 | } |
| 3233 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3234 | /* Place this entire block of memory on the AllRcvBlocks queue so it can be */ |
| 3235 | /* free later */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3236 | RcvBlockHdr = |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3237 | (struct SXG_RCV_BLOCK_HDR*) ((unsigned char *)RcvBlock + |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3238 | SXG_RCV_BLOCK_HDR_OFFSET(BufferSize)); |
| 3239 | RcvBlockHdr->VirtualAddress = RcvBlock; |
| 3240 | RcvBlockHdr->PhysicalAddress = PhysicalAddress; |
| 3241 | spin_lock(&adapter->RcvQLock); |
| 3242 | adapter->AllRcvBlockCount++; |
| 3243 | InsertTailList(&adapter->AllRcvBlocks, &RcvBlockHdr->AllList); |
| 3244 | spin_unlock(&adapter->RcvQLock); |
| 3245 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3246 | /* Now free the contained receive data buffers that we initialized above */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3247 | RcvDataBuffer = RcvBlock; |
| 3248 | for (i = 0, Paddr = PhysicalAddress; |
| 3249 | i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3250 | i++, Paddr += BufferSize, RcvDataBuffer += BufferSize) { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3251 | RcvDataBufferHdr = (struct SXG_RCV_DATA_BUFFER_HDR*) (RcvDataBuffer + |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3252 | SXG_RCV_DATA_BUFFER_HDR_OFFSET |
| 3253 | (BufferSize)); |
| 3254 | spin_lock(&adapter->RcvQLock); |
| 3255 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 3256 | spin_unlock(&adapter->RcvQLock); |
| 3257 | } |
| 3258 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3259 | /* Locate the descriptor block and put it on a separate free queue */ |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3260 | RcvDescriptorBlock = |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3261 | (struct SXG_RCV_DESCRIPTOR_BLOCK*) ((unsigned char *)RcvBlock + |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3262 | SXG_RCV_DESCRIPTOR_BLOCK_OFFSET |
| 3263 | (BufferSize)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3264 | RcvDescriptorBlockHdr = |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3265 | (struct SXG_RCV_DESCRIPTOR_BLOCK_HDR*) ((unsigned char *)RcvBlock + |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3266 | SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET |
| 3267 | (BufferSize)); |
| 3268 | RcvDescriptorBlockHdr->VirtualAddress = RcvDescriptorBlock; |
| 3269 | RcvDescriptorBlockHdr->PhysicalAddress = Paddr; |
| 3270 | spin_lock(&adapter->RcvQLock); |
| 3271 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, RcvDescriptorBlockHdr); |
| 3272 | spin_unlock(&adapter->RcvQLock); |
| 3273 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlRBlk", |
| 3274 | adapter, RcvBlock, Length, 0); |
| 3275 | return; |
| 3276 | fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3277 | /* Free any allocated resources */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3278 | if (RcvBlock) { |
| 3279 | RcvDataBuffer = RcvBlock; |
| 3280 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3281 | i++, RcvDataBuffer += BufferSize) { |
| 3282 | RcvDataBufferHdr = |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3283 | (struct SXG_RCV_DATA_BUFFER_HDR*) (RcvDataBuffer + |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3284 | SXG_RCV_DATA_BUFFER_HDR_OFFSET |
| 3285 | (BufferSize)); |
| 3286 | SXG_FREE_RCV_PACKET(RcvDataBufferHdr); |
| 3287 | } |
| 3288 | pci_free_consistent(adapter->pcidev, |
| 3289 | Length, RcvBlock, PhysicalAddress); |
| 3290 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3291 | DBG_ERROR("%s: OUT OF RESOURCES\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3292 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "RcvAFail", |
| 3293 | adapter, adapter->FreeRcvBufferCount, |
| 3294 | adapter->FreeRcvBlockCount, adapter->AllRcvBlockCount); |
| 3295 | adapter->Stats.NoMem++; |
| 3296 | } |
| 3297 | |
| 3298 | /* |
| 3299 | * sxg_allocate_sgl_buffer_complete - Complete a SGL buffer allocation |
| 3300 | * |
| 3301 | * Arguments - |
| 3302 | * adapter - A pointer to our adapter structure |
| 3303 | * SxgSgl - SXG_SCATTER_GATHER buffer |
| 3304 | * PhysicalAddress - Physical address |
| 3305 | * Length - Memory length |
| 3306 | * |
| 3307 | * Return |
| 3308 | * |
| 3309 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3310 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
| 3311 | struct SXG_SCATTER_GATHER *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3312 | dma_addr_t PhysicalAddress, |
| 3313 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3314 | { |
| 3315 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlSglCmp", |
| 3316 | adapter, SxgSgl, Length, 0); |
| 3317 | spin_lock(&adapter->SglQLock); |
| 3318 | adapter->AllSglBufferCount++; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3319 | memset(SxgSgl, 0, sizeof(struct SXG_SCATTER_GATHER*)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3320 | SxgSgl->PhysicalAddress = PhysicalAddress; /* *PhysicalAddress; */ |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3321 | SxgSgl->adapter = adapter; /* Initialize backpointer once */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3322 | InsertTailList(&adapter->AllSglBuffers, &SxgSgl->AllList); |
| 3323 | spin_unlock(&adapter->SglQLock); |
| 3324 | SxgSgl->State = SXG_BUFFER_BUSY; |
| 3325 | SXG_FREE_SGL_BUFFER(adapter, SxgSgl, NULL); |
| 3326 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlSgl", |
| 3327 | adapter, SxgSgl, Length, 0); |
| 3328 | } |
| 3329 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3330 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3331 | static void sxg_adapter_set_hwaddr(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3332 | { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3333 | /* DBG_ERROR ("%s ENTER card->config_set[%x] port[%d] physport[%d] funct#[%d]\n", __func__, */ |
| 3334 | /* card->config_set, adapter->port, adapter->physport, adapter->functionnumber); */ |
| 3335 | /* */ |
| 3336 | /* sxg_dbg_macaddrs(adapter); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3337 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3338 | memcpy(adapter->macaddr, temp_mac_address, sizeof(struct SXG_CONFIG_MAC)); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3339 | /* DBG_ERROR ("%s AFTER copying from config.macinfo into currmacaddr\n", __func__); */ |
| 3340 | /* sxg_dbg_macaddrs(adapter); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3341 | if (!(adapter->currmacaddr[0] || |
| 3342 | adapter->currmacaddr[1] || |
| 3343 | adapter->currmacaddr[2] || |
| 3344 | adapter->currmacaddr[3] || |
| 3345 | adapter->currmacaddr[4] || adapter->currmacaddr[5])) { |
| 3346 | memcpy(adapter->currmacaddr, adapter->macaddr, 6); |
| 3347 | } |
| 3348 | if (adapter->netdev) { |
| 3349 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 3350 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3351 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3352 | /* DBG_ERROR ("%s EXIT port %d\n", __func__, adapter->port); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3353 | sxg_dbg_macaddrs(adapter); |
| 3354 | |
| 3355 | } |
| 3356 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3357 | #if XXXTODO |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3358 | static int sxg_mac_set_address(p_net_device dev, void *ptr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3359 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3360 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3361 | struct sockaddr *addr = ptr; |
| 3362 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3363 | DBG_ERROR("%s ENTER (%s)\n", __func__, adapter->netdev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3364 | |
| 3365 | if (netif_running(dev)) { |
| 3366 | return -EBUSY; |
| 3367 | } |
| 3368 | if (!adapter) { |
| 3369 | return -EBUSY; |
| 3370 | } |
| 3371 | DBG_ERROR("sxg: %s (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3372 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3373 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 3374 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 3375 | adapter->currmacaddr[5]); |
| 3376 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
| 3377 | memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); |
| 3378 | DBG_ERROR("sxg: %s (%s) new %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3379 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3380 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 3381 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 3382 | adapter->currmacaddr[5]); |
| 3383 | |
| 3384 | sxg_config_set(adapter, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3385 | return 0; |
| 3386 | } |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3387 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3388 | |
| 3389 | /*****************************************************************************/ |
| 3390 | /************* SXG DRIVER FUNCTIONS (below) ********************************/ |
| 3391 | /*****************************************************************************/ |
| 3392 | |
| 3393 | /* |
| 3394 | * sxg_initialize_adapter - Initialize adapter |
| 3395 | * |
| 3396 | * Arguments - |
| 3397 | * adapter - A pointer to our adapter structure |
| 3398 | * |
| 3399 | * Return |
| 3400 | * int |
| 3401 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3402 | static int sxg_initialize_adapter(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3403 | { |
| 3404 | u32 RssIds, IsrCount; |
| 3405 | u32 i; |
| 3406 | int status; |
| 3407 | |
| 3408 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitAdpt", |
| 3409 | adapter, 0, 0, 0); |
| 3410 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3411 | RssIds = 1; /* XXXTODO SXG_RSS_CPU_COUNT(adapter); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3412 | IsrCount = adapter->MsiEnabled ? RssIds : 1; |
| 3413 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3414 | /* Sanity check SXG_UCODE_REGS structure definition to */ |
| 3415 | /* make sure the length is correct */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3416 | ASSERT(sizeof(struct SXG_UCODE_REGS) == SXG_REGISTER_SIZE_PER_CPU); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3417 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3418 | /* Disable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3419 | SXG_DISABLE_ALL_INTERRUPTS(adapter); |
| 3420 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3421 | /* Set MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3422 | ASSERT((adapter->FrameSize == ETHERMAXFRAME) || |
| 3423 | (adapter->FrameSize == JUMBOMAXFRAME)); |
| 3424 | WRITE_REG(adapter->UcodeRegs[0].LinkMtu, adapter->FrameSize, TRUE); |
| 3425 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3426 | /* Set event ring base address and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3427 | WRITE_REG64(adapter, |
| 3428 | adapter->UcodeRegs[0].EventBase, adapter->PEventRings, 0); |
| 3429 | WRITE_REG(adapter->UcodeRegs[0].EventSize, EVENT_RING_SIZE, TRUE); |
| 3430 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3431 | /* Per-ISR initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3432 | for (i = 0; i < IsrCount; i++) { |
| 3433 | u64 Addr; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3434 | /* Set interrupt status pointer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3435 | Addr = adapter->PIsr + (i * sizeof(u32)); |
| 3436 | WRITE_REG64(adapter, adapter->UcodeRegs[i].Isp, Addr, i); |
| 3437 | } |
| 3438 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3439 | /* XMT ring zero index */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3440 | WRITE_REG64(adapter, |
| 3441 | adapter->UcodeRegs[0].SPSendIndex, |
| 3442 | adapter->PXmtRingZeroIndex, 0); |
| 3443 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3444 | /* Per-RSS initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3445 | for (i = 0; i < RssIds; i++) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3446 | /* Release all event ring entries to the Microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3447 | WRITE_REG(adapter->UcodeRegs[i].EventRelease, EVENT_RING_SIZE, |
| 3448 | TRUE); |
| 3449 | } |
| 3450 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3451 | /* Transmit ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3452 | WRITE_REG64(adapter, |
| 3453 | adapter->UcodeRegs[0].XmtBase, adapter->PXmtRings, 0); |
| 3454 | WRITE_REG(adapter->UcodeRegs[0].XmtSize, SXG_XMT_RING_SIZE, TRUE); |
| 3455 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3456 | /* Receive ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3457 | WRITE_REG64(adapter, |
| 3458 | adapter->UcodeRegs[0].RcvBase, adapter->PRcvRings, 0); |
| 3459 | WRITE_REG(adapter->UcodeRegs[0].RcvSize, SXG_RCV_RING_SIZE, TRUE); |
| 3460 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3461 | /* Populate the card with receive buffers */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3462 | sxg_stock_rcv_buffers(adapter); |
| 3463 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3464 | /* Initialize checksum offload capabilities. At the moment */ |
| 3465 | /* we always enable IP and TCP receive checksums on the card. */ |
| 3466 | /* Depending on the checksum configuration specified by the */ |
| 3467 | /* user, we can choose to report or ignore the checksum */ |
| 3468 | /* information provided by the card. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3469 | WRITE_REG(adapter->UcodeRegs[0].ReceiveChecksum, |
| 3470 | SXG_RCV_TCP_CSUM_ENABLED | SXG_RCV_IP_CSUM_ENABLED, TRUE); |
| 3471 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3472 | /* Initialize the MAC, XAUI */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3473 | DBG_ERROR("sxg: %s ENTER sxg_initialize_link\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3474 | status = sxg_initialize_link(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3475 | DBG_ERROR("sxg: %s EXIT sxg_initialize_link status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3476 | status); |
| 3477 | if (status != STATUS_SUCCESS) { |
| 3478 | return (status); |
| 3479 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3480 | /* Initialize Dead to FALSE. */ |
| 3481 | /* SlicCheckForHang or SlicDumpThread will take it from here. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3482 | adapter->Dead = FALSE; |
| 3483 | adapter->PingOutstanding = FALSE; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 3484 | adapter->State = SXG_STATE_RUNNING; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3485 | |
| 3486 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInit", |
| 3487 | adapter, 0, 0, 0); |
| 3488 | return (STATUS_SUCCESS); |
| 3489 | } |
| 3490 | |
| 3491 | /* |
| 3492 | * sxg_fill_descriptor_block - Populate a descriptor block and give it to |
| 3493 | * the card. The caller should hold the RcvQLock |
| 3494 | * |
| 3495 | * Arguments - |
| 3496 | * adapter - A pointer to our adapter structure |
| 3497 | * RcvDescriptorBlockHdr - Descriptor block to fill |
| 3498 | * |
| 3499 | * Return |
| 3500 | * status |
| 3501 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3502 | static int sxg_fill_descriptor_block(struct adapter_t *adapter, |
| 3503 | struct SXG_RCV_DESCRIPTOR_BLOCK_HDR |
| 3504 | *RcvDescriptorBlockHdr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3505 | { |
| 3506 | u32 i; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3507 | struct SXG_RING_INFO *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 3508 | struct SXG_RCV_DATA_BUFFER_HDR *RcvDataBufferHdr; |
| 3509 | struct SXG_RCV_DESCRIPTOR_BLOCK *RcvDescriptorBlock; |
| 3510 | struct SXG_CMD *RingDescriptorCmd; |
| 3511 | struct SXG_RCV_RING *RingZero = &adapter->RcvRings[0]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3512 | |
| 3513 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FilBlk", |
| 3514 | adapter, adapter->RcvBuffersOnCard, |
| 3515 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 3516 | |
| 3517 | ASSERT(RcvDescriptorBlockHdr); |
| 3518 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3519 | /* If we don't have the resources to fill the descriptor block, */ |
| 3520 | /* return failure */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3521 | if ((adapter->FreeRcvBufferCount < SXG_RCV_DESCRIPTORS_PER_BLOCK) || |
| 3522 | SXG_RING_FULL(RcvRingInfo)) { |
| 3523 | adapter->Stats.NoMem++; |
| 3524 | return (STATUS_FAILURE); |
| 3525 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3526 | /* Get a ring descriptor command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3527 | SXG_GET_CMD(RingZero, |
| 3528 | RcvRingInfo, RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 3529 | ASSERT(RingDescriptorCmd); |
| 3530 | RcvDescriptorBlockHdr->State = SXG_BUFFER_ONCARD; |
| 3531 | RcvDescriptorBlock = |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3532 | (struct SXG_RCV_DESCRIPTOR_BLOCK*) RcvDescriptorBlockHdr->VirtualAddress; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3533 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3534 | /* Fill in the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3535 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; i++) { |
| 3536 | SXG_GET_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 3537 | ASSERT(RcvDataBufferHdr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 3538 | ASSERT(RcvDataBufferHdr->SxgDumbRcvPacket); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3539 | SXG_REINIATIALIZE_PACKET(RcvDataBufferHdr->SxgDumbRcvPacket); |
| 3540 | RcvDataBufferHdr->State = SXG_BUFFER_ONCARD; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3541 | RcvDescriptorBlock->Descriptors[i].VirtualAddress = |
| 3542 | (void *)RcvDataBufferHdr; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 3543 | if (i == 0) |
| 3544 | printk("ASK:sxg_fill_descriptor_block: first virt address %p\n", RcvDataBufferHdr); |
| 3545 | if (i == (SXG_RCV_DESCRIPTORS_PER_BLOCK - 1)) |
| 3546 | printk("ASK:sxg_fill_descriptor_block: last virt address %p\n", RcvDataBufferHdr); |
| 3547 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3548 | RcvDescriptorBlock->Descriptors[i].PhysicalAddress = |
| 3549 | RcvDataBufferHdr->PhysicalAddress; |
| 3550 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3551 | /* Add the descriptor block to receive descriptor ring 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3552 | RingDescriptorCmd->Sgl = RcvDescriptorBlockHdr->PhysicalAddress; |
| 3553 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3554 | /* RcvBuffersOnCard is not protected via the receive lock (see */ |
| 3555 | /* sxg_process_event_queue) We don't want to grap a lock every time a */ |
| 3556 | /* buffer is returned to us, so we use atomic interlocked functions */ |
| 3557 | /* instead. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3558 | adapter->RcvBuffersOnCard += SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3559 | |
| 3560 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DscBlk", |
| 3561 | RcvDescriptorBlockHdr, |
| 3562 | RingDescriptorCmd, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 3563 | |
| 3564 | WRITE_REG(adapter->UcodeRegs[0].RcvCmd, 1, true); |
| 3565 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlk", |
| 3566 | adapter, adapter->RcvBuffersOnCard, |
| 3567 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 3568 | return (STATUS_SUCCESS); |
| 3569 | } |
| 3570 | |
| 3571 | /* |
| 3572 | * sxg_stock_rcv_buffers - Stock the card with receive buffers |
| 3573 | * |
| 3574 | * Arguments - |
| 3575 | * adapter - A pointer to our adapter structure |
| 3576 | * |
| 3577 | * Return |
| 3578 | * None |
| 3579 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3580 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3581 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3582 | struct SXG_RCV_DESCRIPTOR_BLOCK_HDR *RcvDescriptorBlockHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3583 | |
| 3584 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "StockBuf", |
| 3585 | adapter, adapter->RcvBuffersOnCard, |
| 3586 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3587 | /* First, see if we've got less than our minimum threshold of */ |
| 3588 | /* receive buffers, there isn't an allocation in progress, and */ |
| 3589 | /* we haven't exceeded our maximum.. get another block of buffers */ |
| 3590 | /* None of this needs to be SMP safe. It's round numbers. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3591 | if ((adapter->FreeRcvBufferCount < SXG_MIN_RCV_DATA_BUFFERS) && |
| 3592 | (adapter->AllRcvBlockCount < SXG_MAX_RCV_BLOCKS) && |
| 3593 | (adapter->AllocationsPending == 0)) { |
| 3594 | sxg_allocate_buffer_memory(adapter, |
| 3595 | SXG_RCV_BLOCK_SIZE(adapter-> |
| 3596 | ReceiveBufferSize), |
| 3597 | SXG_BUFFER_TYPE_RCV); |
| 3598 | } |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame^] | 3599 | printk("ASK:sxg_stock_rcv_buffers: RcvBuffersOnCard %d\n", adapter->RcvBuffersOnCard); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3600 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3601 | spin_lock(&adapter->RcvQLock); |
| 3602 | while (adapter->RcvBuffersOnCard < SXG_RCV_DATA_BUFFERS) { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3603 | struct LIST_ENTRY *_ple; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3604 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3605 | /* Get a descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3606 | RcvDescriptorBlockHdr = NULL; |
| 3607 | if (adapter->FreeRcvBlockCount) { |
| 3608 | _ple = RemoveHeadList(&adapter->FreeRcvBlocks); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3609 | RcvDescriptorBlockHdr = |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3610 | container_of(_ple, struct SXG_RCV_DESCRIPTOR_BLOCK_HDR, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3611 | FreeList); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3612 | adapter->FreeRcvBlockCount--; |
| 3613 | RcvDescriptorBlockHdr->State = SXG_BUFFER_BUSY; |
| 3614 | } |
| 3615 | |
| 3616 | if (RcvDescriptorBlockHdr == NULL) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3617 | /* Bail out.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3618 | adapter->Stats.NoMem++; |
| 3619 | break; |
| 3620 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3621 | /* Fill in the descriptor block and give it to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3622 | if (sxg_fill_descriptor_block(adapter, RcvDescriptorBlockHdr) == |
| 3623 | STATUS_FAILURE) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3624 | /* Free the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3625 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 3626 | RcvDescriptorBlockHdr); |
| 3627 | break; |
| 3628 | } |
| 3629 | } |
| 3630 | spin_unlock(&adapter->RcvQLock); |
| 3631 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlks", |
| 3632 | adapter, adapter->RcvBuffersOnCard, |
| 3633 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 3634 | } |
| 3635 | |
| 3636 | /* |
| 3637 | * sxg_complete_descriptor_blocks - Return descriptor blocks that have been |
| 3638 | * completed by the microcode |
| 3639 | * |
| 3640 | * Arguments - |
| 3641 | * adapter - A pointer to our adapter structure |
| 3642 | * Index - Where the microcode is up to |
| 3643 | * |
| 3644 | * Return |
| 3645 | * None |
| 3646 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3647 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3648 | unsigned char Index) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3649 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3650 | struct SXG_RCV_RING *RingZero = &adapter->RcvRings[0]; |
| 3651 | struct SXG_RING_INFO *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 3652 | struct SXG_RCV_DESCRIPTOR_BLOCK_HDR *RcvDescriptorBlockHdr; |
| 3653 | struct SXG_CMD *RingDescriptorCmd; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3654 | |
| 3655 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlks", |
| 3656 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 3657 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3658 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3659 | spin_lock(&adapter->RcvQLock); |
| 3660 | ASSERT(Index != RcvRingInfo->Tail); |
| 3661 | while (RcvRingInfo->Tail != Index) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3662 | /* */ |
| 3663 | /* Locate the current Cmd (ring descriptor entry), and */ |
| 3664 | /* associated receive descriptor block, and advance */ |
| 3665 | /* the tail */ |
| 3666 | /* */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3667 | SXG_RETURN_CMD(RingZero, |
| 3668 | RcvRingInfo, |
| 3669 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 3670 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlk", |
| 3671 | RcvRingInfo->Head, RcvRingInfo->Tail, |
| 3672 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 3673 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3674 | /* Clear the SGL field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3675 | RingDescriptorCmd->Sgl = 0; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3676 | /* Attempt to refill it and hand it right back to the */ |
| 3677 | /* card. If we fail to refill it, free the descriptor block */ |
| 3678 | /* header. The card will be restocked later via the */ |
| 3679 | /* RcvBuffersOnCard test */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3680 | if (sxg_fill_descriptor_block(adapter, RcvDescriptorBlockHdr) == |
| 3681 | STATUS_FAILURE) { |
| 3682 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 3683 | RcvDescriptorBlockHdr); |
| 3684 | } |
| 3685 | } |
| 3686 | spin_unlock(&adapter->RcvQLock); |
| 3687 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XCRBlks", |
| 3688 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 3689 | } |
| 3690 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3691 | static struct pci_driver sxg_driver = { |
| 3692 | .name = DRV_NAME, |
| 3693 | .id_table = sxg_pci_tbl, |
| 3694 | .probe = sxg_entry_probe, |
| 3695 | .remove = sxg_entry_remove, |
| 3696 | #if SXG_POWER_MANAGEMENT_ENABLED |
| 3697 | .suspend = sxgpm_suspend, |
| 3698 | .resume = sxgpm_resume, |
| 3699 | #endif |
| 3700 | /* .shutdown = slic_shutdown, MOOK_INVESTIGATE */ |
| 3701 | }; |
| 3702 | |
| 3703 | static int __init sxg_module_init(void) |
| 3704 | { |
| 3705 | sxg_init_driver(); |
| 3706 | |
| 3707 | if (debug >= 0) |
| 3708 | sxg_debug = debug; |
| 3709 | |
| 3710 | return pci_register_driver(&sxg_driver); |
| 3711 | } |
| 3712 | |
| 3713 | static void __exit sxg_module_cleanup(void) |
| 3714 | { |
| 3715 | pci_unregister_driver(&sxg_driver); |
| 3716 | } |
| 3717 | |
| 3718 | module_init(sxg_module_init); |
| 3719 | module_exit(sxg_module_cleanup); |