blob: 08cad696e89fbd648c0c76a6f42c5fcbc2594cc5 [file] [log] [blame]
Bryan Wud7df69f2013-01-02 15:53:51 -08001/dts-v1/;
2
Stephen Warren1bd0bd42012-10-17 16:38:21 -06003#include "tegra30.dtsi"
Bryan Wud7df69f2013-01-02 15:53:51 -08004
5/ {
6 model = "NVIDIA Tegra30 Beaver evaluation board";
7 compatible = "nvidia,beaver", "nvidia,tegra30";
8
9 memory {
Stephen Warren30022bb2013-05-13 09:47:31 +000010 reg = <0x80000000 0x7ff00000>;
Bryan Wud7df69f2013-01-02 15:53:51 -080011 };
12
Thierry Redingbb034cb2013-08-09 16:49:28 +020013 pcie-controller {
14 status = "okay";
15 pex-clk-supply = <&sys_3v3_pexs_reg>;
16 vdd-supply = <&ldo1_reg>;
17 avdd-supply = <&ldo2_reg>;
18
19 pci@1,0 {
20 status = "okay";
Stephen Warren44fefab2013-08-09 16:49:29 +020021 nvidia,num-lanes = <2>;
Thierry Redingbb034cb2013-08-09 16:49:28 +020022 };
23
24 pci@2,0 {
Stephen Warren44fefab2013-08-09 16:49:29 +020025 nvidia,num-lanes = <2>;
Thierry Redingbb034cb2013-08-09 16:49:28 +020026 };
27
28 pci@3,0 {
Stephen Warren44fefab2013-08-09 16:49:29 +020029 status = "okay";
30 nvidia,num-lanes = <2>;
Thierry Redingbb034cb2013-08-09 16:49:28 +020031 };
32 };
33
Thierry Reding9bd80b42013-08-12 17:49:03 +020034 host1x {
35 hdmi {
36 status = "okay";
37
38 vdd-supply = <&sys_3v3_reg>;
39 pll-supply = <&vio_reg>;
40
41 nvidia,hpd-gpio =
42 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
43 nvidia,ddc-i2c-bus = <&hdmiddc>;
44 };
45 };
46
Bryan Wud7df69f2013-01-02 15:53:51 -080047 pinmux {
48 pinctrl-names = "default";
49 pinctrl-0 = <&state_default>;
50
51 state_default: pinmux {
52 sdmmc1_clk_pz0 {
53 nvidia,pins = "sdmmc1_clk_pz0";
54 nvidia,function = "sdmmc1";
55 nvidia,pull = <0>;
56 nvidia,tristate = <0>;
57 };
58 sdmmc1_cmd_pz1 {
59 nvidia,pins = "sdmmc1_cmd_pz1",
60 "sdmmc1_dat0_py7",
61 "sdmmc1_dat1_py6",
62 "sdmmc1_dat2_py5",
63 "sdmmc1_dat3_py4";
64 nvidia,function = "sdmmc1";
65 nvidia,pull = <2>;
66 nvidia,tristate = <0>;
67 };
68 sdmmc3_clk_pa6 {
69 nvidia,pins = "sdmmc3_clk_pa6";
70 nvidia,function = "sdmmc3";
71 nvidia,pull = <0>;
72 nvidia,tristate = <0>;
73 };
74 sdmmc3_cmd_pa7 {
75 nvidia,pins = "sdmmc3_cmd_pa7",
76 "sdmmc3_dat0_pb7",
77 "sdmmc3_dat1_pb6",
78 "sdmmc3_dat2_pb5",
79 "sdmmc3_dat3_pb4";
80 nvidia,function = "sdmmc3";
81 nvidia,pull = <2>;
82 nvidia,tristate = <0>;
83 };
84 sdmmc4_clk_pcc4 {
85 nvidia,pins = "sdmmc4_clk_pcc4",
86 "sdmmc4_rst_n_pcc3";
87 nvidia,function = "sdmmc4";
88 nvidia,pull = <0>;
89 nvidia,tristate = <0>;
90 };
91 sdmmc4_dat0_paa0 {
92 nvidia,pins = "sdmmc4_dat0_paa0",
93 "sdmmc4_dat1_paa1",
94 "sdmmc4_dat2_paa2",
95 "sdmmc4_dat3_paa3",
96 "sdmmc4_dat4_paa4",
97 "sdmmc4_dat5_paa5",
98 "sdmmc4_dat6_paa6",
99 "sdmmc4_dat7_paa7";
100 nvidia,function = "sdmmc4";
101 nvidia,pull = <2>;
102 nvidia,tristate = <0>;
103 };
104 dap2_fs_pa2 {
105 nvidia,pins = "dap2_fs_pa2",
106 "dap2_sclk_pa3",
107 "dap2_din_pa4",
108 "dap2_dout_pa5";
109 nvidia,function = "i2s1";
110 nvidia,pull = <0>;
111 nvidia,tristate = <0>;
112 };
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300113 pex_l1_prsnt_n_pdd4 {
114 nvidia,pins = "pex_l1_prsnt_n_pdd4",
115 "pex_l1_clkreq_n_pdd6";
116 nvidia,pull = <2>;
117 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800118 sdio3 {
119 nvidia,pins = "drive_sdio3";
120 nvidia,high-speed-mode = <0>;
121 nvidia,schmitt = <0>;
122 nvidia,pull-down-strength = <46>;
123 nvidia,pull-up-strength = <42>;
124 nvidia,slew-rate-rising = <1>;
125 nvidia,slew-rate-falling = <1>;
126 };
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300127 gpv {
128 nvidia,pins = "drive_gpv";
129 nvidia,pull-up-strength = <16>;
130 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800131 };
132 };
133
134 serial@70006000 {
135 status = "okay";
Bryan Wud7df69f2013-01-02 15:53:51 -0800136 };
137
138 i2c@7000c000 {
139 status = "okay";
140 clock-frequency = <100000>;
141 };
142
143 i2c@7000c400 {
144 status = "okay";
145 clock-frequency = <100000>;
146 };
147
148 i2c@7000c500 {
149 status = "okay";
150 clock-frequency = <100000>;
151 };
152
Thierry Reding9bd80b42013-08-12 17:49:03 +0200153 hdmiddc: i2c@7000c700 {
Bryan Wud7df69f2013-01-02 15:53:51 -0800154 status = "okay";
155 clock-frequency = <100000>;
156 };
157
158 i2c@7000d000 {
159 status = "okay";
160 clock-frequency = <100000>;
161
Stephen Warren23037bb2013-03-27 16:53:20 -0600162 rt5640: rt5640 {
163 compatible = "realtek,rt5640";
164 reg = <0x1c>;
165 interrupt-parent = <&gpio>;
166 interrupts = <TEGRA_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
167 realtek,ldo1-en-gpios =
168 <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>;
169 };
170
Bryan Wud7df69f2013-01-02 15:53:51 -0800171 tps62361 {
172 compatible = "ti,tps62361";
173 reg = <0x60>;
174
175 regulator-name = "tps62361-vout";
176 regulator-min-microvolt = <500000>;
177 regulator-max-microvolt = <1500000>;
178 regulator-boot-on;
179 regulator-always-on;
180 ti,vsel0-state-high;
181 ti,vsel1-state-high;
182 };
183
184 pmic: tps65911@2d {
185 compatible = "ti,tps65911";
186 reg = <0x2d>;
187
Stephen Warren6cecf912013-02-13 12:51:51 -0700188 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800189 #interrupt-cells = <2>;
190 interrupt-controller;
191
192 ti,system-power-controller;
193
194 #gpio-cells = <2>;
195 gpio-controller;
196
197 vcc1-supply = <&vdd_5v_in_reg>;
198 vcc2-supply = <&vdd_5v_in_reg>;
199 vcc3-supply = <&vio_reg>;
200 vcc4-supply = <&vdd_5v_in_reg>;
201 vcc5-supply = <&vdd_5v_in_reg>;
202 vcc6-supply = <&vdd2_reg>;
203 vcc7-supply = <&vdd_5v_in_reg>;
204 vccio-supply = <&vdd_5v_in_reg>;
205
206 regulators {
207 #address-cells = <1>;
208 #size-cells = <0>;
209
210 vdd1_reg: vdd1 {
211 regulator-name = "vddio_ddr_1v2";
212 regulator-min-microvolt = <1200000>;
213 regulator-max-microvolt = <1200000>;
214 regulator-always-on;
215 };
216
217 vdd2_reg: vdd2 {
218 regulator-name = "vdd_1v5_gen";
219 regulator-min-microvolt = <1500000>;
220 regulator-max-microvolt = <1500000>;
221 regulator-always-on;
222 };
223
224 vddctrl_reg: vddctrl {
225 regulator-name = "vdd_cpu,vdd_sys";
226 regulator-min-microvolt = <1000000>;
227 regulator-max-microvolt = <1000000>;
228 regulator-always-on;
229 };
230
231 vio_reg: vio {
232 regulator-name = "vdd_1v8_gen";
233 regulator-min-microvolt = <1800000>;
234 regulator-max-microvolt = <1800000>;
235 regulator-always-on;
236 };
237
238 ldo1_reg: ldo1 {
239 regulator-name = "vdd_pexa,vdd_pexb";
240 regulator-min-microvolt = <1050000>;
241 regulator-max-microvolt = <1050000>;
242 };
243
244 ldo2_reg: ldo2 {
245 regulator-name = "vdd_sata,avdd_plle";
246 regulator-min-microvolt = <1050000>;
247 regulator-max-microvolt = <1050000>;
248 };
249
250 /* LDO3 is not connected to anything */
251
252 ldo4_reg: ldo4 {
253 regulator-name = "vdd_rtc";
254 regulator-min-microvolt = <1200000>;
255 regulator-max-microvolt = <1200000>;
256 regulator-always-on;
257 };
258
259 ldo5_reg: ldo5 {
260 regulator-name = "vddio_sdmmc,avdd_vdac";
261 regulator-min-microvolt = <3300000>;
262 regulator-max-microvolt = <3300000>;
263 regulator-always-on;
264 };
265
266 ldo6_reg: ldo6 {
267 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
268 regulator-min-microvolt = <1200000>;
269 regulator-max-microvolt = <1200000>;
270 };
271
272 ldo7_reg: ldo7 {
273 regulator-name = "vdd_pllm,x,u,a_p_c_s";
274 regulator-min-microvolt = <1200000>;
275 regulator-max-microvolt = <1200000>;
276 regulator-always-on;
277 };
278
279 ldo8_reg: ldo8 {
280 regulator-name = "vdd_ddr_hs";
281 regulator-min-microvolt = <1000000>;
282 regulator-max-microvolt = <1000000>;
283 regulator-always-on;
284 };
285 };
286 };
287 };
288
289 spi@7000da00 {
290 status = "okay";
291 spi-max-frequency = <25000000>;
292 spi-flash@1 {
293 compatible = "winbond,w25q32";
294 reg = <1>;
295 spi-max-frequency = <20000000>;
296 };
297 };
298
299 ahub {
300 i2s@70080400 {
301 status = "okay";
302 };
303 };
304
305 pmc {
306 status = "okay";
307 nvidia,invert-interrupt;
Joseph Lo47d2d632013-08-12 17:40:07 +0800308 nvidia,suspend-mode = <1>;
Joseph Loa44a0192013-04-03 19:31:52 +0800309 nvidia,cpu-pwr-good-time = <2000>;
310 nvidia,cpu-pwr-off-time = <200>;
311 nvidia,core-pwr-good-time = <3845 3845>;
312 nvidia,core-pwr-off-time = <0>;
313 nvidia,core-power-req-active-high;
314 nvidia,sys-clock-req-active-high;
Bryan Wud7df69f2013-01-02 15:53:51 -0800315 };
316
317 sdhci@78000000 {
318 status = "okay";
Stephen Warren3325f1b2013-02-12 17:25:15 -0700319 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
320 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
321 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800322 bus-width = <4>;
323 };
324
325 sdhci@78000600 {
326 status = "okay";
327 bus-width = <8>;
Joseph Lo7a2617a2013-04-03 14:34:39 -0600328 non-removable;
Bryan Wud7df69f2013-01-02 15:53:51 -0800329 };
330
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300331 usb@7d008000 {
332 status = "okay";
333 };
334
335 usb-phy@7d008000 {
336 vbus-supply = <&usb3_vbus_reg>;
337 status = "okay";
338 };
339
Joseph Lo7021d122013-04-03 19:31:27 +0800340 clocks {
341 compatible = "simple-bus";
342 #address-cells = <1>;
343 #size-cells = <0>;
344
345 clk32k_in: clock {
346 compatible = "fixed-clock";
347 reg=<0>;
348 #clock-cells = <0>;
349 clock-frequency = <32768>;
350 };
351 };
352
Bryan Wud7df69f2013-01-02 15:53:51 -0800353 regulators {
354 compatible = "simple-bus";
355 #address-cells = <1>;
356 #size-cells = <0>;
357
358 vdd_5v_in_reg: regulator@0 {
359 compatible = "regulator-fixed";
360 reg = <0>;
361 regulator-name = "vdd_5v_in";
362 regulator-min-microvolt = <5000000>;
363 regulator-max-microvolt = <5000000>;
364 regulator-always-on;
365 };
366
367 chargepump_5v_reg: regulator@1 {
368 compatible = "regulator-fixed";
369 reg = <1>;
370 regulator-name = "chargepump_5v";
371 regulator-min-microvolt = <5000000>;
372 regulator-max-microvolt = <5000000>;
373 regulator-boot-on;
374 regulator-always-on;
375 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700376 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800377 };
378
379 ddr_reg: regulator@2 {
380 compatible = "regulator-fixed";
381 reg = <2>;
382 regulator-name = "vdd_ddr";
383 regulator-min-microvolt = <1500000>;
384 regulator-max-microvolt = <1500000>;
385 regulator-always-on;
386 regulator-boot-on;
387 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700388 gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800389 vin-supply = <&vdd_5v_in_reg>;
390 };
391
392 vdd_5v_sata_reg: regulator@3 {
393 compatible = "regulator-fixed";
394 reg = <3>;
395 regulator-name = "vdd_5v_sata";
396 regulator-min-microvolt = <5000000>;
397 regulator-max-microvolt = <5000000>;
398 regulator-always-on;
399 regulator-boot-on;
400 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700401 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800402 vin-supply = <&vdd_5v_in_reg>;
403 };
404
405 usb1_vbus_reg: regulator@4 {
406 compatible = "regulator-fixed";
407 reg = <4>;
408 regulator-name = "usb1_vbus";
409 regulator-min-microvolt = <5000000>;
410 regulator-max-microvolt = <5000000>;
411 enable-active-high;
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300412 gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800413 gpio-open-drain;
414 vin-supply = <&vdd_5v_in_reg>;
415 };
416
417 usb3_vbus_reg: regulator@5 {
418 compatible = "regulator-fixed";
419 reg = <5>;
420 regulator-name = "usb3_vbus";
421 regulator-min-microvolt = <5000000>;
422 regulator-max-microvolt = <5000000>;
423 enable-active-high;
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300424 gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800425 gpio-open-drain;
426 vin-supply = <&vdd_5v_in_reg>;
427 };
428
429 sys_3v3_reg: regulator@6 {
430 compatible = "regulator-fixed";
431 reg = <6>;
432 regulator-name = "sys_3v3,vdd_3v3_alw";
433 regulator-min-microvolt = <3300000>;
434 regulator-max-microvolt = <3300000>;
435 regulator-always-on;
436 regulator-boot-on;
437 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700438 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800439 vin-supply = <&vdd_5v_in_reg>;
440 };
441
442 sys_3v3_pexs_reg: regulator@7 {
443 compatible = "regulator-fixed";
444 reg = <7>;
445 regulator-name = "sys_3v3_pexs";
446 regulator-min-microvolt = <3300000>;
447 regulator-max-microvolt = <3300000>;
448 regulator-always-on;
449 regulator-boot-on;
450 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700451 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800452 vin-supply = <&sys_3v3_reg>;
453 };
454 };
Eric Browerb4dd3e02013-05-10 14:40:29 +0000455
456 gpio-leds {
457 compatible = "gpio-leds";
458
459 gpled1 {
460 label = "LED1"; /* CR5A1 (blue) */
Stephen Warren3325f1b2013-02-12 17:25:15 -0700461 gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>;
Eric Browerb4dd3e02013-05-10 14:40:29 +0000462 };
463 gpled2 {
464 label = "LED2"; /* CR4A2 (green) */
Stephen Warren3325f1b2013-02-12 17:25:15 -0700465 gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>;
Eric Browerb4dd3e02013-05-10 14:40:29 +0000466 };
467 };
Stephen Warren23037bb2013-03-27 16:53:20 -0600468
469 sound {
470 compatible = "nvidia,tegra-audio-rt5640-beaver",
471 "nvidia,tegra-audio-rt5640";
472 nvidia,model = "NVIDIA Tegra Beaver";
473
474 nvidia,audio-routing =
475 "Headphones", "HPOR",
Stephen Warrenac472282013-08-14 13:54:24 -0600476 "Headphones", "HPOL",
477 "Mic Jack", "MICBIAS1",
478 "IN2P", "Mic Jack";
Stephen Warren23037bb2013-03-27 16:53:20 -0600479
480 nvidia,i2s-controller = <&tegra_i2s1>;
481 nvidia,audio-codec = <&rt5640>;
482
483 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
484
485 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
486 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
487 <&tegra_car TEGRA30_CLK_EXTERN1>;
488 clock-names = "pll_a", "pll_a_out0", "mclk";
489 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800490};