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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 SMBus driver for nVidia nForce2 MCP
3
4 Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
5 Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
6 Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
7 Based on
8 SMBus 2.0 driver for AMD-8111 IO-Hub
9 Copyright (c) 2002 Vojtech Pavlik
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24*/
25
26/*
27 SUPPORTED DEVICES PCI ID
28 nForce2 MCP 0064
29 nForce2 Ultra 400 MCP 0084
30 nForce3 Pro150 MCP 00D4
31 nForce3 250Gb MCP 00E4
32 nForce4 MCP 0052
33
34 This driver supports the 2 SMBuses that are included in the MCP of the
35 nForce2/3/4 chipsets.
36*/
37
38/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
39
40#include <linux/config.h>
41#include <linux/module.h>
42#include <linux/pci.h>
43#include <linux/kernel.h>
44#include <linux/stddef.h>
45#include <linux/sched.h>
46#include <linux/ioport.h>
47#include <linux/init.h>
48#include <linux/i2c.h>
49#include <linux/delay.h>
50#include <asm/io.h>
51
52MODULE_LICENSE("GPL");
53MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@arcor.de>");
54MODULE_DESCRIPTION("nForce2 SMBus driver");
55
56
57struct nforce2_smbus {
58 struct pci_dev *dev;
59 struct i2c_adapter adapter;
60 int base;
61 int size;
62};
63
64
65/*
66 * nVidia nForce2 SMBus control register definitions
67 */
68#define NFORCE_PCI_SMB1 0x50
69#define NFORCE_PCI_SMB2 0x54
70
71
72/*
73 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
74 */
75#define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
76#define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
77#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
78#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
79#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
80#define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data bytes */
81#define NVIDIA_SMB_ALRM_A (smbus->base + 0x25) /* alarm address */
82#define NVIDIA_SMB_ALRM_D (smbus->base + 0x26) /* 2 bytes alarm data */
83
84#define NVIDIA_SMB_STS_DONE 0x80
85#define NVIDIA_SMB_STS_ALRM 0x40
86#define NVIDIA_SMB_STS_RES 0x20
87#define NVIDIA_SMB_STS_STATUS 0x1f
88
89#define NVIDIA_SMB_PRTCL_WRITE 0x00
90#define NVIDIA_SMB_PRTCL_READ 0x01
91#define NVIDIA_SMB_PRTCL_QUICK 0x02
92#define NVIDIA_SMB_PRTCL_BYTE 0x04
93#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
94#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
95#define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
96#define NVIDIA_SMB_PRTCL_PROC_CALL 0x0c
97#define NVIDIA_SMB_PRTCL_BLOCK_PROC_CALL 0x0d
98#define NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA 0x4a
99#define NVIDIA_SMB_PRTCL_PEC 0x80
100
101
102/* Other settings */
103#define MAX_TIMEOUT 256
104
105
106
107static s32 nforce2_access(struct i2c_adapter *adap, u16 addr,
108 unsigned short flags, char read_write,
109 u8 command, int size, union i2c_smbus_data *data);
110static u32 nforce2_func(struct i2c_adapter *adapter);
111
112
113static struct i2c_algorithm smbus_algorithm = {
114 .name = "Non-I2C SMBus adapter",
115 .id = I2C_ALGO_SMBUS,
116 .smbus_xfer = nforce2_access,
117 .functionality = nforce2_func,
118};
119
120static struct i2c_adapter nforce2_adapter = {
121 .owner = THIS_MODULE,
122 .class = I2C_CLASS_HWMON,
123 .algo = &smbus_algorithm,
124 .name = "unset",
125};
126
127/* Return -1 on error. See smbus.h for more information */
128static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
129 unsigned short flags, char read_write,
130 u8 command, int size, union i2c_smbus_data * data)
131{
132 struct nforce2_smbus *smbus = adap->algo_data;
133 unsigned char protocol, pec, temp;
134 unsigned char len = 0; /* to keep the compiler quiet */
135 int timeout = 0;
136 int i;
137
138 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
139 NVIDIA_SMB_PRTCL_WRITE;
140 pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
141
142 switch (size) {
143
144 case I2C_SMBUS_QUICK:
145 protocol |= NVIDIA_SMB_PRTCL_QUICK;
146 read_write = I2C_SMBUS_WRITE;
147 break;
148
149 case I2C_SMBUS_BYTE:
150 if (read_write == I2C_SMBUS_WRITE)
151 outb_p(command, NVIDIA_SMB_CMD);
152 protocol |= NVIDIA_SMB_PRTCL_BYTE;
153 break;
154
155 case I2C_SMBUS_BYTE_DATA:
156 outb_p(command, NVIDIA_SMB_CMD);
157 if (read_write == I2C_SMBUS_WRITE)
158 outb_p(data->byte, NVIDIA_SMB_DATA);
159 protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
160 break;
161
162 case I2C_SMBUS_WORD_DATA:
163 outb_p(command, NVIDIA_SMB_CMD);
164 if (read_write == I2C_SMBUS_WRITE) {
165 outb_p(data->word, NVIDIA_SMB_DATA);
166 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
167 }
168 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
169 break;
170
171 case I2C_SMBUS_BLOCK_DATA:
172 outb_p(command, NVIDIA_SMB_CMD);
173 if (read_write == I2C_SMBUS_WRITE) {
174 len = min_t(u8, data->block[0], 32);
175 outb_p(len, NVIDIA_SMB_BCNT);
176 for (i = 0; i < len; i++)
177 outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i);
178 }
179 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
180 break;
181
182 case I2C_SMBUS_I2C_BLOCK_DATA:
183 len = min_t(u8, data->block[0], 32);
184 outb_p(command, NVIDIA_SMB_CMD);
185 outb_p(len, NVIDIA_SMB_BCNT);
186 if (read_write == I2C_SMBUS_WRITE)
187 for (i = 0; i < len; i++)
188 outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i);
189 protocol |= NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA;
190 break;
191
192 case I2C_SMBUS_PROC_CALL:
193 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
194 return -1;
195 /*
196 outb_p(command, NVIDIA_SMB_CMD);
197 outb_p(data->word, NVIDIA_SMB_DATA);
198 outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1);
199 protocol = NVIDIA_SMB_PRTCL_PROC_CALL | pec;
200 read_write = I2C_SMBUS_READ;
201 break;
202 */
203
204 case I2C_SMBUS_BLOCK_PROC_CALL:
205 dev_err(&adap->dev, "I2C_SMBUS_BLOCK_PROC_CALL not supported!\n");
206 return -1;
207 /*
208 protocol |= pec;
209 len = min_t(u8, data->block[0], 31);
210 outb_p(command, NVIDIA_SMB_CMD);
211 outb_p(len, NVIDIA_SMB_BCNT);
212 for (i = 0; i < len; i++)
213 outb_p(data->block[i + 1], NVIDIA_SMB_DATA + i);
214 protocol = NVIDIA_SMB_PRTCL_BLOCK_PROC_CALL | pec;
215 read_write = I2C_SMBUS_READ;
216 break;
217 */
218
219 case I2C_SMBUS_WORD_DATA_PEC:
220 case I2C_SMBUS_BLOCK_DATA_PEC:
221 case I2C_SMBUS_PROC_CALL_PEC:
222 case I2C_SMBUS_BLOCK_PROC_CALL_PEC:
223 dev_err(&adap->dev, "Unexpected software PEC transaction %d\n.", size);
224 return -1;
225
226 default:
227 dev_err(&adap->dev, "Unsupported transaction %d\n", size);
228 return -1;
229 }
230
231 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
232 outb_p(protocol, NVIDIA_SMB_PRTCL);
233
234 temp = inb_p(NVIDIA_SMB_STS);
235
236#if 0
237 do {
238 i2c_do_pause(1);
239 temp = inb_p(NVIDIA_SMB_STS);
240 } while (((temp & NVIDIA_SMB_STS_DONE) == 0) && (timeout++ < MAX_TIMEOUT));
241#endif
242 if (~temp & NVIDIA_SMB_STS_DONE) {
243 udelay(500);
244 temp = inb_p(NVIDIA_SMB_STS);
245 }
246 if (~temp & NVIDIA_SMB_STS_DONE) {
247 msleep(10);
248 temp = inb_p(NVIDIA_SMB_STS);
249 }
250
251 if ((timeout >= MAX_TIMEOUT) || (~temp & NVIDIA_SMB_STS_DONE)
252 || (temp & NVIDIA_SMB_STS_STATUS))
253 return -1;
254
255 if (read_write == I2C_SMBUS_WRITE)
256 return 0;
257
258 switch (size) {
259
260 case I2C_SMBUS_BYTE:
261 case I2C_SMBUS_BYTE_DATA:
262 data->byte = inb_p(NVIDIA_SMB_DATA);
263 break;
264
265 case I2C_SMBUS_WORD_DATA:
266 /* case I2C_SMBUS_PROC_CALL: not supported */
267 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
268 break;
269
270 case I2C_SMBUS_BLOCK_DATA:
271 /* case I2C_SMBUS_BLOCK_PROC_CALL: not supported */
272 len = inb_p(NVIDIA_SMB_BCNT);
273 len = min_t(u8, len, 32);
274 case I2C_SMBUS_I2C_BLOCK_DATA:
275 for (i = 0; i < len; i++)
276 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
277 data->block[0] = len;
278 break;
279 }
280
281 return 0;
282}
283
284
285static u32 nforce2_func(struct i2c_adapter *adapter)
286{
287 /* other functionality might be possible, but is not tested */
288 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
289 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA /* |
290 I2C_FUNC_SMBUS_BLOCK_DATA */;
291}
292
293
294static struct pci_device_id nforce2_ids[] = {
295 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
296 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
297 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
298 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
299 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
300 { 0 }
301};
302
303
304MODULE_DEVICE_TABLE (pci, nforce2_ids);
305
306
307static int __devinit nforce2_probe_smb (struct pci_dev *dev, int reg,
308 struct nforce2_smbus *smbus, char *name)
309{
310 u16 iobase;
311 int error;
312
313 if (pci_read_config_word(dev, reg, &iobase) != PCIBIOS_SUCCESSFUL) {
314 dev_err(&smbus->adapter.dev, "Error reading PCI config for %s\n", name);
315 return -1;
316 }
317 smbus->dev = dev;
318 smbus->base = iobase & 0xfffc;
319 smbus->size = 8;
320
321 if (!request_region(smbus->base, smbus->size, "nForce2 SMBus")) {
322 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
323 smbus->base, smbus->base+smbus->size-1, name);
324 return -1;
325 }
326 smbus->adapter = nforce2_adapter;
327 smbus->adapter.algo_data = smbus;
328 smbus->adapter.dev.parent = &dev->dev;
329 snprintf(smbus->adapter.name, I2C_NAME_SIZE,
330 "SMBus nForce2 adapter at %04x", smbus->base);
331
332 error = i2c_add_adapter(&smbus->adapter);
333 if (error) {
334 dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
335 release_region(smbus->base, smbus->size);
336 return -1;
337 }
338 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
339 return 0;
340}
341
342
343static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
344{
345 struct nforce2_smbus *smbuses;
346 int res1, res2;
347
348 /* we support 2 SMBus adapters */
349 if (!(smbuses = (void *)kmalloc(2*sizeof(struct nforce2_smbus),
350 GFP_KERNEL)))
351 return -ENOMEM;
352 memset (smbuses, 0, 2*sizeof(struct nforce2_smbus));
353 pci_set_drvdata(dev, smbuses);
354
355 /* SMBus adapter 1 */
356 res1 = nforce2_probe_smb (dev, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
357 if (res1 < 0) {
358 dev_err(&dev->dev, "Error probing SMB1.\n");
359 smbuses[0].base = 0; /* to have a check value */
360 }
361 res2 = nforce2_probe_smb (dev, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
362 if (res2 < 0) {
363 dev_err(&dev->dev, "Error probing SMB2.\n");
364 smbuses[1].base = 0; /* to have a check value */
365 }
366 if ((res1 < 0) && (res2 < 0)) {
367 /* we did not find even one of the SMBuses, so we give up */
368 kfree(smbuses);
369 return -ENODEV;
370 }
371
372 return 0;
373}
374
375
376static void __devexit nforce2_remove(struct pci_dev *dev)
377{
378 struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);
379
380 if (smbuses[0].base) {
381 i2c_del_adapter(&smbuses[0].adapter);
382 release_region(smbuses[0].base, smbuses[0].size);
383 }
384 if (smbuses[1].base) {
385 i2c_del_adapter(&smbuses[1].adapter);
386 release_region(smbuses[1].base, smbuses[1].size);
387 }
388 kfree(smbuses);
389}
390
391static struct pci_driver nforce2_driver = {
392 .name = "nForce2_smbus",
393 .id_table = nforce2_ids,
394 .probe = nforce2_probe,
395 .remove = __devexit_p(nforce2_remove),
396};
397
398static int __init nforce2_init(void)
399{
400 return pci_register_driver(&nforce2_driver);
401}
402
403static void __exit nforce2_exit(void)
404{
405 pci_unregister_driver(&nforce2_driver);
406}
407
408module_init(nforce2_init);
409module_exit(nforce2_exit);
410