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Clemens Ladisch65c3ac82009-09-28 11:11:27 +02001/*
2 * card driver for models with CS4398/CS4362A DACs (Xonar D1/DX)
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
9 *
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, see <http://www.gnu.org/licenses/>.
17 */
18
19/*
20 * Xonar D1/DX
21 * -----------
22 *
23 * CMI8788:
24 *
Clemens Ladischde664932010-12-02 11:42:48 +010025 * I²C <-> CS4398 (addr 1001111) (front)
26 * <-> CS4362A (addr 0011000) (surround, center/LFE, back)
Clemens Ladisch65c3ac82009-09-28 11:11:27 +020027 *
Clemens Ladischde664932010-12-02 11:42:48 +010028 * GPI 0 <- external power present (DX only)
Clemens Ladisch65c3ac82009-09-28 11:11:27 +020029 *
Clemens Ladischde664932010-12-02 11:42:48 +010030 * GPIO 0 -> enable output to speakers
31 * GPIO 1 -> route output to front panel
32 * GPIO 2 -> M0 of CS5361
33 * GPIO 3 -> M1 of CS5361
34 * GPIO 6 -> ?
35 * GPIO 7 -> ?
36 * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
Clemens Ladischdc0adf42009-09-28 11:17:36 +020037 *
38 * CM9780:
39 *
Clemens Ladischde664932010-12-02 11:42:48 +010040 * LINE_OUT -> input of ADC
41 *
42 * AUX_IN <- aux
43 * MIC_IN <- mic
44 * FMIC_IN <- front mic
45 *
46 * GPO 0 -> route line-in (0) or AC97 output (1) to CS5361 input
Clemens Ladisch65c3ac82009-09-28 11:11:27 +020047 */
48
49#include <linux/pci.h>
50#include <linux/delay.h>
51#include <sound/ac97_codec.h>
52#include <sound/control.h>
53#include <sound/core.h>
54#include <sound/pcm.h>
55#include <sound/pcm_params.h>
56#include <sound/tlv.h>
57#include "xonar.h"
Clemens Ladisch6a45f782010-05-11 16:34:39 +020058#include "cm9780.h"
Clemens Ladisch65c3ac82009-09-28 11:11:27 +020059#include "cs4398.h"
60#include "cs4362a.h"
61
62#define GPI_EXT_POWER 0x01
63#define GPIO_D1_OUTPUT_ENABLE 0x0001
64#define GPIO_D1_FRONT_PANEL 0x0002
Clemens Ladischf7e4bad2010-12-02 11:36:51 +010065#define GPIO_D1_MAGIC 0x00c0
Clemens Ladisch65c3ac82009-09-28 11:11:27 +020066#define GPIO_D1_INPUT_ROUTE 0x0100
67
68#define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */
69#define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */
70
71struct xonar_cs43xx {
72 struct xonar_generic generic;
Clemens Ladisch4852ad02009-09-28 11:21:21 +020073 u8 cs4398_regs[8];
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +020074 u8 cs4362a_regs[15];
Clemens Ladisch65c3ac82009-09-28 11:11:27 +020075};
76
77static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
78{
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +020079 struct xonar_cs43xx *data = chip->model_data;
80
Clemens Ladisch65c3ac82009-09-28 11:11:27 +020081 oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +020082 if (reg < ARRAY_SIZE(data->cs4398_regs))
83 data->cs4398_regs[reg] = value;
84}
85
86static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value)
87{
88 struct xonar_cs43xx *data = chip->model_data;
89
90 if (value != data->cs4398_regs[reg])
91 cs4398_write(chip, reg, value);
Clemens Ladisch65c3ac82009-09-28 11:11:27 +020092}
93
94static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
95{
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +020096 struct xonar_cs43xx *data = chip->model_data;
97
Clemens Ladisch65c3ac82009-09-28 11:11:27 +020098 oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +020099 if (reg < ARRAY_SIZE(data->cs4362a_regs))
100 data->cs4362a_regs[reg] = value;
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200101}
102
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200103static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value)
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200104{
105 struct xonar_cs43xx *data = chip->model_data;
106
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200107 if (value != data->cs4362a_regs[reg])
108 cs4362a_write(chip, reg, value);
109}
110
111static void cs43xx_registers_init(struct oxygen *chip)
112{
113 struct xonar_cs43xx *data = chip->model_data;
114 unsigned int i;
115
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200116 /* set CPEN (control port mode) and power down */
117 cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
118 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
119 /* configure */
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200120 cs4398_write(chip, 2, data->cs4398_regs[2]);
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200121 cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200122 cs4398_write(chip, 4, data->cs4398_regs[4]);
123 cs4398_write(chip, 5, data->cs4398_regs[5]);
124 cs4398_write(chip, 6, data->cs4398_regs[6]);
Clemens Ladisch4852ad02009-09-28 11:21:21 +0200125 cs4398_write(chip, 7, data->cs4398_regs[7]);
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200126 cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
127 cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
128 CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
Clemens Ladisch4852ad02009-09-28 11:21:21 +0200129 cs4362a_write(chip, 0x04, data->cs4362a_regs[0x04]);
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200130 cs4362a_write(chip, 0x05, 0);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200131 for (i = 6; i <= 14; ++i)
132 cs4362a_write(chip, i, data->cs4362a_regs[i]);
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200133 /* clear power down */
134 cs4398_write(chip, 8, CS4398_CPEN);
135 cs4362a_write(chip, 0x01, CS4362A_CPEN);
136}
137
138static void xonar_d1_init(struct oxygen *chip)
139{
140 struct xonar_cs43xx *data = chip->model_data;
141
142 data->generic.anti_pop_delay = 800;
143 data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE;
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200144 data->cs4398_regs[2] =
145 CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
146 data->cs4398_regs[4] = CS4398_MUTEP_LOW |
147 CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE;
148 data->cs4398_regs[5] = 60 * 2;
149 data->cs4398_regs[6] = 60 * 2;
Clemens Ladisch4852ad02009-09-28 11:21:21 +0200150 data->cs4398_regs[7] = CS4398_RMP_DN | CS4398_RMP_UP |
151 CS4398_ZERO_CROSS | CS4398_SOFT_RAMP;
152 data->cs4362a_regs[4] = CS4362A_RMP_DN | CS4362A_DEM_NONE;
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200153 data->cs4362a_regs[6] = CS4362A_FM_SINGLE |
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200154 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200155 data->cs4362a_regs[7] = 60 | CS4362A_MUTE;
156 data->cs4362a_regs[8] = 60 | CS4362A_MUTE;
157 data->cs4362a_regs[9] = data->cs4362a_regs[6];
158 data->cs4362a_regs[10] = 60 | CS4362A_MUTE;
159 data->cs4362a_regs[11] = 60 | CS4362A_MUTE;
160 data->cs4362a_regs[12] = data->cs4362a_regs[6];
161 data->cs4362a_regs[13] = 60 | CS4362A_MUTE;
162 data->cs4362a_regs[14] = 60 | CS4362A_MUTE;
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200163
164 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
165 OXYGEN_2WIRE_LENGTH_8 |
166 OXYGEN_2WIRE_INTERRUPT_MASK |
167 OXYGEN_2WIRE_SPEED_FAST);
168
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200169 cs43xx_registers_init(chip);
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200170
171 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
Clemens Ladischf7e4bad2010-12-02 11:36:51 +0100172 GPIO_D1_FRONT_PANEL |
173 GPIO_D1_MAGIC |
174 GPIO_D1_INPUT_ROUTE);
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200175 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
176 GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
177
178 xonar_init_cs53x1(chip);
179 xonar_enable_output(chip);
180
181 snd_component_add(chip->card, "CS4398");
182 snd_component_add(chip->card, "CS4362A");
183 snd_component_add(chip->card, "CS5361");
184}
185
186static void xonar_dx_init(struct oxygen *chip)
187{
188 struct xonar_cs43xx *data = chip->model_data;
189
190 data->generic.ext_power_reg = OXYGEN_GPI_DATA;
191 data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
192 data->generic.ext_power_bit = GPI_EXT_POWER;
193 xonar_init_ext_power(chip);
194 xonar_d1_init(chip);
195}
196
197static void xonar_d1_cleanup(struct oxygen *chip)
198{
199 xonar_disable_output(chip);
200 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
201 oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
202}
203
204static void xonar_d1_suspend(struct oxygen *chip)
205{
206 xonar_d1_cleanup(chip);
207}
208
209static void xonar_d1_resume(struct oxygen *chip)
210{
211 oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
212 msleep(1);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200213 cs43xx_registers_init(chip);
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200214 xonar_enable_output(chip);
215}
216
217static void set_cs43xx_params(struct oxygen *chip,
218 struct snd_pcm_hw_params *params)
219{
220 struct xonar_cs43xx *data = chip->model_data;
Clemens Ladisch3d8bb452009-09-28 11:16:41 +0200221 u8 cs4398_fm, cs4362a_fm;
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200222
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200223 if (params_rate(params) <= 50000) {
Clemens Ladisch3d8bb452009-09-28 11:16:41 +0200224 cs4398_fm = CS4398_FM_SINGLE;
225 cs4362a_fm = CS4362A_FM_SINGLE;
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200226 } else if (params_rate(params) <= 100000) {
Clemens Ladisch3d8bb452009-09-28 11:16:41 +0200227 cs4398_fm = CS4398_FM_DOUBLE;
228 cs4362a_fm = CS4362A_FM_DOUBLE;
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200229 } else {
Clemens Ladisch3d8bb452009-09-28 11:16:41 +0200230 cs4398_fm = CS4398_FM_QUAD;
231 cs4362a_fm = CS4362A_FM_QUAD;
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200232 }
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200233 cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST;
234 cs4398_write_cached(chip, 2, cs4398_fm);
235 cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK;
236 cs4362a_write_cached(chip, 6, cs4362a_fm);
237 cs4362a_write_cached(chip, 12, cs4362a_fm);
238 cs4362a_fm &= CS4362A_FM_MASK;
239 cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK;
240 cs4362a_write_cached(chip, 9, cs4362a_fm);
241}
242
243static void update_cs4362a_volumes(struct oxygen *chip)
244{
245 unsigned int i;
246 u8 mute;
247
248 mute = chip->dac_mute ? CS4362A_MUTE : 0;
249 for (i = 0; i < 6; ++i)
250 cs4362a_write_cached(chip, 7 + i + i / 2,
251 (127 - chip->dac_volume[2 + i]) | mute);
252}
253
254static void update_cs43xx_volume(struct oxygen *chip)
255{
256 cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2);
257 cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2);
258 update_cs4362a_volumes(chip);
259}
260
261static void update_cs43xx_mute(struct oxygen *chip)
262{
263 u8 reg;
264
265 reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
266 if (chip->dac_mute)
267 reg |= CS4398_MUTE_B | CS4398_MUTE_A;
268 cs4398_write_cached(chip, 4, reg);
269 update_cs4362a_volumes(chip);
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200270}
271
Clemens Ladisch3d8bb452009-09-28 11:16:41 +0200272static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed)
273{
274 struct xonar_cs43xx *data = chip->model_data;
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200275 u8 reg;
Clemens Ladisch3d8bb452009-09-28 11:16:41 +0200276
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200277 reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK;
Clemens Ladisch3d8bb452009-09-28 11:16:41 +0200278 if (mixed)
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200279 reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR;
Clemens Ladisch3d8bb452009-09-28 11:16:41 +0200280 else
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200281 reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
282 cs4362a_write_cached(chip, 9, reg);
Clemens Ladisch3d8bb452009-09-28 11:16:41 +0200283}
284
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200285static const struct snd_kcontrol_new front_panel_switch = {
286 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
Clemens Ladische96f38f2010-12-02 11:39:34 +0100287 .name = "Front Panel Playback Switch",
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200288 .info = snd_ctl_boolean_mono_info,
289 .get = xonar_gpio_bit_switch_get,
290 .put = xonar_gpio_bit_switch_put,
291 .private_value = GPIO_D1_FRONT_PANEL,
292};
293
Clemens Ladisch4852ad02009-09-28 11:21:21 +0200294static int rolloff_info(struct snd_kcontrol *ctl,
295 struct snd_ctl_elem_info *info)
296{
297 static const char *const names[2] = {
298 "Fast Roll-off", "Slow Roll-off"
299 };
300
301 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
302 info->count = 1;
303 info->value.enumerated.items = 2;
304 if (info->value.enumerated.item >= 2)
305 info->value.enumerated.item = 1;
306 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
307 return 0;
308}
309
310static int rolloff_get(struct snd_kcontrol *ctl,
311 struct snd_ctl_elem_value *value)
312{
313 struct oxygen *chip = ctl->private_data;
314 struct xonar_cs43xx *data = chip->model_data;
315
316 value->value.enumerated.item[0] =
317 (data->cs4398_regs[7] & CS4398_FILT_SEL) != 0;
318 return 0;
319}
320
321static int rolloff_put(struct snd_kcontrol *ctl,
322 struct snd_ctl_elem_value *value)
323{
324 struct oxygen *chip = ctl->private_data;
325 struct xonar_cs43xx *data = chip->model_data;
326 int changed;
327 u8 reg;
328
329 mutex_lock(&chip->mutex);
330 reg = data->cs4398_regs[7];
331 if (value->value.enumerated.item[0])
332 reg |= CS4398_FILT_SEL;
333 else
334 reg &= ~CS4398_FILT_SEL;
335 changed = reg != data->cs4398_regs[7];
336 if (changed) {
337 cs4398_write(chip, 7, reg);
338 if (reg & CS4398_FILT_SEL)
339 reg = data->cs4362a_regs[0x04] | CS4362A_FILT_SEL;
340 else
341 reg = data->cs4362a_regs[0x04] & ~CS4362A_FILT_SEL;
342 cs4362a_write(chip, 0x04, reg);
343 }
344 mutex_unlock(&chip->mutex);
345 return changed;
346}
347
348static const struct snd_kcontrol_new rolloff_control = {
349 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
350 .name = "DAC Filter Playback Enum",
351 .info = rolloff_info,
352 .get = rolloff_get,
353 .put = rolloff_put,
354};
355
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200356static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip,
357 unsigned int reg, unsigned int mute)
358{
359 if (reg == AC97_LINE) {
360 spin_lock_irq(&chip->reg_lock);
361 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
362 mute ? GPIO_D1_INPUT_ROUTE : 0,
363 GPIO_D1_INPUT_ROUTE);
364 spin_unlock_irq(&chip->reg_lock);
365 }
366}
367
368static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
369
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200370static int xonar_d1_mixer_init(struct oxygen *chip)
371{
Clemens Ladisch4852ad02009-09-28 11:21:21 +0200372 int err;
373
374 err = snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
375 if (err < 0)
376 return err;
377 err = snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
378 if (err < 0)
379 return err;
380 return 0;
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200381}
382
Clemens Ladisch9719fca2010-12-02 11:41:10 +0100383static void dump_cs4362a_registers(struct xonar_cs43xx *data,
384 struct snd_info_buffer *buffer)
385{
386 unsigned int i;
387
388 snd_iprintf(buffer, "\nCS4362A:");
389 for (i = 1; i <= 14; ++i)
390 snd_iprintf(buffer, " %02x", data->cs4362a_regs[i]);
391 snd_iprintf(buffer, "\n");
392}
393
394static void dump_d1_registers(struct oxygen *chip,
395 struct snd_info_buffer *buffer)
396{
397 struct xonar_cs43xx *data = chip->model_data;
398 unsigned int i;
399
400 snd_iprintf(buffer, "\nCS4398: 7?");
401 for (i = 2; i <= 8; ++i)
402 snd_iprintf(buffer, " %02x", data->cs4398_regs[i]);
403 snd_iprintf(buffer, "\n");
404 dump_cs4362a_registers(data, buffer);
405}
406
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200407static const struct oxygen_model model_xonar_d1 = {
408 .longname = "Asus Virtuoso 100",
409 .chip = "AV200",
410 .init = xonar_d1_init,
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200411 .mixer_init = xonar_d1_mixer_init,
412 .cleanup = xonar_d1_cleanup,
413 .suspend = xonar_d1_suspend,
414 .resume = xonar_d1_resume,
Clemens Ladisch76ffe1e2009-09-28 11:20:11 +0200415 .get_i2s_mclk = oxygen_default_i2s_mclk,
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200416 .set_dac_params = set_cs43xx_params,
417 .set_adc_params = xonar_set_cs53x1_params,
418 .update_dac_volume = update_cs43xx_volume,
419 .update_dac_mute = update_cs43xx_mute,
Clemens Ladisch3d8bb452009-09-28 11:16:41 +0200420 .update_center_lfe_mix = update_cs43xx_center_lfe_mix,
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200421 .ac97_switch = xonar_d1_line_mic_ac97_switch,
Clemens Ladisch9719fca2010-12-02 11:41:10 +0100422 .dump_registers = dump_d1_registers,
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200423 .dac_tlv = cs4362a_db_scale,
424 .model_data_size = sizeof(struct xonar_cs43xx),
425 .device_config = PLAYBACK_0_TO_I2S |
426 PLAYBACK_1_TO_SPDIF |
Clemens Ladische96f38f2010-12-02 11:39:34 +0100427 CAPTURE_0_FROM_I2S_2 |
428 AC97_FMIC_SWITCH,
Clemens Ladisch1f4d7be2011-01-10 15:59:38 +0100429 .dac_channels_pcm = 8,
430 .dac_channels_mixer = 8,
Clemens Ladisch65c3ac82009-09-28 11:11:27 +0200431 .dac_volume_min = 127 - 60,
432 .dac_volume_max = 127,
433 .function_flags = OXYGEN_FUNCTION_2WIRE,
434 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
435 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
436};
437
438int __devinit get_xonar_cs43xx_model(struct oxygen *chip,
439 const struct pci_device_id *id)
440{
441 switch (id->subdevice) {
442 case 0x834f:
443 chip->model = model_xonar_d1;
444 chip->model.shortname = "Xonar D1";
445 break;
446 case 0x8275:
447 case 0x8327:
448 chip->model = model_xonar_d1;
449 chip->model.shortname = "Xonar DX";
450 chip->model.init = xonar_dx_init;
451 break;
452 default:
453 return -EINVAL;
454 }
455 return 0;
456}