Rohit kumar | 75f5ed2 | 2017-11-21 18:21:03 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. |
Channagoud Kadabi | de5a121 | 2017-01-20 15:27:51 -0800 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | &soc { |
Channagoud Kadabi | eb7f011 | 2017-04-03 20:39:27 -0700 | [diff] [blame] | 14 | tlmm: pinctrl@03400000 { |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 15 | compatible = "qcom,sdm670-pinctrl"; |
Channagoud Kadabi | eb7f011 | 2017-04-03 20:39:27 -0700 | [diff] [blame] | 16 | reg = <0x03400000 0xc00000>; |
Channagoud Kadabi | de5a121 | 2017-01-20 15:27:51 -0800 | [diff] [blame] | 17 | interrupts = <0 208 0>; |
| 18 | gpio-controller; |
| 19 | #gpio-cells = <2>; |
| 20 | interrupt-controller; |
| 21 | #interrupt-cells = <2>; |
Maulik Shah | 30ebbde | 2017-06-15 10:02:54 +0530 | [diff] [blame] | 22 | interrupt-parent = <&pdc>; |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 23 | |
| 24 | /* QUPv3 South SE mappings */ |
| 25 | /* SE 0 pin mappings */ |
| 26 | qupv3_se0_i2c_pins: qupv3_se0_i2c_pins { |
| 27 | qupv3_se0_i2c_active: qupv3_se0_i2c_active { |
| 28 | mux { |
| 29 | pins = "gpio0", "gpio1"; |
| 30 | function = "qup0"; |
| 31 | }; |
| 32 | |
| 33 | config { |
| 34 | pins = "gpio0", "gpio1"; |
| 35 | drive-strength = <2>; |
| 36 | bias-disable; |
| 37 | }; |
| 38 | }; |
| 39 | |
| 40 | qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep { |
| 41 | mux { |
| 42 | pins = "gpio0", "gpio1"; |
| 43 | function = "gpio"; |
| 44 | }; |
| 45 | |
| 46 | config { |
| 47 | pins = "gpio0", "gpio1"; |
| 48 | drive-strength = <2>; |
| 49 | bias-pull-up; |
| 50 | }; |
| 51 | }; |
| 52 | }; |
| 53 | |
| 54 | qupv3_se0_spi_pins: qupv3_se0_spi_pins { |
| 55 | qupv3_se0_spi_active: qupv3_se0_spi_active { |
| 56 | mux { |
| 57 | pins = "gpio0", "gpio1", "gpio2", |
| 58 | "gpio3"; |
| 59 | function = "qup0"; |
| 60 | }; |
| 61 | |
| 62 | config { |
| 63 | pins = "gpio0", "gpio1", "gpio2", |
| 64 | "gpio3"; |
| 65 | drive-strength = <6>; |
| 66 | bias-disable; |
| 67 | }; |
| 68 | }; |
| 69 | |
| 70 | qupv3_se0_spi_sleep: qupv3_se0_spi_sleep { |
| 71 | mux { |
| 72 | pins = "gpio0", "gpio1", "gpio2", |
| 73 | "gpio3"; |
| 74 | function = "gpio"; |
| 75 | }; |
| 76 | |
| 77 | config { |
| 78 | pins = "gpio0", "gpio1", "gpio2", |
| 79 | "gpio3"; |
| 80 | drive-strength = <6>; |
| 81 | bias-disable; |
| 82 | }; |
| 83 | }; |
| 84 | }; |
| 85 | |
| 86 | /* SE 1 pin mappings */ |
| 87 | qupv3_se1_i2c_pins: qupv3_se1_i2c_pins { |
| 88 | qupv3_se1_i2c_active: qupv3_se1_i2c_active { |
| 89 | mux { |
| 90 | pins = "gpio17", "gpio18"; |
| 91 | function = "qup1"; |
| 92 | }; |
| 93 | |
| 94 | config { |
| 95 | pins = "gpio17", "gpio18"; |
| 96 | drive-strength = <2>; |
| 97 | bias-disable; |
| 98 | }; |
| 99 | }; |
| 100 | |
| 101 | qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep { |
| 102 | mux { |
| 103 | pins = "gpio17", "gpio18"; |
| 104 | function = "gpio"; |
| 105 | }; |
| 106 | |
| 107 | config { |
| 108 | pins = "gpio17", "gpio18"; |
| 109 | drive-strength = <2>; |
| 110 | bias-pull-up; |
| 111 | }; |
| 112 | }; |
| 113 | }; |
| 114 | |
| 115 | qupv3_se1_spi_pins: qupv3_se1_spi_pins { |
| 116 | qupv3_se1_spi_active: qupv3_se1_spi_active { |
| 117 | mux { |
| 118 | pins = "gpio17", "gpio18", "gpio19", |
| 119 | "gpio20"; |
| 120 | function = "qup1"; |
| 121 | }; |
| 122 | |
| 123 | config { |
| 124 | pins = "gpio17", "gpio18", "gpio19", |
| 125 | "gpio20"; |
| 126 | drive-strength = <6>; |
| 127 | bias-disable; |
| 128 | }; |
| 129 | }; |
| 130 | |
| 131 | qupv3_se1_spi_sleep: qupv3_se1_spi_sleep { |
| 132 | mux { |
| 133 | pins = "gpio17", "gpio18", "gpio19", |
| 134 | "gpio20"; |
| 135 | function = "gpio"; |
| 136 | }; |
| 137 | |
| 138 | config { |
| 139 | pins = "gpio17", "gpio18", "gpio19", |
| 140 | "gpio20"; |
| 141 | drive-strength = <6>; |
| 142 | bias-disable; |
| 143 | }; |
| 144 | }; |
| 145 | }; |
| 146 | |
| 147 | /* SE 2 pin mappings */ |
| 148 | qupv3_se2_i2c_pins: qupv3_se2_i2c_pins { |
| 149 | qupv3_se2_i2c_active: qupv3_se2_i2c_active { |
| 150 | mux { |
| 151 | pins = "gpio27", "gpio28"; |
| 152 | function = "qup2"; |
| 153 | }; |
| 154 | |
| 155 | config { |
| 156 | pins = "gpio27", "gpio28"; |
| 157 | drive-strength = <2>; |
| 158 | bias-disable; |
| 159 | }; |
| 160 | }; |
| 161 | |
| 162 | qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep { |
| 163 | mux { |
| 164 | pins = "gpio27", "gpio28"; |
| 165 | function = "gpio"; |
| 166 | }; |
| 167 | |
| 168 | config { |
| 169 | pins = "gpio27", "gpio28"; |
| 170 | drive-strength = <2>; |
| 171 | bias-pull-up; |
| 172 | }; |
| 173 | }; |
| 174 | }; |
| 175 | |
| 176 | qupv3_se2_spi_pins: qupv3_se2_spi_pins { |
| 177 | qupv3_se2_spi_active: qupv3_se2_spi_active { |
| 178 | mux { |
| 179 | pins = "gpio27", "gpio28", "gpio29", |
| 180 | "gpio30"; |
| 181 | function = "qup2"; |
| 182 | }; |
| 183 | |
| 184 | config { |
| 185 | pins = "gpio27", "gpio28", "gpio29", |
| 186 | "gpio30"; |
| 187 | drive-strength = <6>; |
| 188 | bias-disable; |
| 189 | }; |
| 190 | }; |
| 191 | |
| 192 | qupv3_se2_spi_sleep: qupv3_se2_spi_sleep { |
| 193 | mux { |
| 194 | pins = "gpio27", "gpio28", "gpio29", |
| 195 | "gpio30"; |
| 196 | function = "gpio"; |
| 197 | }; |
| 198 | |
| 199 | config { |
| 200 | pins = "gpio27", "gpio28", "gpio29", |
| 201 | "gpio30"; |
| 202 | drive-strength = <6>; |
| 203 | bias-disable; |
| 204 | }; |
| 205 | }; |
| 206 | }; |
| 207 | |
| 208 | /* SE 3 pin mappings */ |
| 209 | qupv3_se3_i2c_pins: qupv3_se3_i2c_pins { |
| 210 | qupv3_se3_i2c_active: qupv3_se3_i2c_active { |
| 211 | mux { |
| 212 | pins = "gpio41", "gpio42"; |
| 213 | function = "qup3"; |
| 214 | }; |
| 215 | |
| 216 | config { |
| 217 | pins = "gpio41", "gpio42"; |
| 218 | drive-strength = <2>; |
| 219 | bias-disable; |
| 220 | }; |
| 221 | }; |
| 222 | |
| 223 | qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep { |
| 224 | mux { |
| 225 | pins = "gpio41", "gpio42"; |
| 226 | function = "gpio"; |
| 227 | }; |
| 228 | |
| 229 | config { |
| 230 | pins = "gpio41", "gpio42"; |
| 231 | drive-strength = <2>; |
| 232 | bias-pull-up; |
| 233 | }; |
| 234 | }; |
| 235 | }; |
| 236 | |
| 237 | qupv3_se3_spi_pins: qupv3_se3_spi_pins { |
| 238 | qupv3_se3_spi_active: qupv3_se3_spi_active { |
| 239 | mux { |
| 240 | pins = "gpio41", "gpio42", "gpio43", |
| 241 | "gpio44"; |
| 242 | function = "qup3"; |
| 243 | }; |
| 244 | |
| 245 | config { |
| 246 | pins = "gpio41", "gpio42", "gpio43", |
| 247 | "gpio44"; |
| 248 | drive-strength = <6>; |
| 249 | bias-disable; |
| 250 | }; |
| 251 | }; |
| 252 | |
| 253 | qupv3_se3_spi_sleep: qupv3_se3_spi_sleep { |
| 254 | mux { |
| 255 | pins = "gpio41", "gpio42", "gpio43", |
| 256 | "gpio44"; |
| 257 | function = "gpio"; |
| 258 | }; |
| 259 | |
| 260 | config { |
| 261 | pins = "gpio41", "gpio42", "gpio43", |
| 262 | "gpio44"; |
| 263 | drive-strength = <6>; |
| 264 | bias-disable; |
| 265 | }; |
| 266 | }; |
| 267 | }; |
| 268 | |
| 269 | /* SE 4 pin mappings */ |
| 270 | qupv3_se4_i2c_pins: qupv3_se4_i2c_pins { |
| 271 | qupv3_se4_i2c_active: qupv3_se4_i2c_active { |
| 272 | mux { |
| 273 | pins = "gpio89", "gpio90"; |
| 274 | function = "qup4"; |
| 275 | }; |
| 276 | |
| 277 | config { |
| 278 | pins = "gpio89", "gpio90"; |
| 279 | drive-strength = <2>; |
| 280 | bias-disable; |
| 281 | }; |
| 282 | }; |
| 283 | |
| 284 | qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep { |
| 285 | mux { |
| 286 | pins = "gpio89", "gpio90"; |
| 287 | function = "gpio"; |
| 288 | }; |
| 289 | |
| 290 | config { |
| 291 | pins = "gpio89", "gpio90"; |
| 292 | drive-strength = <2>; |
| 293 | bias-pull-up; |
| 294 | }; |
| 295 | }; |
| 296 | }; |
| 297 | |
| 298 | qupv3_se4_spi_pins: qupv3_se4_spi_pins { |
| 299 | qupv3_se4_spi_active: qupv3_se4_spi_active { |
| 300 | mux { |
| 301 | pins = "gpio89", "gpio90", "gpio91", |
| 302 | "gpio92"; |
| 303 | function = "qup4"; |
| 304 | }; |
| 305 | |
| 306 | config { |
| 307 | pins = "gpio89", "gpio90", "gpio91", |
| 308 | "gpio92"; |
| 309 | drive-strength = <6>; |
| 310 | bias-disable; |
| 311 | }; |
| 312 | }; |
| 313 | |
| 314 | qupv3_se4_spi_sleep: qupv3_se4_spi_sleep { |
| 315 | mux { |
| 316 | pins = "gpio89", "gpio90", "gpio91", |
| 317 | "gpio92"; |
| 318 | function = "gpio"; |
| 319 | }; |
| 320 | |
| 321 | config { |
| 322 | pins = "gpio89", "gpio90", "gpio91", |
| 323 | "gpio92"; |
| 324 | drive-strength = <6>; |
| 325 | bias-disable; |
| 326 | }; |
| 327 | }; |
| 328 | }; |
| 329 | |
| 330 | /* SE 5 pin mappings */ |
| 331 | qupv3_se5_i2c_pins: qupv3_se5_i2c_pins { |
| 332 | qupv3_se5_i2c_active: qupv3_se5_i2c_active { |
| 333 | mux { |
| 334 | pins = "gpio85", "gpio86"; |
| 335 | function = "qup5"; |
| 336 | }; |
| 337 | |
| 338 | config { |
| 339 | pins = "gpio85", "gpio86"; |
| 340 | drive-strength = <2>; |
| 341 | bias-disable; |
| 342 | }; |
| 343 | }; |
| 344 | |
| 345 | qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep { |
| 346 | mux { |
| 347 | pins = "gpio85", "gpio86"; |
| 348 | function = "gpio"; |
| 349 | }; |
| 350 | |
| 351 | config { |
| 352 | pins = "gpio85", "gpio86"; |
| 353 | drive-strength = <2>; |
| 354 | bias-pull-up; |
| 355 | }; |
| 356 | }; |
| 357 | }; |
| 358 | |
| 359 | qupv3_se5_spi_pins: qupv3_se5_spi_pins { |
| 360 | qupv3_se5_spi_active: qupv3_se5_spi_active { |
| 361 | mux { |
| 362 | pins = "gpio85", "gpio86", "gpio87", |
| 363 | "gpio88"; |
| 364 | function = "qup5"; |
| 365 | }; |
| 366 | |
| 367 | config { |
| 368 | pins = "gpio85", "gpio86", "gpio87", |
| 369 | "gpio88"; |
| 370 | drive-strength = <6>; |
| 371 | bias-disable; |
| 372 | }; |
| 373 | }; |
| 374 | |
| 375 | qupv3_se5_spi_sleep: qupv3_se5_spi_sleep { |
| 376 | mux { |
| 377 | pins = "gpio85", "gpio86", "gpio87", |
| 378 | "gpio88"; |
| 379 | function = "gpio"; |
| 380 | }; |
| 381 | |
| 382 | config { |
| 383 | pins = "gpio85", "gpio86", "gpio87", |
| 384 | "gpio88"; |
| 385 | drive-strength = <6>; |
| 386 | bias-disable; |
| 387 | }; |
| 388 | }; |
| 389 | }; |
| 390 | |
| 391 | /* SE 6 pin mappings */ |
| 392 | qupv3_se6_i2c_pins: qupv3_se6_i2c_pins { |
| 393 | qupv3_se6_i2c_active: qupv3_se6_i2c_active { |
| 394 | mux { |
| 395 | pins = "gpio45", "gpio46"; |
| 396 | function = "qup6"; |
| 397 | }; |
| 398 | |
| 399 | config { |
| 400 | pins = "gpio45", "gpio46"; |
| 401 | drive-strength = <2>; |
| 402 | bias-disable; |
| 403 | }; |
| 404 | }; |
| 405 | |
| 406 | qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep { |
| 407 | mux { |
| 408 | pins = "gpio45", "gpio46"; |
| 409 | function = "gpio"; |
| 410 | }; |
| 411 | |
| 412 | config { |
| 413 | pins = "gpio45", "gpio46"; |
| 414 | drive-strength = <2>; |
| 415 | bias-pull-up; |
| 416 | }; |
| 417 | }; |
| 418 | }; |
| 419 | |
| 420 | qupv3_se6_4uart_pins: qupv3_se6_4uart_pins { |
Mukesh Kumar Savaliya | fa00673 | 2017-12-14 17:34:14 +0530 | [diff] [blame] | 421 | qupv3_se6_ctsrx: qupv3_se6_ctsrx { |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 422 | mux { |
Mukesh Kumar Savaliya | fa00673 | 2017-12-14 17:34:14 +0530 | [diff] [blame] | 423 | pins = "gpio45", "gpio48"; |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 424 | function = "qup6"; |
| 425 | }; |
| 426 | |
| 427 | config { |
Mukesh Kumar Savaliya | fa00673 | 2017-12-14 17:34:14 +0530 | [diff] [blame] | 428 | pins = "gpio45", "gpio48"; |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 429 | drive-strength = <2>; |
Mukesh Kumar Savaliya | fa00673 | 2017-12-14 17:34:14 +0530 | [diff] [blame] | 430 | bias-no-pull; |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 431 | }; |
| 432 | }; |
| 433 | |
Mukesh Kumar Savaliya | fa00673 | 2017-12-14 17:34:14 +0530 | [diff] [blame] | 434 | qupv3_se6_rts: qupv3_se6_rts { |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 435 | mux { |
Mukesh Kumar Savaliya | fa00673 | 2017-12-14 17:34:14 +0530 | [diff] [blame] | 436 | pins = "gpio46"; |
| 437 | function = "qup6"; |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 438 | }; |
| 439 | |
| 440 | config { |
Mukesh Kumar Savaliya | fa00673 | 2017-12-14 17:34:14 +0530 | [diff] [blame] | 441 | pins = "gpio46"; |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 442 | drive-strength = <2>; |
Mukesh Kumar Savaliya | fa00673 | 2017-12-14 17:34:14 +0530 | [diff] [blame] | 443 | bias-pull-down; |
| 444 | }; |
| 445 | }; |
| 446 | |
| 447 | qupv3_se6_tx: qupv3_se6_tx { |
| 448 | mux { |
| 449 | pins = "gpio47"; |
| 450 | function = "qup6"; |
| 451 | }; |
| 452 | |
| 453 | config { |
| 454 | pins = "gpio47"; |
| 455 | drive-strength = <2>; |
| 456 | bias-pull-up; |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 457 | }; |
| 458 | }; |
| 459 | }; |
| 460 | |
| 461 | qupv3_se6_spi_pins: qupv3_se6_spi_pins { |
| 462 | qupv3_se6_spi_active: qupv3_se6_spi_active { |
| 463 | mux { |
| 464 | pins = "gpio45", "gpio46", "gpio47", |
| 465 | "gpio48"; |
| 466 | function = "qup6"; |
| 467 | }; |
| 468 | |
| 469 | config { |
| 470 | pins = "gpio45", "gpio46", "gpio47", |
| 471 | "gpio48"; |
| 472 | drive-strength = <6>; |
| 473 | bias-disable; |
| 474 | }; |
| 475 | }; |
| 476 | |
| 477 | qupv3_se6_spi_sleep: qupv3_se6_spi_sleep { |
| 478 | mux { |
| 479 | pins = "gpio45", "gpio46", "gpio47", |
| 480 | "gpio48"; |
| 481 | function = "gpio"; |
| 482 | }; |
| 483 | |
| 484 | config { |
| 485 | pins = "gpio45", "gpio46", "gpio47", |
| 486 | "gpio48"; |
| 487 | drive-strength = <6>; |
| 488 | bias-disable; |
| 489 | }; |
| 490 | }; |
| 491 | }; |
| 492 | |
| 493 | /* SE 7 pin mappings */ |
| 494 | qupv3_se7_i2c_pins: qupv3_se7_i2c_pins { |
| 495 | qupv3_se7_i2c_active: qupv3_se7_i2c_active { |
| 496 | mux { |
| 497 | pins = "gpio93", "gpio94"; |
| 498 | function = "qup7"; |
| 499 | }; |
| 500 | |
| 501 | config { |
| 502 | pins = "gpio93", "gpio94"; |
| 503 | drive-strength = <2>; |
| 504 | bias-disable; |
| 505 | }; |
| 506 | }; |
| 507 | |
| 508 | qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep { |
| 509 | mux { |
| 510 | pins = "gpio93", "gpio94"; |
| 511 | function = "gpio"; |
| 512 | }; |
| 513 | |
| 514 | config { |
| 515 | pins = "gpio93", "gpio94"; |
| 516 | drive-strength = <2>; |
| 517 | bias-pull-up; |
| 518 | }; |
| 519 | }; |
| 520 | }; |
| 521 | |
| 522 | qupv3_se7_4uart_pins: qupv3_se7_4uart_pins { |
| 523 | qupv3_se7_4uart_active: qupv3_se7_4uart_active { |
| 524 | mux { |
| 525 | pins = "gpio93", "gpio94", "gpio95", |
| 526 | "gpio96"; |
| 527 | function = "qup7"; |
| 528 | }; |
| 529 | |
| 530 | config { |
| 531 | pins = "gpio93", "gpio94", "gpio95", |
| 532 | "gpio96"; |
| 533 | drive-strength = <2>; |
| 534 | bias-disable; |
| 535 | }; |
| 536 | }; |
| 537 | |
| 538 | qupv3_se7_4uart_sleep: qupv3_se7_4uart_sleep { |
| 539 | mux { |
| 540 | pins = "gpio93", "gpio94", "gpio95", |
| 541 | "gpio96"; |
| 542 | function = "gpio"; |
| 543 | }; |
| 544 | |
| 545 | config { |
| 546 | pins = "gpio93", "gpio94", "gpio95", |
| 547 | "gpio96"; |
| 548 | drive-strength = <2>; |
| 549 | bias-disable; |
| 550 | }; |
| 551 | }; |
| 552 | }; |
| 553 | |
| 554 | qupv3_se7_spi_pins: qupv3_se7_spi_pins { |
| 555 | qupv3_se7_spi_active: qupv3_se7_spi_active { |
| 556 | mux { |
| 557 | pins = "gpio93", "gpio94", "gpio95", |
| 558 | "gpio96"; |
| 559 | function = "qup7"; |
| 560 | }; |
| 561 | |
| 562 | config { |
| 563 | pins = "gpio93", "gpio94", "gpio95", |
| 564 | "gpio96"; |
| 565 | drive-strength = <6>; |
| 566 | bias-disable; |
| 567 | }; |
| 568 | }; |
| 569 | |
| 570 | qupv3_se7_spi_sleep: qupv3_se7_spi_sleep { |
| 571 | mux { |
| 572 | pins = "gpio93", "gpio94", "gpio95", |
| 573 | "gpio96"; |
| 574 | function = "gpio"; |
| 575 | }; |
| 576 | |
| 577 | config { |
| 578 | pins = "gpio93", "gpio94", "gpio95", |
| 579 | "gpio96"; |
| 580 | drive-strength = <6>; |
| 581 | bias-disable; |
| 582 | }; |
| 583 | }; |
| 584 | }; |
| 585 | |
| 586 | /* QUPv3 North instances */ |
| 587 | /* SE 8 pin mappings */ |
| 588 | qupv3_se8_i2c_pins: qupv3_se8_i2c_pins { |
| 589 | qupv3_se8_i2c_active: qupv3_se8_i2c_active { |
| 590 | mux { |
| 591 | pins = "gpio65", "gpio66"; |
| 592 | function = "qup8"; |
| 593 | }; |
| 594 | |
| 595 | config { |
| 596 | pins = "gpio65", "gpio66"; |
| 597 | drive-strength = <2>; |
| 598 | bias-disable; |
| 599 | }; |
| 600 | }; |
| 601 | |
| 602 | qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep { |
| 603 | mux { |
| 604 | pins = "gpio65", "gpio66"; |
| 605 | function = "gpio"; |
| 606 | }; |
| 607 | |
| 608 | config { |
| 609 | pins = "gpio65", "gpio66"; |
| 610 | drive-strength = <2>; |
| 611 | bias-pull-up; |
| 612 | }; |
| 613 | }; |
| 614 | }; |
| 615 | |
| 616 | qupv3_se8_spi_pins: qupv3_se8_spi_pins { |
| 617 | qupv3_se8_spi_active: qupv3_se8_spi_active { |
| 618 | mux { |
| 619 | pins = "gpio65", "gpio66", "gpio67", |
| 620 | "gpio68"; |
| 621 | function = "qup8"; |
| 622 | }; |
| 623 | |
| 624 | config { |
| 625 | pins = "gpio65", "gpio66", "gpio67", |
| 626 | "gpio68"; |
| 627 | drive-strength = <6>; |
| 628 | bias-disable; |
| 629 | }; |
| 630 | }; |
| 631 | |
| 632 | qupv3_se8_spi_sleep: qupv3_se8_spi_sleep { |
| 633 | mux { |
| 634 | pins = "gpio65", "gpio66", "gpio67", |
| 635 | "gpio68"; |
| 636 | function = "gpio"; |
| 637 | }; |
| 638 | |
| 639 | config { |
| 640 | pins = "gpio65", "gpio66", "gpio67", |
| 641 | "gpio68"; |
| 642 | drive-strength = <6>; |
| 643 | bias-disable; |
| 644 | }; |
| 645 | }; |
| 646 | }; |
| 647 | |
| 648 | /* SE 9 pin mappings */ |
| 649 | qupv3_se9_i2c_pins: qupv3_se9_i2c_pins { |
| 650 | qupv3_se9_i2c_active: qupv3_se9_i2c_active { |
| 651 | mux { |
| 652 | pins = "gpio6", "gpio7"; |
| 653 | function = "qup9"; |
| 654 | }; |
| 655 | |
| 656 | config { |
| 657 | pins = "gpio6", "gpio7"; |
| 658 | drive-strength = <2>; |
| 659 | bias-disable; |
| 660 | }; |
| 661 | }; |
| 662 | |
| 663 | qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep { |
| 664 | mux { |
| 665 | pins = "gpio6", "gpio7"; |
| 666 | function = "gpio"; |
| 667 | }; |
| 668 | |
| 669 | config { |
| 670 | pins = "gpio6", "gpio7"; |
| 671 | drive-strength = <2>; |
| 672 | bias-pull-up; |
| 673 | }; |
| 674 | }; |
| 675 | }; |
| 676 | |
| 677 | qupv3_se9_2uart_pins: qupv3_se9_2uart_pins { |
| 678 | qupv3_se9_2uart_active: qupv3_se9_2uart_active { |
| 679 | mux { |
| 680 | pins = "gpio4", "gpio5"; |
| 681 | function = "qup9"; |
| 682 | }; |
| 683 | |
| 684 | config { |
| 685 | pins = "gpio4", "gpio5"; |
| 686 | drive-strength = <2>; |
| 687 | bias-disable; |
| 688 | }; |
| 689 | }; |
| 690 | |
| 691 | qupv3_se9_2uart_sleep: qupv3_se9_2uart_sleep { |
| 692 | mux { |
| 693 | pins = "gpio4", "gpio5"; |
| 694 | function = "gpio"; |
| 695 | }; |
| 696 | |
| 697 | config { |
| 698 | pins = "gpio4", "gpio5"; |
| 699 | drive-strength = <2>; |
| 700 | bias-disable; |
| 701 | }; |
| 702 | }; |
| 703 | }; |
| 704 | |
| 705 | qupv3_se9_spi_pins: qupv3_se9_spi_pins { |
| 706 | qupv3_se9_spi_active: qupv3_se9_spi_active { |
| 707 | mux { |
| 708 | pins = "gpio4", "gpio5", "gpio6", |
| 709 | "gpio7"; |
| 710 | function = "qup9"; |
| 711 | }; |
| 712 | |
| 713 | config { |
| 714 | pins = "gpio4", "gpio5", "gpio6", |
| 715 | "gpio7"; |
| 716 | drive-strength = <6>; |
| 717 | bias-disable; |
| 718 | }; |
| 719 | }; |
| 720 | |
| 721 | qupv3_se9_spi_sleep: qupv3_se9_spi_sleep { |
| 722 | mux { |
| 723 | pins = "gpio4", "gpio5", "gpio6", |
| 724 | "gpio7"; |
| 725 | function = "gpio"; |
| 726 | }; |
| 727 | |
| 728 | config { |
| 729 | pins = "gpio4", "gpio5", "gpio6", |
| 730 | "gpio7"; |
| 731 | drive-strength = <6>; |
| 732 | bias-disable; |
| 733 | }; |
| 734 | }; |
| 735 | }; |
| 736 | |
| 737 | /* SE 10 pin mappings */ |
| 738 | qupv3_se10_i2c_pins: qupv3_se10_i2c_pins { |
| 739 | qupv3_se10_i2c_active: qupv3_se10_i2c_active { |
| 740 | mux { |
| 741 | pins = "gpio55", "gpio56"; |
| 742 | function = "qup10"; |
| 743 | }; |
| 744 | |
| 745 | config { |
| 746 | pins = "gpio55", "gpio56"; |
| 747 | drive-strength = <2>; |
| 748 | bias-disable; |
| 749 | }; |
| 750 | }; |
| 751 | |
| 752 | qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep { |
| 753 | mux { |
| 754 | pins = "gpio55", "gpio56"; |
| 755 | function = "gpio"; |
| 756 | }; |
| 757 | |
| 758 | config { |
| 759 | pins = "gpio55", "gpio56"; |
| 760 | drive-strength = <2>; |
| 761 | bias-pull-up; |
| 762 | }; |
| 763 | }; |
| 764 | }; |
| 765 | |
| 766 | qupv3_se10_2uart_pins: qupv3_se10_2uart_pins { |
| 767 | qupv3_se10_2uart_active: qupv3_se10_2uart_active { |
| 768 | mux { |
| 769 | pins = "gpio53", "gpio54"; |
| 770 | function = "qup10"; |
| 771 | }; |
| 772 | |
| 773 | config { |
| 774 | pins = "gpio53", "gpio54"; |
| 775 | drive-strength = <2>; |
| 776 | bias-disable; |
| 777 | }; |
| 778 | }; |
| 779 | |
| 780 | qupv3_se10_2uart_sleep: qupv3_se10_2uart_sleep { |
| 781 | mux { |
| 782 | pins = "gpio53", "gpio54"; |
| 783 | function = "gpio"; |
| 784 | }; |
| 785 | |
| 786 | config { |
| 787 | pins = "gpio53", "gpio54"; |
| 788 | drive-strength = <2>; |
| 789 | bias-disable; |
| 790 | }; |
| 791 | }; |
| 792 | }; |
| 793 | |
| 794 | qupv3_se10_spi_pins: qupv3_se10_spi_pins { |
| 795 | qupv3_se10_spi_active: qupv3_se10_spi_active { |
| 796 | mux { |
| 797 | pins = "gpio53", "gpio54", "gpio55", |
| 798 | "gpio56"; |
| 799 | function = "qup10"; |
| 800 | }; |
| 801 | |
| 802 | config { |
| 803 | pins = "gpio53", "gpio54", "gpio55", |
| 804 | "gpio56"; |
| 805 | drive-strength = <6>; |
| 806 | bias-disable; |
| 807 | }; |
| 808 | }; |
| 809 | |
| 810 | qupv3_se10_spi_sleep: qupv3_se10_spi_sleep { |
| 811 | mux { |
| 812 | pins = "gpio53", "gpio54", "gpio55", |
| 813 | "gpio56"; |
| 814 | function = "gpio"; |
| 815 | }; |
| 816 | |
| 817 | config { |
| 818 | pins = "gpio53", "gpio54", "gpio55", |
| 819 | "gpio56"; |
| 820 | drive-strength = <6>; |
| 821 | bias-disable; |
| 822 | }; |
| 823 | }; |
| 824 | }; |
| 825 | |
| 826 | /* SE 11 pin mappings */ |
| 827 | qupv3_se11_i2c_pins: qupv3_se11_i2c_pins { |
| 828 | qupv3_se11_i2c_active: qupv3_se11_i2c_active { |
| 829 | mux { |
| 830 | pins = "gpio31", "gpio32"; |
| 831 | function = "qup11"; |
| 832 | }; |
| 833 | |
| 834 | config { |
| 835 | pins = "gpio31", "gpio32"; |
| 836 | drive-strength = <2>; |
| 837 | bias-disable; |
| 838 | }; |
| 839 | }; |
| 840 | |
| 841 | qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep { |
| 842 | mux { |
| 843 | pins = "gpio31", "gpio32"; |
| 844 | function = "gpio"; |
| 845 | }; |
| 846 | |
| 847 | config { |
| 848 | pins = "gpio31", "gpio32"; |
| 849 | drive-strength = <2>; |
| 850 | bias-pull-up; |
| 851 | }; |
| 852 | }; |
| 853 | }; |
| 854 | |
| 855 | qupv3_se11_spi_pins: qupv3_se11_spi_pins { |
| 856 | qupv3_se11_spi_active: qupv3_se11_spi_active { |
| 857 | mux { |
| 858 | pins = "gpio31", "gpio32", "gpio33", |
| 859 | "gpio34"; |
| 860 | function = "qup11"; |
| 861 | }; |
| 862 | |
| 863 | config { |
| 864 | pins = "gpio31", "gpio32", "gpio33", |
| 865 | "gpio34"; |
| 866 | drive-strength = <6>; |
| 867 | bias-disable; |
| 868 | }; |
| 869 | }; |
| 870 | |
| 871 | qupv3_se11_spi_sleep: qupv3_se11_spi_sleep { |
| 872 | mux { |
| 873 | pins = "gpio31", "gpio32", "gpio33", |
| 874 | "gpio34"; |
| 875 | function = "gpio"; |
| 876 | }; |
| 877 | |
| 878 | config { |
| 879 | pins = "gpio31", "gpio32", "gpio33", |
| 880 | "gpio34"; |
| 881 | drive-strength = <6>; |
| 882 | bias-disable; |
| 883 | }; |
| 884 | }; |
| 885 | }; |
| 886 | |
| 887 | /* SE 12 pin mappings */ |
| 888 | qupv3_se12_i2c_pins: qupv3_se12_i2c_pins { |
| 889 | qupv3_se12_i2c_active: qupv3_se12_i2c_active { |
| 890 | mux { |
| 891 | pins = "gpio49", "gpio50"; |
| 892 | function = "qup12"; |
| 893 | }; |
| 894 | |
| 895 | config { |
| 896 | pins = "gpio49", "gpio50"; |
| 897 | drive-strength = <2>; |
| 898 | bias-disable; |
| 899 | }; |
| 900 | }; |
| 901 | |
| 902 | qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep { |
| 903 | mux { |
| 904 | pins = "gpio49", "gpio50"; |
| 905 | function = "gpio"; |
| 906 | }; |
| 907 | |
| 908 | config { |
| 909 | pins = "gpio49", "gpio50"; |
| 910 | drive-strength = <2>; |
| 911 | bias-pull-up; |
| 912 | }; |
| 913 | }; |
| 914 | }; |
| 915 | |
Mukesh Kumar Savaliya | 7b27254 | 2017-07-10 19:35:29 +0530 | [diff] [blame] | 916 | qupv3_se12_2uart_pins: qupv3_se12_2uart_pins { |
| 917 | qupv3_se12_2uart_active: qupv3_se12_2uart_active { |
| 918 | mux { |
| 919 | pins = "gpio51", "gpio52"; |
Mukesh Kumar Savaliya | 87dc1c0 | 2017-10-23 20:13:10 +0530 | [diff] [blame] | 920 | function = "qup12"; |
Mukesh Kumar Savaliya | 7b27254 | 2017-07-10 19:35:29 +0530 | [diff] [blame] | 921 | }; |
| 922 | |
| 923 | config { |
| 924 | pins = "gpio51", "gpio52"; |
| 925 | drive-strength = <2>; |
| 926 | bias-disable; |
| 927 | }; |
| 928 | }; |
| 929 | |
| 930 | qupv3_se12_2uart_sleep: qupv3_se12_2uart_sleep { |
| 931 | mux { |
| 932 | pins = "gpio51", "gpio52"; |
| 933 | function = "gpio"; |
| 934 | }; |
| 935 | |
| 936 | config { |
| 937 | pins = "gpio51", "gpio52"; |
| 938 | drive-strength = <2>; |
Mukesh Kumar Savaliya | fa00673 | 2017-12-14 17:34:14 +0530 | [diff] [blame] | 939 | bias-pull-down; |
Mukesh Kumar Savaliya | 7b27254 | 2017-07-10 19:35:29 +0530 | [diff] [blame] | 940 | }; |
| 941 | }; |
| 942 | }; |
| 943 | |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 944 | qupv3_se12_spi_pins: qupv3_se12_spi_pins { |
| 945 | qupv3_se12_spi_active: qupv3_se12_spi_active { |
| 946 | mux { |
| 947 | pins = "gpio49", "gpio50", "gpio51", |
| 948 | "gpio52"; |
| 949 | function = "qup12"; |
| 950 | }; |
| 951 | |
| 952 | config { |
| 953 | pins = "gpio49", "gpio50", "gpio51", |
| 954 | "gpio52"; |
| 955 | drive-strength = <6>; |
| 956 | bias-disable; |
| 957 | }; |
| 958 | }; |
| 959 | |
| 960 | qupv3_se12_spi_sleep: qupv3_se12_spi_sleep { |
| 961 | mux { |
| 962 | pins = "gpio49", "gpio50", "gpio51", |
| 963 | "gpio52"; |
| 964 | function = "gpio"; |
| 965 | }; |
| 966 | |
| 967 | config { |
| 968 | pins = "gpio49", "gpio50", "gpio51", |
| 969 | "gpio52"; |
| 970 | drive-strength = <6>; |
| 971 | bias-disable; |
| 972 | }; |
| 973 | }; |
| 974 | }; |
| 975 | |
| 976 | /* SE 13 pin mappings */ |
| 977 | qupv3_se13_i2c_pins: qupv3_se13_i2c_pins { |
| 978 | qupv3_se13_i2c_active: qupv3_se13_i2c_active { |
| 979 | mux { |
| 980 | pins = "gpio105", "gpio106"; |
| 981 | function = "qup13"; |
| 982 | }; |
| 983 | |
| 984 | config { |
| 985 | pins = "gpio105", "gpio106"; |
| 986 | drive-strength = <2>; |
| 987 | bias-disable; |
| 988 | }; |
| 989 | }; |
| 990 | |
| 991 | qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep { |
| 992 | mux { |
| 993 | pins = "gpio105", "gpio106"; |
| 994 | function = "gpio"; |
| 995 | }; |
| 996 | |
| 997 | config { |
| 998 | pins = "gpio105", "gpio106"; |
| 999 | drive-strength = <2>; |
| 1000 | bias-pull-up; |
| 1001 | }; |
| 1002 | }; |
| 1003 | }; |
| 1004 | |
| 1005 | qupv3_se13_spi_pins: qupv3_se13_spi_pins { |
| 1006 | qupv3_se13_spi_active: qupv3_se13_spi_active { |
| 1007 | mux { |
| 1008 | pins = "gpio105", "gpio106", "gpio107", |
| 1009 | "gpio108"; |
| 1010 | function = "qup13"; |
| 1011 | }; |
| 1012 | |
| 1013 | config { |
| 1014 | pins = "gpio105", "gpio106", "gpio107", |
| 1015 | "gpio108"; |
| 1016 | drive-strength = <6>; |
| 1017 | bias-disable; |
| 1018 | }; |
| 1019 | }; |
| 1020 | |
| 1021 | qupv3_se13_spi_sleep: qupv3_se13_spi_sleep { |
| 1022 | mux { |
| 1023 | pins = "gpio105", "gpio106", "gpio107", |
| 1024 | "gpio108"; |
| 1025 | function = "gpio"; |
| 1026 | }; |
| 1027 | |
| 1028 | config { |
| 1029 | pins = "gpio105", "gpio106", "gpio107", |
| 1030 | "gpio108"; |
| 1031 | drive-strength = <6>; |
| 1032 | bias-disable; |
| 1033 | }; |
| 1034 | }; |
| 1035 | }; |
| 1036 | |
| 1037 | /* SE 14 pin mappings */ |
| 1038 | qupv3_se14_i2c_pins: qupv3_se14_i2c_pins { |
| 1039 | qupv3_se14_i2c_active: qupv3_se14_i2c_active { |
| 1040 | mux { |
| 1041 | pins = "gpio33", "gpio34"; |
| 1042 | function = "qup14"; |
| 1043 | }; |
| 1044 | |
| 1045 | config { |
| 1046 | pins = "gpio33", "gpio34"; |
| 1047 | drive-strength = <2>; |
| 1048 | bias-disable; |
| 1049 | }; |
| 1050 | }; |
| 1051 | |
| 1052 | qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep { |
| 1053 | mux { |
| 1054 | pins = "gpio33", "gpio34"; |
| 1055 | function = "gpio"; |
| 1056 | }; |
| 1057 | |
| 1058 | config { |
| 1059 | pins = "gpio33", "gpio34"; |
| 1060 | drive-strength = <2>; |
| 1061 | bias-pull-up; |
| 1062 | }; |
| 1063 | }; |
| 1064 | }; |
| 1065 | |
| 1066 | qupv3_se14_spi_pins: qupv3_se14_spi_pins { |
| 1067 | qupv3_se14_spi_active: qupv3_se14_spi_active { |
| 1068 | mux { |
| 1069 | pins = "gpio31", "gpio32", "gpio33", |
| 1070 | "gpio34"; |
| 1071 | function = "qup14"; |
| 1072 | }; |
| 1073 | |
| 1074 | config { |
| 1075 | pins = "gpio31", "gpio32", "gpio33", |
| 1076 | "gpio34"; |
| 1077 | drive-strength = <6>; |
| 1078 | bias-disable; |
| 1079 | }; |
| 1080 | }; |
| 1081 | |
| 1082 | qupv3_se14_spi_sleep: qupv3_se14_spi_sleep { |
| 1083 | mux { |
| 1084 | pins = "gpio31", "gpio32", "gpio33", |
| 1085 | "gpio34"; |
| 1086 | function = "gpio"; |
| 1087 | }; |
| 1088 | |
| 1089 | config { |
| 1090 | pins = "gpio31", "gpio32", "gpio33", |
| 1091 | "gpio34"; |
| 1092 | drive-strength = <6>; |
| 1093 | bias-disable; |
| 1094 | }; |
| 1095 | }; |
| 1096 | }; |
| 1097 | |
| 1098 | /* SE 15 pin mappings */ |
| 1099 | qupv3_se15_i2c_pins: qupv3_se15_i2c_pins { |
| 1100 | qupv3_se15_i2c_active: qupv3_se15_i2c_active { |
| 1101 | mux { |
| 1102 | pins = "gpio81", "gpio82"; |
| 1103 | function = "qup15"; |
| 1104 | }; |
| 1105 | |
| 1106 | config { |
| 1107 | pins = "gpio81", "gpio82"; |
| 1108 | drive-strength = <2>; |
| 1109 | bias-disable; |
| 1110 | }; |
| 1111 | }; |
| 1112 | |
| 1113 | qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep { |
| 1114 | mux { |
| 1115 | pins = "gpio81", "gpio82"; |
| 1116 | function = "gpio"; |
| 1117 | }; |
| 1118 | |
| 1119 | config { |
| 1120 | pins = "gpio81", "gpio82"; |
| 1121 | drive-strength = <2>; |
| 1122 | bias-pull-up; |
| 1123 | }; |
| 1124 | }; |
| 1125 | }; |
| 1126 | |
| 1127 | qupv3_se15_spi_pins: qupv3_se15_spi_pins { |
| 1128 | qupv3_se15_spi_active: qupv3_se15_spi_active { |
| 1129 | mux { |
| 1130 | pins = "gpio81", "gpio82", "gpio83", |
| 1131 | "gpio84"; |
| 1132 | function = "qup15"; |
| 1133 | }; |
| 1134 | |
| 1135 | config { |
| 1136 | pins = "gpio81", "gpio82", "gpio83", |
| 1137 | "gpio84"; |
| 1138 | drive-strength = <6>; |
| 1139 | bias-disable; |
| 1140 | }; |
| 1141 | }; |
| 1142 | |
| 1143 | qupv3_se15_spi_sleep: qupv3_se15_spi_sleep { |
| 1144 | mux { |
| 1145 | pins = "gpio81", "gpio82", "gpio83", |
| 1146 | "gpio84"; |
| 1147 | function = "gpio"; |
| 1148 | }; |
| 1149 | |
| 1150 | config { |
| 1151 | pins = "gpio81", "gpio82", "gpio83", |
| 1152 | "gpio84"; |
| 1153 | drive-strength = <6>; |
| 1154 | bias-disable; |
| 1155 | }; |
| 1156 | }; |
| 1157 | }; |
Vijay Viswanath | eac7272 | 2017-06-05 11:01:38 +0530 | [diff] [blame] | 1158 | /* SDC pin type */ |
| 1159 | sdc1_clk_on: sdc1_clk_on { |
| 1160 | config { |
| 1161 | pins = "sdc1_clk"; |
| 1162 | bias-disable; /* NO pull */ |
| 1163 | drive-strength = <16>; /* 16 MA */ |
| 1164 | }; |
| 1165 | }; |
| 1166 | |
| 1167 | sdc1_clk_off: sdc1_clk_off { |
| 1168 | config { |
| 1169 | pins = "sdc1_clk"; |
| 1170 | bias-disable; /* NO pull */ |
| 1171 | drive-strength = <2>; /* 2 MA */ |
| 1172 | }; |
| 1173 | }; |
| 1174 | |
| 1175 | sdc1_cmd_on: sdc1_cmd_on { |
| 1176 | config { |
| 1177 | pins = "sdc1_cmd"; |
| 1178 | bias-pull-up; /* pull up */ |
| 1179 | drive-strength = <10>; /* 10 MA */ |
| 1180 | }; |
| 1181 | }; |
| 1182 | |
| 1183 | sdc1_cmd_off: sdc1_cmd_off { |
| 1184 | config { |
| 1185 | pins = "sdc1_cmd"; |
| 1186 | num-grp-pins = <1>; |
| 1187 | bias-pull-up; /* pull up */ |
| 1188 | drive-strength = <2>; /* 2 MA */ |
| 1189 | }; |
| 1190 | }; |
| 1191 | |
| 1192 | sdc1_data_on: sdc1_data_on { |
| 1193 | config { |
| 1194 | pins = "sdc1_data"; |
| 1195 | bias-pull-up; /* pull up */ |
| 1196 | drive-strength = <10>; /* 10 MA */ |
| 1197 | }; |
| 1198 | }; |
| 1199 | |
| 1200 | sdc1_data_off: sdc1_data_off { |
| 1201 | config { |
| 1202 | pins = "sdc1_data"; |
| 1203 | bias-pull-up; /* pull up */ |
| 1204 | drive-strength = <2>; /* 2 MA */ |
| 1205 | }; |
| 1206 | }; |
| 1207 | |
Vijay Viswanath | 6f83cbf | 2017-08-30 16:41:48 +0530 | [diff] [blame] | 1208 | sdc1_rclk_on: sdc1_rclk_on { |
| 1209 | config { |
| 1210 | pins = "sdc1_rclk"; |
| 1211 | bias-pull-down; /* pull down */ |
| 1212 | }; |
| 1213 | }; |
| 1214 | |
| 1215 | sdc1_rclk_off: sdc1_rclk_off { |
| 1216 | config { |
| 1217 | pins = "sdc1_rclk"; |
| 1218 | bias-pull-down; /* pull down */ |
| 1219 | }; |
| 1220 | }; |
| 1221 | |
Vijay Viswanath | eac7272 | 2017-06-05 11:01:38 +0530 | [diff] [blame] | 1222 | sdc2_clk_on: sdc2_clk_on { |
| 1223 | config { |
| 1224 | pins = "sdc2_clk"; |
| 1225 | bias-disable; /* NO pull */ |
| 1226 | drive-strength = <16>; /* 16 MA */ |
| 1227 | }; |
| 1228 | }; |
| 1229 | |
| 1230 | sdc2_clk_off: sdc2_clk_off { |
| 1231 | config { |
| 1232 | pins = "sdc2_clk"; |
| 1233 | bias-disable; /* NO pull */ |
| 1234 | drive-strength = <2>; /* 2 MA */ |
| 1235 | }; |
| 1236 | }; |
| 1237 | |
| 1238 | sdc2_cmd_on: sdc2_cmd_on { |
| 1239 | config { |
| 1240 | pins = "sdc2_cmd"; |
| 1241 | bias-pull-up; /* pull up */ |
| 1242 | drive-strength = <10>; /* 10 MA */ |
| 1243 | }; |
| 1244 | }; |
| 1245 | |
| 1246 | sdc2_cmd_off: sdc2_cmd_off { |
| 1247 | config { |
| 1248 | pins = "sdc2_cmd"; |
| 1249 | bias-pull-up; /* pull up */ |
| 1250 | drive-strength = <2>; /* 2 MA */ |
| 1251 | }; |
| 1252 | }; |
| 1253 | |
| 1254 | sdc2_data_on: sdc2_data_on { |
| 1255 | config { |
| 1256 | pins = "sdc2_data"; |
| 1257 | bias-pull-up; /* pull up */ |
| 1258 | drive-strength = <10>; /* 10 MA */ |
| 1259 | }; |
| 1260 | }; |
| 1261 | |
| 1262 | sdc2_data_off: sdc2_data_off { |
| 1263 | config { |
| 1264 | pins = "sdc2_data"; |
| 1265 | bias-pull-up; /* pull up */ |
| 1266 | drive-strength = <2>; /* 2 MA */ |
| 1267 | }; |
| 1268 | }; |
| 1269 | |
Vijay Viswanath | 6ef06c1 | 2017-09-20 16:06:18 +0530 | [diff] [blame] | 1270 | sdc2_cd_on: cd_on { |
| 1271 | mux { |
| 1272 | pins = "gpio96"; |
| 1273 | function = "gpio"; |
| 1274 | }; |
| 1275 | |
| 1276 | config { |
| 1277 | pins = "gpio96"; |
| 1278 | drive-strength = <2>; |
| 1279 | bias-pull-up; |
| 1280 | }; |
| 1281 | }; |
| 1282 | |
| 1283 | sdc2_cd_off: cd_off { |
| 1284 | mux { |
| 1285 | pins = "gpio96"; |
| 1286 | function = "gpio"; |
| 1287 | }; |
| 1288 | |
| 1289 | config { |
| 1290 | pins = "gpio96"; |
| 1291 | drive-strength = <2>; |
| 1292 | bias-disable; |
| 1293 | }; |
| 1294 | }; |
| 1295 | |
Rohit Kumar | 1405128 | 2017-07-12 11:18:48 +0530 | [diff] [blame] | 1296 | /* USB C analog configuration */ |
| 1297 | wcd_usbc_analog_en1 { |
| 1298 | wcd_usbc_analog_en1_idle: wcd_usbc_ana_en1_idle { |
| 1299 | mux { |
| 1300 | pins = "gpio49"; |
| 1301 | function = "gpio"; |
| 1302 | }; |
| 1303 | |
| 1304 | config { |
| 1305 | pins = "gpio49"; |
| 1306 | drive-strength = <2>; |
| 1307 | bias-pull-down; |
| 1308 | output-low; |
| 1309 | }; |
| 1310 | }; |
| 1311 | |
| 1312 | wcd_usbc_analog_en1_active: wcd_usbc_ana_en1_active { |
| 1313 | mux { |
| 1314 | pins = "gpio49"; |
| 1315 | function = "gpio"; |
| 1316 | }; |
| 1317 | |
| 1318 | config { |
| 1319 | pins = "gpio49"; |
| 1320 | drive-strength = <2>; |
| 1321 | bias-disable; |
| 1322 | output-high; |
| 1323 | }; |
| 1324 | }; |
| 1325 | }; |
| 1326 | |
| 1327 | sdw_clk_pin { |
| 1328 | sdw_clk_sleep: sdw_clk_sleep { |
| 1329 | mux { |
| 1330 | pins = "gpio65"; |
| 1331 | function = "wsa_clk"; |
| 1332 | }; |
| 1333 | |
| 1334 | config { |
| 1335 | pins = "gpio65"; |
| 1336 | drive-strength = <2>; |
| 1337 | bias-bus-hold; |
| 1338 | }; |
| 1339 | }; |
| 1340 | |
| 1341 | sdw_clk_active: sdw_clk_active { |
| 1342 | mux { |
| 1343 | pins = "gpio65"; |
| 1344 | function = "wsa_clk"; |
| 1345 | }; |
| 1346 | |
| 1347 | config { |
| 1348 | pins = "gpio65"; |
| 1349 | drive-strength = <2>; |
| 1350 | bias-bus-hold; |
| 1351 | }; |
| 1352 | }; |
| 1353 | }; |
| 1354 | |
| 1355 | sdw_data_pin { |
| 1356 | sdw_data_sleep: sdw_data_sleep { |
| 1357 | mux { |
| 1358 | pins = "gpio66"; |
| 1359 | function = "wsa_data"; |
| 1360 | }; |
| 1361 | |
| 1362 | config { |
| 1363 | pins = "gpio66"; |
| 1364 | drive-strength = <4>; |
| 1365 | bias-bus-hold; |
| 1366 | }; |
| 1367 | }; |
| 1368 | |
| 1369 | sdw_data_active: sdw_data_active { |
| 1370 | mux { |
| 1371 | pins = "gpio66"; |
| 1372 | function = "wsa_data"; |
| 1373 | }; |
| 1374 | |
| 1375 | config { |
| 1376 | pins = "gpio66"; |
| 1377 | drive-strength = <4>; |
| 1378 | bias-bus-hold; |
| 1379 | }; |
| 1380 | }; |
| 1381 | }; |
| 1382 | |
Rohit Rangwani | 0a1cd65 | 2017-09-19 13:29:12 +0530 | [diff] [blame] | 1383 | nfc { |
| 1384 | nfc_int_active: nfc_int_active { |
| 1385 | /* active state */ |
| 1386 | mux { |
| 1387 | /* GPIO 44 NFC Read Interrupt */ |
| 1388 | pins = "gpio44"; |
| 1389 | function = "gpio"; |
| 1390 | }; |
| 1391 | |
| 1392 | config { |
| 1393 | pins = "gpio44"; |
| 1394 | drive-strength = <2>; /* 2 MA */ |
| 1395 | bias-pull-up; |
| 1396 | }; |
| 1397 | }; |
| 1398 | |
| 1399 | nfc_int_suspend: nfc_int_suspend { |
| 1400 | /* sleep state */ |
| 1401 | mux { |
| 1402 | /* GPIO 44 NFC Read Interrupt */ |
| 1403 | pins = "gpio44"; |
| 1404 | function = "gpio"; |
| 1405 | }; |
| 1406 | |
| 1407 | config { |
| 1408 | pins = "gpio44"; |
| 1409 | drive-strength = <2>; /* 2 MA */ |
| 1410 | bias-pull-up; |
| 1411 | }; |
| 1412 | }; |
| 1413 | |
| 1414 | nfc_enable_active: nfc_enable_active { |
| 1415 | /* active state */ |
| 1416 | mux { |
| 1417 | /* 12: NFC ENABLE 43: FW DNLD */ |
| 1418 | /* 116: ESE Enable */ |
| 1419 | pins = "gpio12", "gpio43", "gpio116"; |
| 1420 | function = "gpio"; |
| 1421 | }; |
| 1422 | |
| 1423 | config { |
| 1424 | pins = "gpio12", "gpio43", "gpio116"; |
| 1425 | drive-strength = <2>; /* 2 MA */ |
| 1426 | bias-pull-up; |
| 1427 | }; |
| 1428 | }; |
| 1429 | |
| 1430 | nfc_enable_suspend: nfc_enable_suspend { |
| 1431 | /* sleep state */ |
| 1432 | mux { |
| 1433 | /* 12: NFC ENABLE 43: FW DNLD */ |
| 1434 | /* 116: ESE Enable */ |
| 1435 | pins = "gpio12", "gpio43", "gpio116"; |
| 1436 | function = "gpio"; |
| 1437 | }; |
| 1438 | |
| 1439 | config { |
| 1440 | pins = "gpio12", "gpio43", "gpio116"; |
| 1441 | drive-strength = <2>; /* 2 MA */ |
| 1442 | bias-disable; |
| 1443 | }; |
| 1444 | }; |
| 1445 | }; |
| 1446 | |
Rohit Kumar | 1405128 | 2017-07-12 11:18:48 +0530 | [diff] [blame] | 1447 | /* WSA speaker reset pins */ |
| 1448 | spkr_1_sd_n { |
| 1449 | spkr_1_sd_n_sleep: spkr_1_sd_n_sleep { |
| 1450 | mux { |
| 1451 | pins = "gpio67"; |
| 1452 | function = "gpio"; |
| 1453 | }; |
| 1454 | |
| 1455 | config { |
| 1456 | pins = "gpio67"; |
| 1457 | drive-strength = <2>; /* 2 mA */ |
| 1458 | bias-pull-down; |
| 1459 | input-enable; |
| 1460 | }; |
| 1461 | }; |
| 1462 | |
| 1463 | spkr_1_sd_n_active: spkr_1_sd_n_active { |
| 1464 | mux { |
| 1465 | pins = "gpio67"; |
| 1466 | function = "gpio"; |
| 1467 | }; |
| 1468 | |
| 1469 | config { |
| 1470 | pins = "gpio67"; |
| 1471 | drive-strength = <16>; /* 16 mA */ |
| 1472 | bias-disable; |
| 1473 | output-high; |
| 1474 | }; |
| 1475 | }; |
| 1476 | }; |
| 1477 | |
| 1478 | spkr_2_sd_n { |
| 1479 | spkr_2_sd_n_sleep: spkr_2_sd_n_sleep { |
| 1480 | mux { |
| 1481 | pins = "gpio68"; |
| 1482 | function = "gpio"; |
| 1483 | }; |
| 1484 | |
| 1485 | config { |
| 1486 | pins = "gpio68"; |
| 1487 | drive-strength = <2>; /* 2 mA */ |
| 1488 | bias-pull-down; |
| 1489 | input-enable; |
| 1490 | }; |
| 1491 | }; |
| 1492 | |
| 1493 | spkr_2_sd_n_active: spkr_2_sd_n_active { |
| 1494 | mux { |
| 1495 | pins = "gpio68"; |
| 1496 | function = "gpio"; |
| 1497 | }; |
| 1498 | |
| 1499 | config { |
| 1500 | pins = "gpio68"; |
| 1501 | drive-strength = <16>; /* 16 mA */ |
| 1502 | bias-disable; |
| 1503 | output-high; |
| 1504 | }; |
| 1505 | }; |
| 1506 | }; |
| 1507 | |
Rohit kumar | 75f5ed2 | 2017-11-21 18:21:03 +0530 | [diff] [blame] | 1508 | /* Tasha WSA speaker reset pins */ |
| 1509 | tasha_spkr_1_sd_n { |
| 1510 | tasha_spkr_1_sd_n_sleep: tasha_spkr_1_sd_n_sleep { |
| 1511 | mux { |
| 1512 | pins = "gpio66"; |
| 1513 | function = "gpio"; |
| 1514 | }; |
| 1515 | |
| 1516 | config { |
| 1517 | pins = "gpio66"; |
| 1518 | drive-strength = <2>; /* 2 mA */ |
| 1519 | bias-pull-down; |
| 1520 | input-enable; |
| 1521 | }; |
| 1522 | }; |
| 1523 | |
| 1524 | tasha_spkr_1_sd_n_active: tasha_spkr_1_sd_n_active { |
| 1525 | mux { |
| 1526 | pins = "gpio66"; |
| 1527 | function = "gpio"; |
| 1528 | }; |
| 1529 | |
| 1530 | config { |
| 1531 | pins = "gpio66"; |
| 1532 | drive-strength = <16>; /* 16 mA */ |
| 1533 | bias-disable; |
| 1534 | output-high; |
| 1535 | }; |
| 1536 | }; |
| 1537 | }; |
| 1538 | |
| 1539 | tasha_spkr_2_sd_n { |
| 1540 | tasha_spkr_2_sd_n_sleep: tasha_spkr_2_sd_n_sleep { |
| 1541 | mux { |
| 1542 | pins = "gpio65"; |
| 1543 | function = "gpio"; |
| 1544 | }; |
| 1545 | |
| 1546 | config { |
| 1547 | pins = "gpio65"; |
| 1548 | drive-strength = <2>; /* 2 mA */ |
| 1549 | bias-pull-down; |
| 1550 | input-enable; |
| 1551 | }; |
| 1552 | }; |
| 1553 | |
| 1554 | tasha_spkr_2_sd_n_active: tasha_spkr_2_sd_n_active { |
| 1555 | mux { |
| 1556 | pins = "gpio65"; |
| 1557 | function = "gpio"; |
| 1558 | }; |
| 1559 | |
| 1560 | config { |
| 1561 | pins = "gpio65"; |
| 1562 | drive-strength = <16>; /* 16 mA */ |
| 1563 | bias-disable; |
| 1564 | output-high; |
| 1565 | }; |
| 1566 | }; |
| 1567 | }; |
| 1568 | |
Rohit Kumar | efba4be | 2017-09-18 08:06:14 +0530 | [diff] [blame] | 1569 | wcd_buck_vsel { |
| 1570 | wcd_buck_vsel_default: wcd_buck_vsel_default{ |
| 1571 | mux { |
| 1572 | pins = "gpio94"; |
| 1573 | function = "gpio"; |
| 1574 | }; |
| 1575 | |
| 1576 | config { |
| 1577 | pins = "gpio94"; |
| 1578 | drive-strength = <8>; /* 8 mA */ |
| 1579 | bias-pull-down; /* pull down */ |
| 1580 | output-high; |
| 1581 | }; |
| 1582 | }; |
| 1583 | }; |
| 1584 | |
Vatsal Bucha | feac0f7 | 2017-12-27 15:59:09 +0530 | [diff] [blame] | 1585 | wcd_usbc_analog_en2 { |
| 1586 | wcd_usbc_analog_en2_idle: wcd_usbc_ana_en2_idle { |
Rohit Kumar | 1405128 | 2017-07-12 11:18:48 +0530 | [diff] [blame] | 1587 | mux { |
| 1588 | pins = "gpio40"; |
| 1589 | function = "gpio"; |
| 1590 | }; |
| 1591 | |
| 1592 | config { |
| 1593 | pins = "gpio40"; |
| 1594 | drive-strength = <2>; |
| 1595 | bias-pull-down; |
| 1596 | output-low; |
| 1597 | }; |
| 1598 | }; |
| 1599 | |
Vatsal Bucha | feac0f7 | 2017-12-27 15:59:09 +0530 | [diff] [blame] | 1600 | wcd_usbc_analog_en2_active: wcd_usbc_ana_en2_active { |
Rohit Kumar | 1405128 | 2017-07-12 11:18:48 +0530 | [diff] [blame] | 1601 | mux { |
| 1602 | pins = "gpio40"; |
| 1603 | function = "gpio"; |
| 1604 | }; |
| 1605 | |
| 1606 | config { |
| 1607 | pins = "gpio40"; |
| 1608 | drive-strength = <2>; |
| 1609 | bias-disable; |
| 1610 | output-high; |
| 1611 | }; |
| 1612 | }; |
| 1613 | }; |
| 1614 | |
| 1615 | wcd9xxx_intr { |
| 1616 | wcd_intr_default: wcd_intr_default{ |
| 1617 | mux { |
| 1618 | pins = "gpio80"; |
| 1619 | function = "gpio"; |
| 1620 | }; |
| 1621 | |
| 1622 | config { |
| 1623 | pins = "gpio80"; |
| 1624 | drive-strength = <2>; /* 2 mA */ |
| 1625 | bias-pull-down; /* pull down */ |
| 1626 | input-enable; |
| 1627 | }; |
| 1628 | }; |
| 1629 | }; |
Shantanu Jain | 59eea8d | 2017-09-15 11:35:04 +0530 | [diff] [blame] | 1630 | |
Ravi Kishore Tanuku | 3e7d07e | 2017-11-15 11:08:56 +0530 | [diff] [blame] | 1631 | flash_led3_front { |
| 1632 | flash_led3_front_en: flash_led3_front_en { |
| 1633 | mux { |
| 1634 | pins = "gpio21"; |
| 1635 | function = "gpio"; |
| 1636 | }; |
| 1637 | |
| 1638 | config { |
| 1639 | pins = "gpio21"; |
| 1640 | drive_strength = <2>; |
| 1641 | output-high; |
| 1642 | bias-disable; |
| 1643 | }; |
| 1644 | }; |
| 1645 | |
| 1646 | flash_led3_front_dis: flash_led3_front_dis { |
| 1647 | mux { |
| 1648 | pins = "gpio21"; |
| 1649 | function = "gpio"; |
| 1650 | }; |
| 1651 | |
| 1652 | config { |
| 1653 | pins = "gpio21"; |
| 1654 | drive_strength = <2>; |
| 1655 | output-low; |
| 1656 | bias-disable; |
| 1657 | }; |
| 1658 | }; |
| 1659 | }; |
| 1660 | |
Shantanu Jain | 59eea8d | 2017-09-15 11:35:04 +0530 | [diff] [blame] | 1661 | /* Pinctrl setting for CAMERA GPIO key */ |
| 1662 | key_cam_snapshot { |
| 1663 | key_cam_snapshot_default: key_cam_snapshot_default { |
| 1664 | pins = "gpio91"; |
| 1665 | function = "normal"; |
| 1666 | input-enable; |
| 1667 | bias-pull-up; |
| 1668 | power-source = <0>; |
| 1669 | }; |
| 1670 | }; |
| 1671 | |
| 1672 | key_cam_focus { |
| 1673 | key_cam_focus_default: key_cam_focus_default { |
| 1674 | pins = "gpio92"; |
| 1675 | function = "normal"; |
| 1676 | input-enable; |
| 1677 | bias-pull-up; |
| 1678 | power-source = <0>; |
| 1679 | }; |
| 1680 | }; |
| 1681 | |
Vatsal Bucha | 1ff86ca | 2018-01-05 14:26:29 +0530 | [diff] [blame^] | 1682 | aqt_intr { |
| 1683 | aqt_intr_default: aqt_intr_default{ |
| 1684 | mux { |
| 1685 | pins = "gpio79"; |
| 1686 | function = "gpio"; |
| 1687 | }; |
| 1688 | |
| 1689 | config { |
| 1690 | pins = "gpio79"; |
| 1691 | drive-strength = <2>; /* 2 mA */ |
| 1692 | bias-pull-down; /* pull down */ |
| 1693 | input-enable; |
| 1694 | }; |
| 1695 | }; |
| 1696 | }; |
| 1697 | |
| 1698 | aqt_rst_gpio { |
| 1699 | aqt_rst_idle: aqt_rst_idle{ |
| 1700 | mux { |
| 1701 | pins = "gpio80"; |
| 1702 | function = "gpio"; |
| 1703 | }; |
| 1704 | |
| 1705 | config { |
| 1706 | pins = "gpio80"; |
| 1707 | drive-strength = <8>; |
| 1708 | bias-pull-down; |
| 1709 | output-low; |
| 1710 | }; |
| 1711 | }; |
| 1712 | aqt_rst_active: aqt_rst_active{ |
| 1713 | mux { |
| 1714 | pins = "gpio80"; |
| 1715 | function = "gpio"; |
| 1716 | }; |
| 1717 | |
| 1718 | config { |
| 1719 | pins = "gpio80"; |
| 1720 | drive-strength = <8>; |
| 1721 | bias-disable; |
| 1722 | output-high; |
| 1723 | }; |
| 1724 | }; |
| 1725 | }; |
| 1726 | |
| 1727 | ter_i2s_sck_ws { |
| 1728 | ter_i2s_sck_sleep: ter_i2s_sck_sleep { |
| 1729 | mux { |
| 1730 | pins = "gpio75", "gpio76"; |
| 1731 | function = "ter_mi2s"; |
| 1732 | }; |
| 1733 | |
| 1734 | config { |
| 1735 | pins = "gpio75", "gpio76"; |
| 1736 | drive-strength = <2>; /* 2 mA */ |
| 1737 | }; |
| 1738 | }; |
| 1739 | |
| 1740 | ter_i2s_sck_active: ter_i2s_sck_active { |
| 1741 | mux { |
| 1742 | pins = "gpio75", "gpio76"; |
| 1743 | function = "ter_mi2s"; |
| 1744 | }; |
| 1745 | |
| 1746 | config { |
| 1747 | pins = "gpio75", "gpio76"; |
| 1748 | drive-strength = <8>; /* 8 mA */ |
| 1749 | input-enable; |
| 1750 | }; |
| 1751 | }; |
| 1752 | }; |
| 1753 | |
| 1754 | ter_i2s_data0 { |
| 1755 | ter_i2s_data0_sleep: ter_i2s_data0_sleep { |
| 1756 | mux { |
| 1757 | pins = "gpio77"; |
| 1758 | function = "ter_mi2s"; |
| 1759 | }; |
| 1760 | |
| 1761 | config { |
| 1762 | pins = "gpio77"; |
| 1763 | drive-strength = <2>; /* 2 mA */ |
| 1764 | }; |
| 1765 | }; |
| 1766 | |
| 1767 | ter_i2s_data0_active: ter_i2s_data0_active { |
| 1768 | mux { |
| 1769 | pins = "gpio77"; |
| 1770 | function = "ter_mi2s"; |
| 1771 | }; |
| 1772 | |
| 1773 | config { |
| 1774 | pins = "gpio77"; |
| 1775 | drive-strength = <8>; /* 8 mA */ |
| 1776 | input-enable; |
| 1777 | }; |
| 1778 | }; |
| 1779 | }; |
| 1780 | |
| 1781 | ter_i2s_data1 { |
| 1782 | ter_i2s_data1_sleep: ter_i2s_data1_sleep { |
| 1783 | mux { |
| 1784 | pins = "gpio78"; |
| 1785 | function = "ter_mi2s"; |
| 1786 | }; |
| 1787 | |
| 1788 | config { |
| 1789 | pins = "gpio78"; |
| 1790 | drive-strength = <2>; /* 2 mA */ |
| 1791 | }; |
| 1792 | }; |
| 1793 | |
| 1794 | ter_i2s_data1_active: ter_i2s_data1_active { |
| 1795 | mux { |
| 1796 | pins = "gpio78"; |
| 1797 | function = "ter_mi2s"; |
| 1798 | }; |
| 1799 | |
| 1800 | config { |
| 1801 | pins = "gpio78"; |
| 1802 | drive-strength = <8>; /* 8 mA */ |
| 1803 | output-high; |
| 1804 | }; |
| 1805 | }; |
| 1806 | }; |
| 1807 | |
Raviteja Tamatam | e97849a | 2017-09-12 20:25:50 +0530 | [diff] [blame] | 1808 | pmx_sde: pmx_sde { |
| 1809 | sde_dsi_active: sde_dsi_active { |
| 1810 | mux { |
| 1811 | pins = "gpio75", "gpio76"; |
| 1812 | function = "gpio"; |
| 1813 | }; |
| 1814 | |
| 1815 | config { |
| 1816 | pins = "gpio75", "gpio76"; |
| 1817 | drive-strength = <8>; /* 8 mA */ |
| 1818 | bias-disable = <0>; /* no pull */ |
| 1819 | }; |
| 1820 | }; |
| 1821 | sde_dsi_suspend: sde_dsi_suspend { |
| 1822 | mux { |
| 1823 | pins = "gpio75", "gpio76"; |
| 1824 | function = "gpio"; |
| 1825 | }; |
| 1826 | |
| 1827 | config { |
| 1828 | pins = "gpio75", "gpio76"; |
| 1829 | drive-strength = <2>; /* 2 mA */ |
| 1830 | bias-pull-down; /* PULL DOWN */ |
| 1831 | }; |
| 1832 | }; |
| 1833 | }; |
| 1834 | |
| 1835 | pmx_sde_te { |
| 1836 | sde_te_active: sde_te_active { |
| 1837 | mux { |
| 1838 | pins = "gpio10"; |
| 1839 | function = "mdp_vsync"; |
| 1840 | }; |
| 1841 | |
| 1842 | config { |
| 1843 | pins = "gpio10"; |
| 1844 | drive-strength = <2>; /* 2 mA */ |
| 1845 | bias-pull-down; /* PULL DOWN */ |
| 1846 | }; |
| 1847 | }; |
| 1848 | |
| 1849 | sde_te_suspend: sde_te_suspend { |
| 1850 | mux { |
| 1851 | pins = "gpio10"; |
| 1852 | function = "mdp_vsync"; |
| 1853 | }; |
| 1854 | |
| 1855 | config { |
| 1856 | pins = "gpio10"; |
| 1857 | drive-strength = <2>; /* 2 mA */ |
| 1858 | bias-pull-down; /* PULL DOWN */ |
| 1859 | }; |
| 1860 | }; |
| 1861 | }; |
| 1862 | |
| 1863 | sde_dp_aux_active: sde_dp_aux_active { |
| 1864 | mux { |
| 1865 | pins = "gpio40", "gpio50"; |
| 1866 | function = "gpio"; |
| 1867 | }; |
| 1868 | |
| 1869 | config { |
| 1870 | pins = "gpio40", "gpio50"; |
| 1871 | bias-disable = <0>; /* no pull */ |
| 1872 | drive-strength = <8>; |
| 1873 | }; |
| 1874 | }; |
| 1875 | |
| 1876 | sde_dp_aux_suspend: sde_dp_aux_suspend { |
| 1877 | mux { |
| 1878 | pins = "gpio40", "gpio50"; |
| 1879 | function = "gpio"; |
| 1880 | }; |
| 1881 | |
| 1882 | config { |
| 1883 | pins = "gpio40", "gpio50"; |
| 1884 | bias-pull-down; |
| 1885 | drive-strength = <2>; |
| 1886 | }; |
| 1887 | }; |
| 1888 | |
| 1889 | sde_dp_usbplug_cc_active: sde_dp_usbplug_cc_active { |
| 1890 | mux { |
| 1891 | pins = "gpio38"; |
| 1892 | function = "gpio"; |
| 1893 | }; |
| 1894 | |
| 1895 | config { |
| 1896 | pins = "gpio38"; |
| 1897 | bias-disable; |
| 1898 | drive-strength = <16>; |
| 1899 | }; |
| 1900 | }; |
| 1901 | |
| 1902 | sde_dp_usbplug_cc_suspend: sde_dp_usbplug_cc_suspend { |
| 1903 | mux { |
| 1904 | pins = "gpio38"; |
| 1905 | function = "gpio"; |
| 1906 | }; |
| 1907 | |
| 1908 | config { |
| 1909 | pins = "gpio38"; |
| 1910 | bias-pull-down; |
| 1911 | drive-strength = <2>; |
| 1912 | }; |
| 1913 | }; |
Suresh Vankadara | 402d0ca | 2017-10-26 22:54:54 +0530 | [diff] [blame] | 1914 | |
| 1915 | cci0_active: cci0_active { |
| 1916 | mux { |
| 1917 | /* CLK, DATA */ |
| 1918 | pins = "gpio17","gpio18"; |
| 1919 | function = "cci_i2c"; |
| 1920 | }; |
| 1921 | |
| 1922 | config { |
| 1923 | pins = "gpio17","gpio18"; |
| 1924 | bias-pull-up; /* PULL UP*/ |
| 1925 | drive-strength = <2>; /* 2 MA */ |
| 1926 | }; |
| 1927 | }; |
| 1928 | |
| 1929 | cci0_suspend: cci0_suspend { |
| 1930 | mux { |
| 1931 | /* CLK, DATA */ |
| 1932 | pins = "gpio17","gpio18"; |
| 1933 | function = "cci_i2c"; |
| 1934 | }; |
| 1935 | |
| 1936 | config { |
| 1937 | pins = "gpio17","gpio18"; |
| 1938 | bias-pull-down; /* PULL DOWN */ |
| 1939 | drive-strength = <2>; /* 2 MA */ |
| 1940 | }; |
| 1941 | }; |
| 1942 | |
| 1943 | cci1_active: cci1_active { |
| 1944 | mux { |
| 1945 | /* CLK, DATA */ |
| 1946 | pins = "gpio19","gpio20"; |
| 1947 | function = "cci_i2c"; |
| 1948 | }; |
| 1949 | |
| 1950 | config { |
| 1951 | pins = "gpio19","gpio20"; |
| 1952 | bias-pull-up; /* PULL UP*/ |
| 1953 | drive-strength = <2>; /* 2 MA */ |
| 1954 | }; |
| 1955 | }; |
| 1956 | |
| 1957 | cci1_suspend: cci1_suspend { |
| 1958 | mux { |
| 1959 | /* CLK, DATA */ |
| 1960 | pins = "gpio19","gpio20"; |
| 1961 | function = "cci_i2c"; |
| 1962 | }; |
| 1963 | |
| 1964 | config { |
| 1965 | pins = "gpio19","gpio20"; |
| 1966 | bias-pull-down; /* PULL DOWN */ |
| 1967 | drive-strength = <2>; /* 2 MA */ |
| 1968 | }; |
| 1969 | }; |
| 1970 | |
| 1971 | cam_sensor_rear_active: cam_sensor_rear_active { |
| 1972 | /* RESET */ |
| 1973 | mux { |
| 1974 | pins = "gpio30"; |
| 1975 | function = "gpio"; |
| 1976 | }; |
| 1977 | |
| 1978 | config { |
| 1979 | pins = "gpio30"; |
| 1980 | bias-disable; /* No PULL */ |
| 1981 | drive-strength = <2>; /* 2 MA */ |
| 1982 | }; |
| 1983 | }; |
| 1984 | |
| 1985 | cam_sensor_rear_suspend: cam_sensor_rear_suspend { |
| 1986 | /* RESET */ |
| 1987 | mux { |
| 1988 | pins = "gpio30"; |
| 1989 | function = "gpio"; |
| 1990 | }; |
| 1991 | |
| 1992 | config { |
| 1993 | pins = "gpio30"; |
| 1994 | bias-pull-down; /* PULL DOWN */ |
| 1995 | drive-strength = <2>; /* 2 MA */ |
| 1996 | output-low; |
| 1997 | }; |
| 1998 | }; |
| 1999 | |
| 2000 | cam_sensor_rear_vana: cam_sensor_rear_vana { |
| 2001 | /* AVDD LDO */ |
| 2002 | mux { |
| 2003 | pins = "gpio8"; |
| 2004 | function = "gpio"; |
| 2005 | }; |
| 2006 | |
| 2007 | config { |
| 2008 | pins = "gpio8"; |
| 2009 | bias-disable; /* No PULL */ |
| 2010 | drive-strength = <2>; /* 2 MA */ |
| 2011 | }; |
| 2012 | }; |
| 2013 | |
| 2014 | cam_sensor_rear_vio: cam_sensor_rear_vio { |
| 2015 | /* DOVDD LDO */ |
| 2016 | mux { |
| 2017 | pins = "gpio29"; |
| 2018 | function = "gpio"; |
| 2019 | }; |
| 2020 | |
| 2021 | config { |
| 2022 | pins = "gpio29"; |
| 2023 | bias-disable; /* No PULL */ |
| 2024 | drive-strength = <2>; /* 2 MA */ |
| 2025 | }; |
| 2026 | }; |
| 2027 | |
| 2028 | cam_sensor_mclk0_active: cam_sensor_mclk0_active { |
| 2029 | /* MCLK0 */ |
| 2030 | mux { |
| 2031 | pins = "gpio13"; |
| 2032 | function = "cam_mclk"; |
| 2033 | }; |
| 2034 | |
| 2035 | config { |
| 2036 | pins = "gpio13"; |
| 2037 | bias-disable; /* No PULL */ |
| 2038 | drive-strength = <2>; /* 2 MA */ |
| 2039 | }; |
| 2040 | }; |
| 2041 | |
| 2042 | cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend { |
| 2043 | /* MCLK0 */ |
| 2044 | mux { |
| 2045 | pins = "gpio13"; |
| 2046 | function = "cam_mclk"; |
| 2047 | }; |
| 2048 | |
| 2049 | config { |
| 2050 | pins = "gpio13"; |
| 2051 | bias-pull-down; /* PULL DOWN */ |
| 2052 | drive-strength = <2>; /* 2 MA */ |
| 2053 | }; |
| 2054 | }; |
| 2055 | |
| 2056 | cam_sensor_front_active: cam_sensor_front_active { |
| 2057 | /* RESET */ |
| 2058 | mux { |
| 2059 | pins = "gpio9"; |
| 2060 | function = "gpio"; |
| 2061 | }; |
| 2062 | |
| 2063 | config { |
| 2064 | pins = "gpio9"; |
| 2065 | bias-disable; /* No PULL */ |
| 2066 | drive-strength = <2>; /* 2 MA */ |
| 2067 | }; |
| 2068 | }; |
| 2069 | |
| 2070 | cam_sensor_front_suspend: cam_sensor_front_suspend { |
| 2071 | /* RESET */ |
| 2072 | mux { |
| 2073 | pins = "gpio9"; |
| 2074 | function = "gpio"; |
| 2075 | }; |
| 2076 | |
| 2077 | config { |
| 2078 | pins = "gpio9"; |
| 2079 | bias-pull-down; /* PULL DOWN */ |
| 2080 | drive-strength = <2>; /* 2 MA */ |
| 2081 | output-low; |
| 2082 | }; |
| 2083 | }; |
| 2084 | |
| 2085 | cam_sensor_rear2_active: cam_sensor_rear2_active { |
| 2086 | /* RESET */ |
| 2087 | mux { |
| 2088 | pins = "gpio28"; |
| 2089 | function = "gpio"; |
| 2090 | }; |
| 2091 | |
| 2092 | config { |
| 2093 | pins = "gpio28"; |
| 2094 | bias-disable; /* No PULL */ |
| 2095 | drive-strength = <2>; /* 2 MA */ |
| 2096 | }; |
| 2097 | }; |
| 2098 | |
| 2099 | cam_sensor_rear2_suspend: cam_sensor_rear2_suspend { |
| 2100 | /* RESET */ |
| 2101 | mux { |
| 2102 | pins = "gpio28"; |
| 2103 | function = "gpio"; |
| 2104 | }; |
| 2105 | |
| 2106 | config { |
| 2107 | pins = "gpio28"; |
| 2108 | bias-pull-down; /* PULL DOWN */ |
| 2109 | drive-strength = <2>; /* 2 MA */ |
| 2110 | output-low; |
| 2111 | }; |
| 2112 | }; |
| 2113 | |
| 2114 | cam_sensor_mclk1_active: cam_sensor_mclk1_active { |
| 2115 | /* MCLK1 */ |
| 2116 | mux { |
| 2117 | pins = "gpio14"; |
| 2118 | function = "cam_mclk"; |
| 2119 | }; |
| 2120 | |
| 2121 | config { |
| 2122 | pins = "gpio14"; |
| 2123 | bias-disable; /* No PULL */ |
| 2124 | drive-strength = <2>; /* 2 MA */ |
| 2125 | }; |
| 2126 | }; |
| 2127 | |
| 2128 | cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend { |
| 2129 | /* MCLK1 */ |
| 2130 | mux { |
| 2131 | pins = "gpio14"; |
| 2132 | function = "cam_mclk"; |
| 2133 | }; |
| 2134 | |
| 2135 | config { |
| 2136 | pins = "gpio14"; |
| 2137 | bias-pull-down; /* PULL DOWN */ |
| 2138 | drive-strength = <2>; /* 2 MA */ |
| 2139 | }; |
| 2140 | }; |
| 2141 | |
| 2142 | cam_sensor_mclk2_active: cam_sensor_mclk2_active { |
| 2143 | /* MCLK2 */ |
| 2144 | mux { |
| 2145 | pins = "gpio15"; |
| 2146 | function = "cam_mclk"; |
| 2147 | }; |
| 2148 | |
| 2149 | config { |
| 2150 | pins = "gpio15"; |
| 2151 | bias-disable; /* No PULL */ |
| 2152 | drive-strength = <2>; /* 2 MA */ |
| 2153 | }; |
| 2154 | }; |
| 2155 | |
| 2156 | cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend { |
| 2157 | /* MCLK2 */ |
| 2158 | mux { |
| 2159 | pins = "gpio15"; |
| 2160 | function = "cam_mclk"; |
| 2161 | }; |
| 2162 | |
| 2163 | config { |
| 2164 | pins = "gpio15"; |
| 2165 | bias-pull-down; /* PULL DOWN */ |
| 2166 | drive-strength = <2>; /* 2 MA */ |
| 2167 | }; |
| 2168 | }; |
Tirupathi Reddy | 53b92a6 | 2017-10-26 13:57:42 +0530 | [diff] [blame] | 2169 | |
| 2170 | nx30p6093_intr_default: nx30p6093_intr_default { |
| 2171 | mux { |
| 2172 | pins = "gpio5"; |
| 2173 | function = "gpio"; |
| 2174 | }; |
| 2175 | |
| 2176 | config { |
| 2177 | pins = "gpio5"; |
| 2178 | bias-disable; |
| 2179 | input-enable; |
| 2180 | }; |
| 2181 | }; |
Suresh Vankadara | 402d0ca | 2017-10-26 22:54:54 +0530 | [diff] [blame] | 2182 | }; |
| 2183 | }; |
| 2184 | |
Rohit kumar | 75f5ed2 | 2017-11-21 18:21:03 +0530 | [diff] [blame] | 2185 | &pm660_gpios { |
| 2186 | tasha_mclk { |
| 2187 | tasha_mclk_default: tasha_mclk_default{ |
| 2188 | pins = "gpio3"; |
| 2189 | function = "func1"; |
| 2190 | qcom,drive-strength = <2>; |
| 2191 | power-source = <0>; |
| 2192 | bias-disable; |
| 2193 | output-low; |
| 2194 | }; |
| 2195 | }; |
| 2196 | }; |
| 2197 | |
Suresh Vankadara | 402d0ca | 2017-10-26 22:54:54 +0530 | [diff] [blame] | 2198 | &pm660l_gpios { |
| 2199 | camera_rear_dvdd_en { |
| 2200 | camera_rear_dvdd_en_default: camera_rear_dvdd_en_default { |
| 2201 | pins = "gpio4"; |
| 2202 | function = "normal"; |
| 2203 | power-source = <0>; |
| 2204 | output-low; |
| 2205 | }; |
| 2206 | }; |
| 2207 | |
| 2208 | camera_dvdd_en { |
| 2209 | camera_dvdd_en_default: camera_dvdd_en_default { |
| 2210 | pins = "gpio3"; |
| 2211 | function = "normal"; |
| 2212 | power-source = <0>; |
| 2213 | output-low; |
| 2214 | }; |
Channagoud Kadabi | de5a121 | 2017-01-20 15:27:51 -0800 | [diff] [blame] | 2215 | }; |
| 2216 | }; |
Ashay Jaiswal | 8194030 | 2017-09-20 15:17:58 +0530 | [diff] [blame] | 2217 | |
| 2218 | &pm660l_gpios { |
Fenglin Wu | 8ec09b1 | 2017-10-11 20:25:29 +0800 | [diff] [blame] | 2219 | camera0_dvdd_en_default: camera0_dvdd_en_default { |
| 2220 | pins = "gpio3"; |
| 2221 | function = "normal"; |
| 2222 | power-source = <0>; |
| 2223 | output-low; |
| 2224 | }; |
| 2225 | |
| 2226 | camera1_dvdd_en_default: camera1_dvdd_en_default { |
| 2227 | pins = "gpio4"; |
| 2228 | function = "normal"; |
| 2229 | power-source = <0>; |
| 2230 | output-low; |
| 2231 | }; |
| 2232 | |
Ashay Jaiswal | 8194030 | 2017-09-20 15:17:58 +0530 | [diff] [blame] | 2233 | key_vol_up { |
| 2234 | key_vol_up_default: key_vol_up_default { |
| 2235 | pins = "gpio7"; |
| 2236 | function = "normal"; |
| 2237 | input-enable; |
| 2238 | bias-pull-up; |
| 2239 | power-source = <0>; |
| 2240 | }; |
| 2241 | }; |
| 2242 | }; |
Fenglin Wu | 8ec09b1 | 2017-10-11 20:25:29 +0800 | [diff] [blame] | 2243 | |
| 2244 | &pm660_gpios { |
Rohit Rangwani | 0a1cd65 | 2017-09-19 13:29:12 +0530 | [diff] [blame] | 2245 | nfc_clk { |
| 2246 | nfc_clk_default: nfc_clk_default { |
| 2247 | pins = "gpio4"; |
| 2248 | function = "normal"; |
| 2249 | input-enable; |
| 2250 | power-source = <1>; |
| 2251 | }; |
| 2252 | }; |
Fenglin Wu | 8ec09b1 | 2017-10-11 20:25:29 +0800 | [diff] [blame] | 2253 | smb_shutdown_default: smb_shutdown_default { |
| 2254 | pins = "gpio11"; |
| 2255 | function = "normal"; |
| 2256 | power-source = <0>; |
| 2257 | qcom,drive-strength = <3>; |
| 2258 | output-high; |
| 2259 | }; |
| 2260 | }; |