Ohad Ben-Cohen | ab493a0 | 2011-06-02 02:48:05 +0300 | [diff] [blame] | 1 | # IOMMU_API always gets selected by whoever wants it. |
| 2 | config IOMMU_API |
| 3 | bool |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 4 | |
Joerg Roedel | 68255b6 | 2011-06-14 15:51:54 +0200 | [diff] [blame] | 5 | menuconfig IOMMU_SUPPORT |
| 6 | bool "IOMMU Hardware Support" |
| 7 | default y |
| 8 | ---help--- |
| 9 | Say Y here if you want to compile device drivers for IO Memory |
| 10 | Management Units into the kernel. These devices usually allow to |
| 11 | remap DMA requests and/or remap interrupts from other devices on the |
| 12 | system. |
| 13 | |
| 14 | if IOMMU_SUPPORT |
| 15 | |
Hiroshi Doyu | 4e0ee78 | 2012-06-25 14:23:54 +0300 | [diff] [blame] | 16 | config OF_IOMMU |
| 17 | def_bool y |
| 18 | depends on OF |
| 19 | |
Varun Sethi | 695093e | 2013-07-15 10:20:57 +0530 | [diff] [blame] | 20 | config FSL_PAMU |
| 21 | bool "Freescale IOMMU support" |
| 22 | depends on PPC_E500MC |
| 23 | select IOMMU_API |
| 24 | select GENERIC_ALLOCATOR |
| 25 | help |
| 26 | Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms. |
| 27 | PAMU can authorize memory access, remap the memory address, and remap I/O |
| 28 | transaction types. |
| 29 | |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 30 | # MSM IOMMU support |
| 31 | config MSM_IOMMU |
| 32 | bool "MSM IOMMU Support" |
| 33 | depends on ARCH_MSM8X60 || ARCH_MSM8960 |
| 34 | select IOMMU_API |
| 35 | help |
| 36 | Support for the IOMMUs found on certain Qualcomm SOCs. |
| 37 | These IOMMUs allow virtualization of the address space used by most |
| 38 | cores within the multimedia subsystem. |
| 39 | |
| 40 | If unsure, say N here. |
| 41 | |
| 42 | config IOMMU_PGTABLES_L2 |
| 43 | def_bool y |
| 44 | depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n |
Ohad Ben-Cohen | 29b6841 | 2011-06-05 18:22:18 +0300 | [diff] [blame] | 45 | |
| 46 | # AMD IOMMU support |
| 47 | config AMD_IOMMU |
| 48 | bool "AMD IOMMU support" |
| 49 | select SWIOTLB |
| 50 | select PCI_MSI |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 51 | select PCI_ATS |
| 52 | select PCI_PRI |
| 53 | select PCI_PASID |
Ohad Ben-Cohen | 29b6841 | 2011-06-05 18:22:18 +0300 | [diff] [blame] | 54 | select IOMMU_API |
Thomas Petazzoni | 0dbc607 | 2013-10-03 11:59:14 +0200 | [diff] [blame] | 55 | depends on X86_64 && PCI && ACPI |
Ohad Ben-Cohen | 29b6841 | 2011-06-05 18:22:18 +0300 | [diff] [blame] | 56 | ---help--- |
| 57 | With this option you can enable support for AMD IOMMU hardware in |
| 58 | your system. An IOMMU is a hardware component which provides |
| 59 | remapping of DMA memory accesses from devices. With an AMD IOMMU you |
Masanari Iida | 59bf896 | 2012-04-18 00:01:21 +0900 | [diff] [blame] | 60 | can isolate the DMA memory of different devices and protect the |
Ohad Ben-Cohen | 29b6841 | 2011-06-05 18:22:18 +0300 | [diff] [blame] | 61 | system from misbehaving device drivers or hardware. |
| 62 | |
| 63 | You can find out if your system has an AMD IOMMU if you look into |
| 64 | your BIOS for an option to enable it or if you have an IVRS ACPI |
| 65 | table. |
| 66 | |
| 67 | config AMD_IOMMU_STATS |
| 68 | bool "Export AMD IOMMU statistics to debugfs" |
| 69 | depends on AMD_IOMMU |
| 70 | select DEBUG_FS |
| 71 | ---help--- |
| 72 | This option enables code in the AMD IOMMU driver to collect various |
| 73 | statistics about whats happening in the driver and exports that |
| 74 | information to userspace via debugfs. |
| 75 | If unsure, say N. |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 76 | |
Joerg Roedel | e3c495c | 2011-11-09 12:31:15 +0100 | [diff] [blame] | 77 | config AMD_IOMMU_V2 |
Kees Cook | a446e21 | 2013-01-16 18:53:39 -0800 | [diff] [blame] | 78 | tristate "AMD IOMMU Version 2 driver" |
Borislav Petkov | e5cac32 | 2014-07-10 12:44:56 +0200 | [diff] [blame] | 79 | depends on AMD_IOMMU |
Joerg Roedel | 8736b2c | 2011-11-24 16:21:52 +0100 | [diff] [blame] | 80 | select MMU_NOTIFIER |
Joerg Roedel | e3c495c | 2011-11-09 12:31:15 +0100 | [diff] [blame] | 81 | ---help--- |
| 82 | This option enables support for the AMD IOMMUv2 features of the IOMMU |
| 83 | hardware. Select this option if you want to use devices that support |
Masanari Iida | 59bf896 | 2012-04-18 00:01:21 +0900 | [diff] [blame] | 84 | the PCI PRI and PASID interface. |
Joerg Roedel | e3c495c | 2011-11-09 12:31:15 +0100 | [diff] [blame] | 85 | |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 86 | # Intel IOMMU support |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 87 | config DMAR_TABLE |
| 88 | bool |
| 89 | |
| 90 | config INTEL_IOMMU |
| 91 | bool "Support for Intel IOMMU using DMA Remapping Devices" |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 92 | depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) |
| 93 | select IOMMU_API |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 94 | select DMAR_TABLE |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 95 | help |
| 96 | DMA remapping (DMAR) devices support enables independent address |
| 97 | translations for Direct Memory Access (DMA) from devices. |
| 98 | These DMA remapping devices are reported via ACPI tables |
| 99 | and include PCI device scope covered by these DMA |
| 100 | remapping devices. |
| 101 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 102 | config INTEL_IOMMU_DEFAULT_ON |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 103 | def_bool y |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 104 | prompt "Enable Intel DMA Remapping Devices by default" |
| 105 | depends on INTEL_IOMMU |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 106 | help |
| 107 | Selecting this option will enable a DMAR device at boot time if |
| 108 | one is found. If this option is not selected, DMAR support can |
| 109 | be enabled by passing intel_iommu=on to the kernel. |
| 110 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 111 | config INTEL_IOMMU_BROKEN_GFX_WA |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 112 | bool "Workaround broken graphics drivers (going away soon)" |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 113 | depends on INTEL_IOMMU && BROKEN && X86 |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 114 | ---help--- |
| 115 | Current Graphics drivers tend to use physical address |
| 116 | for DMA and avoid using DMA APIs. Setting this config |
| 117 | option permits the IOMMU driver to set a unity map for |
| 118 | all the OS-visible memory. Hence the driver can continue |
| 119 | to use physical addresses for DMA, at least until this |
| 120 | option is removed in the 2.6.32 kernel. |
| 121 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 122 | config INTEL_IOMMU_FLOPPY_WA |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 123 | def_bool y |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 124 | depends on INTEL_IOMMU && X86 |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 125 | ---help--- |
| 126 | Floppy disk drivers are known to bypass DMA API calls |
| 127 | thereby failing to work when IOMMU is enabled. This |
| 128 | workaround will setup a 1:1 mapping for the first |
| 129 | 16MiB to make floppy (an ISA device) work. |
| 130 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 131 | config IRQ_REMAP |
Kees Cook | a446e21 | 2013-01-16 18:53:39 -0800 | [diff] [blame] | 132 | bool "Support for Interrupt Remapping" |
| 133 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 134 | select DMAR_TABLE |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 135 | ---help--- |
| 136 | Supports Interrupt remapping for IO-APIC and MSI devices. |
| 137 | To use x2apic mode in the CPU's which support x2APIC enhancements or |
| 138 | to support platforms with CPU's having > 8 bit APIC ID, say Y. |
Joerg Roedel | 68255b6 | 2011-06-14 15:51:54 +0200 | [diff] [blame] | 139 | |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 140 | # OMAP IOMMU support |
| 141 | config OMAP_IOMMU |
| 142 | bool "OMAP IOMMU Support" |
Arnd Bergmann | ae19158 | 2013-03-05 23:16:48 +0100 | [diff] [blame] | 143 | depends on ARCH_OMAP2PLUS |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 144 | select IOMMU_API |
| 145 | |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 146 | config OMAP_IOMMU_DEBUG |
Laurent Pinchart | baaa7b5 | 2014-07-18 12:49:55 +0200 | [diff] [blame] | 147 | tristate "Export OMAP IOMMU internals in DebugFS" |
| 148 | depends on OMAP_IOMMU && DEBUG_FS |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 149 | help |
| 150 | Select this to see extensive information about |
Laurent Pinchart | baaa7b5 | 2014-07-18 12:49:55 +0200 | [diff] [blame] | 151 | the internal state of OMAP IOMMU in debugfs. |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 152 | |
| 153 | Say N unless you know you need this. |
| 154 | |
Hiroshi DOYU | d53e54b | 2011-11-16 17:36:37 +0200 | [diff] [blame] | 155 | config TEGRA_IOMMU_GART |
| 156 | bool "Tegra GART IOMMU Support" |
| 157 | depends on ARCH_TEGRA_2x_SOC |
| 158 | select IOMMU_API |
| 159 | help |
| 160 | Enables support for remapping discontiguous physical memory |
| 161 | shared with the operating system into contiguous I/O virtual |
| 162 | space through the GART (Graphics Address Relocation Table) |
| 163 | hardware included on Tegra SoCs. |
| 164 | |
Hiroshi DOYU | 7a31f6f | 2011-11-17 07:31:31 +0200 | [diff] [blame] | 165 | config TEGRA_IOMMU_SMMU |
Thierry Reding | 8918465 | 2014-04-16 09:24:44 +0200 | [diff] [blame] | 166 | bool "NVIDIA Tegra SMMU Support" |
| 167 | depends on ARCH_TEGRA |
| 168 | depends on TEGRA_AHB |
| 169 | depends on TEGRA_MC |
Hiroshi DOYU | 7a31f6f | 2011-11-17 07:31:31 +0200 | [diff] [blame] | 170 | select IOMMU_API |
| 171 | help |
Thierry Reding | 8918465 | 2014-04-16 09:24:44 +0200 | [diff] [blame] | 172 | This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra |
| 173 | SoCs (Tegra30 up to Tegra124). |
Hiroshi DOYU | 7a31f6f | 2011-11-17 07:31:31 +0200 | [diff] [blame] | 174 | |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 175 | config EXYNOS_IOMMU |
| 176 | bool "Exynos IOMMU Support" |
Mark Brown | 20911ce | 2014-12-15 15:54:42 +0000 | [diff] [blame^] | 177 | depends on ARCH_EXYNOS && ARM |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 178 | select IOMMU_API |
Tushar Behera | 4802c1d | 2014-07-04 15:01:08 +0530 | [diff] [blame] | 179 | select ARM_DMA_USE_IOMMU |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 180 | help |
Sachin Kamat | 5455d70 | 2014-05-22 09:50:55 +0530 | [diff] [blame] | 181 | Support for the IOMMU (System MMU) of Samsung Exynos application |
| 182 | processor family. This enables H/W multimedia accelerators to see |
| 183 | non-linear physical memory chunks as linear memory in their |
| 184 | address space. |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 185 | |
| 186 | If unsure, say N here. |
| 187 | |
| 188 | config EXYNOS_IOMMU_DEBUG |
| 189 | bool "Debugging log for Exynos IOMMU" |
| 190 | depends on EXYNOS_IOMMU |
| 191 | help |
| 192 | Select this to see the detailed log message that shows what |
Sachin Kamat | 5455d70 | 2014-05-22 09:50:55 +0530 | [diff] [blame] | 193 | happens in the IOMMU driver. |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 194 | |
Sachin Kamat | 5455d70 | 2014-05-22 09:50:55 +0530 | [diff] [blame] | 195 | Say N unless you need kernel log message for IOMMU debugging. |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 196 | |
Hideki EIRAKU | c2c460f | 2013-01-21 19:54:26 +0900 | [diff] [blame] | 197 | config SHMOBILE_IPMMU |
| 198 | bool |
| 199 | |
| 200 | config SHMOBILE_IPMMU_TLB |
| 201 | bool |
| 202 | |
| 203 | config SHMOBILE_IOMMU |
| 204 | bool "IOMMU for Renesas IPMMU/IPMMUI" |
| 205 | default n |
Linus Torvalds | f63c482 | 2013-11-15 18:57:42 -0800 | [diff] [blame] | 206 | depends on ARM |
Paul Bolle | b835443 | 2014-02-08 22:21:54 +0100 | [diff] [blame] | 207 | depends on ARCH_SHMOBILE || COMPILE_TEST |
Hideki EIRAKU | c2c460f | 2013-01-21 19:54:26 +0900 | [diff] [blame] | 208 | select IOMMU_API |
| 209 | select ARM_DMA_USE_IOMMU |
| 210 | select SHMOBILE_IPMMU |
| 211 | select SHMOBILE_IPMMU_TLB |
| 212 | help |
| 213 | Support for Renesas IPMMU/IPMMUI. This option enables |
| 214 | remapping of DMA memory accesses from all of the IP blocks |
| 215 | on the ICB. |
| 216 | |
| 217 | Warning: Drivers (including userspace drivers of UIO |
| 218 | devices) of the IP blocks on the ICB *must* use addresses |
| 219 | allocated from the IPMMU (iova) for DMA with this option |
| 220 | enabled. |
| 221 | |
| 222 | If unsure, say N. |
| 223 | |
| 224 | choice |
| 225 | prompt "IPMMU/IPMMUI address space size" |
| 226 | default SHMOBILE_IOMMU_ADDRSIZE_2048MB |
| 227 | depends on SHMOBILE_IOMMU |
| 228 | help |
| 229 | This option sets IPMMU/IPMMUI address space size by |
| 230 | adjusting the 1st level page table size. The page table size |
| 231 | is calculated as follows: |
| 232 | |
| 233 | page table size = number of page table entries * 4 bytes |
| 234 | number of page table entries = address space size / 1 MiB |
| 235 | |
| 236 | For example, when the address space size is 2048 MiB, the |
| 237 | 1st level page table size is 8192 bytes. |
| 238 | |
| 239 | config SHMOBILE_IOMMU_ADDRSIZE_2048MB |
| 240 | bool "2 GiB" |
| 241 | |
| 242 | config SHMOBILE_IOMMU_ADDRSIZE_1024MB |
| 243 | bool "1 GiB" |
| 244 | |
| 245 | config SHMOBILE_IOMMU_ADDRSIZE_512MB |
| 246 | bool "512 MiB" |
| 247 | |
| 248 | config SHMOBILE_IOMMU_ADDRSIZE_256MB |
| 249 | bool "256 MiB" |
| 250 | |
| 251 | config SHMOBILE_IOMMU_ADDRSIZE_128MB |
| 252 | bool "128 MiB" |
| 253 | |
| 254 | config SHMOBILE_IOMMU_ADDRSIZE_64MB |
| 255 | bool "64 MiB" |
| 256 | |
| 257 | config SHMOBILE_IOMMU_ADDRSIZE_32MB |
| 258 | bool "32 MiB" |
| 259 | |
| 260 | endchoice |
| 261 | |
| 262 | config SHMOBILE_IOMMU_L1SIZE |
| 263 | int |
| 264 | default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB |
| 265 | default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB |
| 266 | default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB |
| 267 | default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB |
| 268 | default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB |
| 269 | default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB |
| 270 | default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB |
| 271 | |
Laurent Pinchart | d25a2a1 | 2014-04-02 12:47:37 +0200 | [diff] [blame] | 272 | config IPMMU_VMSA |
| 273 | bool "Renesas VMSA-compatible IPMMU" |
| 274 | depends on ARM_LPAE |
| 275 | depends on ARCH_SHMOBILE || COMPILE_TEST |
| 276 | select IOMMU_API |
| 277 | select ARM_DMA_USE_IOMMU |
| 278 | help |
| 279 | Support for the Renesas VMSA-compatible IPMMU Renesas found in the |
| 280 | R-Mobile APE6 and R-Car H2/M2 SoCs. |
| 281 | |
| 282 | If unsure, say N. |
| 283 | |
Alexey Kardashevskiy | 4e13c1a | 2013-05-21 13:33:09 +1000 | [diff] [blame] | 284 | config SPAPR_TCE_IOMMU |
| 285 | bool "sPAPR TCE IOMMU Support" |
Alexey Kardashevskiy | 5b25199 | 2013-05-21 13:33:11 +1000 | [diff] [blame] | 286 | depends on PPC_POWERNV || PPC_PSERIES |
Alexey Kardashevskiy | 4e13c1a | 2013-05-21 13:33:09 +1000 | [diff] [blame] | 287 | select IOMMU_API |
| 288 | help |
| 289 | Enables bits of IOMMU API required by VFIO. The iommu_ops |
| 290 | is not implemented as it is not necessary for VFIO. |
| 291 | |
Will Deacon | 45ae7cf | 2013-06-24 18:31:25 +0100 | [diff] [blame] | 292 | config ARM_SMMU |
| 293 | bool "ARM Ltd. System MMU (SMMU) Support" |
| 294 | depends on ARM64 || (ARM_LPAE && OF) |
| 295 | select IOMMU_API |
| 296 | select ARM_DMA_USE_IOMMU if ARM |
| 297 | help |
| 298 | Support for implementations of the ARM System MMU architecture |
| 299 | versions 1 and 2. The driver supports both v7l and v8l table |
| 300 | formats with 4k and 64k page sizes. |
| 301 | |
| 302 | Say Y here if your SoC includes an IOMMU device implementing |
| 303 | the ARM SMMU architecture. |
| 304 | |
Joerg Roedel | 68255b6 | 2011-06-14 15:51:54 +0200 | [diff] [blame] | 305 | endif # IOMMU_SUPPORT |