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Naveen Krishna Ch8a73cd42013-10-16 11:00:42 +05301* Samsung's High Speed I2C controller
2
3The Samsung's High Speed I2C controller is used to interface with I2C devices
4at various speeds ranging from 100khz to 3.4Mhz.
5
6Required properties:
7 - compatible: value should be.
Naveen Krishna Ch218e1492014-04-28 14:29:58 +05308 -> "samsung,exynos5-hsi2c", (DEPRECATED)
9 for i2c compatible with HSI2C available
10 on Exynos5250 and Exynos5420 SoCs.
11 -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available
12 on Exynos5250 and Exynos5420 SoCs.
13 -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available
14 on Exynos5260 SoCs.
15
Naveen Krishna Ch8a73cd42013-10-16 11:00:42 +053016 - reg: physical base address of the controller and length of memory mapped
17 region.
18 - interrupts: interrupt number to the cpu.
19 - #address-cells: always 1 (for i2c addresses)
20 - #size-cells: always 0
21
22 - Pinctrl:
23 - pinctrl-0: Pin control group to be used for this controller.
24 - pinctrl-names: Should contain only one value - "default".
25
26Optional properties:
27 - clock-frequency: Desired operating frequency in Hz of the bus.
28 -> If not specified, the bus operates in fast-speed mode at
29 at 100khz.
30 -> If specified, the bus operates in high-speed mode only if the
31 clock-frequency is >= 1Mhz.
32
33Example:
34
35hsi2c@12ca0000 {
Naveen Krishna Ch218e1492014-04-28 14:29:58 +053036 compatible = "samsung,exynos5250-hsi2c";
Naveen Krishna Ch8a73cd42013-10-16 11:00:42 +053037 reg = <0x12ca0000 0x100>;
38 interrupts = <56>;
39 clock-frequency = <100000>;
40
41 pinctrl-0 = <&i2c4_bus>;
42 pinctrl-names = "default";
43
44 #address-cells = <1>;
45 #size-cells = <0>;
46
47 s2mps11_pmic@66 {
48 compatible = "samsung,s2mps11-pmic";
49 reg = <0x66>;
50 };
51};