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Guenter Roeck3ad50cc2014-10-29 10:44:56 -07001/*
2 * net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support
3 *
4 * Copyright (c) 2014 Guenter Roeck
5 *
6 * Derived from mv88e6123_61_65.c
7 * Copyright (c) 2008-2009 Marvell Semiconductor
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/delay.h>
16#include <linux/jiffies.h>
17#include <linux/list.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/platform_device.h>
21#include <linux/phy.h>
22#include <net/dsa.h>
23#include "mv88e6xxx.h"
24
Vivien Didelotf6271e62016-04-17 13:23:59 -040025static const struct mv88e6xxx_info mv88e6352_table[] = {
26 {
27 .prod_num = PORT_SWITCH_ID_PROD_NUM_6320,
Vivien Didelot22356472016-04-17 13:24:00 -040028 .family = MV88E6XXX_FAMILY_6320,
Vivien Didelotf6271e62016-04-17 13:23:59 -040029 .name = "Marvell 88E6320",
30 }, {
31 .prod_num = PORT_SWITCH_ID_PROD_NUM_6321,
Vivien Didelot22356472016-04-17 13:24:00 -040032 .family = MV88E6XXX_FAMILY_6320,
Vivien Didelotf6271e62016-04-17 13:23:59 -040033 .name = "Marvell 88E6321",
34 }, {
35 .prod_num = PORT_SWITCH_ID_PROD_NUM_6172,
Vivien Didelot22356472016-04-17 13:24:00 -040036 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040037 .name = "Marvell 88E6172",
38 }, {
39 .prod_num = PORT_SWITCH_ID_PROD_NUM_6176,
Vivien Didelot22356472016-04-17 13:24:00 -040040 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040041 .name = "Marvell 88E6176",
42 }, {
43 .prod_num = PORT_SWITCH_ID_PROD_NUM_6240,
Vivien Didelot22356472016-04-17 13:24:00 -040044 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040045 .name = "Marvell 88E6240",
46 }, {
47 .prod_num = PORT_SWITCH_ID_PROD_NUM_6352,
Vivien Didelot22356472016-04-17 13:24:00 -040048 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040049 .name = "Marvell 88E6352",
50 }
Vivien Didelotb9b37712015-10-30 19:39:48 -040051};
52
Vivien Didelot0209d142016-04-17 13:23:55 -040053static const char *mv88e6352_drv_probe(struct device *dsa_dev,
54 struct device *host_dev, int sw_addr,
55 void **priv)
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070056{
Andrew Lunna77d43f2016-04-13 02:40:42 +020057 return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv,
58 mv88e6352_table,
59 ARRAY_SIZE(mv88e6352_table));
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070060}
61
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070062static int mv88e6352_setup_global(struct dsa_switch *ds)
63{
Andrew Lunn15966a22015-05-06 01:09:49 +020064 u32 upstream_port = dsa_upstream_port(ds);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070065 int ret;
Andrew Lunn15966a22015-05-06 01:09:49 +020066 u32 reg;
Andrew Lunn54d792f2015-05-06 01:09:47 +020067
68 ret = mv88e6xxx_setup_global(ds);
69 if (ret)
70 return ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070071
72 /* Discard packets with excessive collisions,
73 * mask all interrupt sources, enable PPU (bit 14, undocumented).
74 */
Andrew Lunn48ace4e2016-04-14 23:47:12 +020075 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL,
76 GLOBAL_CONTROL_PPU_ENABLE |
77 GLOBAL_CONTROL_DISCARD_EXCESS);
78 if (ret)
79 return ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070080
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070081 /* Configure the upstream port, and configure the upstream
82 * port as the port to which ingress and egress monitor frames
83 * are to be sent.
84 */
Andrew Lunn15966a22015-05-06 01:09:49 +020085 reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
86 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
87 upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
Andrew Lunn48ace4e2016-04-14 23:47:12 +020088 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
89 if (ret)
90 return ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070091
92 /* Disable remote management for now, and set the switch's
93 * DSA device number.
94 */
Andrew Lunn48ace4e2016-04-14 23:47:12 +020095 return mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x1c, ds->index & 0x1f);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070096}
97
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070098static int mv88e6352_setup(struct dsa_switch *ds)
99{
100 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
101 int ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700102
Guenter Roeckacdaffc2015-03-26 18:36:28 -0700103 ret = mv88e6xxx_setup_common(ds);
104 if (ret < 0)
105 return ret;
106
Andrew Lunn44e50dd2015-04-02 04:06:33 +0200107 ps->num_ports = 7;
108
Guenter Roeck33b43df2014-10-29 10:45:03 -0700109 mutex_init(&ps->eeprom_mutex);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700110
Andrew Lunn143a8302015-04-02 04:06:34 +0200111 ret = mv88e6xxx_switch_reset(ds, true);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700112 if (ret < 0)
113 return ret;
114
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700115 ret = mv88e6352_setup_global(ds);
116 if (ret < 0)
117 return ret;
118
Andrew Lunndbde9e62015-05-06 01:09:48 +0200119 return mv88e6xxx_setup_ports(ds);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700120}
121
Guenter Roeck33b43df2014-10-29 10:45:03 -0700122static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
123{
124 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
125 int ret;
126
127 mutex_lock(&ps->eeprom_mutex);
128
Andrew Lunn966bce32015-08-08 17:04:50 +0200129 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
130 GLOBAL2_EEPROM_OP_READ |
131 (addr & GLOBAL2_EEPROM_OP_ADDR_MASK));
Guenter Roeck33b43df2014-10-29 10:45:03 -0700132 if (ret < 0)
133 goto error;
134
Andrew Lunnf3044682015-02-14 19:17:50 +0100135 ret = mv88e6xxx_eeprom_busy_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700136 if (ret < 0)
137 goto error;
138
Andrew Lunn966bce32015-08-08 17:04:50 +0200139 ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700140error:
141 mutex_unlock(&ps->eeprom_mutex);
142 return ret;
143}
144
145static int mv88e6352_get_eeprom(struct dsa_switch *ds,
146 struct ethtool_eeprom *eeprom, u8 *data)
147{
148 int offset;
149 int len;
150 int ret;
151
152 offset = eeprom->offset;
153 len = eeprom->len;
154 eeprom->len = 0;
155
156 eeprom->magic = 0xc3ec4951;
157
Andrew Lunnf3044682015-02-14 19:17:50 +0100158 ret = mv88e6xxx_eeprom_load_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700159 if (ret < 0)
160 return ret;
161
162 if (offset & 1) {
163 int word;
164
165 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
166 if (word < 0)
167 return word;
168
169 *data++ = (word >> 8) & 0xff;
170
171 offset++;
172 len--;
173 eeprom->len++;
174 }
175
176 while (len >= 2) {
177 int word;
178
179 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
180 if (word < 0)
181 return word;
182
183 *data++ = word & 0xff;
184 *data++ = (word >> 8) & 0xff;
185
186 offset += 2;
187 len -= 2;
188 eeprom->len += 2;
189 }
190
191 if (len) {
192 int word;
193
194 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
195 if (word < 0)
196 return word;
197
198 *data++ = word & 0xff;
199
200 offset++;
201 len--;
202 eeprom->len++;
203 }
204
205 return 0;
206}
207
208static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds)
209{
210 int ret;
211
Andrew Lunn966bce32015-08-08 17:04:50 +0200212 ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700213 if (ret < 0)
214 return ret;
215
Andrew Lunn966bce32015-08-08 17:04:50 +0200216 if (!(ret & GLOBAL2_EEPROM_OP_WRITE_EN))
Guenter Roeck33b43df2014-10-29 10:45:03 -0700217 return -EROFS;
218
219 return 0;
220}
221
222static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,
223 u16 data)
224{
225 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
226 int ret;
227
228 mutex_lock(&ps->eeprom_mutex);
229
Andrew Lunn966bce32015-08-08 17:04:50 +0200230 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA, data);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700231 if (ret < 0)
232 goto error;
233
Andrew Lunn966bce32015-08-08 17:04:50 +0200234 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
235 GLOBAL2_EEPROM_OP_WRITE |
236 (addr & GLOBAL2_EEPROM_OP_ADDR_MASK));
Guenter Roeck33b43df2014-10-29 10:45:03 -0700237 if (ret < 0)
238 goto error;
239
Andrew Lunnf3044682015-02-14 19:17:50 +0100240 ret = mv88e6xxx_eeprom_busy_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700241error:
242 mutex_unlock(&ps->eeprom_mutex);
243 return ret;
244}
245
246static int mv88e6352_set_eeprom(struct dsa_switch *ds,
247 struct ethtool_eeprom *eeprom, u8 *data)
248{
249 int offset;
250 int ret;
251 int len;
252
253 if (eeprom->magic != 0xc3ec4951)
254 return -EINVAL;
255
256 ret = mv88e6352_eeprom_is_readonly(ds);
257 if (ret)
258 return ret;
259
260 offset = eeprom->offset;
261 len = eeprom->len;
262 eeprom->len = 0;
263
Andrew Lunnf3044682015-02-14 19:17:50 +0100264 ret = mv88e6xxx_eeprom_load_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700265 if (ret < 0)
266 return ret;
267
268 if (offset & 1) {
269 int word;
270
271 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
272 if (word < 0)
273 return word;
274
275 word = (*data++ << 8) | (word & 0xff);
276
277 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
278 if (ret < 0)
279 return ret;
280
281 offset++;
282 len--;
283 eeprom->len++;
284 }
285
286 while (len >= 2) {
287 int word;
288
289 word = *data++;
290 word |= *data++ << 8;
291
292 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
293 if (ret < 0)
294 return ret;
295
296 offset += 2;
297 len -= 2;
298 eeprom->len += 2;
299 }
300
301 if (len) {
302 int word;
303
304 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
305 if (word < 0)
306 return word;
307
308 word = (word & 0xff00) | *data++;
309
310 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
311 if (ret < 0)
312 return ret;
313
314 offset++;
315 len--;
316 eeprom->len++;
317 }
318
319 return 0;
320}
321
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700322struct dsa_switch_driver mv88e6352_switch_driver = {
323 .tag_protocol = DSA_TAG_PROTO_EDSA,
Andrew Lunne49bad32016-04-13 02:40:43 +0200324 .probe = mv88e6352_drv_probe,
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700325 .setup = mv88e6352_setup,
326 .set_addr = mv88e6xxx_set_addr_indirect,
Andrew Lunnfd3a0ee2015-04-02 04:06:36 +0200327 .phy_read = mv88e6xxx_phy_read_indirect,
328 .phy_write = mv88e6xxx_phy_write_indirect,
Andrew Lunne413e7e2015-04-02 04:06:38 +0200329 .get_strings = mv88e6xxx_get_strings,
330 .get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
331 .get_sset_count = mv88e6xxx_get_sset_count,
Andrew Lunndea87022015-08-31 15:56:47 +0200332 .adjust_link = mv88e6xxx_adjust_link,
Guenter Roeck04b0a802015-03-06 22:23:52 -0800333 .set_eee = mv88e6xxx_set_eee,
334 .get_eee = mv88e6xxx_get_eee,
Guenter Roeck276db3b2014-10-29 10:44:59 -0700335#ifdef CONFIG_NET_DSA_HWMON
Guenter Roeckc22995c2015-07-25 09:42:28 -0700336 .get_temp = mv88e6xxx_get_temp,
337 .get_temp_limit = mv88e6xxx_get_temp_limit,
338 .set_temp_limit = mv88e6xxx_set_temp_limit,
339 .get_temp_alarm = mv88e6xxx_get_temp_alarm,
Guenter Roeck276db3b2014-10-29 10:44:59 -0700340#endif
Guenter Roeck33b43df2014-10-29 10:45:03 -0700341 .get_eeprom = mv88e6352_get_eeprom,
342 .set_eeprom = mv88e6352_set_eeprom,
Guenter Roeck95d08b52014-10-29 10:45:06 -0700343 .get_regs_len = mv88e6xxx_get_regs_len,
344 .get_regs = mv88e6xxx_get_regs,
Vivien Didelot71327a42016-03-13 16:21:32 -0400345 .port_bridge_join = mv88e6xxx_port_bridge_join,
346 .port_bridge_leave = mv88e6xxx_port_bridge_leave,
Vivien Didelot43c44a92016-04-06 11:55:03 -0400347 .port_stp_state_set = mv88e6xxx_port_stp_state_set,
Vivien Didelot214cdb92016-02-26 13:16:08 -0500348 .port_vlan_filtering = mv88e6xxx_port_vlan_filtering,
Vivien Didelot76e398a2015-11-01 12:33:55 -0500349 .port_vlan_prepare = mv88e6xxx_port_vlan_prepare,
Vivien Didelot0d3b33e2015-08-13 12:52:22 -0400350 .port_vlan_add = mv88e6xxx_port_vlan_add,
Vivien Didelot7dad08d2015-08-13 12:52:21 -0400351 .port_vlan_del = mv88e6xxx_port_vlan_del,
Vivien Didelotceff5ef2016-02-23 12:13:55 -0500352 .port_vlan_dump = mv88e6xxx_port_vlan_dump,
Vivien Didelot146a3202015-10-08 11:35:12 -0400353 .port_fdb_prepare = mv88e6xxx_port_fdb_prepare,
Vivien Didelot2a778e12015-08-10 09:09:49 -0400354 .port_fdb_add = mv88e6xxx_port_fdb_add,
355 .port_fdb_del = mv88e6xxx_port_fdb_del,
Vivien Didelotf33475b2015-10-22 09:34:41 -0400356 .port_fdb_dump = mv88e6xxx_port_fdb_dump,
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700357};
358
Andrew Lunn1636d882015-05-06 01:09:50 +0200359MODULE_ALIAS("platform:mv88e6172");
Aleksey S. Kazantsev7c3d0d62015-07-07 20:38:15 -0700360MODULE_ALIAS("platform:mv88e6176");
361MODULE_ALIAS("platform:mv88e6320");
362MODULE_ALIAS("platform:mv88e6321");
363MODULE_ALIAS("platform:mv88e6352");