Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 1 | /* |
| 2 | * net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support |
| 3 | * |
| 4 | * Copyright (c) 2014 Guenter Roeck |
| 5 | * |
| 6 | * Derived from mv88e6123_61_65.c |
| 7 | * Copyright (c) 2008-2009 Marvell Semiconductor |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/jiffies.h> |
| 17 | #include <linux/list.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/netdevice.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/phy.h> |
| 22 | #include <net/dsa.h> |
| 23 | #include "mv88e6xxx.h" |
| 24 | |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 25 | static const struct mv88e6xxx_info mv88e6352_table[] = { |
| 26 | { |
| 27 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6320, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame^] | 28 | .family = MV88E6XXX_FAMILY_6320, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 29 | .name = "Marvell 88E6320", |
| 30 | }, { |
| 31 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6321, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame^] | 32 | .family = MV88E6XXX_FAMILY_6320, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 33 | .name = "Marvell 88E6321", |
| 34 | }, { |
| 35 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6172, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame^] | 36 | .family = MV88E6XXX_FAMILY_6352, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 37 | .name = "Marvell 88E6172", |
| 38 | }, { |
| 39 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6176, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame^] | 40 | .family = MV88E6XXX_FAMILY_6352, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 41 | .name = "Marvell 88E6176", |
| 42 | }, { |
| 43 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6240, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame^] | 44 | .family = MV88E6XXX_FAMILY_6352, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 45 | .name = "Marvell 88E6240", |
| 46 | }, { |
| 47 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6352, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame^] | 48 | .family = MV88E6XXX_FAMILY_6352, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 49 | .name = "Marvell 88E6352", |
| 50 | } |
Vivien Didelot | b9b3771 | 2015-10-30 19:39:48 -0400 | [diff] [blame] | 51 | }; |
| 52 | |
Vivien Didelot | 0209d14 | 2016-04-17 13:23:55 -0400 | [diff] [blame] | 53 | static const char *mv88e6352_drv_probe(struct device *dsa_dev, |
| 54 | struct device *host_dev, int sw_addr, |
| 55 | void **priv) |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 56 | { |
Andrew Lunn | a77d43f | 2016-04-13 02:40:42 +0200 | [diff] [blame] | 57 | return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv, |
| 58 | mv88e6352_table, |
| 59 | ARRAY_SIZE(mv88e6352_table)); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 60 | } |
| 61 | |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 62 | static int mv88e6352_setup_global(struct dsa_switch *ds) |
| 63 | { |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 64 | u32 upstream_port = dsa_upstream_port(ds); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 65 | int ret; |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 66 | u32 reg; |
Andrew Lunn | 54d792f | 2015-05-06 01:09:47 +0200 | [diff] [blame] | 67 | |
| 68 | ret = mv88e6xxx_setup_global(ds); |
| 69 | if (ret) |
| 70 | return ret; |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 71 | |
| 72 | /* Discard packets with excessive collisions, |
| 73 | * mask all interrupt sources, enable PPU (bit 14, undocumented). |
| 74 | */ |
Andrew Lunn | 48ace4e | 2016-04-14 23:47:12 +0200 | [diff] [blame] | 75 | ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL, |
| 76 | GLOBAL_CONTROL_PPU_ENABLE | |
| 77 | GLOBAL_CONTROL_DISCARD_EXCESS); |
| 78 | if (ret) |
| 79 | return ret; |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 80 | |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 81 | /* Configure the upstream port, and configure the upstream |
| 82 | * port as the port to which ingress and egress monitor frames |
| 83 | * are to be sent. |
| 84 | */ |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 85 | reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT | |
| 86 | upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT | |
| 87 | upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT; |
Andrew Lunn | 48ace4e | 2016-04-14 23:47:12 +0200 | [diff] [blame] | 88 | ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg); |
| 89 | if (ret) |
| 90 | return ret; |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 91 | |
| 92 | /* Disable remote management for now, and set the switch's |
| 93 | * DSA device number. |
| 94 | */ |
Andrew Lunn | 48ace4e | 2016-04-14 23:47:12 +0200 | [diff] [blame] | 95 | return mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x1c, ds->index & 0x1f); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 96 | } |
| 97 | |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 98 | static int mv88e6352_setup(struct dsa_switch *ds) |
| 99 | { |
| 100 | struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); |
| 101 | int ret; |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 102 | |
Guenter Roeck | acdaffc | 2015-03-26 18:36:28 -0700 | [diff] [blame] | 103 | ret = mv88e6xxx_setup_common(ds); |
| 104 | if (ret < 0) |
| 105 | return ret; |
| 106 | |
Andrew Lunn | 44e50dd | 2015-04-02 04:06:33 +0200 | [diff] [blame] | 107 | ps->num_ports = 7; |
| 108 | |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 109 | mutex_init(&ps->eeprom_mutex); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 110 | |
Andrew Lunn | 143a830 | 2015-04-02 04:06:34 +0200 | [diff] [blame] | 111 | ret = mv88e6xxx_switch_reset(ds, true); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 112 | if (ret < 0) |
| 113 | return ret; |
| 114 | |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 115 | ret = mv88e6352_setup_global(ds); |
| 116 | if (ret < 0) |
| 117 | return ret; |
| 118 | |
Andrew Lunn | dbde9e6 | 2015-05-06 01:09:48 +0200 | [diff] [blame] | 119 | return mv88e6xxx_setup_ports(ds); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 120 | } |
| 121 | |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 122 | static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr) |
| 123 | { |
| 124 | struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); |
| 125 | int ret; |
| 126 | |
| 127 | mutex_lock(&ps->eeprom_mutex); |
| 128 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 129 | ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP, |
| 130 | GLOBAL2_EEPROM_OP_READ | |
| 131 | (addr & GLOBAL2_EEPROM_OP_ADDR_MASK)); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 132 | if (ret < 0) |
| 133 | goto error; |
| 134 | |
Andrew Lunn | f304468 | 2015-02-14 19:17:50 +0100 | [diff] [blame] | 135 | ret = mv88e6xxx_eeprom_busy_wait(ds); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 136 | if (ret < 0) |
| 137 | goto error; |
| 138 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 139 | ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 140 | error: |
| 141 | mutex_unlock(&ps->eeprom_mutex); |
| 142 | return ret; |
| 143 | } |
| 144 | |
| 145 | static int mv88e6352_get_eeprom(struct dsa_switch *ds, |
| 146 | struct ethtool_eeprom *eeprom, u8 *data) |
| 147 | { |
| 148 | int offset; |
| 149 | int len; |
| 150 | int ret; |
| 151 | |
| 152 | offset = eeprom->offset; |
| 153 | len = eeprom->len; |
| 154 | eeprom->len = 0; |
| 155 | |
| 156 | eeprom->magic = 0xc3ec4951; |
| 157 | |
Andrew Lunn | f304468 | 2015-02-14 19:17:50 +0100 | [diff] [blame] | 158 | ret = mv88e6xxx_eeprom_load_wait(ds); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 159 | if (ret < 0) |
| 160 | return ret; |
| 161 | |
| 162 | if (offset & 1) { |
| 163 | int word; |
| 164 | |
| 165 | word = mv88e6352_read_eeprom_word(ds, offset >> 1); |
| 166 | if (word < 0) |
| 167 | return word; |
| 168 | |
| 169 | *data++ = (word >> 8) & 0xff; |
| 170 | |
| 171 | offset++; |
| 172 | len--; |
| 173 | eeprom->len++; |
| 174 | } |
| 175 | |
| 176 | while (len >= 2) { |
| 177 | int word; |
| 178 | |
| 179 | word = mv88e6352_read_eeprom_word(ds, offset >> 1); |
| 180 | if (word < 0) |
| 181 | return word; |
| 182 | |
| 183 | *data++ = word & 0xff; |
| 184 | *data++ = (word >> 8) & 0xff; |
| 185 | |
| 186 | offset += 2; |
| 187 | len -= 2; |
| 188 | eeprom->len += 2; |
| 189 | } |
| 190 | |
| 191 | if (len) { |
| 192 | int word; |
| 193 | |
| 194 | word = mv88e6352_read_eeprom_word(ds, offset >> 1); |
| 195 | if (word < 0) |
| 196 | return word; |
| 197 | |
| 198 | *data++ = word & 0xff; |
| 199 | |
| 200 | offset++; |
| 201 | len--; |
| 202 | eeprom->len++; |
| 203 | } |
| 204 | |
| 205 | return 0; |
| 206 | } |
| 207 | |
| 208 | static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds) |
| 209 | { |
| 210 | int ret; |
| 211 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 212 | ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 213 | if (ret < 0) |
| 214 | return ret; |
| 215 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 216 | if (!(ret & GLOBAL2_EEPROM_OP_WRITE_EN)) |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 217 | return -EROFS; |
| 218 | |
| 219 | return 0; |
| 220 | } |
| 221 | |
| 222 | static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr, |
| 223 | u16 data) |
| 224 | { |
| 225 | struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); |
| 226 | int ret; |
| 227 | |
| 228 | mutex_lock(&ps->eeprom_mutex); |
| 229 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 230 | ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA, data); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 231 | if (ret < 0) |
| 232 | goto error; |
| 233 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 234 | ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP, |
| 235 | GLOBAL2_EEPROM_OP_WRITE | |
| 236 | (addr & GLOBAL2_EEPROM_OP_ADDR_MASK)); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 237 | if (ret < 0) |
| 238 | goto error; |
| 239 | |
Andrew Lunn | f304468 | 2015-02-14 19:17:50 +0100 | [diff] [blame] | 240 | ret = mv88e6xxx_eeprom_busy_wait(ds); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 241 | error: |
| 242 | mutex_unlock(&ps->eeprom_mutex); |
| 243 | return ret; |
| 244 | } |
| 245 | |
| 246 | static int mv88e6352_set_eeprom(struct dsa_switch *ds, |
| 247 | struct ethtool_eeprom *eeprom, u8 *data) |
| 248 | { |
| 249 | int offset; |
| 250 | int ret; |
| 251 | int len; |
| 252 | |
| 253 | if (eeprom->magic != 0xc3ec4951) |
| 254 | return -EINVAL; |
| 255 | |
| 256 | ret = mv88e6352_eeprom_is_readonly(ds); |
| 257 | if (ret) |
| 258 | return ret; |
| 259 | |
| 260 | offset = eeprom->offset; |
| 261 | len = eeprom->len; |
| 262 | eeprom->len = 0; |
| 263 | |
Andrew Lunn | f304468 | 2015-02-14 19:17:50 +0100 | [diff] [blame] | 264 | ret = mv88e6xxx_eeprom_load_wait(ds); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 265 | if (ret < 0) |
| 266 | return ret; |
| 267 | |
| 268 | if (offset & 1) { |
| 269 | int word; |
| 270 | |
| 271 | word = mv88e6352_read_eeprom_word(ds, offset >> 1); |
| 272 | if (word < 0) |
| 273 | return word; |
| 274 | |
| 275 | word = (*data++ << 8) | (word & 0xff); |
| 276 | |
| 277 | ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word); |
| 278 | if (ret < 0) |
| 279 | return ret; |
| 280 | |
| 281 | offset++; |
| 282 | len--; |
| 283 | eeprom->len++; |
| 284 | } |
| 285 | |
| 286 | while (len >= 2) { |
| 287 | int word; |
| 288 | |
| 289 | word = *data++; |
| 290 | word |= *data++ << 8; |
| 291 | |
| 292 | ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word); |
| 293 | if (ret < 0) |
| 294 | return ret; |
| 295 | |
| 296 | offset += 2; |
| 297 | len -= 2; |
| 298 | eeprom->len += 2; |
| 299 | } |
| 300 | |
| 301 | if (len) { |
| 302 | int word; |
| 303 | |
| 304 | word = mv88e6352_read_eeprom_word(ds, offset >> 1); |
| 305 | if (word < 0) |
| 306 | return word; |
| 307 | |
| 308 | word = (word & 0xff00) | *data++; |
| 309 | |
| 310 | ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word); |
| 311 | if (ret < 0) |
| 312 | return ret; |
| 313 | |
| 314 | offset++; |
| 315 | len--; |
| 316 | eeprom->len++; |
| 317 | } |
| 318 | |
| 319 | return 0; |
| 320 | } |
| 321 | |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 322 | struct dsa_switch_driver mv88e6352_switch_driver = { |
| 323 | .tag_protocol = DSA_TAG_PROTO_EDSA, |
Andrew Lunn | e49bad3 | 2016-04-13 02:40:43 +0200 | [diff] [blame] | 324 | .probe = mv88e6352_drv_probe, |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 325 | .setup = mv88e6352_setup, |
| 326 | .set_addr = mv88e6xxx_set_addr_indirect, |
Andrew Lunn | fd3a0ee | 2015-04-02 04:06:36 +0200 | [diff] [blame] | 327 | .phy_read = mv88e6xxx_phy_read_indirect, |
| 328 | .phy_write = mv88e6xxx_phy_write_indirect, |
Andrew Lunn | e413e7e | 2015-04-02 04:06:38 +0200 | [diff] [blame] | 329 | .get_strings = mv88e6xxx_get_strings, |
| 330 | .get_ethtool_stats = mv88e6xxx_get_ethtool_stats, |
| 331 | .get_sset_count = mv88e6xxx_get_sset_count, |
Andrew Lunn | dea8702 | 2015-08-31 15:56:47 +0200 | [diff] [blame] | 332 | .adjust_link = mv88e6xxx_adjust_link, |
Guenter Roeck | 04b0a80 | 2015-03-06 22:23:52 -0800 | [diff] [blame] | 333 | .set_eee = mv88e6xxx_set_eee, |
| 334 | .get_eee = mv88e6xxx_get_eee, |
Guenter Roeck | 276db3b | 2014-10-29 10:44:59 -0700 | [diff] [blame] | 335 | #ifdef CONFIG_NET_DSA_HWMON |
Guenter Roeck | c22995c | 2015-07-25 09:42:28 -0700 | [diff] [blame] | 336 | .get_temp = mv88e6xxx_get_temp, |
| 337 | .get_temp_limit = mv88e6xxx_get_temp_limit, |
| 338 | .set_temp_limit = mv88e6xxx_set_temp_limit, |
| 339 | .get_temp_alarm = mv88e6xxx_get_temp_alarm, |
Guenter Roeck | 276db3b | 2014-10-29 10:44:59 -0700 | [diff] [blame] | 340 | #endif |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 341 | .get_eeprom = mv88e6352_get_eeprom, |
| 342 | .set_eeprom = mv88e6352_set_eeprom, |
Guenter Roeck | 95d08b5 | 2014-10-29 10:45:06 -0700 | [diff] [blame] | 343 | .get_regs_len = mv88e6xxx_get_regs_len, |
| 344 | .get_regs = mv88e6xxx_get_regs, |
Vivien Didelot | 71327a4 | 2016-03-13 16:21:32 -0400 | [diff] [blame] | 345 | .port_bridge_join = mv88e6xxx_port_bridge_join, |
| 346 | .port_bridge_leave = mv88e6xxx_port_bridge_leave, |
Vivien Didelot | 43c44a9 | 2016-04-06 11:55:03 -0400 | [diff] [blame] | 347 | .port_stp_state_set = mv88e6xxx_port_stp_state_set, |
Vivien Didelot | 214cdb9 | 2016-02-26 13:16:08 -0500 | [diff] [blame] | 348 | .port_vlan_filtering = mv88e6xxx_port_vlan_filtering, |
Vivien Didelot | 76e398a | 2015-11-01 12:33:55 -0500 | [diff] [blame] | 349 | .port_vlan_prepare = mv88e6xxx_port_vlan_prepare, |
Vivien Didelot | 0d3b33e | 2015-08-13 12:52:22 -0400 | [diff] [blame] | 350 | .port_vlan_add = mv88e6xxx_port_vlan_add, |
Vivien Didelot | 7dad08d | 2015-08-13 12:52:21 -0400 | [diff] [blame] | 351 | .port_vlan_del = mv88e6xxx_port_vlan_del, |
Vivien Didelot | ceff5ef | 2016-02-23 12:13:55 -0500 | [diff] [blame] | 352 | .port_vlan_dump = mv88e6xxx_port_vlan_dump, |
Vivien Didelot | 146a320 | 2015-10-08 11:35:12 -0400 | [diff] [blame] | 353 | .port_fdb_prepare = mv88e6xxx_port_fdb_prepare, |
Vivien Didelot | 2a778e1 | 2015-08-10 09:09:49 -0400 | [diff] [blame] | 354 | .port_fdb_add = mv88e6xxx_port_fdb_add, |
| 355 | .port_fdb_del = mv88e6xxx_port_fdb_del, |
Vivien Didelot | f33475b | 2015-10-22 09:34:41 -0400 | [diff] [blame] | 356 | .port_fdb_dump = mv88e6xxx_port_fdb_dump, |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 357 | }; |
| 358 | |
Andrew Lunn | 1636d88 | 2015-05-06 01:09:50 +0200 | [diff] [blame] | 359 | MODULE_ALIAS("platform:mv88e6172"); |
Aleksey S. Kazantsev | 7c3d0d6 | 2015-07-07 20:38:15 -0700 | [diff] [blame] | 360 | MODULE_ALIAS("platform:mv88e6176"); |
| 361 | MODULE_ALIAS("platform:mv88e6320"); |
| 362 | MODULE_ALIAS("platform:mv88e6321"); |
| 363 | MODULE_ALIAS("platform:mv88e6352"); |