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Richard Zhaob3d99682012-07-07 22:56:47 +08001/*
Peter Chen24007802014-02-24 10:20:54 +08002 * Copyright 2012-2013 Freescale Semiconductor, Inc.
Richard Zhaob3d99682012-07-07 22:56:47 +08003 * Copyright (C) 2012 Marek Vasut <marex@denx.de>
4 * on behalf of DENX Software Engineering GmbH
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17#include <linux/clk.h>
18#include <linux/usb/otg.h>
19#include <linux/stmp_device.h>
20#include <linux/delay.h>
21#include <linux/err.h>
22#include <linux/io.h>
Peter Chen24007802014-02-24 10:20:54 +080023#include <linux/of_device.h>
Peter Chen0d896532014-02-24 10:20:57 +080024#include <linux/regmap.h>
25#include <linux/mfd/syscon.h>
Richard Zhaob3d99682012-07-07 22:56:47 +080026
27#define DRIVER_NAME "mxs_phy"
28
29#define HW_USBPHY_PWD 0x00
30#define HW_USBPHY_CTRL 0x30
31#define HW_USBPHY_CTRL_SET 0x34
32#define HW_USBPHY_CTRL_CLR 0x38
33
Peter Chen22db05e2014-02-24 10:20:59 +080034#define HW_USBPHY_IP 0x90
35#define HW_USBPHY_IP_SET 0x94
36#define HW_USBPHY_IP_CLR 0x98
37
Richard Zhaob3d99682012-07-07 22:56:47 +080038#define BM_USBPHY_CTRL_SFTRST BIT(31)
39#define BM_USBPHY_CTRL_CLKGATE BIT(30)
Peter Chen13644142014-02-24 10:20:55 +080040#define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS BIT(26)
41#define BM_USBPHY_CTRL_ENAUTOCLR_USBCLKGATE BIT(25)
42#define BM_USBPHY_CTRL_ENAUTOCLR_PHY_PWD BIT(20)
43#define BM_USBPHY_CTRL_ENAUTOCLR_CLKGATE BIT(19)
44#define BM_USBPHY_CTRL_ENAUTO_PWRON_PLL BIT(18)
Richard Zhaob3d99682012-07-07 22:56:47 +080045#define BM_USBPHY_CTRL_ENUTMILEVEL3 BIT(15)
46#define BM_USBPHY_CTRL_ENUTMILEVEL2 BIT(14)
47#define BM_USBPHY_CTRL_ENHOSTDISCONDETECT BIT(1)
48
Peter Chen22db05e2014-02-24 10:20:59 +080049#define BM_USBPHY_IP_FIX (BIT(17) | BIT(18))
50
Peter Chen24007802014-02-24 10:20:54 +080051#define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
52
53/* Do disconnection between PHY and controller without vbus */
54#define MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS BIT(0)
55
56/*
57 * The PHY will be in messy if there is a wakeup after putting
58 * bus to suspend (set portsc.suspendM) but before setting PHY to low
59 * power mode (set portsc.phcd).
60 */
61#define MXS_PHY_ABNORMAL_IN_SUSPEND BIT(1)
62
63/*
64 * The SOF sends too fast after resuming, it will cause disconnection
65 * between host and high speed device.
66 */
67#define MXS_PHY_SENDING_SOF_TOO_FAST BIT(2)
68
Peter Chen22db05e2014-02-24 10:20:59 +080069/*
70 * IC has bug fixes logic, they include
71 * MXS_PHY_ABNORMAL_IN_SUSPEND and MXS_PHY_SENDING_SOF_TOO_FAST
72 * which are described at above flags, the RTL will handle it
73 * according to different versions.
74 */
75#define MXS_PHY_NEED_IP_FIX BIT(3)
76
Peter Chen24007802014-02-24 10:20:54 +080077struct mxs_phy_data {
78 unsigned int flags;
79};
80
81static const struct mxs_phy_data imx23_phy_data = {
82 .flags = MXS_PHY_ABNORMAL_IN_SUSPEND | MXS_PHY_SENDING_SOF_TOO_FAST,
83};
84
85static const struct mxs_phy_data imx6q_phy_data = {
86 .flags = MXS_PHY_SENDING_SOF_TOO_FAST |
Peter Chen22db05e2014-02-24 10:20:59 +080087 MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS |
88 MXS_PHY_NEED_IP_FIX,
Peter Chen24007802014-02-24 10:20:54 +080089};
90
91static const struct mxs_phy_data imx6sl_phy_data = {
Peter Chen22db05e2014-02-24 10:20:59 +080092 .flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS |
93 MXS_PHY_NEED_IP_FIX,
Peter Chen24007802014-02-24 10:20:54 +080094};
95
96static const struct of_device_id mxs_phy_dt_ids[] = {
97 { .compatible = "fsl,imx6sl-usbphy", .data = &imx6sl_phy_data, },
98 { .compatible = "fsl,imx6q-usbphy", .data = &imx6q_phy_data, },
99 { .compatible = "fsl,imx23-usbphy", .data = &imx23_phy_data, },
100 { /* sentinel */ }
101};
102MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids);
103
Richard Zhaob3d99682012-07-07 22:56:47 +0800104struct mxs_phy {
105 struct usb_phy phy;
106 struct clk *clk;
Peter Chen24007802014-02-24 10:20:54 +0800107 const struct mxs_phy_data *data;
Peter Chen0d896532014-02-24 10:20:57 +0800108 struct regmap *regmap_anatop;
Richard Zhaob3d99682012-07-07 22:56:47 +0800109};
110
Fabio Estevam51e563e2013-07-03 16:34:13 -0300111static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
Richard Zhaob3d99682012-07-07 22:56:47 +0800112{
Fabio Estevam51e563e2013-07-03 16:34:13 -0300113 int ret;
Richard Zhaob3d99682012-07-07 22:56:47 +0800114 void __iomem *base = mxs_phy->phy.io_priv;
115
Fabio Estevam51e563e2013-07-03 16:34:13 -0300116 ret = stmp_reset_block(base + HW_USBPHY_CTRL);
117 if (ret)
118 return ret;
Richard Zhaob3d99682012-07-07 22:56:47 +0800119
120 /* Power up the PHY */
Marc Kleine-Buddeb5a726b2013-02-28 11:52:30 +0100121 writel(0, base + HW_USBPHY_PWD);
Richard Zhaob3d99682012-07-07 22:56:47 +0800122
Peter Chen13644142014-02-24 10:20:55 +0800123 /*
124 * USB PHY Ctrl Setting
125 * - Auto clock/power on
126 * - Enable full/low speed support
127 */
128 writel(BM_USBPHY_CTRL_ENAUTOSET_USBCLKS |
129 BM_USBPHY_CTRL_ENAUTOCLR_USBCLKGATE |
130 BM_USBPHY_CTRL_ENAUTOCLR_PHY_PWD |
131 BM_USBPHY_CTRL_ENAUTOCLR_CLKGATE |
132 BM_USBPHY_CTRL_ENAUTO_PWRON_PLL |
133 BM_USBPHY_CTRL_ENUTMILEVEL2 |
134 BM_USBPHY_CTRL_ENUTMILEVEL3,
Marc Kleine-Buddeb5a726b2013-02-28 11:52:30 +0100135 base + HW_USBPHY_CTRL_SET);
Fabio Estevam51e563e2013-07-03 16:34:13 -0300136
Peter Chen22db05e2014-02-24 10:20:59 +0800137 if (mxs_phy->data->flags & MXS_PHY_NEED_IP_FIX)
138 writel(BM_USBPHY_IP_FIX, base + HW_USBPHY_IP_SET);
139
Fabio Estevam51e563e2013-07-03 16:34:13 -0300140 return 0;
Richard Zhaob3d99682012-07-07 22:56:47 +0800141}
142
143static int mxs_phy_init(struct usb_phy *phy)
144{
Fabio Estevam67c21fc2013-12-02 01:02:34 -0200145 int ret;
Richard Zhaob3d99682012-07-07 22:56:47 +0800146 struct mxs_phy *mxs_phy = to_mxs_phy(phy);
147
Fabio Estevam67c21fc2013-12-02 01:02:34 -0200148 ret = clk_prepare_enable(mxs_phy->clk);
149 if (ret)
150 return ret;
151
Fabio Estevam51e563e2013-07-03 16:34:13 -0300152 return mxs_phy_hw_init(mxs_phy);
Richard Zhaob3d99682012-07-07 22:56:47 +0800153}
154
155static void mxs_phy_shutdown(struct usb_phy *phy)
156{
157 struct mxs_phy *mxs_phy = to_mxs_phy(phy);
158
Marc Kleine-Buddeb5a726b2013-02-28 11:52:30 +0100159 writel(BM_USBPHY_CTRL_CLKGATE,
160 phy->io_priv + HW_USBPHY_CTRL_SET);
Richard Zhaob3d99682012-07-07 22:56:47 +0800161
162 clk_disable_unprepare(mxs_phy->clk);
163}
164
Peter Chen04a62212013-01-10 16:35:53 +0800165static int mxs_phy_suspend(struct usb_phy *x, int suspend)
166{
Fabio Estevam67c21fc2013-12-02 01:02:34 -0200167 int ret;
Peter Chen04a62212013-01-10 16:35:53 +0800168 struct mxs_phy *mxs_phy = to_mxs_phy(x);
169
170 if (suspend) {
Marc Kleine-Buddeb5a726b2013-02-28 11:52:30 +0100171 writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
172 writel(BM_USBPHY_CTRL_CLKGATE,
173 x->io_priv + HW_USBPHY_CTRL_SET);
Peter Chen04a62212013-01-10 16:35:53 +0800174 clk_disable_unprepare(mxs_phy->clk);
175 } else {
Fabio Estevam67c21fc2013-12-02 01:02:34 -0200176 ret = clk_prepare_enable(mxs_phy->clk);
177 if (ret)
178 return ret;
Marc Kleine-Buddeb5a726b2013-02-28 11:52:30 +0100179 writel(BM_USBPHY_CTRL_CLKGATE,
180 x->io_priv + HW_USBPHY_CTRL_CLR);
181 writel(0, x->io_priv + HW_USBPHY_PWD);
Peter Chen04a62212013-01-10 16:35:53 +0800182 }
183
184 return 0;
185}
186
Peter Chenac965112012-11-09 09:44:44 +0800187static int mxs_phy_on_connect(struct usb_phy *phy,
188 enum usb_device_speed speed)
Richard Zhaob3d99682012-07-07 22:56:47 +0800189{
Peter Chenf6a15822014-02-24 10:20:58 +0800190 dev_dbg(phy->dev, "%s device has connected\n",
191 (speed == USB_SPEED_HIGH) ? "HS" : "FS/LS");
Richard Zhaob3d99682012-07-07 22:56:47 +0800192
Peter Chenac965112012-11-09 09:44:44 +0800193 if (speed == USB_SPEED_HIGH)
Marc Kleine-Buddeb5a726b2013-02-28 11:52:30 +0100194 writel(BM_USBPHY_CTRL_ENHOSTDISCONDETECT,
195 phy->io_priv + HW_USBPHY_CTRL_SET);
Richard Zhaob3d99682012-07-07 22:56:47 +0800196
197 return 0;
198}
199
Peter Chenac965112012-11-09 09:44:44 +0800200static int mxs_phy_on_disconnect(struct usb_phy *phy,
201 enum usb_device_speed speed)
Richard Zhaob3d99682012-07-07 22:56:47 +0800202{
Peter Chenf6a15822014-02-24 10:20:58 +0800203 dev_dbg(phy->dev, "%s device has disconnected\n",
204 (speed == USB_SPEED_HIGH) ? "HS" : "FS/LS");
Richard Zhaob3d99682012-07-07 22:56:47 +0800205
Peter Chenac965112012-11-09 09:44:44 +0800206 if (speed == USB_SPEED_HIGH)
Marc Kleine-Buddeb5a726b2013-02-28 11:52:30 +0100207 writel(BM_USBPHY_CTRL_ENHOSTDISCONDETECT,
208 phy->io_priv + HW_USBPHY_CTRL_CLR);
Richard Zhaob3d99682012-07-07 22:56:47 +0800209
210 return 0;
211}
212
213static int mxs_phy_probe(struct platform_device *pdev)
214{
215 struct resource *res;
216 void __iomem *base;
217 struct clk *clk;
218 struct mxs_phy *mxs_phy;
Sascha Hauer25df6392013-02-27 15:16:30 +0100219 int ret;
Peter Chen24007802014-02-24 10:20:54 +0800220 const struct of_device_id *of_id =
221 of_match_device(mxs_phy_dt_ids, &pdev->dev);
Peter Chen0d896532014-02-24 10:20:57 +0800222 struct device_node *np = pdev->dev.of_node;
Richard Zhaob3d99682012-07-07 22:56:47 +0800223
224 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Thierry Reding148e1132013-01-21 11:09:22 +0100225 base = devm_ioremap_resource(&pdev->dev, res);
226 if (IS_ERR(base))
227 return PTR_ERR(base);
Richard Zhaob3d99682012-07-07 22:56:47 +0800228
229 clk = devm_clk_get(&pdev->dev, NULL);
230 if (IS_ERR(clk)) {
231 dev_err(&pdev->dev,
232 "can't get the clock, err=%ld", PTR_ERR(clk));
233 return PTR_ERR(clk);
234 }
235
236 mxs_phy = devm_kzalloc(&pdev->dev, sizeof(*mxs_phy), GFP_KERNEL);
237 if (!mxs_phy) {
238 dev_err(&pdev->dev, "Failed to allocate USB PHY structure!\n");
239 return -ENOMEM;
240 }
241
Peter Chen0d896532014-02-24 10:20:57 +0800242 /* Some SoCs don't have anatop registers */
243 if (of_get_property(np, "fsl,anatop", NULL)) {
244 mxs_phy->regmap_anatop = syscon_regmap_lookup_by_phandle
245 (np, "fsl,anatop");
246 if (IS_ERR(mxs_phy->regmap_anatop)) {
247 dev_dbg(&pdev->dev,
248 "failed to find regmap for anatop\n");
249 return PTR_ERR(mxs_phy->regmap_anatop);
250 }
251 }
252
Richard Zhaob3d99682012-07-07 22:56:47 +0800253 mxs_phy->phy.io_priv = base;
254 mxs_phy->phy.dev = &pdev->dev;
255 mxs_phy->phy.label = DRIVER_NAME;
256 mxs_phy->phy.init = mxs_phy_init;
257 mxs_phy->phy.shutdown = mxs_phy_shutdown;
Peter Chen04a62212013-01-10 16:35:53 +0800258 mxs_phy->phy.set_suspend = mxs_phy_suspend;
Richard Zhaob3d99682012-07-07 22:56:47 +0800259 mxs_phy->phy.notify_connect = mxs_phy_on_connect;
260 mxs_phy->phy.notify_disconnect = mxs_phy_on_disconnect;
Michael Grzeschik4e0aa632013-05-15 15:03:14 +0200261 mxs_phy->phy.type = USB_PHY_TYPE_USB2;
Richard Zhaob3d99682012-07-07 22:56:47 +0800262
Richard Zhaob3d99682012-07-07 22:56:47 +0800263 mxs_phy->clk = clk;
Peter Chen24007802014-02-24 10:20:54 +0800264 mxs_phy->data = of_id->data;
Richard Zhaob3d99682012-07-07 22:56:47 +0800265
Jisheng Zhang97a27f72013-11-07 10:55:49 +0800266 platform_set_drvdata(pdev, mxs_phy);
Richard Zhaob3d99682012-07-07 22:56:47 +0800267
Sascha Hauer25df6392013-02-27 15:16:30 +0100268 ret = usb_add_phy_dev(&mxs_phy->phy);
269 if (ret)
270 return ret;
271
Richard Zhaob3d99682012-07-07 22:56:47 +0800272 return 0;
273}
274
Bill Pembertonfb4e98a2012-11-19 13:26:20 -0500275static int mxs_phy_remove(struct platform_device *pdev)
Richard Zhaob3d99682012-07-07 22:56:47 +0800276{
Sascha Hauer25df6392013-02-27 15:16:30 +0100277 struct mxs_phy *mxs_phy = platform_get_drvdata(pdev);
278
279 usb_remove_phy(&mxs_phy->phy);
280
Richard Zhaob3d99682012-07-07 22:56:47 +0800281 return 0;
282}
283
Richard Zhaob3d99682012-07-07 22:56:47 +0800284static struct platform_driver mxs_phy_driver = {
285 .probe = mxs_phy_probe,
Bill Pemberton76904172012-11-19 13:21:08 -0500286 .remove = mxs_phy_remove,
Richard Zhaob3d99682012-07-07 22:56:47 +0800287 .driver = {
288 .name = DRIVER_NAME,
289 .owner = THIS_MODULE,
290 .of_match_table = mxs_phy_dt_ids,
291 },
292};
293
294static int __init mxs_phy_module_init(void)
295{
296 return platform_driver_register(&mxs_phy_driver);
297}
298postcore_initcall(mxs_phy_module_init);
299
300static void __exit mxs_phy_module_exit(void)
301{
302 platform_driver_unregister(&mxs_phy_driver);
303}
304module_exit(mxs_phy_module_exit);
305
306MODULE_ALIAS("platform:mxs-usb-phy");
307MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
308MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>");
309MODULE_DESCRIPTION("Freescale MXS USB PHY driver");
310MODULE_LICENSE("GPL");