blob: 1f096dabc015d40a8c03999a32b05bccf5410b0f [file] [log] [blame]
Giridhar Malavali6e980162010-03-19 17:03:58 -07001/*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2008 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7#ifndef __QLA_BSG_H
8#define __QLA_BSG_H
9
10/* BSG Vendor specific commands */
11#define QL_VND_LOOPBACK 0x01
12#define QL_VND_A84_RESET 0x02
13#define QL_VND_A84_UPDATE_FW 0x03
14#define QL_VND_A84_MGMT_CMD 0x04
15#define QL_VND_IIDMA 0x05
16#define QL_VND_FCP_PRIO_CFG_CMD 0x06
17
18/* BSG definations for interpreting CommandSent field */
19#define INT_DEF_LB_LOOPBACK_CMD 0
20#define INT_DEF_LB_ECHO_CMD 1
21
Sarang Radke23f2ebd2010-05-28 15:08:21 -070022/* Loopback related definations */
23#define EXTERNAL_LOOPBACK 0xF2
24#define ENABLE_INTERNAL_LOOPBACK 0x02
25#define INTERNAL_LOOPBACK_MASK 0x000E
26#define MAX_ELS_FRAME_PAYLOAD 252
27#define ELS_OPCODE_BYTE 0x10
28
Giridhar Malavali6e980162010-03-19 17:03:58 -070029/* BSG Vendor specific definations */
30#define A84_ISSUE_WRITE_TYPE_CMD 0
31#define A84_ISSUE_READ_TYPE_CMD 1
32#define A84_CLEANUP_CMD 2
33#define A84_ISSUE_RESET_OP_FW 3
34#define A84_ISSUE_RESET_DIAG_FW 4
35#define A84_ISSUE_UPDATE_OPFW_CMD 5
36#define A84_ISSUE_UPDATE_DIAGFW_CMD 6
37
38struct qla84_mgmt_param {
39 union {
40 struct {
41 uint32_t start_addr;
42 } mem; /* for QLA84_MGMT_READ/WRITE_MEM */
43 struct {
44 uint32_t id;
45#define QLA84_MGMT_CONFIG_ID_UIF 1
46#define QLA84_MGMT_CONFIG_ID_FCOE_COS 2
47#define QLA84_MGMT_CONFIG_ID_PAUSE 3
48#define QLA84_MGMT_CONFIG_ID_TIMEOUTS 4
49
50 uint32_t param0;
51 uint32_t param1;
52 } config; /* for QLA84_MGMT_CHNG_CONFIG */
53
54 struct {
55 uint32_t type;
56#define QLA84_MGMT_INFO_CONFIG_LOG_DATA 1 /* Get Config Log Data */
57#define QLA84_MGMT_INFO_LOG_DATA 2 /* Get Log Data */
58#define QLA84_MGMT_INFO_PORT_STAT 3 /* Get Port Statistics */
59#define QLA84_MGMT_INFO_LIF_STAT 4 /* Get LIF Statistics */
60#define QLA84_MGMT_INFO_ASIC_STAT 5 /* Get ASIC Statistics */
61#define QLA84_MGMT_INFO_CONFIG_PARAMS 6 /* Get Config Parameters */
62#define QLA84_MGMT_INFO_PANIC_LOG 7 /* Get Panic Log */
63
64 uint32_t context;
65/*
66* context definitions for QLA84_MGMT_INFO_CONFIG_LOG_DATA
67*/
68#define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0
69#define IC_LOG_DATA_LOG_ID_LEARN_LOG 1
70#define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2
71#define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3
72#define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4
73#define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5
74#define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6
75#define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7
76#define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8
77#define IC_LOG_DATA_LOG_ID_DCX_LOG 9
78
79/*
80* context definitions for QLA84_MGMT_INFO_PORT_STAT
81*/
82#define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0
83#define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1
84#define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2
85#define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3
86#define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4
87#define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5
88
89
90/*
91* context definitions for QLA84_MGMT_INFO_LIF_STAT
92*/
93#define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0
94#define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1
95#define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2
96#define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3
97#define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6
98
99 } info; /* for QLA84_MGMT_GET_INFO */
100 } u;
101};
102
103struct qla84_msg_mgmt {
104 uint16_t cmd;
105#define QLA84_MGMT_READ_MEM 0x00
106#define QLA84_MGMT_WRITE_MEM 0x01
107#define QLA84_MGMT_CHNG_CONFIG 0x02
108#define QLA84_MGMT_GET_INFO 0x03
109 uint16_t rsrvd;
110 struct qla84_mgmt_param mgmtp;/* parameters for cmd */
111 uint32_t len; /* bytes in payload following this struct */
112 uint8_t payload[0]; /* payload for cmd */
113};
114
115struct qla_bsg_a84_mgmt {
116 struct qla84_msg_mgmt mgmt;
117} __attribute__ ((packed));
118
119struct qla_scsi_addr {
120 uint16_t bus;
121 uint16_t target;
122} __attribute__ ((packed));
123
124struct qla_ext_dest_addr {
125 union {
126 uint8_t wwnn[8];
127 uint8_t wwpn[8];
128 uint8_t id[4];
129 struct qla_scsi_addr scsi_addr;
130 } dest_addr;
131 uint16_t dest_type;
132#define EXT_DEF_TYPE_WWPN 2
133 uint16_t lun;
134 uint16_t padding[2];
135} __attribute__ ((packed));
136
137struct qla_port_param {
138 struct qla_ext_dest_addr fc_scsi_addr;
139 uint16_t mode;
140 uint16_t speed;
141} __attribute__ ((packed));
142#endif