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Inki Dae2400fc12015-12-03 16:54:45 +09001Device-Tree bindings for Samsung Exynos Embedded DisplayPort Transmitter(eDP)
2
3DisplayPort is industry standard to accommodate the growing board adoption
4of digital display technology within the PC and CE industries.
5It consolidates the internal and external connection methods to reduce device
6complexity and cost. It also supports necessary features for important cross
7industry applications and provides performance scalability to enable the next
8generation of displays that feature higher color depths, refresh rates, and
9display resolutions.
10
11eDP (embedded display port) device is compliant with Embedded DisplayPort
12standard as follows,
13- DisplayPort standard 1.1a for Exynos5250 and Exynos5260.
14- DisplayPort standard 1.3 for Exynos5422s and Exynos5800.
15
16eDP resides between FIMD and panel or FIMD and bridge such as LVDS.
17
Ajay Kumar825e90d2012-10-13 05:48:00 +090018The Exynos display port interface should be configured based on
19the type of panel connected to it.
20
21We use two nodes:
22 -dp-controller node
23 -dptx-phy node(defined inside dp-controller node)
24
25For the DP-PHY initialization, we use the dptx-phy node.
Jingoo Han8114fab2013-10-16 21:58:16 +053026Required properties for dptx-phy: deprecated, use phys and phy-names
27 -reg: deprecated
Ajay Kumar825e90d2012-10-13 05:48:00 +090028 Base address of DP PHY register.
Jingoo Han8114fab2013-10-16 21:58:16 +053029 -samsung,enable-mask: deprecated
Ajay Kumar825e90d2012-10-13 05:48:00 +090030 The bit-mask used to enable/disable DP PHY.
31
32For the Panel initialization, we read data from dp-controller node.
33Required properties for dp-controller:
34 -compatible:
35 should be "samsung,exynos5-dp".
36 -reg:
37 physical base address of the controller and length
38 of memory mapped region.
39 -interrupts:
40 interrupt combiner values.
Jingoo Han60e69852013-06-10 17:38:32 +090041 -clocks:
42 from common clock binding: handle to dp clock.
43 -clock-names:
44 from common clock binding: Shall be "dp".
Ajay Kumar825e90d2012-10-13 05:48:00 +090045 -interrupt-parent:
46 phandle to Interrupt combiner node.
Jingoo Han8114fab2013-10-16 21:58:16 +053047 -phys:
48 from general PHY binding: the phandle for the PHY device.
49 -phy-names:
50 from general PHY binding: Should be "dp".
Ajay Kumar825e90d2012-10-13 05:48:00 +090051 -samsung,color-space:
52 input video data format.
53 COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
54 -samsung,dynamic-range:
55 dynamic range for input video data.
56 VESA = 0, CEA = 1
57 -samsung,ycbcr-coeff:
58 YCbCr co-efficients for input video.
59 COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1
60 -samsung,color-depth:
61 number of bits per colour component.
62 COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3
63 -samsung,link-rate:
64 link rate supported by the panel.
65 LINK_RATE_1_62GBPS = 0x6, LINK_RATE_2_70GBPS = 0x0A
66 -samsung,lane-count:
67 number of lanes supported by the panel.
68 LANE_COUNT1 = 1, LANE_COUNT2 = 2, LANE_COUNT4 = 4
Sean Paul1417f102014-01-30 16:19:23 -050069 - display-timings: timings for the connected panel as described by
Rob Herringefdbd732015-09-21 10:51:09 -050070 Documentation/devicetree/bindings/display/display-timing.txt
Ajay Kumar825e90d2012-10-13 05:48:00 +090071
72Optional properties for dp-controller:
73 -interlaced:
74 interlace scan mode.
75 Progressive if defined, Interlaced if not defined
76 -vsync-active-high:
77 VSYNC polarity configuration.
78 High if defined, Low if not defined
79 -hsync-active-high:
80 HSYNC polarity configuration.
81 High if defined, Low if not defined
Andrew Brestickerb8b52472014-04-22 04:09:10 +053082 -samsung,hpd-gpio:
83 Hotplug detect GPIO.
84 Indicates which GPIO should be used for hotplug
85 detection
Inki Dae2400fc12015-12-03 16:54:45 +090086Video interfaces:
87 Device node can contain video interface port nodes according to [1].
88 The following are properties specific to those nodes:
89
90 endpoint node connected to bridge or panel node:
91 - remote-endpoint: specifies the endpoint in panel or bridge node.
92 This node is required in all kinds of exynos dp
93 to represent the connection between dp and bridge
94 or dp and panel.
Ajay Kumar80185562015-01-20 22:08:46 +053095
96[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
Ajay Kumar825e90d2012-10-13 05:48:00 +090097
98Example:
99
100SOC specific portion:
101 dp-controller {
102 compatible = "samsung,exynos5-dp";
103 reg = <0x145b0000 0x10000>;
104 interrupts = <10 3>;
105 interrupt-parent = <&combiner>;
Jingoo Han60e69852013-06-10 17:38:32 +0900106 clocks = <&clock 342>;
107 clock-names = "dp";
Ajay Kumar825e90d2012-10-13 05:48:00 +0900108
Jingoo Han8114fab2013-10-16 21:58:16 +0530109 phys = <&dp_phy>;
110 phy-names = "dp";
Ajay Kumar825e90d2012-10-13 05:48:00 +0900111 };
112
113Board Specific portion:
114 dp-controller {
115 samsung,color-space = <0>;
116 samsung,dynamic-range = <0>;
117 samsung,ycbcr-coeff = <0>;
118 samsung,color-depth = <1>;
119 samsung,link-rate = <0x0a>;
120 samsung,lane-count = <4>;
Sean Paul1417f102014-01-30 16:19:23 -0500121
122 display-timings {
123 native-mode = <&lcd_timing>;
124 lcd_timing: 1366x768 {
125 clock-frequency = <70589280>;
126 hactive = <1366>;
127 vactive = <768>;
128 hfront-porch = <40>;
129 hback-porch = <40>;
130 hsync-len = <32>;
131 vback-porch = <10>;
132 vfront-porch = <12>;
133 vsync-len = <6>;
134 };
135 };
Ajay Kumar80185562015-01-20 22:08:46 +0530136
137 ports {
Inki Dae2400fc12015-12-03 16:54:45 +0900138 port {
Ajay Kumar80185562015-01-20 22:08:46 +0530139 dp_out: endpoint {
Inki Dae2400fc12015-12-03 16:54:45 +0900140 remote-endpoint = <&dp_in>;
141 };
142 };
143 };
144
145 panel {
146 ...
147 port {
148 dp_in: endpoint {
149 remote-endpoint = <&dp_out>;
Ajay Kumar80185562015-01-20 22:08:46 +0530150 };
151 };
152 };
Ajay Kumar825e90d2012-10-13 05:48:00 +0900153 };