Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2005 Stephane Marchesin. |
| 3 | * All Rights Reserved. |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
| 23 | */ |
| 24 | |
| 25 | #ifndef __NOUVEAU_DRV_H__ |
| 26 | #define __NOUVEAU_DRV_H__ |
| 27 | |
| 28 | #define DRIVER_AUTHOR "Stephane Marchesin" |
| 29 | #define DRIVER_EMAIL "dri-devel@lists.sourceforge.net" |
| 30 | |
| 31 | #define DRIVER_NAME "nouveau" |
| 32 | #define DRIVER_DESC "nVidia Riva/TNT/GeForce" |
| 33 | #define DRIVER_DATE "20090420" |
| 34 | |
| 35 | #define DRIVER_MAJOR 0 |
| 36 | #define DRIVER_MINOR 0 |
Ben Skeggs | a1606a9 | 2010-02-12 10:27:35 +1000 | [diff] [blame] | 37 | #define DRIVER_PATCHLEVEL 16 |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 38 | |
| 39 | #define NOUVEAU_FAMILY 0x0000FFFF |
| 40 | #define NOUVEAU_FLAGS 0xFFFF0000 |
| 41 | |
| 42 | #include "ttm/ttm_bo_api.h" |
| 43 | #include "ttm/ttm_bo_driver.h" |
| 44 | #include "ttm/ttm_placement.h" |
| 45 | #include "ttm/ttm_memory.h" |
| 46 | #include "ttm/ttm_module.h" |
| 47 | |
| 48 | struct nouveau_fpriv { |
Ben Skeggs | 3f0a68d | 2011-05-31 11:11:28 +1000 | [diff] [blame] | 49 | spinlock_t lock; |
Ben Skeggs | e8a863c | 2011-06-01 19:18:48 +1000 | [diff] [blame] | 50 | struct list_head channels; |
Ben Skeggs | fe32b16 | 2011-06-03 10:07:08 +1000 | [diff] [blame] | 51 | struct nouveau_vm *vm; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 52 | }; |
| 53 | |
Ben Skeggs | 3f0a68d | 2011-05-31 11:11:28 +1000 | [diff] [blame] | 54 | static inline struct nouveau_fpriv * |
| 55 | nouveau_fpriv(struct drm_file *file_priv) |
| 56 | { |
| 57 | return file_priv ? file_priv->driver_priv : NULL; |
| 58 | } |
| 59 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 60 | #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) |
| 61 | |
| 62 | #include "nouveau_drm.h" |
| 63 | #include "nouveau_reg.h" |
| 64 | #include "nouveau_bios.h" |
Ben Skeggs | 274fec9 | 2010-11-03 13:16:18 +1000 | [diff] [blame] | 65 | #include "nouveau_util.h" |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 66 | |
Ben Skeggs | 054b93e | 2009-12-15 22:02:47 +1000 | [diff] [blame] | 67 | struct nouveau_grctx; |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 68 | struct nouveau_mem; |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 69 | #include "nouveau_vm.h" |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 70 | |
| 71 | #define MAX_NUM_DCB_ENTRIES 16 |
| 72 | |
| 73 | #define NOUVEAU_MAX_CHANNEL_NR 128 |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 74 | #define NOUVEAU_MAX_TILE_NR 15 |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 75 | |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 76 | struct nouveau_mem { |
Ben Skeggs | 573a2a3 | 2010-08-25 15:26:04 +1000 | [diff] [blame] | 77 | struct drm_device *dev; |
| 78 | |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 79 | struct nouveau_vma bar_vma; |
Ben Skeggs | d2f96666 | 2011-06-06 20:54:42 +1000 | [diff] [blame] | 80 | struct nouveau_vma vma[2]; |
Ben Skeggs | 4c74eb7 | 2010-11-10 14:10:04 +1000 | [diff] [blame] | 81 | u8 page_shift; |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 82 | |
Ben Skeggs | 8f7286f | 2011-02-14 09:57:35 +1000 | [diff] [blame] | 83 | struct drm_mm_node *tag; |
Ben Skeggs | 573a2a3 | 2010-08-25 15:26:04 +1000 | [diff] [blame] | 84 | struct list_head regions; |
Ben Skeggs | 26c0c9e | 2011-02-10 12:59:51 +1000 | [diff] [blame] | 85 | dma_addr_t *pages; |
Ben Skeggs | 573a2a3 | 2010-08-25 15:26:04 +1000 | [diff] [blame] | 86 | u32 memtype; |
| 87 | u64 offset; |
| 88 | u64 size; |
| 89 | }; |
| 90 | |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 91 | struct nouveau_tile_reg { |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 92 | bool used; |
Francisco Jerez | a5cf68b | 2010-10-24 16:14:41 +0200 | [diff] [blame] | 93 | uint32_t addr; |
| 94 | uint32_t limit; |
| 95 | uint32_t pitch; |
Francisco Jerez | 87a326a | 2010-10-24 16:36:12 +0200 | [diff] [blame] | 96 | uint32_t zcomp; |
| 97 | struct drm_mm_node *tag_mem; |
Francisco Jerez | a5cf68b | 2010-10-24 16:14:41 +0200 | [diff] [blame] | 98 | struct nouveau_fence *fence; |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 99 | }; |
| 100 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 101 | struct nouveau_bo { |
| 102 | struct ttm_buffer_object bo; |
| 103 | struct ttm_placement placement; |
Ben Skeggs | db5c8e2 | 2011-02-10 13:41:01 +1000 | [diff] [blame] | 104 | u32 valid_domains; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 105 | u32 placements[3]; |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 106 | u32 busy_placements[3]; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 107 | struct ttm_bo_kmap_obj kmap; |
| 108 | struct list_head head; |
| 109 | |
| 110 | /* protected by ttm_bo_reserve() */ |
| 111 | struct drm_file *reserved_by; |
| 112 | struct list_head entry; |
| 113 | int pbbo_index; |
Ben Skeggs | a1606a9 | 2010-02-12 10:27:35 +1000 | [diff] [blame] | 114 | bool validate_mapped; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 115 | |
| 116 | struct nouveau_channel *channel; |
| 117 | |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 118 | struct list_head vma_list; |
Ben Skeggs | f91bac5 | 2011-06-06 14:15:46 +1000 | [diff] [blame] | 119 | unsigned page_shift; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 120 | |
| 121 | uint32_t tile_mode; |
| 122 | uint32_t tile_flags; |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 123 | struct nouveau_tile_reg *tile; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 124 | |
| 125 | struct drm_gem_object *gem; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 126 | int pin_refcnt; |
| 127 | }; |
| 128 | |
Francisco Jerez | f13b326 | 2010-10-10 06:01:08 +0200 | [diff] [blame] | 129 | #define nouveau_bo_tile_layout(nvbo) \ |
| 130 | ((nvbo)->tile_flags & NOUVEAU_GEM_TILE_LAYOUT_MASK) |
| 131 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 132 | static inline struct nouveau_bo * |
| 133 | nouveau_bo(struct ttm_buffer_object *bo) |
| 134 | { |
| 135 | return container_of(bo, struct nouveau_bo, bo); |
| 136 | } |
| 137 | |
| 138 | static inline struct nouveau_bo * |
| 139 | nouveau_gem_object(struct drm_gem_object *gem) |
| 140 | { |
| 141 | return gem ? gem->driver_private : NULL; |
| 142 | } |
| 143 | |
| 144 | /* TODO: submit equivalent to TTM generic API upstream? */ |
| 145 | static inline void __iomem * |
| 146 | nvbo_kmap_obj_iovirtual(struct nouveau_bo *nvbo) |
| 147 | { |
| 148 | bool is_iomem; |
| 149 | void __iomem *ioptr = (void __force __iomem *)ttm_kmap_obj_virtual( |
| 150 | &nvbo->kmap, &is_iomem); |
| 151 | WARN_ON_ONCE(ioptr && !is_iomem); |
| 152 | return ioptr; |
| 153 | } |
| 154 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 155 | enum nouveau_flags { |
| 156 | NV_NFORCE = 0x10000000, |
| 157 | NV_NFORCE2 = 0x20000000 |
| 158 | }; |
| 159 | |
| 160 | #define NVOBJ_ENGINE_SW 0 |
| 161 | #define NVOBJ_ENGINE_GR 1 |
Ben Skeggs | 6dfdd7a | 2011-03-31 15:40:43 +1000 | [diff] [blame] | 162 | #define NVOBJ_ENGINE_CRYPT 2 |
Ben Skeggs | 7ff5441 | 2011-03-18 10:25:59 +1000 | [diff] [blame] | 163 | #define NVOBJ_ENGINE_COPY0 3 |
| 164 | #define NVOBJ_ENGINE_COPY1 4 |
Ben Skeggs | a02ccc7 | 2011-04-04 16:08:24 +1000 | [diff] [blame] | 165 | #define NVOBJ_ENGINE_MPEG 5 |
Ben Skeggs | 8f27c54 | 2011-08-11 14:58:06 +1000 | [diff] [blame] | 166 | #define NVOBJ_ENGINE_PPP NVOBJ_ENGINE_MPEG |
| 167 | #define NVOBJ_ENGINE_BSP 6 |
| 168 | #define NVOBJ_ENGINE_VP 7 |
Ben Skeggs | 6dfdd7a | 2011-03-31 15:40:43 +1000 | [diff] [blame] | 169 | #define NVOBJ_ENGINE_DISPLAY 15 |
| 170 | #define NVOBJ_ENGINE_NR 16 |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 171 | |
Ben Skeggs | a11c319 | 2010-08-27 10:00:25 +1000 | [diff] [blame] | 172 | #define NVOBJ_FLAG_DONT_MAP (1 << 0) |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 173 | #define NVOBJ_FLAG_ZERO_ALLOC (1 << 1) |
| 174 | #define NVOBJ_FLAG_ZERO_FREE (1 << 2) |
Ben Skeggs | 34cf01b | 2010-11-22 10:48:51 +1000 | [diff] [blame] | 175 | #define NVOBJ_FLAG_VM (1 << 3) |
Ben Skeggs | c906ca0 | 2011-01-14 10:27:02 +1000 | [diff] [blame] | 176 | #define NVOBJ_FLAG_VM_USER (1 << 4) |
Ben Skeggs | e41115d | 2010-11-01 11:45:02 +1000 | [diff] [blame] | 177 | |
| 178 | #define NVOBJ_CINST_GLOBAL 0xdeadbeef |
| 179 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 180 | struct nouveau_gpuobj { |
Ben Skeggs | b3beb16 | 2010-09-01 15:24:29 +1000 | [diff] [blame] | 181 | struct drm_device *dev; |
Ben Skeggs | eb9bcbd | 2010-09-01 15:24:37 +1000 | [diff] [blame] | 182 | struct kref refcount; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 183 | struct list_head list; |
| 184 | |
Ben Skeggs | e41115d | 2010-11-01 11:45:02 +1000 | [diff] [blame] | 185 | void *node; |
Ben Skeggs | dc1e5c0 | 2010-10-25 15:23:59 +1000 | [diff] [blame] | 186 | u32 *suspend; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 187 | |
| 188 | uint32_t flags; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 189 | |
Ben Skeggs | 43efc9c | 2010-09-01 15:24:32 +1000 | [diff] [blame] | 190 | u32 size; |
Ben Skeggs | f8522fc | 2011-05-25 17:22:43 +1000 | [diff] [blame] | 191 | u32 pinst; /* PRAMIN BAR offset */ |
| 192 | u32 cinst; /* Channel offset */ |
| 193 | u64 vinst; /* VRAM address */ |
| 194 | u64 linst; /* VM address */ |
Ben Skeggs | de3a6c0 | 2010-09-01 15:24:30 +1000 | [diff] [blame] | 195 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 196 | uint32_t engine; |
| 197 | uint32_t class; |
| 198 | |
| 199 | void (*dtor)(struct drm_device *, struct nouveau_gpuobj *); |
| 200 | void *priv; |
| 201 | }; |
| 202 | |
Francisco Jerez | 332b242 | 2010-10-20 23:35:40 +0200 | [diff] [blame] | 203 | struct nouveau_page_flip_state { |
| 204 | struct list_head head; |
| 205 | struct drm_pending_vblank_event *event; |
| 206 | int crtc, bpp, pitch, x, y; |
| 207 | uint64_t offset; |
| 208 | }; |
| 209 | |
Francisco Jerez | e419cf0 | 2010-10-25 23:38:59 +0200 | [diff] [blame] | 210 | enum nouveau_channel_mutex_class { |
| 211 | NOUVEAU_UCHANNEL_MUTEX, |
| 212 | NOUVEAU_KCHANNEL_MUTEX |
| 213 | }; |
| 214 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 215 | struct nouveau_channel { |
| 216 | struct drm_device *dev; |
Ben Skeggs | e8a863c | 2011-06-01 19:18:48 +1000 | [diff] [blame] | 217 | struct list_head list; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 218 | int id; |
| 219 | |
Francisco Jerez | f091a3d | 2010-10-18 03:55:48 +0200 | [diff] [blame] | 220 | /* references to the channel data structure */ |
| 221 | struct kref ref; |
| 222 | /* users of the hardware channel resources, the hardware |
| 223 | * context will be kicked off when it reaches zero. */ |
| 224 | atomic_t users; |
Ben Skeggs | 6a6b73f | 2010-10-05 16:53:48 +1000 | [diff] [blame] | 225 | struct mutex mutex; |
| 226 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 227 | /* owner of this fifo */ |
| 228 | struct drm_file *file_priv; |
| 229 | /* mapping of the fifo itself */ |
| 230 | struct drm_local_map *map; |
| 231 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 232 | /* mapping of the regs controlling the fifo */ |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 233 | void __iomem *user; |
| 234 | uint32_t user_get; |
| 235 | uint32_t user_put; |
| 236 | |
| 237 | /* Fencing */ |
| 238 | struct { |
| 239 | /* lock protects the pending list only */ |
| 240 | spinlock_t lock; |
| 241 | struct list_head pending; |
| 242 | uint32_t sequence; |
| 243 | uint32_t sequence_ack; |
Ben Skeggs | 047d1d3 | 2010-05-31 12:00:43 +1000 | [diff] [blame] | 244 | atomic_t last_sequence_irq; |
Ben Skeggs | d02836b | 2011-06-07 15:21:23 +1000 | [diff] [blame] | 245 | struct nouveau_vma vma; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 246 | } fence; |
| 247 | |
| 248 | /* DMA push buffer */ |
Ben Skeggs | a8eaebc | 2010-09-01 15:24:31 +1000 | [diff] [blame] | 249 | struct nouveau_gpuobj *pushbuf; |
| 250 | struct nouveau_bo *pushbuf_bo; |
Ben Skeggs | ce163f6 | 2011-06-07 13:20:43 +1000 | [diff] [blame] | 251 | struct nouveau_vma pushbuf_vma; |
Ben Skeggs | a8eaebc | 2010-09-01 15:24:31 +1000 | [diff] [blame] | 252 | uint32_t pushbuf_base; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 253 | |
| 254 | /* Notifier memory */ |
| 255 | struct nouveau_bo *notifier_bo; |
Ben Skeggs | 0b71873 | 2011-06-07 13:17:45 +1000 | [diff] [blame] | 256 | struct nouveau_vma notifier_vma; |
Ben Skeggs | b833ac2 | 2010-06-01 15:32:24 +1000 | [diff] [blame] | 257 | struct drm_mm notifier_heap; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 258 | |
| 259 | /* PFIFO context */ |
Ben Skeggs | a8eaebc | 2010-09-01 15:24:31 +1000 | [diff] [blame] | 260 | struct nouveau_gpuobj *ramfc; |
| 261 | struct nouveau_gpuobj *cache; |
Ben Skeggs | b2b0993 | 2010-11-24 10:47:15 +1000 | [diff] [blame] | 262 | void *fifo_priv; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 263 | |
Ben Skeggs | a82dd49 | 2011-04-01 13:56:05 +1000 | [diff] [blame] | 264 | /* Execution engine contexts */ |
Ben Skeggs | 6dfdd7a | 2011-03-31 15:40:43 +1000 | [diff] [blame] | 265 | void *engctx[NVOBJ_ENGINE_NR]; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 266 | |
| 267 | /* NV50 VM */ |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 268 | struct nouveau_vm *vm; |
Ben Skeggs | a8eaebc | 2010-09-01 15:24:31 +1000 | [diff] [blame] | 269 | struct nouveau_gpuobj *vm_pd; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 270 | |
| 271 | /* Objects */ |
Ben Skeggs | a8eaebc | 2010-09-01 15:24:31 +1000 | [diff] [blame] | 272 | struct nouveau_gpuobj *ramin; /* Private instmem */ |
| 273 | struct drm_mm ramin_heap; /* Private PRAMIN heap */ |
| 274 | struct nouveau_ramht *ramht; /* Hash table */ |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 275 | |
| 276 | /* GPU object info for stuff used in-kernel (mm_enabled) */ |
| 277 | uint32_t m2mf_ntfy; |
| 278 | uint32_t vram_handle; |
| 279 | uint32_t gart_handle; |
| 280 | bool accel_done; |
| 281 | |
| 282 | /* Push buffer state (only for drm's channel on !mm_enabled) */ |
| 283 | struct { |
| 284 | int max; |
| 285 | int free; |
| 286 | int cur; |
| 287 | int put; |
| 288 | /* access via pushbuf_bo */ |
Ben Skeggs | 9a391ad | 2010-02-11 16:37:26 +1000 | [diff] [blame] | 289 | |
| 290 | int ib_base; |
| 291 | int ib_max; |
| 292 | int ib_free; |
| 293 | int ib_put; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 294 | } dma; |
| 295 | |
| 296 | uint32_t sw_subchannel[8]; |
| 297 | |
Ben Skeggs | 3d483d5 | 2011-06-07 15:43:31 +1000 | [diff] [blame] | 298 | struct nouveau_vma dispc_vma[2]; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 299 | struct { |
| 300 | struct nouveau_gpuobj *vblsem; |
Francisco Jerez | 1f6d2de | 2010-10-24 14:15:58 +0200 | [diff] [blame] | 301 | uint32_t vblsem_head; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 302 | uint32_t vblsem_offset; |
| 303 | uint32_t vblsem_rval; |
| 304 | struct list_head vbl_wait; |
Francisco Jerez | 332b242 | 2010-10-20 23:35:40 +0200 | [diff] [blame] | 305 | struct list_head flip; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 306 | } nvsw; |
| 307 | |
| 308 | struct { |
| 309 | bool active; |
| 310 | char name[32]; |
| 311 | struct drm_info_list info; |
| 312 | } debugfs; |
| 313 | }; |
| 314 | |
Ben Skeggs | 6dfdd7a | 2011-03-31 15:40:43 +1000 | [diff] [blame] | 315 | struct nouveau_exec_engine { |
| 316 | void (*destroy)(struct drm_device *, int engine); |
| 317 | int (*init)(struct drm_device *, int engine); |
Ben Skeggs | 6c320fe | 2011-07-20 11:22:33 +1000 | [diff] [blame] | 318 | int (*fini)(struct drm_device *, int engine, bool suspend); |
Ben Skeggs | 6dfdd7a | 2011-03-31 15:40:43 +1000 | [diff] [blame] | 319 | int (*context_new)(struct nouveau_channel *, int engine); |
| 320 | void (*context_del)(struct nouveau_channel *, int engine); |
| 321 | int (*object_new)(struct nouveau_channel *, int engine, |
| 322 | u32 handle, u16 class); |
Ben Skeggs | 96c5008 | 2011-04-01 13:10:45 +1000 | [diff] [blame] | 323 | void (*set_tile_region)(struct drm_device *dev, int i); |
Ben Skeggs | 6dfdd7a | 2011-03-31 15:40:43 +1000 | [diff] [blame] | 324 | void (*tlb_flush)(struct drm_device *, int engine); |
| 325 | }; |
| 326 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 327 | struct nouveau_instmem_engine { |
| 328 | void *priv; |
| 329 | |
| 330 | int (*init)(struct drm_device *dev); |
| 331 | void (*takedown)(struct drm_device *dev); |
| 332 | int (*suspend)(struct drm_device *dev); |
| 333 | void (*resume)(struct drm_device *dev); |
| 334 | |
Ben Skeggs | 6e32fed | 2011-06-03 14:23:30 +1000 | [diff] [blame] | 335 | int (*get)(struct nouveau_gpuobj *, struct nouveau_channel *, |
| 336 | u32 size, u32 align); |
Ben Skeggs | e41115d | 2010-11-01 11:45:02 +1000 | [diff] [blame] | 337 | void (*put)(struct nouveau_gpuobj *); |
| 338 | int (*map)(struct nouveau_gpuobj *); |
| 339 | void (*unmap)(struct nouveau_gpuobj *); |
| 340 | |
Ben Skeggs | f56cb86 | 2010-07-08 11:29:10 +1000 | [diff] [blame] | 341 | void (*flush)(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 342 | }; |
| 343 | |
| 344 | struct nouveau_mc_engine { |
| 345 | int (*init)(struct drm_device *dev); |
| 346 | void (*takedown)(struct drm_device *dev); |
| 347 | }; |
| 348 | |
| 349 | struct nouveau_timer_engine { |
| 350 | int (*init)(struct drm_device *dev); |
| 351 | void (*takedown)(struct drm_device *dev); |
| 352 | uint64_t (*read)(struct drm_device *dev); |
| 353 | }; |
| 354 | |
| 355 | struct nouveau_fb_engine { |
Francisco Jerez | cb00f7c | 2009-12-16 12:12:27 +0100 | [diff] [blame] | 356 | int num_tiles; |
Francisco Jerez | 87a326a | 2010-10-24 16:36:12 +0200 | [diff] [blame] | 357 | struct drm_mm tag_heap; |
Ben Skeggs | 20f63af | 2010-11-15 12:50:50 +1000 | [diff] [blame] | 358 | void *priv; |
Francisco Jerez | cb00f7c | 2009-12-16 12:12:27 +0100 | [diff] [blame] | 359 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 360 | int (*init)(struct drm_device *dev); |
| 361 | void (*takedown)(struct drm_device *dev); |
Francisco Jerez | cb00f7c | 2009-12-16 12:12:27 +0100 | [diff] [blame] | 362 | |
Francisco Jerez | a5cf68b | 2010-10-24 16:14:41 +0200 | [diff] [blame] | 363 | void (*init_tile_region)(struct drm_device *dev, int i, |
| 364 | uint32_t addr, uint32_t size, |
| 365 | uint32_t pitch, uint32_t flags); |
| 366 | void (*set_tile_region)(struct drm_device *dev, int i); |
| 367 | void (*free_tile_region)(struct drm_device *dev, int i); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 368 | }; |
| 369 | |
| 370 | struct nouveau_fifo_engine { |
Ben Skeggs | b2b0993 | 2010-11-24 10:47:15 +1000 | [diff] [blame] | 371 | void *priv; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 372 | int channels; |
| 373 | |
Ben Skeggs | a8eaebc | 2010-09-01 15:24:31 +1000 | [diff] [blame] | 374 | struct nouveau_gpuobj *playlist[2]; |
Ben Skeggs | ac94a34 | 2010-07-08 15:28:48 +1000 | [diff] [blame] | 375 | int cur_playlist; |
| 376 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 377 | int (*init)(struct drm_device *); |
| 378 | void (*takedown)(struct drm_device *); |
| 379 | |
| 380 | void (*disable)(struct drm_device *); |
| 381 | void (*enable)(struct drm_device *); |
| 382 | bool (*reassign)(struct drm_device *, bool enable); |
Francisco Jerez | 588d7d1 | 2009-12-13 20:07:42 +0100 | [diff] [blame] | 383 | bool (*cache_pull)(struct drm_device *dev, bool enable); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 384 | |
| 385 | int (*channel_id)(struct drm_device *); |
| 386 | |
| 387 | int (*create_context)(struct nouveau_channel *); |
| 388 | void (*destroy_context)(struct nouveau_channel *); |
| 389 | int (*load_context)(struct nouveau_channel *); |
| 390 | int (*unload_context)(struct drm_device *); |
Ben Skeggs | 56ac747 | 2010-10-22 10:26:24 +1000 | [diff] [blame] | 391 | void (*tlb_flush)(struct drm_device *dev); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 392 | }; |
| 393 | |
Francisco Jerez | c88c2e0 | 2010-07-24 17:37:33 +0200 | [diff] [blame] | 394 | struct nouveau_display_engine { |
Ben Skeggs | ef8389a | 2011-02-01 10:07:32 +1000 | [diff] [blame] | 395 | void *priv; |
Francisco Jerez | c88c2e0 | 2010-07-24 17:37:33 +0200 | [diff] [blame] | 396 | int (*early_init)(struct drm_device *); |
| 397 | void (*late_takedown)(struct drm_device *); |
| 398 | int (*create)(struct drm_device *); |
| 399 | int (*init)(struct drm_device *); |
| 400 | void (*destroy)(struct drm_device *); |
| 401 | }; |
| 402 | |
Ben Skeggs | ee2e013 | 2010-07-26 09:28:25 +1000 | [diff] [blame] | 403 | struct nouveau_gpio_engine { |
Ben Skeggs | fce2bad | 2010-11-11 16:14:56 +1000 | [diff] [blame] | 404 | void *priv; |
| 405 | |
Ben Skeggs | ee2e013 | 2010-07-26 09:28:25 +1000 | [diff] [blame] | 406 | int (*init)(struct drm_device *); |
| 407 | void (*takedown)(struct drm_device *); |
| 408 | |
| 409 | int (*get)(struct drm_device *, enum dcb_gpio_tag); |
| 410 | int (*set)(struct drm_device *, enum dcb_gpio_tag, int state); |
| 411 | |
Ben Skeggs | fce2bad | 2010-11-11 16:14:56 +1000 | [diff] [blame] | 412 | int (*irq_register)(struct drm_device *, enum dcb_gpio_tag, |
| 413 | void (*)(void *, int), void *); |
| 414 | void (*irq_unregister)(struct drm_device *, enum dcb_gpio_tag, |
| 415 | void (*)(void *, int), void *); |
| 416 | bool (*irq_enable)(struct drm_device *, enum dcb_gpio_tag, bool on); |
Ben Skeggs | ee2e013 | 2010-07-26 09:28:25 +1000 | [diff] [blame] | 417 | }; |
| 418 | |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 419 | struct nouveau_pm_voltage_level { |
Ben Skeggs | c345023 | 2011-06-09 13:45:31 +1000 | [diff] [blame] | 420 | u32 voltage; /* microvolts */ |
| 421 | u8 vid; |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 422 | }; |
| 423 | |
| 424 | struct nouveau_pm_voltage { |
| 425 | bool supported; |
Ben Skeggs | 03ce8d9 | 2011-06-10 15:33:11 +1000 | [diff] [blame] | 426 | u8 version; |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 427 | u8 vid_mask; |
| 428 | |
| 429 | struct nouveau_pm_voltage_level *level; |
| 430 | int nr_level; |
| 431 | }; |
| 432 | |
Martin Peres | e614b2e | 2011-04-14 00:46:19 +0200 | [diff] [blame] | 433 | struct nouveau_pm_memtiming { |
| 434 | int id; |
Roy Spliet | 9a78248 | 2011-07-09 21:18:11 +0200 | [diff] [blame] | 435 | u32 reg_0; /* 0x10f290 on Fermi, 0x100220 for older */ |
| 436 | u32 reg_1; |
| 437 | u32 reg_2; |
| 438 | u32 reg_3; |
| 439 | u32 reg_4; |
| 440 | u32 reg_5; |
| 441 | u32 reg_6; |
| 442 | u32 reg_7; |
| 443 | u32 reg_8; |
Roy Spliet | 2228c6f | 2011-07-14 20:40:10 +0200 | [diff] [blame] | 444 | /* To be written to 0x1002c0 */ |
| 445 | u8 CL; |
| 446 | u8 WR; |
Martin Peres | e614b2e | 2011-04-14 00:46:19 +0200 | [diff] [blame] | 447 | }; |
| 448 | |
Roy Spliet | 9a78248 | 2011-07-09 21:18:11 +0200 | [diff] [blame] | 449 | struct nouveau_pm_tbl_header{ |
| 450 | u8 version; |
| 451 | u8 header_len; |
| 452 | u8 entry_cnt; |
| 453 | u8 entry_len; |
| 454 | }; |
| 455 | |
| 456 | struct nouveau_pm_tbl_entry{ |
Roy Spliet | 2228c6f | 2011-07-14 20:40:10 +0200 | [diff] [blame] | 457 | u8 tWR; |
| 458 | u8 tUNK_1; |
| 459 | u8 tCL; |
Roy Spliet | 9a78248 | 2011-07-09 21:18:11 +0200 | [diff] [blame] | 460 | u8 tRP; /* Byte 3 */ |
| 461 | u8 empty_4; |
| 462 | u8 tRAS; /* Byte 5 */ |
| 463 | u8 empty_6; |
| 464 | u8 tRFC; /* Byte 7 */ |
| 465 | u8 empty_8; |
| 466 | u8 tRC; /* Byte 9 */ |
| 467 | u8 tUNK_10, tUNK_11, tUNK_12, tUNK_13, tUNK_14; |
| 468 | u8 empty_15,empty_16,empty_17; |
| 469 | u8 tUNK_18, tUNK_19, tUNK_20, tUNK_21; |
| 470 | }; |
| 471 | |
| 472 | /* nouveau_mem.c */ |
| 473 | void nv30_mem_timing_entry(struct drm_device *dev, struct nouveau_pm_tbl_header *hdr, |
| 474 | struct nouveau_pm_tbl_entry *e, uint8_t magic_number, |
| 475 | struct nouveau_pm_memtiming *timing); |
| 476 | |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 477 | #define NOUVEAU_PM_MAX_LEVEL 8 |
| 478 | struct nouveau_pm_level { |
| 479 | struct device_attribute dev_attr; |
| 480 | char name[32]; |
| 481 | int id; |
| 482 | |
| 483 | u32 core; |
| 484 | u32 memory; |
| 485 | u32 shader; |
Ben Skeggs | 9698b9a | 2011-06-21 15:12:26 +1000 | [diff] [blame] | 486 | u32 rop; |
| 487 | u32 copy; |
| 488 | u32 daemon; |
Ben Skeggs | 4fd2847 | 2011-06-17 16:11:31 +1000 | [diff] [blame] | 489 | u32 vdec; |
Ben Skeggs | 9698b9a | 2011-06-21 15:12:26 +1000 | [diff] [blame] | 490 | u32 unka0; /* nva3:nvc0 */ |
| 491 | u32 hub01; /* nvc0- */ |
| 492 | u32 hub06; /* nvc0- */ |
| 493 | u32 hub07; /* nvc0- */ |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 494 | |
Ben Skeggs | 3b5565d | 2011-06-09 16:57:07 +1000 | [diff] [blame] | 495 | u32 volt_min; /* microvolts */ |
| 496 | u32 volt_max; |
Ben Skeggs | c345023 | 2011-06-09 13:45:31 +1000 | [diff] [blame] | 497 | u8 fanspeed; |
Ben Skeggs | aee582d | 2010-09-27 10:13:23 +1000 | [diff] [blame] | 498 | |
| 499 | u16 memscript; |
Martin Peres | e614b2e | 2011-04-14 00:46:19 +0200 | [diff] [blame] | 500 | struct nouveau_pm_memtiming *timing; |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 501 | }; |
| 502 | |
Martin Peres | 34e9d85 | 2010-09-22 20:54:22 +0200 | [diff] [blame] | 503 | struct nouveau_pm_temp_sensor_constants { |
| 504 | u16 offset_constant; |
| 505 | s16 offset_mult; |
Emil Velikov | 40ce427 | 2011-06-22 02:13:23 +0100 | [diff] [blame] | 506 | s16 offset_div; |
| 507 | s16 slope_mult; |
| 508 | s16 slope_div; |
Martin Peres | 34e9d85 | 2010-09-22 20:54:22 +0200 | [diff] [blame] | 509 | }; |
| 510 | |
| 511 | struct nouveau_pm_threshold_temp { |
| 512 | s16 critical; |
| 513 | s16 down_clock; |
| 514 | s16 fan_boost; |
| 515 | }; |
| 516 | |
Roy Spliet | 7760fcb | 2010-09-17 23:17:24 +0200 | [diff] [blame] | 517 | struct nouveau_pm_memtimings { |
| 518 | bool supported; |
| 519 | struct nouveau_pm_memtiming *timing; |
| 520 | int nr_timing; |
| 521 | }; |
| 522 | |
Martin Peres | 11b7d89 | 2011-08-15 11:10:30 +1000 | [diff] [blame] | 523 | struct nouveau_pm_fan { |
| 524 | u32 min_duty; |
| 525 | u32 max_duty; |
Ben Skeggs | 3f8e11e | 2011-08-15 16:13:34 +1000 | [diff] [blame] | 526 | u32 pwm_freq; |
Martin Peres | 11b7d89 | 2011-08-15 11:10:30 +1000 | [diff] [blame] | 527 | }; |
| 528 | |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 529 | struct nouveau_pm_engine { |
| 530 | struct nouveau_pm_voltage voltage; |
| 531 | struct nouveau_pm_level perflvl[NOUVEAU_PM_MAX_LEVEL]; |
| 532 | int nr_perflvl; |
Roy Spliet | 7760fcb | 2010-09-17 23:17:24 +0200 | [diff] [blame] | 533 | struct nouveau_pm_memtimings memtimings; |
Martin Peres | 34e9d85 | 2010-09-22 20:54:22 +0200 | [diff] [blame] | 534 | struct nouveau_pm_temp_sensor_constants sensor_constants; |
| 535 | struct nouveau_pm_threshold_temp threshold_temp; |
Martin Peres | 11b7d89 | 2011-08-15 11:10:30 +1000 | [diff] [blame] | 536 | struct nouveau_pm_fan fan; |
Ben Skeggs | 0c10146 | 2011-07-28 10:17:40 +1000 | [diff] [blame] | 537 | u32 pwm_divisor; |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 538 | |
| 539 | struct nouveau_pm_level boot; |
| 540 | struct nouveau_pm_level *cur; |
| 541 | |
Francisco Jerez | 8155cac | 2010-09-23 20:58:38 +0200 | [diff] [blame] | 542 | struct device *hwmon; |
Ben Skeggs | 6032649 | 2010-10-12 12:31:32 +1000 | [diff] [blame] | 543 | struct notifier_block acpi_nb; |
Francisco Jerez | 8155cac | 2010-09-23 20:58:38 +0200 | [diff] [blame] | 544 | |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 545 | int (*clock_get)(struct drm_device *, u32 id); |
Ben Skeggs | 5c6dc65 | 2010-09-27 09:47:56 +1000 | [diff] [blame] | 546 | void *(*clock_pre)(struct drm_device *, struct nouveau_pm_level *, |
| 547 | u32 id, int khz); |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 548 | void (*clock_set)(struct drm_device *, void *); |
Ben Skeggs | 77e7da6 | 2011-06-17 11:25:57 +1000 | [diff] [blame] | 549 | |
| 550 | int (*clocks_get)(struct drm_device *, struct nouveau_pm_level *); |
| 551 | void *(*clocks_pre)(struct drm_device *, struct nouveau_pm_level *); |
| 552 | void (*clocks_set)(struct drm_device *, void *); |
| 553 | |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 554 | int (*voltage_get)(struct drm_device *); |
| 555 | int (*voltage_set)(struct drm_device *, int voltage); |
Ben Skeggs | a175094 | 2011-09-17 01:42:12 +1000 | [diff] [blame] | 556 | int (*pwm_get)(struct drm_device *, struct dcb_gpio_entry*, u32*, u32*); |
| 557 | int (*pwm_set)(struct drm_device *, struct dcb_gpio_entry*, u32, u32); |
Francisco Jerez | 8155cac | 2010-09-23 20:58:38 +0200 | [diff] [blame] | 558 | int (*temp_get)(struct drm_device *); |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 559 | }; |
| 560 | |
Ben Skeggs | 60d2a88 | 2010-12-06 15:28:54 +1000 | [diff] [blame] | 561 | struct nouveau_vram_engine { |
Ben Skeggs | 987eec1 | 2011-06-24 10:14:07 +1000 | [diff] [blame] | 562 | struct nouveau_mm mm; |
Ben Skeggs | 24f246a | 2011-06-10 13:36:08 +1000 | [diff] [blame] | 563 | |
Ben Skeggs | 60d2a88 | 2010-12-06 15:28:54 +1000 | [diff] [blame] | 564 | int (*init)(struct drm_device *); |
Ben Skeggs | 24f246a | 2011-06-10 13:36:08 +1000 | [diff] [blame] | 565 | void (*takedown)(struct drm_device *dev); |
Ben Skeggs | 60d2a88 | 2010-12-06 15:28:54 +1000 | [diff] [blame] | 566 | int (*get)(struct drm_device *, u64, u32 align, u32 size_nc, |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 567 | u32 type, struct nouveau_mem **); |
| 568 | void (*put)(struct drm_device *, struct nouveau_mem **); |
Ben Skeggs | 60d2a88 | 2010-12-06 15:28:54 +1000 | [diff] [blame] | 569 | |
| 570 | bool (*flags_valid)(struct drm_device *, u32 tile_flags); |
| 571 | }; |
| 572 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 573 | struct nouveau_engine { |
| 574 | struct nouveau_instmem_engine instmem; |
| 575 | struct nouveau_mc_engine mc; |
| 576 | struct nouveau_timer_engine timer; |
| 577 | struct nouveau_fb_engine fb; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 578 | struct nouveau_fifo_engine fifo; |
Francisco Jerez | c88c2e0 | 2010-07-24 17:37:33 +0200 | [diff] [blame] | 579 | struct nouveau_display_engine display; |
Ben Skeggs | ee2e013 | 2010-07-26 09:28:25 +1000 | [diff] [blame] | 580 | struct nouveau_gpio_engine gpio; |
Ben Skeggs | 330c598 | 2010-09-16 15:39:49 +1000 | [diff] [blame] | 581 | struct nouveau_pm_engine pm; |
Ben Skeggs | 60d2a88 | 2010-12-06 15:28:54 +1000 | [diff] [blame] | 582 | struct nouveau_vram_engine vram; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 583 | }; |
| 584 | |
| 585 | struct nouveau_pll_vals { |
| 586 | union { |
| 587 | struct { |
| 588 | #ifdef __BIG_ENDIAN |
| 589 | uint8_t N1, M1, N2, M2; |
| 590 | #else |
| 591 | uint8_t M1, N1, M2, N2; |
| 592 | #endif |
| 593 | }; |
| 594 | struct { |
| 595 | uint16_t NM1, NM2; |
| 596 | } __attribute__((packed)); |
| 597 | }; |
| 598 | int log2P; |
| 599 | |
| 600 | int refclk; |
| 601 | }; |
| 602 | |
| 603 | enum nv04_fp_display_regs { |
| 604 | FP_DISPLAY_END, |
| 605 | FP_TOTAL, |
| 606 | FP_CRTC, |
| 607 | FP_SYNC_START, |
| 608 | FP_SYNC_END, |
| 609 | FP_VALID_START, |
| 610 | FP_VALID_END |
| 611 | }; |
| 612 | |
| 613 | struct nv04_crtc_reg { |
Francisco Jerez | cbab95db | 2010-10-11 03:43:58 +0200 | [diff] [blame] | 614 | unsigned char MiscOutReg; |
Francisco Jerez | 4a9f822 | 2010-07-20 16:48:08 +0200 | [diff] [blame] | 615 | uint8_t CRTC[0xa0]; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 616 | uint8_t CR58[0x10]; |
| 617 | uint8_t Sequencer[5]; |
| 618 | uint8_t Graphics[9]; |
| 619 | uint8_t Attribute[21]; |
Francisco Jerez | cbab95db | 2010-10-11 03:43:58 +0200 | [diff] [blame] | 620 | unsigned char DAC[768]; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 621 | |
| 622 | /* PCRTC regs */ |
| 623 | uint32_t fb_start; |
| 624 | uint32_t crtc_cfg; |
| 625 | uint32_t cursor_cfg; |
| 626 | uint32_t gpio_ext; |
| 627 | uint32_t crtc_830; |
| 628 | uint32_t crtc_834; |
| 629 | uint32_t crtc_850; |
| 630 | uint32_t crtc_eng_ctrl; |
| 631 | |
| 632 | /* PRAMDAC regs */ |
| 633 | uint32_t nv10_cursync; |
| 634 | struct nouveau_pll_vals pllvals; |
| 635 | uint32_t ramdac_gen_ctrl; |
| 636 | uint32_t ramdac_630; |
| 637 | uint32_t ramdac_634; |
| 638 | uint32_t tv_setup; |
| 639 | uint32_t tv_vtotal; |
| 640 | uint32_t tv_vskew; |
| 641 | uint32_t tv_vsync_delay; |
| 642 | uint32_t tv_htotal; |
| 643 | uint32_t tv_hskew; |
| 644 | uint32_t tv_hsync_delay; |
| 645 | uint32_t tv_hsync_delay2; |
| 646 | uint32_t fp_horiz_regs[7]; |
| 647 | uint32_t fp_vert_regs[7]; |
| 648 | uint32_t dither; |
| 649 | uint32_t fp_control; |
| 650 | uint32_t dither_regs[6]; |
| 651 | uint32_t fp_debug_0; |
| 652 | uint32_t fp_debug_1; |
| 653 | uint32_t fp_debug_2; |
| 654 | uint32_t fp_margin_color; |
| 655 | uint32_t ramdac_8c0; |
| 656 | uint32_t ramdac_a20; |
| 657 | uint32_t ramdac_a24; |
| 658 | uint32_t ramdac_a34; |
| 659 | uint32_t ctv_regs[38]; |
| 660 | }; |
| 661 | |
| 662 | struct nv04_output_reg { |
| 663 | uint32_t output; |
| 664 | int head; |
| 665 | }; |
| 666 | |
| 667 | struct nv04_mode_state { |
Francisco Jerez | cbab95db | 2010-10-11 03:43:58 +0200 | [diff] [blame] | 668 | struct nv04_crtc_reg crtc_reg[2]; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 669 | uint32_t pllsel; |
| 670 | uint32_t sel_clk; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 671 | }; |
| 672 | |
| 673 | enum nouveau_card_type { |
| 674 | NV_04 = 0x00, |
| 675 | NV_10 = 0x10, |
| 676 | NV_20 = 0x20, |
| 677 | NV_30 = 0x30, |
| 678 | NV_40 = 0x40, |
| 679 | NV_50 = 0x50, |
Ben Skeggs | 4b223ee | 2010-08-03 10:00:56 +1000 | [diff] [blame] | 680 | NV_C0 = 0xc0, |
Ben Skeggs | 2e9733f | 2011-07-02 20:28:49 +1000 | [diff] [blame] | 681 | NV_D0 = 0xd0 |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 682 | }; |
| 683 | |
| 684 | struct drm_nouveau_private { |
| 685 | struct drm_device *dev; |
Ben Skeggs | aba99a8 | 2011-05-25 14:48:50 +1000 | [diff] [blame] | 686 | bool noaccel; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 687 | |
| 688 | /* the card type, takes NV_* as values */ |
| 689 | enum nouveau_card_type card_type; |
| 690 | /* exact chipset, derived from NV_PMC_BOOT_0 */ |
| 691 | int chipset; |
| 692 | int flags; |
Ben Skeggs | f2cbe46 | 2011-07-21 15:39:06 +1000 | [diff] [blame] | 693 | u32 crystal; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 694 | |
| 695 | void __iomem *mmio; |
Ben Skeggs | 5125bfd | 2010-09-01 15:24:33 +1000 | [diff] [blame] | 696 | |
Ben Skeggs | e05d7ea | 2010-09-01 15:24:38 +1000 | [diff] [blame] | 697 | spinlock_t ramin_lock; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 698 | void __iomem *ramin; |
Ben Skeggs | 5125bfd | 2010-09-01 15:24:33 +1000 | [diff] [blame] | 699 | u32 ramin_size; |
| 700 | u32 ramin_base; |
| 701 | bool ramin_available; |
Ben Skeggs | e05d7ea | 2010-09-01 15:24:38 +1000 | [diff] [blame] | 702 | struct drm_mm ramin_heap; |
Ben Skeggs | 6dfdd7a | 2011-03-31 15:40:43 +1000 | [diff] [blame] | 703 | struct nouveau_exec_engine *eng[NVOBJ_ENGINE_NR]; |
Ben Skeggs | e05d7ea | 2010-09-01 15:24:38 +1000 | [diff] [blame] | 704 | struct list_head gpuobj_list; |
Ben Skeggs | b8c157d | 2010-10-20 10:39:35 +1000 | [diff] [blame] | 705 | struct list_head classes; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 706 | |
Ben Skeggs | ac8fb97 | 2010-01-15 09:24:20 +1000 | [diff] [blame] | 707 | struct nouveau_bo *vga_ram; |
| 708 | |
Ben Skeggs | 35fa2f2 | 2010-10-21 14:07:03 +1000 | [diff] [blame] | 709 | /* interrupt handling */ |
Ben Skeggs | 8f8a544 | 2010-11-03 09:57:28 +1000 | [diff] [blame] | 710 | void (*irq_handler[32])(struct drm_device *); |
Ben Skeggs | 35fa2f2 | 2010-10-21 14:07:03 +1000 | [diff] [blame] | 711 | bool msi_enabled; |
Andy Lutomirski | ab83833 | 2010-11-16 18:40:52 -0500 | [diff] [blame] | 712 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 713 | struct list_head vbl_waiting; |
| 714 | |
| 715 | struct { |
Dave Airlie | ba4420c | 2010-03-09 10:56:52 +1000 | [diff] [blame] | 716 | struct drm_global_reference mem_global_ref; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 717 | struct ttm_bo_global_ref bo_global_ref; |
| 718 | struct ttm_bo_device bdev; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 719 | atomic_t validate_sequence; |
| 720 | } ttm; |
| 721 | |
Francisco Jerez | 0c6c1c2 | 2010-09-22 00:58:54 +0200 | [diff] [blame] | 722 | struct { |
| 723 | spinlock_t lock; |
| 724 | struct drm_mm heap; |
| 725 | struct nouveau_bo *bo; |
| 726 | } fence; |
| 727 | |
Ben Skeggs | cff5c13 | 2010-10-06 16:16:59 +1000 | [diff] [blame] | 728 | struct { |
| 729 | spinlock_t lock; |
| 730 | struct nouveau_channel *ptr[NOUVEAU_MAX_CHANNEL_NR]; |
| 731 | } channels; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 732 | |
| 733 | struct nouveau_engine engine; |
| 734 | struct nouveau_channel *channel; |
| 735 | |
Maarten Maathuis | ff9e527 | 2010-02-01 20:58:27 +0100 | [diff] [blame] | 736 | /* For PFIFO and PGRAPH. */ |
| 737 | spinlock_t context_switch_lock; |
| 738 | |
Ben Skeggs | 04eb34a | 2011-04-06 13:28:35 +1000 | [diff] [blame] | 739 | /* VM/PRAMIN flush, legacy PRAMIN aperture */ |
| 740 | spinlock_t vm_lock; |
| 741 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 742 | /* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */ |
Ben Skeggs | e05c5a3 | 2010-09-01 15:24:35 +1000 | [diff] [blame] | 743 | struct nouveau_ramht *ramht; |
| 744 | struct nouveau_gpuobj *ramfc; |
| 745 | struct nouveau_gpuobj *ramro; |
| 746 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 747 | uint32_t ramin_rsvd_vram; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 748 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 749 | struct { |
| 750 | enum { |
| 751 | NOUVEAU_GART_NONE = 0, |
Ben Skeggs | 58e6c7a | 2011-01-11 14:10:09 +1000 | [diff] [blame] | 752 | NOUVEAU_GART_AGP, /* AGP */ |
| 753 | NOUVEAU_GART_PDMA, /* paged dma object */ |
| 754 | NOUVEAU_GART_HW /* on-chip gart/vm */ |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 755 | } type; |
| 756 | uint64_t aper_base; |
| 757 | uint64_t aper_size; |
| 758 | uint64_t aper_free; |
| 759 | |
Ben Skeggs | 7948758 | 2011-01-11 14:52:40 +1000 | [diff] [blame] | 760 | struct ttm_backend_func *func; |
| 761 | |
| 762 | struct { |
| 763 | struct page *page; |
| 764 | dma_addr_t addr; |
| 765 | } dummy; |
| 766 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 767 | struct nouveau_gpuobj *sg_ctxdma; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 768 | } gart_info; |
| 769 | |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 770 | /* nv10-nv40 tiling regions */ |
Francisco Jerez | a5cf68b | 2010-10-24 16:14:41 +0200 | [diff] [blame] | 771 | struct { |
| 772 | struct nouveau_tile_reg reg[NOUVEAU_MAX_TILE_NR]; |
| 773 | spinlock_t lock; |
| 774 | } tile; |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 775 | |
Ben Skeggs | a76fb4e | 2010-03-18 09:45:20 +1000 | [diff] [blame] | 776 | /* VRAM/fb configuration */ |
| 777 | uint64_t vram_size; |
| 778 | uint64_t vram_sys_base; |
| 779 | |
Ben Skeggs | a76fb4e | 2010-03-18 09:45:20 +1000 | [diff] [blame] | 780 | uint64_t fb_available_size; |
| 781 | uint64_t fb_mappable_pages; |
| 782 | uint64_t fb_aper_free; |
| 783 | int fb_mtrr; |
| 784 | |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 785 | /* BAR control (NV50-) */ |
| 786 | struct nouveau_vm *bar1_vm; |
| 787 | struct nouveau_vm *bar3_vm; |
| 788 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 789 | /* G8x/G9x virtual address space */ |
Ben Skeggs | 4c136142 | 2010-11-15 11:54:21 +1000 | [diff] [blame] | 790 | struct nouveau_vm *chan_vm; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 791 | |
Ben Skeggs | 04a39c5 | 2010-02-24 10:03:05 +1000 | [diff] [blame] | 792 | struct nvbios vbios; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 793 | |
| 794 | struct nv04_mode_state mode_reg; |
| 795 | struct nv04_mode_state saved_reg; |
| 796 | uint32_t saved_vga_font[4][16384]; |
| 797 | uint32_t crtc_owner; |
| 798 | uint32_t dac_users[4]; |
| 799 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 800 | struct backlight_device *backlight; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 801 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 802 | struct { |
| 803 | struct dentry *channel_root; |
| 804 | } debugfs; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 805 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 806 | struct nouveau_fbdev *nfbdev; |
Marcin Slusarz | 06415c5 | 2010-05-16 17:29:56 +0200 | [diff] [blame] | 807 | struct apertures_struct *apertures; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 808 | }; |
| 809 | |
| 810 | static inline struct drm_nouveau_private * |
Francisco Jerez | 2730723 | 2010-09-21 18:57:11 +0200 | [diff] [blame] | 811 | nouveau_private(struct drm_device *dev) |
| 812 | { |
| 813 | return dev->dev_private; |
| 814 | } |
| 815 | |
| 816 | static inline struct drm_nouveau_private * |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 817 | nouveau_bdev(struct ttm_bo_device *bd) |
| 818 | { |
| 819 | return container_of(bd, struct drm_nouveau_private, ttm.bdev); |
| 820 | } |
| 821 | |
| 822 | static inline int |
| 823 | nouveau_bo_ref(struct nouveau_bo *ref, struct nouveau_bo **pnvbo) |
| 824 | { |
| 825 | struct nouveau_bo *prev; |
| 826 | |
| 827 | if (!pnvbo) |
| 828 | return -EINVAL; |
| 829 | prev = *pnvbo; |
| 830 | |
| 831 | *pnvbo = ref ? nouveau_bo(ttm_bo_reference(&ref->bo)) : NULL; |
| 832 | if (prev) { |
| 833 | struct ttm_buffer_object *bo = &prev->bo; |
| 834 | |
| 835 | ttm_bo_unref(&bo); |
| 836 | } |
| 837 | |
| 838 | return 0; |
| 839 | } |
| 840 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 841 | /* nouveau_drv.c */ |
Ben Skeggs | 03bc967 | 2011-07-04 13:14:05 +1000 | [diff] [blame] | 842 | extern int nouveau_modeset; |
Francisco Jerez | de5899b | 2010-09-08 02:28:23 +0200 | [diff] [blame] | 843 | extern int nouveau_agpmode; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 844 | extern int nouveau_duallink; |
| 845 | extern int nouveau_uscript_lvds; |
| 846 | extern int nouveau_uscript_tmds; |
| 847 | extern int nouveau_vram_pushbuf; |
| 848 | extern int nouveau_vram_notify; |
| 849 | extern int nouveau_fbpercrtc; |
Ben Skeggs | f405350 | 2010-03-15 09:43:51 +1000 | [diff] [blame] | 850 | extern int nouveau_tv_disable; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 851 | extern char *nouveau_tv_norm; |
| 852 | extern int nouveau_reg_debug; |
| 853 | extern char *nouveau_vbios; |
Ben Skeggs | a147089 | 2010-01-18 11:42:37 +1000 | [diff] [blame] | 854 | extern int nouveau_ignorelid; |
Marcin Kościelnicki | a32ed69 | 2010-01-26 14:00:42 +0000 | [diff] [blame] | 855 | extern int nouveau_nofbaccel; |
| 856 | extern int nouveau_noaccel; |
Marcin Kościelnicki | 0cba1b7 | 2010-09-29 11:15:01 +0000 | [diff] [blame] | 857 | extern int nouveau_force_post; |
Ben Skeggs | da647d5 | 2010-03-04 12:00:39 +1000 | [diff] [blame] | 858 | extern int nouveau_override_conntype; |
Ben Skeggs | 6f87698 | 2010-09-16 16:47:14 +1000 | [diff] [blame] | 859 | extern char *nouveau_perflvl; |
| 860 | extern int nouveau_perflvl_wr; |
Ben Skeggs | 35fa2f2 | 2010-10-21 14:07:03 +1000 | [diff] [blame] | 861 | extern int nouveau_msi; |
Ben Skeggs | 0411de8 | 2011-05-25 18:32:44 +1000 | [diff] [blame] | 862 | extern int nouveau_ctxfw; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 863 | |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 864 | extern int nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state); |
| 865 | extern int nouveau_pci_resume(struct pci_dev *pdev); |
| 866 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 867 | /* nouveau_state.c */ |
Ben Skeggs | 3f0a68d | 2011-05-31 11:11:28 +1000 | [diff] [blame] | 868 | extern int nouveau_open(struct drm_device *, struct drm_file *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 869 | extern void nouveau_preclose(struct drm_device *dev, struct drm_file *); |
Ben Skeggs | 3f0a68d | 2011-05-31 11:11:28 +1000 | [diff] [blame] | 870 | extern void nouveau_postclose(struct drm_device *, struct drm_file *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 871 | extern int nouveau_load(struct drm_device *, unsigned long flags); |
| 872 | extern int nouveau_firstopen(struct drm_device *); |
| 873 | extern void nouveau_lastclose(struct drm_device *); |
| 874 | extern int nouveau_unload(struct drm_device *); |
| 875 | extern int nouveau_ioctl_getparam(struct drm_device *, void *data, |
| 876 | struct drm_file *); |
| 877 | extern int nouveau_ioctl_setparam(struct drm_device *, void *data, |
| 878 | struct drm_file *); |
Ben Skeggs | 12fb952 | 2010-11-19 14:32:56 +1000 | [diff] [blame] | 879 | extern bool nouveau_wait_eq(struct drm_device *, uint64_t timeout, |
| 880 | uint32_t reg, uint32_t mask, uint32_t val); |
| 881 | extern bool nouveau_wait_ne(struct drm_device *, uint64_t timeout, |
| 882 | uint32_t reg, uint32_t mask, uint32_t val); |
Ben Skeggs | 78e2933 | 2011-06-18 16:27:24 +1000 | [diff] [blame] | 883 | extern bool nouveau_wait_cb(struct drm_device *, u64 timeout, |
| 884 | bool (*cond)(void *), void *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 885 | extern bool nouveau_wait_for_idle(struct drm_device *); |
| 886 | extern int nouveau_card_init(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 887 | |
| 888 | /* nouveau_mem.c */ |
Ben Skeggs | fbd2895 | 2010-09-01 15:24:34 +1000 | [diff] [blame] | 889 | extern int nouveau_mem_vram_init(struct drm_device *); |
| 890 | extern void nouveau_mem_vram_fini(struct drm_device *); |
| 891 | extern int nouveau_mem_gart_init(struct drm_device *); |
| 892 | extern void nouveau_mem_gart_fini(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 893 | extern int nouveau_mem_init_agp(struct drm_device *); |
Francisco Jerez | e04d8e8 | 2010-07-23 20:29:13 +0200 | [diff] [blame] | 894 | extern int nouveau_mem_reset_agp(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 895 | extern void nouveau_mem_close(struct drm_device *); |
Ben Skeggs | 60d2a88 | 2010-12-06 15:28:54 +1000 | [diff] [blame] | 896 | extern int nouveau_mem_detect(struct drm_device *); |
| 897 | extern bool nouveau_mem_flags_valid(struct drm_device *, u32 tile_flags); |
Francisco Jerez | a5cf68b | 2010-10-24 16:14:41 +0200 | [diff] [blame] | 898 | extern struct nouveau_tile_reg *nv10_mem_set_tiling( |
| 899 | struct drm_device *dev, uint32_t addr, uint32_t size, |
| 900 | uint32_t pitch, uint32_t flags); |
| 901 | extern void nv10_mem_put_tile_region(struct drm_device *dev, |
| 902 | struct nouveau_tile_reg *tile, |
| 903 | struct nouveau_fence *fence); |
Ben Skeggs | 573a2a3 | 2010-08-25 15:26:04 +1000 | [diff] [blame] | 904 | extern const struct ttm_mem_type_manager_func nouveau_vram_manager; |
Ben Skeggs | 26c0c9e | 2011-02-10 12:59:51 +1000 | [diff] [blame] | 905 | extern const struct ttm_mem_type_manager_func nouveau_gart_manager; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 906 | |
| 907 | /* nouveau_notifier.c */ |
| 908 | extern int nouveau_notifier_init_channel(struct nouveau_channel *); |
| 909 | extern void nouveau_notifier_takedown_channel(struct nouveau_channel *); |
| 910 | extern int nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle, |
Ben Skeggs | 73412c3 | 2011-03-04 09:58:36 +1000 | [diff] [blame] | 911 | int cout, uint32_t start, uint32_t end, |
| 912 | uint32_t *offset); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 913 | extern int nouveau_notifier_offset(struct nouveau_gpuobj *, uint32_t *); |
| 914 | extern int nouveau_ioctl_notifier_alloc(struct drm_device *, void *data, |
| 915 | struct drm_file *); |
| 916 | extern int nouveau_ioctl_notifier_free(struct drm_device *, void *data, |
| 917 | struct drm_file *); |
| 918 | |
| 919 | /* nouveau_channel.c */ |
| 920 | extern struct drm_ioctl_desc nouveau_ioctls[]; |
| 921 | extern int nouveau_max_ioctl; |
| 922 | extern void nouveau_channel_cleanup(struct drm_device *, struct drm_file *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 923 | extern int nouveau_channel_alloc(struct drm_device *dev, |
| 924 | struct nouveau_channel **chan, |
| 925 | struct drm_file *file_priv, |
| 926 | uint32_t fb_ctxdma, uint32_t tt_ctxdma); |
Ben Skeggs | cff5c13 | 2010-10-06 16:16:59 +1000 | [diff] [blame] | 927 | extern struct nouveau_channel * |
Francisco Jerez | feeb0ae | 2010-10-18 02:58:04 +0200 | [diff] [blame] | 928 | nouveau_channel_get_unlocked(struct nouveau_channel *); |
| 929 | extern struct nouveau_channel * |
Ben Skeggs | e8a863c | 2011-06-01 19:18:48 +1000 | [diff] [blame] | 930 | nouveau_channel_get(struct drm_file *, int id); |
Francisco Jerez | feeb0ae | 2010-10-18 02:58:04 +0200 | [diff] [blame] | 931 | extern void nouveau_channel_put_unlocked(struct nouveau_channel **); |
Ben Skeggs | cff5c13 | 2010-10-06 16:16:59 +1000 | [diff] [blame] | 932 | extern void nouveau_channel_put(struct nouveau_channel **); |
Francisco Jerez | f091a3d | 2010-10-18 03:55:48 +0200 | [diff] [blame] | 933 | extern void nouveau_channel_ref(struct nouveau_channel *chan, |
| 934 | struct nouveau_channel **pchan); |
Francisco Jerez | 6dccd31 | 2010-11-18 23:57:46 +0100 | [diff] [blame] | 935 | extern void nouveau_channel_idle(struct nouveau_channel *chan); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 936 | |
| 937 | /* nouveau_object.c */ |
Ben Skeggs | 6dfdd7a | 2011-03-31 15:40:43 +1000 | [diff] [blame] | 938 | #define NVOBJ_ENGINE_ADD(d, e, p) do { \ |
| 939 | struct drm_nouveau_private *dev_priv = (d)->dev_private; \ |
| 940 | dev_priv->eng[NVOBJ_ENGINE_##e] = (p); \ |
| 941 | } while (0) |
| 942 | |
| 943 | #define NVOBJ_ENGINE_DEL(d, e) do { \ |
| 944 | struct drm_nouveau_private *dev_priv = (d)->dev_private; \ |
| 945 | dev_priv->eng[NVOBJ_ENGINE_##e] = NULL; \ |
| 946 | } while (0) |
| 947 | |
Emil Velikov | 0b89a07 | 2011-03-19 23:31:54 +0000 | [diff] [blame] | 948 | #define NVOBJ_CLASS(d, c, e) do { \ |
Ben Skeggs | b8c157d | 2010-10-20 10:39:35 +1000 | [diff] [blame] | 949 | int ret = nouveau_gpuobj_class_new((d), (c), NVOBJ_ENGINE_##e); \ |
| 950 | if (ret) \ |
| 951 | return ret; \ |
Emil Velikov | 71298e2 | 2011-03-19 23:31:51 +0000 | [diff] [blame] | 952 | } while (0) |
Ben Skeggs | b8c157d | 2010-10-20 10:39:35 +1000 | [diff] [blame] | 953 | |
Emil Velikov | 0b89a07 | 2011-03-19 23:31:54 +0000 | [diff] [blame] | 954 | #define NVOBJ_MTHD(d, c, m, e) do { \ |
Ben Skeggs | b8c157d | 2010-10-20 10:39:35 +1000 | [diff] [blame] | 955 | int ret = nouveau_gpuobj_mthd_new((d), (c), (m), (e)); \ |
| 956 | if (ret) \ |
| 957 | return ret; \ |
Emil Velikov | 71298e2 | 2011-03-19 23:31:51 +0000 | [diff] [blame] | 958 | } while (0) |
Ben Skeggs | b8c157d | 2010-10-20 10:39:35 +1000 | [diff] [blame] | 959 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 960 | extern int nouveau_gpuobj_early_init(struct drm_device *); |
| 961 | extern int nouveau_gpuobj_init(struct drm_device *); |
| 962 | extern void nouveau_gpuobj_takedown(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 963 | extern int nouveau_gpuobj_suspend(struct drm_device *dev); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 964 | extern void nouveau_gpuobj_resume(struct drm_device *dev); |
Ben Skeggs | b8c157d | 2010-10-20 10:39:35 +1000 | [diff] [blame] | 965 | extern int nouveau_gpuobj_class_new(struct drm_device *, u32 class, u32 eng); |
| 966 | extern int nouveau_gpuobj_mthd_new(struct drm_device *, u32 class, u32 mthd, |
| 967 | int (*exec)(struct nouveau_channel *, |
Emil Velikov | 71298e2 | 2011-03-19 23:31:51 +0000 | [diff] [blame] | 968 | u32 class, u32 mthd, u32 data)); |
Ben Skeggs | b8c157d | 2010-10-20 10:39:35 +1000 | [diff] [blame] | 969 | extern int nouveau_gpuobj_mthd_call(struct nouveau_channel *, u32, u32, u32); |
Ben Skeggs | 274fec9 | 2010-11-03 13:16:18 +1000 | [diff] [blame] | 970 | extern int nouveau_gpuobj_mthd_call2(struct drm_device *, int, u32, u32, u32); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 971 | extern int nouveau_gpuobj_channel_init(struct nouveau_channel *, |
| 972 | uint32_t vram_h, uint32_t tt_h); |
| 973 | extern void nouveau_gpuobj_channel_takedown(struct nouveau_channel *); |
| 974 | extern int nouveau_gpuobj_new(struct drm_device *, struct nouveau_channel *, |
| 975 | uint32_t size, int align, uint32_t flags, |
| 976 | struct nouveau_gpuobj **); |
Ben Skeggs | a8eaebc | 2010-09-01 15:24:31 +1000 | [diff] [blame] | 977 | extern void nouveau_gpuobj_ref(struct nouveau_gpuobj *, |
| 978 | struct nouveau_gpuobj **); |
Ben Skeggs | 43efc9c | 2010-09-01 15:24:32 +1000 | [diff] [blame] | 979 | extern int nouveau_gpuobj_new_fake(struct drm_device *, u32 pinst, u64 vinst, |
| 980 | u32 size, u32 flags, |
Ben Skeggs | a8eaebc | 2010-09-01 15:24:31 +1000 | [diff] [blame] | 981 | struct nouveau_gpuobj **); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 982 | extern int nouveau_gpuobj_dma_new(struct nouveau_channel *, int class, |
| 983 | uint64_t offset, uint64_t size, int access, |
| 984 | int target, struct nouveau_gpuobj **); |
Ben Skeggs | ceac309 | 2010-11-23 10:10:24 +1000 | [diff] [blame] | 985 | extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, u32 handle, int class); |
Ben Skeggs | 7f4a195 | 2010-11-16 11:50:09 +1000 | [diff] [blame] | 986 | extern int nv50_gpuobj_dma_new(struct nouveau_channel *, int class, u64 base, |
| 987 | u64 size, int target, int access, u32 type, |
| 988 | u32 comp, struct nouveau_gpuobj **pobj); |
| 989 | extern void nv50_gpuobj_dma_init(struct nouveau_gpuobj *, u32 offset, |
| 990 | int class, u64 base, u64 size, int target, |
| 991 | int access, u32 type, u32 comp); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 992 | extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data, |
| 993 | struct drm_file *); |
| 994 | extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data, |
| 995 | struct drm_file *); |
| 996 | |
| 997 | /* nouveau_irq.c */ |
Ben Skeggs | 35fa2f2 | 2010-10-21 14:07:03 +1000 | [diff] [blame] | 998 | extern int nouveau_irq_init(struct drm_device *); |
| 999 | extern void nouveau_irq_fini(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1000 | extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS); |
Ben Skeggs | 8f8a544 | 2010-11-03 09:57:28 +1000 | [diff] [blame] | 1001 | extern void nouveau_irq_register(struct drm_device *, int status_bit, |
| 1002 | void (*)(struct drm_device *)); |
| 1003 | extern void nouveau_irq_unregister(struct drm_device *, int status_bit); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1004 | extern void nouveau_irq_preinstall(struct drm_device *); |
| 1005 | extern int nouveau_irq_postinstall(struct drm_device *); |
| 1006 | extern void nouveau_irq_uninstall(struct drm_device *); |
| 1007 | |
| 1008 | /* nouveau_sgdma.c */ |
| 1009 | extern int nouveau_sgdma_init(struct drm_device *); |
| 1010 | extern void nouveau_sgdma_takedown(struct drm_device *); |
Francisco Jerez | fd70b6c | 2010-12-08 02:37:12 +0100 | [diff] [blame] | 1011 | extern uint32_t nouveau_sgdma_get_physical(struct drm_device *, |
| 1012 | uint32_t offset); |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 1013 | extern struct ttm_tt *nouveau_sgdma_create_ttm(struct ttm_bo_device *bdev, |
| 1014 | unsigned long size, |
| 1015 | uint32_t page_flags, |
| 1016 | struct page *dummy_read_page); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1017 | |
| 1018 | /* nouveau_debugfs.c */ |
| 1019 | #if defined(CONFIG_DRM_NOUVEAU_DEBUG) |
| 1020 | extern int nouveau_debugfs_init(struct drm_minor *); |
| 1021 | extern void nouveau_debugfs_takedown(struct drm_minor *); |
| 1022 | extern int nouveau_debugfs_channel_init(struct nouveau_channel *); |
| 1023 | extern void nouveau_debugfs_channel_fini(struct nouveau_channel *); |
| 1024 | #else |
| 1025 | static inline int |
| 1026 | nouveau_debugfs_init(struct drm_minor *minor) |
| 1027 | { |
| 1028 | return 0; |
| 1029 | } |
| 1030 | |
| 1031 | static inline void nouveau_debugfs_takedown(struct drm_minor *minor) |
| 1032 | { |
| 1033 | } |
| 1034 | |
| 1035 | static inline int |
| 1036 | nouveau_debugfs_channel_init(struct nouveau_channel *chan) |
| 1037 | { |
| 1038 | return 0; |
| 1039 | } |
| 1040 | |
| 1041 | static inline void |
| 1042 | nouveau_debugfs_channel_fini(struct nouveau_channel *chan) |
| 1043 | { |
| 1044 | } |
| 1045 | #endif |
| 1046 | |
| 1047 | /* nouveau_dma.c */ |
Ben Skeggs | 75c99da | 2010-01-08 10:57:39 +1000 | [diff] [blame] | 1048 | extern void nouveau_dma_pre_init(struct nouveau_channel *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1049 | extern int nouveau_dma_init(struct nouveau_channel *); |
Ben Skeggs | 9a391ad | 2010-02-11 16:37:26 +1000 | [diff] [blame] | 1050 | extern int nouveau_dma_wait(struct nouveau_channel *, int slots, int size); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1051 | |
| 1052 | /* nouveau_acpi.c */ |
Dave Airlie | afeb3e1 | 2010-04-07 13:55:09 +1000 | [diff] [blame] | 1053 | #define ROM_BIOS_PAGE 4096 |
Dave Airlie | 2f41a7f | 2010-03-03 09:20:25 +1000 | [diff] [blame] | 1054 | #if defined(CONFIG_ACPI) |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 1055 | void nouveau_register_dsm_handler(void); |
| 1056 | void nouveau_unregister_dsm_handler(void); |
Dave Airlie | afeb3e1 | 2010-04-07 13:55:09 +1000 | [diff] [blame] | 1057 | int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len); |
| 1058 | bool nouveau_acpi_rom_supported(struct pci_dev *pdev); |
Ben Skeggs | a6ed76d | 2010-07-12 15:33:07 +1000 | [diff] [blame] | 1059 | int nouveau_acpi_edid(struct drm_device *, struct drm_connector *); |
Dave Airlie | 8edb381 | 2010-03-01 21:50:01 +1100 | [diff] [blame] | 1060 | #else |
| 1061 | static inline void nouveau_register_dsm_handler(void) {} |
| 1062 | static inline void nouveau_unregister_dsm_handler(void) {} |
Dave Airlie | afeb3e1 | 2010-04-07 13:55:09 +1000 | [diff] [blame] | 1063 | static inline bool nouveau_acpi_rom_supported(struct pci_dev *pdev) { return false; } |
| 1064 | static inline int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len) { return -EINVAL; } |
Ben Skeggs | 5620ba4 | 2010-07-23 10:00:12 +1000 | [diff] [blame] | 1065 | static inline int nouveau_acpi_edid(struct drm_device *dev, struct drm_connector *connector) { return -EINVAL; } |
Dave Airlie | 8edb381 | 2010-03-01 21:50:01 +1100 | [diff] [blame] | 1066 | #endif |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1067 | |
| 1068 | /* nouveau_backlight.c */ |
| 1069 | #ifdef CONFIG_DRM_NOUVEAU_BACKLIGHT |
Ben Skeggs | 10b461e | 2011-08-02 19:29:37 +1000 | [diff] [blame] | 1070 | extern int nouveau_backlight_init(struct drm_device *); |
| 1071 | extern void nouveau_backlight_exit(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1072 | #else |
Ben Skeggs | 10b461e | 2011-08-02 19:29:37 +1000 | [diff] [blame] | 1073 | static inline int nouveau_backlight_init(struct drm_device *dev) |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1074 | { |
| 1075 | return 0; |
| 1076 | } |
| 1077 | |
Ben Skeggs | 10b461e | 2011-08-02 19:29:37 +1000 | [diff] [blame] | 1078 | static inline void nouveau_backlight_exit(struct drm_device *dev) { } |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1079 | #endif |
| 1080 | |
| 1081 | /* nouveau_bios.c */ |
| 1082 | extern int nouveau_bios_init(struct drm_device *); |
| 1083 | extern void nouveau_bios_takedown(struct drm_device *dev); |
| 1084 | extern int nouveau_run_vbios_init(struct drm_device *); |
| 1085 | extern void nouveau_bios_run_init_table(struct drm_device *, uint16_t table, |
Ben Skeggs | 02e4f58 | 2011-07-06 21:21:42 +1000 | [diff] [blame] | 1086 | struct dcb_entry *, int crtc); |
Ben Skeggs | 59ef974 | 2011-08-12 10:05:43 +1000 | [diff] [blame] | 1087 | extern void nouveau_bios_init_exec(struct drm_device *, uint16_t table); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1088 | extern struct dcb_gpio_entry *nouveau_bios_gpio_entry(struct drm_device *, |
| 1089 | enum dcb_gpio_tag); |
| 1090 | extern struct dcb_connector_table_entry * |
| 1091 | nouveau_bios_connector_entry(struct drm_device *, int index); |
Ben Skeggs | 855a95e | 2010-09-16 15:25:25 +1000 | [diff] [blame] | 1092 | extern u32 get_pll_register(struct drm_device *, enum pll_types); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1093 | extern int get_pll_limits(struct drm_device *, uint32_t limit_match, |
| 1094 | struct pll_lims *); |
Ben Skeggs | 02e4f58 | 2011-07-06 21:21:42 +1000 | [diff] [blame] | 1095 | extern int nouveau_bios_run_display_table(struct drm_device *, u16 id, int clk, |
| 1096 | struct dcb_entry *, int crtc); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1097 | extern bool nouveau_bios_fp_mode(struct drm_device *, struct drm_display_mode *); |
| 1098 | extern uint8_t *nouveau_bios_embedded_edid(struct drm_device *); |
| 1099 | extern int nouveau_bios_parse_lvds_table(struct drm_device *, int pxclk, |
| 1100 | bool *dl, bool *if_is_24bit); |
| 1101 | extern int run_tmds_table(struct drm_device *, struct dcb_entry *, |
| 1102 | int head, int pxclk); |
| 1103 | extern int call_lvds_script(struct drm_device *, struct dcb_entry *, int head, |
| 1104 | enum LVDS_script, int pxclk); |
Ben Skeggs | 721b082 | 2011-08-05 13:42:49 +1000 | [diff] [blame] | 1105 | bool bios_encoder_match(struct dcb_entry *, u32 hash); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1106 | |
| 1107 | /* nouveau_ttm.c */ |
| 1108 | int nouveau_ttm_global_init(struct drm_nouveau_private *); |
| 1109 | void nouveau_ttm_global_release(struct drm_nouveau_private *); |
| 1110 | int nouveau_ttm_mmap(struct file *, struct vm_area_struct *); |
| 1111 | |
Ben Skeggs | 25575b4 | 2011-10-05 11:05:07 +1000 | [diff] [blame^] | 1112 | /* nouveau_hdmi.c */ |
| 1113 | void nouveau_hdmi_mode_set(struct drm_encoder *, struct drm_display_mode *); |
| 1114 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1115 | /* nouveau_dp.c */ |
| 1116 | int nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr, |
| 1117 | uint8_t *data, int data_nr); |
| 1118 | bool nouveau_dp_detect(struct drm_encoder *); |
Ben Skeggs | a002fec | 2011-08-04 11:04:47 +1000 | [diff] [blame] | 1119 | bool nouveau_dp_link_train(struct drm_encoder *, u32 datarate); |
Ben Skeggs | 46959b7 | 2011-07-01 15:51:49 +1000 | [diff] [blame] | 1120 | void nouveau_dp_tu_update(struct drm_device *, int, int, u32, u32); |
Ben Skeggs | 5f1800b | 2011-08-05 14:07:04 +1000 | [diff] [blame] | 1121 | u8 *nouveau_dp_bios_data(struct drm_device *, struct dcb_entry *, u8 **); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1122 | |
| 1123 | /* nv04_fb.c */ |
| 1124 | extern int nv04_fb_init(struct drm_device *); |
| 1125 | extern void nv04_fb_takedown(struct drm_device *); |
| 1126 | |
| 1127 | /* nv10_fb.c */ |
| 1128 | extern int nv10_fb_init(struct drm_device *); |
| 1129 | extern void nv10_fb_takedown(struct drm_device *); |
Francisco Jerez | a5cf68b | 2010-10-24 16:14:41 +0200 | [diff] [blame] | 1130 | extern void nv10_fb_init_tile_region(struct drm_device *dev, int i, |
| 1131 | uint32_t addr, uint32_t size, |
| 1132 | uint32_t pitch, uint32_t flags); |
| 1133 | extern void nv10_fb_set_tile_region(struct drm_device *dev, int i); |
| 1134 | extern void nv10_fb_free_tile_region(struct drm_device *dev, int i); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1135 | |
Francisco Jerez | 8bded18 | 2010-07-21 21:08:11 +0200 | [diff] [blame] | 1136 | /* nv30_fb.c */ |
| 1137 | extern int nv30_fb_init(struct drm_device *); |
| 1138 | extern void nv30_fb_takedown(struct drm_device *); |
Francisco Jerez | a5cf68b | 2010-10-24 16:14:41 +0200 | [diff] [blame] | 1139 | extern void nv30_fb_init_tile_region(struct drm_device *dev, int i, |
| 1140 | uint32_t addr, uint32_t size, |
| 1141 | uint32_t pitch, uint32_t flags); |
| 1142 | extern void nv30_fb_free_tile_region(struct drm_device *dev, int i); |
Francisco Jerez | 8bded18 | 2010-07-21 21:08:11 +0200 | [diff] [blame] | 1143 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1144 | /* nv40_fb.c */ |
| 1145 | extern int nv40_fb_init(struct drm_device *); |
| 1146 | extern void nv40_fb_takedown(struct drm_device *); |
Francisco Jerez | a5cf68b | 2010-10-24 16:14:41 +0200 | [diff] [blame] | 1147 | extern void nv40_fb_set_tile_region(struct drm_device *dev, int i); |
| 1148 | |
Marcin Kościelnicki | 304424e | 2010-03-01 00:18:39 +0000 | [diff] [blame] | 1149 | /* nv50_fb.c */ |
| 1150 | extern int nv50_fb_init(struct drm_device *); |
| 1151 | extern void nv50_fb_takedown(struct drm_device *); |
Ben Skeggs | 6fdb383 | 2011-03-08 09:57:17 +1000 | [diff] [blame] | 1152 | extern void nv50_fb_vm_trap(struct drm_device *, int display); |
Marcin Kościelnicki | 304424e | 2010-03-01 00:18:39 +0000 | [diff] [blame] | 1153 | |
Ben Skeggs | 4b223ee | 2010-08-03 10:00:56 +1000 | [diff] [blame] | 1154 | /* nvc0_fb.c */ |
| 1155 | extern int nvc0_fb_init(struct drm_device *); |
| 1156 | extern void nvc0_fb_takedown(struct drm_device *); |
| 1157 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1158 | /* nv04_fifo.c */ |
| 1159 | extern int nv04_fifo_init(struct drm_device *); |
Ben Skeggs | 5178d40 | 2010-11-03 10:56:05 +1000 | [diff] [blame] | 1160 | extern void nv04_fifo_fini(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1161 | extern void nv04_fifo_disable(struct drm_device *); |
| 1162 | extern void nv04_fifo_enable(struct drm_device *); |
| 1163 | extern bool nv04_fifo_reassign(struct drm_device *, bool); |
Francisco Jerez | 588d7d1 | 2009-12-13 20:07:42 +0100 | [diff] [blame] | 1164 | extern bool nv04_fifo_cache_pull(struct drm_device *, bool); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1165 | extern int nv04_fifo_channel_id(struct drm_device *); |
| 1166 | extern int nv04_fifo_create_context(struct nouveau_channel *); |
| 1167 | extern void nv04_fifo_destroy_context(struct nouveau_channel *); |
| 1168 | extern int nv04_fifo_load_context(struct nouveau_channel *); |
| 1169 | extern int nv04_fifo_unload_context(struct drm_device *); |
Ben Skeggs | 5178d40 | 2010-11-03 10:56:05 +1000 | [diff] [blame] | 1170 | extern void nv04_fifo_isr(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1171 | |
| 1172 | /* nv10_fifo.c */ |
| 1173 | extern int nv10_fifo_init(struct drm_device *); |
| 1174 | extern int nv10_fifo_channel_id(struct drm_device *); |
| 1175 | extern int nv10_fifo_create_context(struct nouveau_channel *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1176 | extern int nv10_fifo_load_context(struct nouveau_channel *); |
| 1177 | extern int nv10_fifo_unload_context(struct drm_device *); |
| 1178 | |
| 1179 | /* nv40_fifo.c */ |
| 1180 | extern int nv40_fifo_init(struct drm_device *); |
| 1181 | extern int nv40_fifo_create_context(struct nouveau_channel *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1182 | extern int nv40_fifo_load_context(struct nouveau_channel *); |
| 1183 | extern int nv40_fifo_unload_context(struct drm_device *); |
| 1184 | |
| 1185 | /* nv50_fifo.c */ |
| 1186 | extern int nv50_fifo_init(struct drm_device *); |
| 1187 | extern void nv50_fifo_takedown(struct drm_device *); |
| 1188 | extern int nv50_fifo_channel_id(struct drm_device *); |
| 1189 | extern int nv50_fifo_create_context(struct nouveau_channel *); |
| 1190 | extern void nv50_fifo_destroy_context(struct nouveau_channel *); |
| 1191 | extern int nv50_fifo_load_context(struct nouveau_channel *); |
| 1192 | extern int nv50_fifo_unload_context(struct drm_device *); |
Ben Skeggs | 56ac747 | 2010-10-22 10:26:24 +1000 | [diff] [blame] | 1193 | extern void nv50_fifo_tlb_flush(struct drm_device *dev); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1194 | |
Ben Skeggs | 4b223ee | 2010-08-03 10:00:56 +1000 | [diff] [blame] | 1195 | /* nvc0_fifo.c */ |
| 1196 | extern int nvc0_fifo_init(struct drm_device *); |
| 1197 | extern void nvc0_fifo_takedown(struct drm_device *); |
| 1198 | extern void nvc0_fifo_disable(struct drm_device *); |
| 1199 | extern void nvc0_fifo_enable(struct drm_device *); |
| 1200 | extern bool nvc0_fifo_reassign(struct drm_device *, bool); |
Ben Skeggs | 4b223ee | 2010-08-03 10:00:56 +1000 | [diff] [blame] | 1201 | extern bool nvc0_fifo_cache_pull(struct drm_device *, bool); |
| 1202 | extern int nvc0_fifo_channel_id(struct drm_device *); |
| 1203 | extern int nvc0_fifo_create_context(struct nouveau_channel *); |
| 1204 | extern void nvc0_fifo_destroy_context(struct nouveau_channel *); |
| 1205 | extern int nvc0_fifo_load_context(struct nouveau_channel *); |
| 1206 | extern int nvc0_fifo_unload_context(struct drm_device *); |
| 1207 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1208 | /* nv04_graph.c */ |
Ben Skeggs | 4976986 | 2011-04-01 13:03:56 +1000 | [diff] [blame] | 1209 | extern int nv04_graph_create(struct drm_device *); |
Ben Skeggs | 4976986 | 2011-04-01 13:03:56 +1000 | [diff] [blame] | 1210 | extern int nv04_graph_object_new(struct nouveau_channel *, int, u32, u16); |
Francisco Jerez | 332b242 | 2010-10-20 23:35:40 +0200 | [diff] [blame] | 1211 | extern int nv04_graph_mthd_page_flip(struct nouveau_channel *chan, |
| 1212 | u32 class, u32 mthd, u32 data); |
Ben Skeggs | 274fec9 | 2010-11-03 13:16:18 +1000 | [diff] [blame] | 1213 | extern struct nouveau_bitfield nv04_graph_nsource[]; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1214 | |
| 1215 | /* nv10_graph.c */ |
Ben Skeggs | d11db27 | 2011-04-01 12:50:55 +1000 | [diff] [blame] | 1216 | extern int nv10_graph_create(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1217 | extern struct nouveau_channel *nv10_graph_channel(struct drm_device *); |
Ben Skeggs | 274fec9 | 2010-11-03 13:16:18 +1000 | [diff] [blame] | 1218 | extern struct nouveau_bitfield nv10_graph_intr[]; |
| 1219 | extern struct nouveau_bitfield nv10_graph_nstatus[]; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1220 | |
| 1221 | /* nv20_graph.c */ |
Ben Skeggs | a0b1de8 | 2011-04-01 12:32:03 +1000 | [diff] [blame] | 1222 | extern int nv20_graph_create(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1223 | |
| 1224 | /* nv40_graph.c */ |
Ben Skeggs | 39c8d36 | 2011-04-01 11:33:21 +1000 | [diff] [blame] | 1225 | extern int nv40_graph_create(struct drm_device *); |
Ben Skeggs | 054b93e | 2009-12-15 22:02:47 +1000 | [diff] [blame] | 1226 | extern void nv40_grctx_init(struct nouveau_grctx *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1227 | |
| 1228 | /* nv50_graph.c */ |
Ben Skeggs | 2703c21 | 2011-04-01 09:50:18 +1000 | [diff] [blame] | 1229 | extern int nv50_graph_create(struct drm_device *); |
Marcin Kościelnicki | d5f3c90 | 2010-02-25 00:54:02 +0000 | [diff] [blame] | 1230 | extern int nv50_grctx_init(struct nouveau_grctx *); |
Ben Skeggs | 6effe39 | 2010-12-30 11:48:03 +1000 | [diff] [blame] | 1231 | extern struct nouveau_enum nv50_data_error_names[]; |
Ben Skeggs | 7ff5441 | 2011-03-18 10:25:59 +1000 | [diff] [blame] | 1232 | extern int nv50_graph_isr_chid(struct drm_device *dev, u64 inst); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1233 | |
Ben Skeggs | 4b223ee | 2010-08-03 10:00:56 +1000 | [diff] [blame] | 1234 | /* nvc0_graph.c */ |
Ben Skeggs | 7a45cd1 | 2011-04-01 10:59:53 +1000 | [diff] [blame] | 1235 | extern int nvc0_graph_create(struct drm_device *); |
Ben Skeggs | d5a2737 | 2011-04-01 16:10:08 +1000 | [diff] [blame] | 1236 | extern int nvc0_graph_isr_chid(struct drm_device *dev, u64 inst); |
Ben Skeggs | 4b223ee | 2010-08-03 10:00:56 +1000 | [diff] [blame] | 1237 | |
Ben Skeggs | bd2e597 | 2010-10-19 20:06:01 +1000 | [diff] [blame] | 1238 | /* nv84_crypt.c */ |
Ben Skeggs | 6dfdd7a | 2011-03-31 15:40:43 +1000 | [diff] [blame] | 1239 | extern int nv84_crypt_create(struct drm_device *); |
Ben Skeggs | bd2e597 | 2010-10-19 20:06:01 +1000 | [diff] [blame] | 1240 | |
Ben Skeggs | 8f27c54 | 2011-08-11 14:58:06 +1000 | [diff] [blame] | 1241 | /* nv98_crypt.c */ |
| 1242 | extern int nv98_crypt_create(struct drm_device *dev); |
| 1243 | |
Ben Skeggs | 7ff5441 | 2011-03-18 10:25:59 +1000 | [diff] [blame] | 1244 | /* nva3_copy.c */ |
| 1245 | extern int nva3_copy_create(struct drm_device *dev); |
| 1246 | |
| 1247 | /* nvc0_copy.c */ |
| 1248 | extern int nvc0_copy_create(struct drm_device *dev, int engine); |
| 1249 | |
Ben Skeggs | 323dcac | 2011-06-23 16:21:21 +1000 | [diff] [blame] | 1250 | /* nv31_mpeg.c */ |
| 1251 | extern int nv31_mpeg_create(struct drm_device *dev); |
Ben Skeggs | a02ccc7 | 2011-04-04 16:08:24 +1000 | [diff] [blame] | 1252 | |
Ben Skeggs | 9318745 | 2011-04-12 15:19:54 +1000 | [diff] [blame] | 1253 | /* nv50_mpeg.c */ |
| 1254 | extern int nv50_mpeg_create(struct drm_device *dev); |
Ben Skeggs | c092432 | 2011-04-04 16:10:00 +1000 | [diff] [blame] | 1255 | |
Ben Skeggs | 8f27c54 | 2011-08-11 14:58:06 +1000 | [diff] [blame] | 1256 | /* nv84_bsp.c */ |
| 1257 | /* nv98_bsp.c */ |
| 1258 | extern int nv84_bsp_create(struct drm_device *dev); |
| 1259 | |
| 1260 | /* nv84_vp.c */ |
| 1261 | /* nv98_vp.c */ |
| 1262 | extern int nv84_vp_create(struct drm_device *dev); |
| 1263 | |
| 1264 | /* nv98_ppp.c */ |
| 1265 | extern int nv98_ppp_create(struct drm_device *dev); |
| 1266 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1267 | /* nv04_instmem.c */ |
| 1268 | extern int nv04_instmem_init(struct drm_device *); |
| 1269 | extern void nv04_instmem_takedown(struct drm_device *); |
| 1270 | extern int nv04_instmem_suspend(struct drm_device *); |
| 1271 | extern void nv04_instmem_resume(struct drm_device *); |
Ben Skeggs | 6e32fed | 2011-06-03 14:23:30 +1000 | [diff] [blame] | 1272 | extern int nv04_instmem_get(struct nouveau_gpuobj *, struct nouveau_channel *, |
| 1273 | u32 size, u32 align); |
Ben Skeggs | e41115d | 2010-11-01 11:45:02 +1000 | [diff] [blame] | 1274 | extern void nv04_instmem_put(struct nouveau_gpuobj *); |
| 1275 | extern int nv04_instmem_map(struct nouveau_gpuobj *); |
| 1276 | extern void nv04_instmem_unmap(struct nouveau_gpuobj *); |
Ben Skeggs | f56cb86 | 2010-07-08 11:29:10 +1000 | [diff] [blame] | 1277 | extern void nv04_instmem_flush(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1278 | |
| 1279 | /* nv50_instmem.c */ |
| 1280 | extern int nv50_instmem_init(struct drm_device *); |
| 1281 | extern void nv50_instmem_takedown(struct drm_device *); |
| 1282 | extern int nv50_instmem_suspend(struct drm_device *); |
| 1283 | extern void nv50_instmem_resume(struct drm_device *); |
Ben Skeggs | 6e32fed | 2011-06-03 14:23:30 +1000 | [diff] [blame] | 1284 | extern int nv50_instmem_get(struct nouveau_gpuobj *, struct nouveau_channel *, |
| 1285 | u32 size, u32 align); |
Ben Skeggs | e41115d | 2010-11-01 11:45:02 +1000 | [diff] [blame] | 1286 | extern void nv50_instmem_put(struct nouveau_gpuobj *); |
| 1287 | extern int nv50_instmem_map(struct nouveau_gpuobj *); |
| 1288 | extern void nv50_instmem_unmap(struct nouveau_gpuobj *); |
Ben Skeggs | f56cb86 | 2010-07-08 11:29:10 +1000 | [diff] [blame] | 1289 | extern void nv50_instmem_flush(struct drm_device *); |
Ben Skeggs | 734ee83 | 2010-07-15 11:02:54 +1000 | [diff] [blame] | 1290 | extern void nv84_instmem_flush(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1291 | |
Ben Skeggs | 4b223ee | 2010-08-03 10:00:56 +1000 | [diff] [blame] | 1292 | /* nvc0_instmem.c */ |
| 1293 | extern int nvc0_instmem_init(struct drm_device *); |
| 1294 | extern void nvc0_instmem_takedown(struct drm_device *); |
| 1295 | extern int nvc0_instmem_suspend(struct drm_device *); |
| 1296 | extern void nvc0_instmem_resume(struct drm_device *); |
Ben Skeggs | 4b223ee | 2010-08-03 10:00:56 +1000 | [diff] [blame] | 1297 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1298 | /* nv04_mc.c */ |
| 1299 | extern int nv04_mc_init(struct drm_device *); |
| 1300 | extern void nv04_mc_takedown(struct drm_device *); |
| 1301 | |
| 1302 | /* nv40_mc.c */ |
| 1303 | extern int nv40_mc_init(struct drm_device *); |
| 1304 | extern void nv40_mc_takedown(struct drm_device *); |
| 1305 | |
| 1306 | /* nv50_mc.c */ |
| 1307 | extern int nv50_mc_init(struct drm_device *); |
| 1308 | extern void nv50_mc_takedown(struct drm_device *); |
| 1309 | |
| 1310 | /* nv04_timer.c */ |
| 1311 | extern int nv04_timer_init(struct drm_device *); |
| 1312 | extern uint64_t nv04_timer_read(struct drm_device *); |
| 1313 | extern void nv04_timer_takedown(struct drm_device *); |
| 1314 | |
| 1315 | extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd, |
| 1316 | unsigned long arg); |
| 1317 | |
| 1318 | /* nv04_dac.c */ |
Ben Skeggs | 8f1a608 | 2010-06-28 14:35:50 +1000 | [diff] [blame] | 1319 | extern int nv04_dac_create(struct drm_connector *, struct dcb_entry *); |
Francisco Jerez | 11d6eb2 | 2009-12-17 18:52:44 +0100 | [diff] [blame] | 1320 | extern uint32_t nv17_dac_sample_load(struct drm_encoder *encoder); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1321 | extern int nv04_dac_output_offset(struct drm_encoder *encoder); |
| 1322 | extern void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable); |
Francisco Jerez | 8ccfe9e | 2010-07-04 16:14:42 +0200 | [diff] [blame] | 1323 | extern bool nv04_dac_in_use(struct drm_encoder *encoder); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1324 | |
| 1325 | /* nv04_dfp.c */ |
Ben Skeggs | 8f1a608 | 2010-06-28 14:35:50 +1000 | [diff] [blame] | 1326 | extern int nv04_dfp_create(struct drm_connector *, struct dcb_entry *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1327 | extern int nv04_dfp_get_bound_head(struct drm_device *dev, struct dcb_entry *dcbent); |
| 1328 | extern void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_entry *dcbent, |
| 1329 | int head, bool dl); |
| 1330 | extern void nv04_dfp_disable(struct drm_device *dev, int head); |
| 1331 | extern void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode); |
| 1332 | |
| 1333 | /* nv04_tv.c */ |
| 1334 | extern int nv04_tv_identify(struct drm_device *dev, int i2c_index); |
Ben Skeggs | 8f1a608 | 2010-06-28 14:35:50 +1000 | [diff] [blame] | 1335 | extern int nv04_tv_create(struct drm_connector *, struct dcb_entry *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1336 | |
| 1337 | /* nv17_tv.c */ |
Ben Skeggs | 8f1a608 | 2010-06-28 14:35:50 +1000 | [diff] [blame] | 1338 | extern int nv17_tv_create(struct drm_connector *, struct dcb_entry *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1339 | |
| 1340 | /* nv04_display.c */ |
Francisco Jerez | c88c2e0 | 2010-07-24 17:37:33 +0200 | [diff] [blame] | 1341 | extern int nv04_display_early_init(struct drm_device *); |
| 1342 | extern void nv04_display_late_takedown(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1343 | extern int nv04_display_create(struct drm_device *); |
Francisco Jerez | c88c2e0 | 2010-07-24 17:37:33 +0200 | [diff] [blame] | 1344 | extern int nv04_display_init(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1345 | extern void nv04_display_destroy(struct drm_device *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1346 | |
Ben Skeggs | 26f6d88 | 2011-07-04 16:25:18 +1000 | [diff] [blame] | 1347 | /* nvd0_display.c */ |
| 1348 | extern int nvd0_display_create(struct drm_device *); |
| 1349 | extern int nvd0_display_init(struct drm_device *); |
| 1350 | extern void nvd0_display_destroy(struct drm_device *); |
| 1351 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1352 | /* nv04_crtc.c */ |
| 1353 | extern int nv04_crtc_create(struct drm_device *, int index); |
| 1354 | |
| 1355 | /* nouveau_bo.c */ |
| 1356 | extern struct ttm_bo_driver nouveau_bo_driver; |
Ben Skeggs | 7375c95 | 2011-06-07 14:21:29 +1000 | [diff] [blame] | 1357 | extern int nouveau_bo_new(struct drm_device *, int size, int align, |
| 1358 | uint32_t flags, uint32_t tile_mode, |
| 1359 | uint32_t tile_flags, struct nouveau_bo **); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1360 | extern int nouveau_bo_pin(struct nouveau_bo *, uint32_t flags); |
| 1361 | extern int nouveau_bo_unpin(struct nouveau_bo *); |
| 1362 | extern int nouveau_bo_map(struct nouveau_bo *); |
| 1363 | extern void nouveau_bo_unmap(struct nouveau_bo *); |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 1364 | extern void nouveau_bo_placement_set(struct nouveau_bo *, uint32_t type, |
| 1365 | uint32_t busy); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1366 | extern u16 nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index); |
| 1367 | extern void nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val); |
| 1368 | extern u32 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index); |
| 1369 | extern void nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val); |
Francisco Jerez | 332b242 | 2010-10-20 23:35:40 +0200 | [diff] [blame] | 1370 | extern void nouveau_bo_fence(struct nouveau_bo *, struct nouveau_fence *); |
Ben Skeggs | 7a45d76 | 2010-11-22 08:50:27 +1000 | [diff] [blame] | 1371 | extern int nouveau_bo_validate(struct nouveau_bo *, bool interruptible, |
| 1372 | bool no_wait_reserve, bool no_wait_gpu); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1373 | |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 1374 | extern struct nouveau_vma * |
| 1375 | nouveau_bo_vma_find(struct nouveau_bo *, struct nouveau_vm *); |
| 1376 | extern int nouveau_bo_vma_add(struct nouveau_bo *, struct nouveau_vm *, |
| 1377 | struct nouveau_vma *); |
| 1378 | extern void nouveau_bo_vma_del(struct nouveau_bo *, struct nouveau_vma *); |
| 1379 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1380 | /* nouveau_fence.c */ |
| 1381 | struct nouveau_fence; |
Francisco Jerez | 0c6c1c2 | 2010-09-22 00:58:54 +0200 | [diff] [blame] | 1382 | extern int nouveau_fence_init(struct drm_device *); |
| 1383 | extern void nouveau_fence_fini(struct drm_device *); |
Francisco Jerez | 2730723 | 2010-09-21 18:57:11 +0200 | [diff] [blame] | 1384 | extern int nouveau_fence_channel_init(struct nouveau_channel *); |
| 1385 | extern void nouveau_fence_channel_fini(struct nouveau_channel *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1386 | extern void nouveau_fence_update(struct nouveau_channel *); |
| 1387 | extern int nouveau_fence_new(struct nouveau_channel *, struct nouveau_fence **, |
| 1388 | bool emit); |
| 1389 | extern int nouveau_fence_emit(struct nouveau_fence *); |
Francisco Jerez | 8ac3891 | 2010-09-21 20:49:39 +0200 | [diff] [blame] | 1390 | extern void nouveau_fence_work(struct nouveau_fence *fence, |
| 1391 | void (*work)(void *priv, bool signalled), |
| 1392 | void *priv); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1393 | struct nouveau_channel *nouveau_fence_channel(struct nouveau_fence *); |
Marcin Slusarz | 382d62e | 2010-10-20 21:50:24 +0200 | [diff] [blame] | 1394 | |
| 1395 | extern bool __nouveau_fence_signalled(void *obj, void *arg); |
| 1396 | extern int __nouveau_fence_wait(void *obj, void *arg, bool lazy, bool intr); |
| 1397 | extern int __nouveau_fence_flush(void *obj, void *arg); |
| 1398 | extern void __nouveau_fence_unref(void **obj); |
| 1399 | extern void *__nouveau_fence_ref(void *obj); |
| 1400 | |
| 1401 | static inline bool nouveau_fence_signalled(struct nouveau_fence *obj) |
| 1402 | { |
| 1403 | return __nouveau_fence_signalled(obj, NULL); |
| 1404 | } |
| 1405 | static inline int |
| 1406 | nouveau_fence_wait(struct nouveau_fence *obj, bool lazy, bool intr) |
| 1407 | { |
| 1408 | return __nouveau_fence_wait(obj, NULL, lazy, intr); |
| 1409 | } |
Francisco Jerez | 2730723 | 2010-09-21 18:57:11 +0200 | [diff] [blame] | 1410 | extern int nouveau_fence_sync(struct nouveau_fence *, struct nouveau_channel *); |
Marcin Slusarz | 382d62e | 2010-10-20 21:50:24 +0200 | [diff] [blame] | 1411 | static inline int nouveau_fence_flush(struct nouveau_fence *obj) |
| 1412 | { |
| 1413 | return __nouveau_fence_flush(obj, NULL); |
| 1414 | } |
| 1415 | static inline void nouveau_fence_unref(struct nouveau_fence **obj) |
| 1416 | { |
| 1417 | __nouveau_fence_unref((void **)obj); |
| 1418 | } |
| 1419 | static inline struct nouveau_fence *nouveau_fence_ref(struct nouveau_fence *obj) |
| 1420 | { |
| 1421 | return __nouveau_fence_ref(obj); |
| 1422 | } |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1423 | |
| 1424 | /* nouveau_gem.c */ |
Ben Skeggs | f6d4e62 | 2011-06-07 12:25:36 +1000 | [diff] [blame] | 1425 | extern int nouveau_gem_new(struct drm_device *, int size, int align, |
| 1426 | uint32_t domain, uint32_t tile_mode, |
| 1427 | uint32_t tile_flags, struct nouveau_bo **); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1428 | extern int nouveau_gem_object_new(struct drm_gem_object *); |
| 1429 | extern void nouveau_gem_object_del(struct drm_gem_object *); |
Ben Skeggs | 639212d | 2011-06-03 16:18:26 +1000 | [diff] [blame] | 1430 | extern int nouveau_gem_object_open(struct drm_gem_object *, struct drm_file *); |
| 1431 | extern void nouveau_gem_object_close(struct drm_gem_object *, |
| 1432 | struct drm_file *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1433 | extern int nouveau_gem_ioctl_new(struct drm_device *, void *, |
| 1434 | struct drm_file *); |
| 1435 | extern int nouveau_gem_ioctl_pushbuf(struct drm_device *, void *, |
| 1436 | struct drm_file *); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1437 | extern int nouveau_gem_ioctl_cpu_prep(struct drm_device *, void *, |
| 1438 | struct drm_file *); |
| 1439 | extern int nouveau_gem_ioctl_cpu_fini(struct drm_device *, void *, |
| 1440 | struct drm_file *); |
| 1441 | extern int nouveau_gem_ioctl_info(struct drm_device *, void *, |
| 1442 | struct drm_file *); |
| 1443 | |
Francisco Jerez | 042206c | 2010-10-21 18:19:29 +0200 | [diff] [blame] | 1444 | /* nouveau_display.c */ |
| 1445 | int nouveau_vblank_enable(struct drm_device *dev, int crtc); |
| 1446 | void nouveau_vblank_disable(struct drm_device *dev, int crtc); |
Francisco Jerez | 332b242 | 2010-10-20 23:35:40 +0200 | [diff] [blame] | 1447 | int nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, |
| 1448 | struct drm_pending_vblank_event *event); |
| 1449 | int nouveau_finish_page_flip(struct nouveau_channel *, |
| 1450 | struct nouveau_page_flip_state *); |
Ben Skeggs | 33dbc27 | 2011-09-30 08:55:50 +1000 | [diff] [blame] | 1451 | int nouveau_display_dumb_create(struct drm_file *, struct drm_device *, |
| 1452 | struct drm_mode_create_dumb *args); |
| 1453 | int nouveau_display_dumb_map_offset(struct drm_file *, struct drm_device *, |
| 1454 | uint32_t handle, uint64_t *offset); |
| 1455 | int nouveau_display_dumb_destroy(struct drm_file *, struct drm_device *, |
| 1456 | uint32_t handle); |
Francisco Jerez | 042206c | 2010-10-21 18:19:29 +0200 | [diff] [blame] | 1457 | |
Ben Skeggs | ee2e013 | 2010-07-26 09:28:25 +1000 | [diff] [blame] | 1458 | /* nv10_gpio.c */ |
| 1459 | int nv10_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag); |
| 1460 | int nv10_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1461 | |
Ben Skeggs | 4528416 | 2010-04-07 12:57:35 +1000 | [diff] [blame] | 1462 | /* nv50_gpio.c */ |
Ben Skeggs | ee2e013 | 2010-07-26 09:28:25 +1000 | [diff] [blame] | 1463 | int nv50_gpio_init(struct drm_device *dev); |
Ben Skeggs | 2cbd4c8 | 2010-11-03 10:18:04 +1000 | [diff] [blame] | 1464 | void nv50_gpio_fini(struct drm_device *dev); |
Ben Skeggs | 4528416 | 2010-04-07 12:57:35 +1000 | [diff] [blame] | 1465 | int nv50_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag); |
| 1466 | int nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); |
Ben Skeggs | d7f8172 | 2011-07-03 02:57:35 +1000 | [diff] [blame] | 1467 | int nvd0_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag); |
| 1468 | int nvd0_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); |
Ben Skeggs | fce2bad | 2010-11-11 16:14:56 +1000 | [diff] [blame] | 1469 | int nv50_gpio_irq_register(struct drm_device *, enum dcb_gpio_tag, |
| 1470 | void (*)(void *, int), void *); |
| 1471 | void nv50_gpio_irq_unregister(struct drm_device *, enum dcb_gpio_tag, |
| 1472 | void (*)(void *, int), void *); |
| 1473 | bool nv50_gpio_irq_enable(struct drm_device *, enum dcb_gpio_tag, bool on); |
Ben Skeggs | 4528416 | 2010-04-07 12:57:35 +1000 | [diff] [blame] | 1474 | |
Ben Skeggs | e9ebb68 | 2010-04-28 14:07:06 +1000 | [diff] [blame] | 1475 | /* nv50_calc. */ |
| 1476 | int nv50_calc_pll(struct drm_device *, struct pll_lims *, int clk, |
| 1477 | int *N1, int *M1, int *N2, int *M2, int *P); |
Ben Skeggs | 52eba8d | 2011-04-28 02:34:21 +1000 | [diff] [blame] | 1478 | int nva3_calc_pll(struct drm_device *, struct pll_lims *, |
| 1479 | int clk, int *N, int *fN, int *M, int *P); |
Ben Skeggs | e9ebb68 | 2010-04-28 14:07:06 +1000 | [diff] [blame] | 1480 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1481 | #ifndef ioread32_native |
| 1482 | #ifdef __BIG_ENDIAN |
| 1483 | #define ioread16_native ioread16be |
| 1484 | #define iowrite16_native iowrite16be |
| 1485 | #define ioread32_native ioread32be |
| 1486 | #define iowrite32_native iowrite32be |
| 1487 | #else /* def __BIG_ENDIAN */ |
| 1488 | #define ioread16_native ioread16 |
| 1489 | #define iowrite16_native iowrite16 |
| 1490 | #define ioread32_native ioread32 |
| 1491 | #define iowrite32_native iowrite32 |
| 1492 | #endif /* def __BIG_ENDIAN else */ |
| 1493 | #endif /* !ioread32_native */ |
| 1494 | |
| 1495 | /* channel control reg access */ |
| 1496 | static inline u32 nvchan_rd32(struct nouveau_channel *chan, unsigned reg) |
| 1497 | { |
| 1498 | return ioread32_native(chan->user + reg); |
| 1499 | } |
| 1500 | |
| 1501 | static inline void nvchan_wr32(struct nouveau_channel *chan, |
| 1502 | unsigned reg, u32 val) |
| 1503 | { |
| 1504 | iowrite32_native(val, chan->user + reg); |
| 1505 | } |
| 1506 | |
| 1507 | /* register access */ |
| 1508 | static inline u32 nv_rd32(struct drm_device *dev, unsigned reg) |
| 1509 | { |
| 1510 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 1511 | return ioread32_native(dev_priv->mmio + reg); |
| 1512 | } |
| 1513 | |
| 1514 | static inline void nv_wr32(struct drm_device *dev, unsigned reg, u32 val) |
| 1515 | { |
| 1516 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 1517 | iowrite32_native(val, dev_priv->mmio + reg); |
| 1518 | } |
| 1519 | |
Ben Skeggs | 2a7fdb2b | 2010-08-30 16:14:51 +1000 | [diff] [blame] | 1520 | static inline u32 nv_mask(struct drm_device *dev, u32 reg, u32 mask, u32 val) |
Ben Skeggs | 49eed80 | 2010-07-23 11:17:57 +1000 | [diff] [blame] | 1521 | { |
| 1522 | u32 tmp = nv_rd32(dev, reg); |
Ben Skeggs | 2a7fdb2b | 2010-08-30 16:14:51 +1000 | [diff] [blame] | 1523 | nv_wr32(dev, reg, (tmp & ~mask) | val); |
| 1524 | return tmp; |
Ben Skeggs | 49eed80 | 2010-07-23 11:17:57 +1000 | [diff] [blame] | 1525 | } |
| 1526 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1527 | static inline u8 nv_rd08(struct drm_device *dev, unsigned reg) |
| 1528 | { |
| 1529 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 1530 | return ioread8(dev_priv->mmio + reg); |
| 1531 | } |
| 1532 | |
| 1533 | static inline void nv_wr08(struct drm_device *dev, unsigned reg, u8 val) |
| 1534 | { |
| 1535 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 1536 | iowrite8(val, dev_priv->mmio + reg); |
| 1537 | } |
| 1538 | |
Francisco Jerez | 4b5c152 | 2010-09-07 17:34:44 +0200 | [diff] [blame] | 1539 | #define nv_wait(dev, reg, mask, val) \ |
Ben Skeggs | 12fb952 | 2010-11-19 14:32:56 +1000 | [diff] [blame] | 1540 | nouveau_wait_eq(dev, 2000000000ULL, (reg), (mask), (val)) |
| 1541 | #define nv_wait_ne(dev, reg, mask, val) \ |
| 1542 | nouveau_wait_ne(dev, 2000000000ULL, (reg), (mask), (val)) |
Ben Skeggs | 78e2933 | 2011-06-18 16:27:24 +1000 | [diff] [blame] | 1543 | #define nv_wait_cb(dev, func, data) \ |
| 1544 | nouveau_wait_cb(dev, 2000000000ULL, (func), (data)) |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1545 | |
| 1546 | /* PRAMIN access */ |
| 1547 | static inline u32 nv_ri32(struct drm_device *dev, unsigned offset) |
| 1548 | { |
| 1549 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 1550 | return ioread32_native(dev_priv->ramin + offset); |
| 1551 | } |
| 1552 | |
| 1553 | static inline void nv_wi32(struct drm_device *dev, unsigned offset, u32 val) |
| 1554 | { |
| 1555 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 1556 | iowrite32_native(val, dev_priv->ramin + offset); |
| 1557 | } |
| 1558 | |
| 1559 | /* object access */ |
Ben Skeggs | b3beb16 | 2010-09-01 15:24:29 +1000 | [diff] [blame] | 1560 | extern u32 nv_ro32(struct nouveau_gpuobj *, u32 offset); |
| 1561 | extern void nv_wo32(struct nouveau_gpuobj *, u32 offset, u32 val); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1562 | |
| 1563 | /* |
| 1564 | * Logging |
| 1565 | * Argument d is (struct drm_device *). |
| 1566 | */ |
| 1567 | #define NV_PRINTK(level, d, fmt, arg...) \ |
| 1568 | printk(level "[" DRM_NAME "] " DRIVER_NAME " %s: " fmt, \ |
| 1569 | pci_name(d->pdev), ##arg) |
| 1570 | #ifndef NV_DEBUG_NOTRACE |
| 1571 | #define NV_DEBUG(d, fmt, arg...) do { \ |
Maarten Maathuis | ef2bb50 | 2009-12-13 16:53:12 +0100 | [diff] [blame] | 1572 | if (drm_debug & DRM_UT_DRIVER) { \ |
| 1573 | NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__, \ |
| 1574 | __LINE__, ##arg); \ |
| 1575 | } \ |
| 1576 | } while (0) |
| 1577 | #define NV_DEBUG_KMS(d, fmt, arg...) do { \ |
| 1578 | if (drm_debug & DRM_UT_KMS) { \ |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1579 | NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__, \ |
| 1580 | __LINE__, ##arg); \ |
| 1581 | } \ |
| 1582 | } while (0) |
| 1583 | #else |
| 1584 | #define NV_DEBUG(d, fmt, arg...) do { \ |
Maarten Maathuis | ef2bb50 | 2009-12-13 16:53:12 +0100 | [diff] [blame] | 1585 | if (drm_debug & DRM_UT_DRIVER) \ |
| 1586 | NV_PRINTK(KERN_DEBUG, d, fmt, ##arg); \ |
| 1587 | } while (0) |
| 1588 | #define NV_DEBUG_KMS(d, fmt, arg...) do { \ |
| 1589 | if (drm_debug & DRM_UT_KMS) \ |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1590 | NV_PRINTK(KERN_DEBUG, d, fmt, ##arg); \ |
| 1591 | } while (0) |
| 1592 | #endif |
| 1593 | #define NV_ERROR(d, fmt, arg...) NV_PRINTK(KERN_ERR, d, fmt, ##arg) |
| 1594 | #define NV_INFO(d, fmt, arg...) NV_PRINTK(KERN_INFO, d, fmt, ##arg) |
| 1595 | #define NV_TRACEWARN(d, fmt, arg...) NV_PRINTK(KERN_NOTICE, d, fmt, ##arg) |
| 1596 | #define NV_TRACE(d, fmt, arg...) NV_PRINTK(KERN_INFO, d, fmt, ##arg) |
| 1597 | #define NV_WARN(d, fmt, arg...) NV_PRINTK(KERN_WARNING, d, fmt, ##arg) |
| 1598 | |
| 1599 | /* nouveau_reg_debug bitmask */ |
| 1600 | enum { |
| 1601 | NOUVEAU_REG_DEBUG_MC = 0x1, |
| 1602 | NOUVEAU_REG_DEBUG_VIDEO = 0x2, |
| 1603 | NOUVEAU_REG_DEBUG_FB = 0x4, |
| 1604 | NOUVEAU_REG_DEBUG_EXTDEV = 0x8, |
| 1605 | NOUVEAU_REG_DEBUG_CRTC = 0x10, |
| 1606 | NOUVEAU_REG_DEBUG_RAMDAC = 0x20, |
| 1607 | NOUVEAU_REG_DEBUG_VGACRTC = 0x40, |
| 1608 | NOUVEAU_REG_DEBUG_RMVIO = 0x80, |
| 1609 | NOUVEAU_REG_DEBUG_VGAATTR = 0x100, |
| 1610 | NOUVEAU_REG_DEBUG_EVO = 0x200, |
Ben Skeggs | 4372013 | 2011-07-20 15:50:14 +1000 | [diff] [blame] | 1611 | NOUVEAU_REG_DEBUG_AUXCH = 0x400 |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1612 | }; |
| 1613 | |
| 1614 | #define NV_REG_DEBUG(type, dev, fmt, arg...) do { \ |
| 1615 | if (nouveau_reg_debug & NOUVEAU_REG_DEBUG_##type) \ |
| 1616 | NV_PRINTK(KERN_DEBUG, dev, "%s: " fmt, __func__, ##arg); \ |
| 1617 | } while (0) |
| 1618 | |
| 1619 | static inline bool |
| 1620 | nv_two_heads(struct drm_device *dev) |
| 1621 | { |
| 1622 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 1623 | const int impl = dev->pci_device & 0x0ff0; |
| 1624 | |
| 1625 | if (dev_priv->card_type >= NV_10 && impl != 0x0100 && |
| 1626 | impl != 0x0150 && impl != 0x01a0 && impl != 0x0200) |
| 1627 | return true; |
| 1628 | |
| 1629 | return false; |
| 1630 | } |
| 1631 | |
| 1632 | static inline bool |
| 1633 | nv_gf4_disp_arch(struct drm_device *dev) |
| 1634 | { |
| 1635 | return nv_two_heads(dev) && (dev->pci_device & 0x0ff0) != 0x0110; |
| 1636 | } |
| 1637 | |
| 1638 | static inline bool |
| 1639 | nv_two_reg_pll(struct drm_device *dev) |
| 1640 | { |
| 1641 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 1642 | const int impl = dev->pci_device & 0x0ff0; |
| 1643 | |
| 1644 | if (impl == 0x0310 || impl == 0x0340 || dev_priv->card_type >= NV_40) |
| 1645 | return true; |
| 1646 | return false; |
| 1647 | } |
| 1648 | |
Francisco Jerez | acae116 | 2010-08-15 14:31:31 +0200 | [diff] [blame] | 1649 | static inline bool |
| 1650 | nv_match_device(struct drm_device *dev, unsigned device, |
| 1651 | unsigned sub_vendor, unsigned sub_device) |
| 1652 | { |
| 1653 | return dev->pdev->device == device && |
| 1654 | dev->pdev->subsystem_vendor == sub_vendor && |
| 1655 | dev->pdev->subsystem_device == sub_device; |
| 1656 | } |
| 1657 | |
Ben Skeggs | 6dfdd7a | 2011-03-31 15:40:43 +1000 | [diff] [blame] | 1658 | static inline void * |
| 1659 | nv_engine(struct drm_device *dev, int engine) |
| 1660 | { |
| 1661 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 1662 | return (void *)dev_priv->eng[engine]; |
| 1663 | } |
| 1664 | |
Ben Skeggs | c693931 | 2011-01-11 14:23:12 +1000 | [diff] [blame] | 1665 | /* returns 1 if device is one of the nv4x using the 0x4497 object class, |
| 1666 | * helpful to determine a number of other hardware features |
| 1667 | */ |
| 1668 | static inline int |
| 1669 | nv44_graph_class(struct drm_device *dev) |
| 1670 | { |
| 1671 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 1672 | |
| 1673 | if ((dev_priv->chipset & 0xf0) == 0x60) |
| 1674 | return 1; |
| 1675 | |
| 1676 | return !(0x0baf & (1 << (dev_priv->chipset & 0x0f))); |
| 1677 | } |
| 1678 | |
Ben Skeggs | 7f4a195 | 2010-11-16 11:50:09 +1000 | [diff] [blame] | 1679 | /* memory type/access flags, do not match hardware values */ |
Ben Skeggs | a11c319 | 2010-08-27 10:00:25 +1000 | [diff] [blame] | 1680 | #define NV_MEM_ACCESS_RO 1 |
| 1681 | #define NV_MEM_ACCESS_WO 2 |
Ben Skeggs | 7f4a195 | 2010-11-16 11:50:09 +1000 | [diff] [blame] | 1682 | #define NV_MEM_ACCESS_RW (NV_MEM_ACCESS_RO | NV_MEM_ACCESS_WO) |
Ben Skeggs | a11c319 | 2010-08-27 10:00:25 +1000 | [diff] [blame] | 1683 | #define NV_MEM_ACCESS_SYS 4 |
| 1684 | #define NV_MEM_ACCESS_VM 8 |
Ben Skeggs | 7f4a195 | 2010-11-16 11:50:09 +1000 | [diff] [blame] | 1685 | |
| 1686 | #define NV_MEM_TARGET_VRAM 0 |
| 1687 | #define NV_MEM_TARGET_PCI 1 |
| 1688 | #define NV_MEM_TARGET_PCI_NOSNOOP 2 |
| 1689 | #define NV_MEM_TARGET_VM 3 |
| 1690 | #define NV_MEM_TARGET_GART 4 |
| 1691 | |
| 1692 | #define NV_MEM_TYPE_VM 0x7f |
| 1693 | #define NV_MEM_COMP_VM 0x03 |
| 1694 | |
| 1695 | /* NV_SW object class */ |
Francisco Jerez | f03a314 | 2009-12-26 02:42:45 +0100 | [diff] [blame] | 1696 | #define NV_SW 0x0000506e |
| 1697 | #define NV_SW_DMA_SEMAPHORE 0x00000060 |
| 1698 | #define NV_SW_SEMAPHORE_OFFSET 0x00000064 |
| 1699 | #define NV_SW_SEMAPHORE_ACQUIRE 0x00000068 |
| 1700 | #define NV_SW_SEMAPHORE_RELEASE 0x0000006c |
Francisco Jerez | 8af29cc | 2010-10-02 17:04:46 +0200 | [diff] [blame] | 1701 | #define NV_SW_YIELD 0x00000080 |
Francisco Jerez | f03a314 | 2009-12-26 02:42:45 +0100 | [diff] [blame] | 1702 | #define NV_SW_DMA_VBLSEM 0x0000018c |
| 1703 | #define NV_SW_VBLSEM_OFFSET 0x00000400 |
| 1704 | #define NV_SW_VBLSEM_RELEASE_VALUE 0x00000404 |
| 1705 | #define NV_SW_VBLSEM_RELEASE 0x00000408 |
Francisco Jerez | 332b242 | 2010-10-20 23:35:40 +0200 | [diff] [blame] | 1706 | #define NV_SW_PAGE_FLIP 0x00000500 |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1707 | |
| 1708 | #endif /* __NOUVEAU_DRV_H__ */ |