Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-tegra/fuse.c |
| 3 | * |
| 4 | * Copyright (C) 2010 Google, Inc. |
| 5 | * |
| 6 | * Author: |
| 7 | * Colin Cross <ccross@android.com> |
| 8 | * |
| 9 | * This software is licensed under the terms of the GNU General Public |
| 10 | * License version 2, as published by the Free Software Foundation, and |
| 11 | * may be copied, distributed, and modified under those terms. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | */ |
| 19 | |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/io.h> |
Linus Torvalds | 3480059 | 2012-03-27 16:41:24 -0700 | [diff] [blame] | 22 | #include <linux/export.h> |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 23 | |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 24 | #include "fuse.h" |
Stephen Warren | 2be39c0 | 2012-10-04 14:24:09 -0600 | [diff] [blame] | 25 | #include "iomap.h" |
Olof Johansson | d262f49 | 2011-10-13 00:14:08 -0700 | [diff] [blame] | 26 | #include "apbio.h" |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 27 | |
| 28 | #define FUSE_UID_LOW 0x108 |
| 29 | #define FUSE_UID_HIGH 0x10c |
| 30 | #define FUSE_SKU_INFO 0x110 |
Danny Huang | 1f851a2 | 2012-11-15 15:42:32 +0800 | [diff] [blame] | 31 | |
| 32 | #define TEGRA20_FUSE_SPARE_BIT 0x200 |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 33 | |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 34 | int tegra_sku_id; |
| 35 | int tegra_cpu_process_id; |
| 36 | int tegra_core_process_id; |
Peter De Schrijver | 4c4ad66 | 2012-02-10 01:47:42 +0200 | [diff] [blame] | 37 | int tegra_chip_id; |
Danny Huang | 25cd5a3 | 2012-11-15 15:42:33 +0800 | [diff] [blame^] | 38 | int tegra_soc_speedo_id; |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 39 | enum tegra_revision tegra_revision; |
| 40 | |
Danny Huang | 1f851a2 | 2012-11-15 15:42:32 +0800 | [diff] [blame] | 41 | static int tegra_fuse_spare_bit; |
Danny Huang | 25cd5a3 | 2012-11-15 15:42:33 +0800 | [diff] [blame^] | 42 | static void (*tegra_init_speedo_data)(void); |
Danny Huang | 1f851a2 | 2012-11-15 15:42:32 +0800 | [diff] [blame] | 43 | |
Olof Johansson | dee4718 | 2011-10-17 16:39:24 -0700 | [diff] [blame] | 44 | /* The BCT to use at boot is specified by board straps that can be read |
| 45 | * through a APB misc register and decoded. 2 bits, i.e. 4 possible BCTs. |
| 46 | */ |
| 47 | int tegra_bct_strapping; |
| 48 | |
| 49 | #define STRAP_OPT 0x008 |
| 50 | #define GMI_AD0 (1 << 4) |
| 51 | #define GMI_AD1 (1 << 5) |
| 52 | #define RAM_ID_MASK (GMI_AD0 | GMI_AD1) |
| 53 | #define RAM_CODE_SHIFT 4 |
| 54 | |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 55 | static const char *tegra_revision_name[TEGRA_REVISION_MAX] = { |
| 56 | [TEGRA_REVISION_UNKNOWN] = "unknown", |
| 57 | [TEGRA_REVISION_A01] = "A01", |
| 58 | [TEGRA_REVISION_A02] = "A02", |
| 59 | [TEGRA_REVISION_A03] = "A03", |
| 60 | [TEGRA_REVISION_A03p] = "A03 prime", |
| 61 | [TEGRA_REVISION_A04] = "A04", |
| 62 | }; |
| 63 | |
Danny Huang | 1f851a2 | 2012-11-15 15:42:32 +0800 | [diff] [blame] | 64 | u32 tegra_fuse_readl(unsigned long offset) |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 65 | { |
Olof Johansson | d262f49 | 2011-10-13 00:14:08 -0700 | [diff] [blame] | 66 | return tegra_apb_readl(TEGRA_FUSE_BASE + offset); |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 67 | } |
| 68 | |
Danny Huang | 1f851a2 | 2012-11-15 15:42:32 +0800 | [diff] [blame] | 69 | bool tegra_spare_fuse(int bit) |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 70 | { |
Danny Huang | 1f851a2 | 2012-11-15 15:42:32 +0800 | [diff] [blame] | 71 | return tegra_fuse_readl(tegra_fuse_spare_bit + bit * 4); |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 72 | } |
| 73 | |
Peter De Schrijver | 35b1498 | 2012-02-10 01:47:41 +0200 | [diff] [blame] | 74 | static enum tegra_revision tegra_get_revision(u32 id) |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 75 | { |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 76 | u32 minor_rev = (id >> 16) & 0xf; |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 77 | |
| 78 | switch (minor_rev) { |
| 79 | case 1: |
| 80 | return TEGRA_REVISION_A01; |
| 81 | case 2: |
| 82 | return TEGRA_REVISION_A02; |
| 83 | case 3: |
Peter De Schrijver | 35b1498 | 2012-02-10 01:47:41 +0200 | [diff] [blame] | 84 | if (tegra_chip_id == TEGRA20 && |
Danny Huang | 1f851a2 | 2012-11-15 15:42:32 +0800 | [diff] [blame] | 85 | (tegra_spare_fuse(18) || tegra_spare_fuse(19))) |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 86 | return TEGRA_REVISION_A03p; |
| 87 | else |
| 88 | return TEGRA_REVISION_A03; |
| 89 | case 4: |
| 90 | return TEGRA_REVISION_A04; |
| 91 | default: |
| 92 | return TEGRA_REVISION_UNKNOWN; |
| 93 | } |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 94 | } |
| 95 | |
Danny Huang | 25cd5a3 | 2012-11-15 15:42:33 +0800 | [diff] [blame^] | 96 | static void tegra_get_process_id(void) |
| 97 | { |
| 98 | u32 reg; |
| 99 | |
| 100 | reg = tegra_fuse_readl(tegra_fuse_spare_bit); |
| 101 | tegra_cpu_process_id = (reg >> 6) & 3; |
| 102 | reg = tegra_fuse_readl(tegra_fuse_spare_bit); |
| 103 | tegra_core_process_id = (reg >> 12) & 3; |
| 104 | } |
| 105 | |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 106 | void tegra_init_fuse(void) |
| 107 | { |
Peter De Schrijver | 35b1498 | 2012-02-10 01:47:41 +0200 | [diff] [blame] | 108 | u32 id; |
| 109 | |
Laxman Dewangan | f8e798a | 2012-08-10 18:33:02 +0530 | [diff] [blame] | 110 | u32 reg = readl(IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48)); |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 111 | reg |= 1 << 28; |
Laxman Dewangan | f8e798a | 2012-08-10 18:33:02 +0530 | [diff] [blame] | 112 | writel(reg, IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48)); |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 113 | |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 114 | reg = tegra_fuse_readl(FUSE_SKU_INFO); |
| 115 | tegra_sku_id = reg & 0xFF; |
| 116 | |
Olof Johansson | dee4718 | 2011-10-17 16:39:24 -0700 | [diff] [blame] | 117 | reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT); |
| 118 | tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT; |
| 119 | |
Peter De Schrijver | 35b1498 | 2012-02-10 01:47:41 +0200 | [diff] [blame] | 120 | id = readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804); |
| 121 | tegra_chip_id = (id >> 8) & 0xff; |
| 122 | |
Danny Huang | 25cd5a3 | 2012-11-15 15:42:33 +0800 | [diff] [blame^] | 123 | tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT; |
| 124 | |
| 125 | switch (tegra_chip_id) { |
| 126 | case TEGRA20: |
| 127 | tegra_init_speedo_data = &tegra20_init_speedo_data; |
| 128 | break; |
| 129 | default: |
| 130 | tegra_init_speedo_data = &tegra_get_process_id; |
| 131 | } |
| 132 | |
Peter De Schrijver | 35b1498 | 2012-02-10 01:47:41 +0200 | [diff] [blame] | 133 | tegra_revision = tegra_get_revision(id); |
Danny Huang | 25cd5a3 | 2012-11-15 15:42:33 +0800 | [diff] [blame^] | 134 | tegra_init_speedo_data(); |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 135 | |
| 136 | pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n", |
Peter De Schrijver | 35b1498 | 2012-02-10 01:47:41 +0200 | [diff] [blame] | 137 | tegra_revision_name[tegra_revision], |
Olof Johansson | 9a1086d | 2011-10-13 00:31:20 -0700 | [diff] [blame] | 138 | tegra_sku_id, tegra_cpu_process_id, |
| 139 | tegra_core_process_id); |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 140 | } |
| 141 | |
| 142 | unsigned long long tegra_chip_uid(void) |
| 143 | { |
| 144 | unsigned long long lo, hi; |
| 145 | |
Olof Johansson | d262f49 | 2011-10-13 00:14:08 -0700 | [diff] [blame] | 146 | lo = tegra_fuse_readl(FUSE_UID_LOW); |
| 147 | hi = tegra_fuse_readl(FUSE_UID_HIGH); |
Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 148 | return (hi << 32ull) | lo; |
| 149 | } |
Henning Heinold | e87e06c | 2012-01-13 16:38:37 +1100 | [diff] [blame] | 150 | EXPORT_SYMBOL(tegra_chip_uid); |