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Zhang, Yanmin6c2b3742006-07-31 15:21:33 +08001/*
2 * Copyright (C) 2006 Intel Corp.
3 * Tom Long Nguyen (tom.l.nguyen@intel.com)
4 * Zhang Yanmin (yanmin.zhang@intel.com)
5 *
6 */
7
8#ifndef _AERDRV_H_
9#define _AERDRV_H_
10
Alexey Dobriyane8edc6e2007-05-21 01:22:52 +040011#include <linux/workqueue.h>
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080012#include <linux/pcieport_if.h>
13#include <linux/aer.h>
Huang Ying634deb02009-04-24 10:45:23 +080014#include <linux/interrupt.h>
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080015
16#define AER_NONFATAL 0
17#define AER_FATAL 1
18#define AER_CORRECTABLE 2
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080019
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080020/* Root Error Status Register Bits */
Hidetoshi Setoc9a91882009-09-07 17:07:29 +090021#define ROOT_ERR_STATUS_MASKS 0x0f
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080022
23#define SYSTEM_ERROR_INTR_ON_MESG_MASK (PCI_EXP_RTCTL_SECEE| \
24 PCI_EXP_RTCTL_SENFEE| \
25 PCI_EXP_RTCTL_SEFEE)
26#define ROOT_PORT_INTR_ON_MESG_MASK (PCI_ERR_ROOT_CMD_COR_EN| \
27 PCI_ERR_ROOT_CMD_NONFATAL_EN| \
28 PCI_ERR_ROOT_CMD_FATAL_EN)
29#define ERR_COR_ID(d) (d & 0xffff)
30#define ERR_UNCOR_ID(d) (d >> 16)
31
32#define AER_SUCCESS 0
33#define AER_UNSUCCESS 1
34#define AER_ERROR_SOURCES_MAX 100
35
36#define AER_LOG_TLP_MASKS (PCI_ERR_UNC_POISON_TLP| \
37 PCI_ERR_UNC_ECRC| \
38 PCI_ERR_UNC_UNSUP| \
39 PCI_ERR_UNC_COMP_ABORT| \
40 PCI_ERR_UNC_UNX_COMP| \
41 PCI_ERR_UNC_MALF_TLP)
42
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080043struct header_log_regs {
44 unsigned int dw0;
45 unsigned int dw1;
46 unsigned int dw2;
47 unsigned int dw3;
48};
49
Zhang, Yanmin3d5505c2009-06-16 13:35:16 +080050#define AER_MAX_MULTI_ERR_DEVICES 5 /* Not likely to have more */
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080051struct aer_err_info {
Zhang, Yanmin3d5505c2009-06-16 13:35:16 +080052 struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES];
53 int error_dev_num;
Hidetoshi Seto273024d2009-09-07 17:16:20 +090054
55 unsigned int id:16;
56
57 unsigned int severity:2; /* 0:NONFATAL | 1:FATAL | 2:COR */
58 unsigned int __pad1:5;
59 unsigned int multi_error_valid:1;
60
61 unsigned int first_error:5;
62 unsigned int __pad2:2;
63 unsigned int tlp_header_valid:1;
64
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080065 unsigned int status; /* COR/UNCOR Error Status */
Hidetoshi Seto0d90c3a2009-09-07 17:12:25 +090066 unsigned int mask; /* COR/UNCOR Error Mask */
Hidetoshi Setoc9a91882009-09-07 17:07:29 +090067 struct header_log_regs tlp; /* TLP Header */
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080068};
69
70struct aer_err_source {
71 unsigned int status;
72 unsigned int id;
73};
74
75struct aer_rpc {
76 struct pcie_device *rpd; /* Root Port device */
77 struct work_struct dpc_handler;
78 struct aer_err_source e_sources[AER_ERROR_SOURCES_MAX];
79 unsigned short prod_idx; /* Error Producer Index */
80 unsigned short cons_idx; /* Error Consumer Index */
81 int isr;
82 spinlock_t e_lock; /*
83 * Lock access to Error Status/ID Regs
84 * and error producer/consumer index
85 */
86 struct mutex rpc_mutex; /*
87 * only one thread could do
88 * recovery on the same
Uwe Kleine-König1b3c3712007-02-17 19:23:03 +010089 * root port hierarchy
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080090 */
91 wait_queue_head_t wait_release;
92};
93
94struct aer_broadcast_data {
95 enum pci_channel_state state;
96 enum pci_ers_result result;
97};
98
99static inline pci_ers_result_t merge_result(enum pci_ers_result orig,
100 enum pci_ers_result new)
101{
Zhang, Yanmin029091d2009-04-30 14:48:29 +0800102 if (new == PCI_ERS_RESULT_NONE)
103 return orig;
104
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +0800105 switch (orig) {
106 case PCI_ERS_RESULT_CAN_RECOVER:
107 case PCI_ERS_RESULT_RECOVERED:
108 orig = new;
109 break;
110 case PCI_ERS_RESULT_DISCONNECT:
111 if (new == PCI_ERS_RESULT_NEED_RESET)
112 orig = new;
113 break;
114 default:
115 break;
116 }
117
118 return orig;
119}
120
121extern struct bus_type pcie_port_bus_type;
122extern void aer_enable_rootport(struct aer_rpc *rpc);
123extern void aer_delete_rootport(struct aer_rpc *rpc);
124extern int aer_init(struct pcie_device *dev);
David Howells65f27f32006-11-22 14:55:48 +0000125extern void aer_isr(struct work_struct *work);
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +0800126extern void aer_print_error(struct pci_dev *dev, struct aer_err_info *info);
Huang Ying634deb02009-04-24 10:45:23 +0800127extern irqreturn_t aer_irq(int irq, void *context);
Zhang, Yanmin8d29bfb2007-06-06 11:44:16 +0800128
129#ifdef CONFIG_ACPI
130extern int aer_osc_setup(struct pcie_device *pciedev);
131#else
132static inline int aer_osc_setup(struct pcie_device *pciedev)
133{
134 return 0;
135}
136#endif
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +0800137
Hidetoshi Setoc9a91882009-09-07 17:07:29 +0900138#endif /* _AERDRV_H_ */