Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* unaligned.c: unalignment fixup handler for CPUs on which it is supported (FR451 only) |
| 2 | * |
| 3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. |
| 4 | * Written by David Howells (dhowells@redhat.com) |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | */ |
| 11 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | #include <linux/sched.h> |
| 13 | #include <linux/signal.h> |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/mm.h> |
| 16 | #include <linux/types.h> |
| 17 | #include <linux/user.h> |
| 18 | #include <linux/string.h> |
| 19 | #include <linux/linkage.h> |
| 20 | #include <linux/init.h> |
| 21 | |
| 22 | #include <asm/setup.h> |
| 23 | #include <asm/system.h> |
| 24 | #include <asm/uaccess.h> |
| 25 | |
| 26 | #if 0 |
| 27 | #define kdebug(fmt, ...) printk("FDPIC "fmt"\n" ,##__VA_ARGS__ ) |
| 28 | #else |
| 29 | #define kdebug(fmt, ...) do {} while(0) |
| 30 | #endif |
| 31 | |
| 32 | #define _MA_SIGNED 0x01 |
| 33 | #define _MA_HALF 0x02 |
| 34 | #define _MA_WORD 0x04 |
| 35 | #define _MA_DWORD 0x08 |
| 36 | #define _MA_SZ_MASK 0x0e |
| 37 | #define _MA_LOAD 0x10 |
| 38 | #define _MA_STORE 0x20 |
| 39 | #define _MA_UPDATE 0x40 |
| 40 | #define _MA_IMM 0x80 |
| 41 | |
| 42 | #define _MA_LDxU _MA_LOAD | _MA_UPDATE |
| 43 | #define _MA_LDxI _MA_LOAD | _MA_IMM |
| 44 | #define _MA_STxU _MA_STORE | _MA_UPDATE |
| 45 | #define _MA_STxI _MA_STORE | _MA_IMM |
| 46 | |
| 47 | static const uint8_t tbl_LDGRk_reg[0x40] = { |
| 48 | [0x02] = _MA_LOAD | _MA_HALF | _MA_SIGNED, /* LDSH @(GRi,GRj),GRk */ |
| 49 | [0x03] = _MA_LOAD | _MA_HALF, /* LDUH @(GRi,GRj),GRk */ |
| 50 | [0x04] = _MA_LOAD | _MA_WORD, /* LD @(GRi,GRj),GRk */ |
| 51 | [0x05] = _MA_LOAD | _MA_DWORD, /* LDD @(GRi,GRj),GRk */ |
| 52 | [0x12] = _MA_LDxU | _MA_HALF | _MA_SIGNED, /* LDSHU @(GRi,GRj),GRk */ |
| 53 | [0x13] = _MA_LDxU | _MA_HALF, /* LDUHU @(GRi,GRj),GRk */ |
| 54 | [0x14] = _MA_LDxU | _MA_WORD, /* LDU @(GRi,GRj),GRk */ |
| 55 | [0x15] = _MA_LDxU | _MA_DWORD, /* LDDU @(GRi,GRj),GRk */ |
| 56 | }; |
| 57 | |
| 58 | static const uint8_t tbl_STGRk_reg[0x40] = { |
| 59 | [0x01] = _MA_STORE | _MA_HALF, /* STH @(GRi,GRj),GRk */ |
| 60 | [0x02] = _MA_STORE | _MA_WORD, /* ST @(GRi,GRj),GRk */ |
| 61 | [0x03] = _MA_STORE | _MA_DWORD, /* STD @(GRi,GRj),GRk */ |
| 62 | [0x11] = _MA_STxU | _MA_HALF, /* STHU @(GRi,GRj),GRk */ |
| 63 | [0x12] = _MA_STxU | _MA_WORD, /* STU @(GRi,GRj),GRk */ |
| 64 | [0x13] = _MA_STxU | _MA_DWORD, /* STDU @(GRi,GRj),GRk */ |
| 65 | }; |
| 66 | |
| 67 | static const uint8_t tbl_LDSTGRk_imm[0x80] = { |
| 68 | [0x31] = _MA_LDxI | _MA_HALF | _MA_SIGNED, /* LDSHI @(GRi,d12),GRk */ |
| 69 | [0x32] = _MA_LDxI | _MA_WORD, /* LDI @(GRi,d12),GRk */ |
| 70 | [0x33] = _MA_LDxI | _MA_DWORD, /* LDDI @(GRi,d12),GRk */ |
| 71 | [0x36] = _MA_LDxI | _MA_HALF, /* LDUHI @(GRi,d12),GRk */ |
| 72 | [0x51] = _MA_STxI | _MA_HALF, /* STHI @(GRi,d12),GRk */ |
| 73 | [0x52] = _MA_STxI | _MA_WORD, /* STI @(GRi,d12),GRk */ |
| 74 | [0x53] = _MA_STxI | _MA_DWORD, /* STDI @(GRi,d12),GRk */ |
| 75 | }; |
| 76 | |
| 77 | |
| 78 | /*****************************************************************************/ |
| 79 | /* |
| 80 | * see if we can handle the exception by fixing up a misaligned memory access |
| 81 | */ |
| 82 | int handle_misalignment(unsigned long esr0, unsigned long ear0, unsigned long epcr0) |
| 83 | { |
| 84 | unsigned long insn, addr, *greg; |
| 85 | int GRi, GRj, GRk, D12, op; |
| 86 | |
| 87 | union { |
| 88 | uint64_t _64; |
| 89 | uint32_t _32[2]; |
| 90 | uint16_t _16; |
| 91 | uint8_t _8[8]; |
| 92 | } x; |
| 93 | |
| 94 | if (!(esr0 & ESR0_EAV) || !(epcr0 & EPCR0_V) || !(ear0 & 7)) |
| 95 | return -EAGAIN; |
| 96 | |
| 97 | epcr0 &= EPCR0_PC; |
| 98 | |
| 99 | if (__frame->pc != epcr0) { |
| 100 | kdebug("MISALIGN: Execution not halted on excepting instruction\n"); |
| 101 | BUG(); |
| 102 | } |
| 103 | |
| 104 | if (__get_user(insn, (unsigned long *) epcr0) < 0) |
| 105 | return -EFAULT; |
| 106 | |
| 107 | /* determine the instruction type first */ |
| 108 | switch ((insn >> 18) & 0x7f) { |
| 109 | case 0x2: |
| 110 | /* LDx @(GRi,GRj),GRk */ |
| 111 | op = tbl_LDGRk_reg[(insn >> 6) & 0x3f]; |
| 112 | break; |
| 113 | |
| 114 | case 0x3: |
| 115 | /* STx GRk,@(GRi,GRj) */ |
| 116 | op = tbl_STGRk_reg[(insn >> 6) & 0x3f]; |
| 117 | break; |
| 118 | |
| 119 | default: |
| 120 | op = tbl_LDSTGRk_imm[(insn >> 18) & 0x7f]; |
| 121 | break; |
| 122 | } |
| 123 | |
| 124 | if (!op) |
| 125 | return -EAGAIN; |
| 126 | |
| 127 | kdebug("MISALIGN: pc=%08lx insn=%08lx ad=%08lx op=%02x\n", epcr0, insn, ear0, op); |
| 128 | |
| 129 | memset(&x, 0xba, 8); |
| 130 | |
| 131 | /* validate the instruction parameters */ |
| 132 | greg = (unsigned long *) &__frame->tbr; |
| 133 | |
| 134 | GRi = (insn >> 12) & 0x3f; |
| 135 | GRk = (insn >> 25) & 0x3f; |
| 136 | |
| 137 | if (GRi > 31 || GRk > 31) |
| 138 | return -ENOENT; |
| 139 | |
| 140 | if (op & _MA_DWORD && GRk & 1) |
| 141 | return -EINVAL; |
| 142 | |
| 143 | if (op & _MA_IMM) { |
| 144 | D12 = insn & 0xfff; |
| 145 | asm ("slli %0,#20,%0 ! srai %0,#20,%0" : "=r"(D12) : "0"(D12)); /* sign extend */ |
| 146 | addr = (GRi ? greg[GRi] : 0) + D12; |
| 147 | } |
| 148 | else { |
| 149 | GRj = (insn >> 0) & 0x3f; |
| 150 | if (GRj > 31) |
| 151 | return -ENOENT; |
| 152 | addr = (GRi ? greg[GRi] : 0) + (GRj ? greg[GRj] : 0); |
| 153 | } |
| 154 | |
| 155 | if (addr != ear0) { |
| 156 | kdebug("MISALIGN: Calculated addr (%08lx) does not match EAR0 (%08lx)\n", |
| 157 | addr, ear0); |
| 158 | return -EFAULT; |
| 159 | } |
| 160 | |
| 161 | /* check the address is okay */ |
| 162 | if (user_mode(__frame) && ___range_ok(ear0, 8) < 0) |
| 163 | return -EFAULT; |
| 164 | |
| 165 | /* perform the memory op */ |
| 166 | if (op & _MA_STORE) { |
| 167 | /* perform a store */ |
| 168 | x._32[0] = 0; |
| 169 | if (GRk != 0) { |
| 170 | if (op & _MA_HALF) { |
| 171 | x._16 = greg[GRk]; |
| 172 | } |
| 173 | else { |
| 174 | x._32[0] = greg[GRk]; |
| 175 | } |
| 176 | } |
| 177 | if (op & _MA_DWORD) |
| 178 | x._32[1] = greg[GRk + 1]; |
| 179 | |
| 180 | kdebug("MISALIGN: Store GR%d { %08x:%08x } -> %08lx (%dB)\n", |
| 181 | GRk, x._32[1], x._32[0], addr, op & _MA_SZ_MASK); |
| 182 | |
| 183 | if (__memcpy_user((void *) addr, &x, op & _MA_SZ_MASK) != 0) |
| 184 | return -EFAULT; |
| 185 | } |
| 186 | else { |
| 187 | /* perform a load */ |
| 188 | if (__memcpy_user(&x, (void *) addr, op & _MA_SZ_MASK) != 0) |
| 189 | return -EFAULT; |
| 190 | |
| 191 | if (op & _MA_HALF) { |
| 192 | if (op & _MA_SIGNED) |
| 193 | asm ("slli %0,#16,%0 ! srai %0,#16,%0" |
| 194 | : "=r"(x._32[0]) : "0"(x._16)); |
| 195 | else |
| 196 | asm ("sethi #0,%0" |
| 197 | : "=r"(x._32[0]) : "0"(x._16)); |
| 198 | } |
| 199 | |
| 200 | kdebug("MISALIGN: Load %08lx (%dB) -> GR%d, { %08x:%08x }\n", |
| 201 | addr, op & _MA_SZ_MASK, GRk, x._32[1], x._32[0]); |
| 202 | |
| 203 | if (GRk != 0) |
| 204 | greg[GRk] = x._32[0]; |
| 205 | if (op & _MA_DWORD) |
| 206 | greg[GRk + 1] = x._32[1]; |
| 207 | } |
| 208 | |
| 209 | /* update the base pointer if required */ |
| 210 | if (op & _MA_UPDATE) |
| 211 | greg[GRi] = addr; |
| 212 | |
| 213 | /* well... we've done that insn */ |
| 214 | __frame->pc = __frame->pc + 4; |
| 215 | |
| 216 | return 0; |
| 217 | } /* end handle_misalignment() */ |