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Arnd Bergmanna0ae9c72007-06-13 02:30:17 +10001config PPC64
2 bool "64-bit kernel"
3 default n
4 help
5 This option selects whether a 32-bit or a 64-bit kernel
6 will be built.
7
8menu "Processor support"
9choice
10 prompt "Processor Type"
11 depends on PPC32
12 default 6xx
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100013 help
Arnd Bergmannb9fd3052007-06-18 01:06:52 +020014 There are five families of 32 bit PowerPC chips supported.
15 The most common ones are the desktop and server CPUs (601, 603,
16 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
John Rigbye177edc2008-01-29 04:28:53 +110017 embedded 512x/52xx/82xx/83xx/86xx counterparts.
Arnd Bergmannb9fd3052007-06-18 01:06:52 +020018 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
19 (85xx) each form a family of their own that is not compatible
20 with the others.
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100021
Arnd Bergmannb9fd3052007-06-18 01:06:52 +020022 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100023
Arnd Bergmannb9fd3052007-06-18 01:06:52 +020024config 6xx
John Rigbye177edc2008-01-29 04:28:53 +110025 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100026 select PPC_FPU
27
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100028config PPC_85xx
29 bool "Freescale 85xx"
30 select E500
31 select FSL_SOC
Kumar Gala3a831562008-01-28 10:24:30 -060032 select MPC85xx
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100033
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100034config PPC_8xx
35 bool "Freescale 8xx"
36 select FSL_SOC
37 select 8xx
Sylvain Munaut1088a202007-09-16 20:53:25 +100038 select PPC_LIB_RHEAP
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100039
40config 40x
41 bool "AMCC 40x"
42 select PPC_DCR_NATIVE
Benjamin Herrenschmidt9dae8af2007-12-21 15:39:26 +110043 select PPC_UDBG_16550
Stefan Roese93173ce2008-03-28 01:43:31 +110044 select 4xx_SOC
John Rigbyb5005632008-06-26 11:07:56 -060045 select PPC_PCI_CHOICE
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100046
47config 44x
48 bool "AMCC 44x"
49 select PPC_DCR_NATIVE
Valentine Barshak1d5499b2007-10-18 22:55:13 +100050 select PPC_UDBG_16550
Stefan Roese93173ce2008-03-28 01:43:31 +110051 select 4xx_SOC
John Rigbyb5005632008-06-26 11:07:56 -060052 select PPC_PCI_CHOICE
Becky Bruce4ee70842008-09-24 11:01:24 -050053 select PHYS_64BIT
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100054
55config E200
56 bool "Freescale e200"
57
58endchoice
59
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +000060# Until we have a choice of exclusive CPU types on 64-bit, we always
61# use PPC_BOOK3S. On 32-bit, this is equivalent to 6xx which is
62# "classic" MMU
63
64config PPC_BOOK3S
65 def_bool y
66 depends on PPC64 || 6xx
67
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100068config POWER4_ONLY
69 bool "Optimize for POWER4"
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +000070 depends on PPC64 && PPC_BOOK3S
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100071 default n
72 ---help---
73 Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
74 The resulting binary will not work on POWER3 or RS64 processors
75 when compiled with binutils 2.15 or later.
76
77config POWER3
78 bool
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +000079 depends on PPC64 && PPC_BOOK3S
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100080 default y if !POWER4_ONLY
81
82config POWER4
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +000083 depends on PPC64 && PPC_BOOK3S
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100084 def_bool y
85
Arnd Bergmann3164ccc2007-09-15 10:21:57 +100086config TUNE_CELL
87 bool "Optimize for Cell Broadband Engine"
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +000088 depends on PPC64 && PPC_BOOK3S
Arnd Bergmann3164ccc2007-09-15 10:21:57 +100089 help
90 Cause the compiler to optimize for the PPE of the Cell Broadband
91 Engine. This will make the code run considerably faster on Cell
92 but somewhat slower on other machines. This option only changes
93 the scheduling of instructions, not the selection of instructions
94 itself, so the resulting kernel will keep running on all other
95 machines. When building a kernel that is supposed to run only
96 on Cell, you should also select the POWER4_ONLY option.
97
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100098# this is temp to handle compat with arch=ppc
99config 8xx
100 bool
101
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000102config E500
Andy Fleming39aef682008-02-04 18:27:55 -0600103 select FSL_EMB_PERFMON
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000104 bool
105
Kumar Gala3dfa8772008-06-16 09:41:32 -0500106config PPC_E500MC
107 bool "e500mc Support"
108 select PPC_FPU
109 depends on E500
110
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000111config PPC_FPU
112 bool
113 default y if PPC64
114
115config 4xx
116 bool
117 depends on 40x || 44x
118 default y
119
120config BOOKE
121 bool
122 depends on E200 || E500 || 44x
123 default y
124
125config FSL_BOOKE
126 bool
127 depends on E200 || E500
128 default y
129
Andy Fleming39aef682008-02-04 18:27:55 -0600130config FSL_EMB_PERFMON
Andy Flemingad562c72008-03-07 17:59:03 -0600131 bool "Freescale Embedded Perfmon"
132 depends on E500 || PPC_83xx
133 help
134 This is the Performance Monitor support found on the e500 core
135 and some e300 cores (c3 and c4). Select this only if your
136 core supports the Embedded Performance Monitor APU
Andy Fleming39aef682008-02-04 18:27:55 -0600137
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000138config PTE_64BIT
139 bool
Becky Bruce4ee70842008-09-24 11:01:24 -0500140 depends on 44x || E500 || PPC_86xx
141 default y if PHYS_64BIT
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000142
143config PHYS_64BIT
Becky Bruce4ee70842008-09-24 11:01:24 -0500144 bool 'Large physical address support' if E500 || PPC_86xx
145 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000146 ---help---
147 This option enables kernel support for larger than 32-bit physical
Becky Bruce4ee70842008-09-24 11:01:24 -0500148 addresses. This feature may not be available on all cores.
149
150 If you have more than 3.5GB of RAM or so, you also need to enable
151 SWIOTLB under Kernel Options for this to work. The actual number
152 is platform-dependent.
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000153
154 If in doubt, say N here.
155
156config ALTIVEC
157 bool "AltiVec Support"
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +0000158 depends on 6xx || POWER4
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000159 ---help---
160 This option enables kernel support for the Altivec extensions to the
161 PowerPC processor. The kernel currently supports saving and restoring
162 altivec registers, and turning on the 'altivec enable' bit so user
163 processes can execute altivec instructions.
164
165 This option is only usefully if you have a processor that supports
166 altivec (G4, otherwise known as 74xx series), but does not have
167 any affect on a non-altivec cpu (it does, however add code to the
168 kernel).
169
170 If in doubt, say Y here.
171
Michael Neuling96d5b522008-06-25 14:07:18 +1000172config VSX
173 bool "VSX Support"
174 depends on POWER4 && ALTIVEC && PPC_FPU
175 ---help---
176
177 This option enables kernel support for the Vector Scaler extensions
178 to the PowerPC processor. The kernel currently supports saving and
179 restoring VSX registers, and turning on the 'VSX enable' bit so user
180 processes can execute VSX instructions.
181
182 This option is only useful if you have a processor that supports
183 VSX (P7 and above), but does not have any affect on a non-VSX
184 CPUs (it does, however add code to the kernel).
185
186 If in doubt, say Y here.
187
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000188config SPE
189 bool "SPE Support"
Kumar Gala3dfa8772008-06-16 09:41:32 -0500190 depends on E200 || (E500 && !PPC_E500MC)
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000191 default y
192 ---help---
193 This option enables kernel support for the Signal Processing
194 Extensions (SPE) to the PowerPC processor. The kernel currently
195 supports saving and restoring SPE registers, and turning on the
196 'spe enable' bit so user processes can execute SPE instructions.
197
198 This option is only useful if you have a processor that supports
199 SPE (e500, otherwise known as 85xx series), but does not have any
200 effect on a non-spe cpu (it does, however add code to the kernel).
201
202 If in doubt, say Y here.
203
204config PPC_STD_MMU
205 bool
Benjamin Herrenschmidt5e696612008-12-18 19:13:24 +0000206 depends on 6xx || PPC64
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000207 default y
208
209config PPC_STD_MMU_32
210 def_bool y
211 depends on PPC_STD_MMU && PPC32
212
Benjamin Herrenschmidt5e696612008-12-18 19:13:24 +0000213config PPC_STD_MMU_64
214 def_bool y
215 depends on PPC_STD_MMU && PPC64
216
217config PPC_MMU_NOHASH
218 def_bool y
219 depends on !PPC_STD_MMU
220
Kumar Gala70fe3af2009-02-12 16:12:40 -0600221config PPC_BOOK3E_MMU
222 def_bool y
223 depends on FSL_BOOKE
224
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000225config PPC_MM_SLICES
226 bool
Ilya Yanokca9153a2008-12-11 04:55:41 +0300227 default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES)
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000228 default n
229
230config VIRT_CPU_ACCOUNTING
231 bool "Deterministic task and CPU time accounting"
232 depends on PPC64
233 default y
234 help
235 Select this option to enable more accurate task and CPU time
236 accounting. This is done by reading a CPU counter on each
237 kernel entry and exit and on transitions within the kernel
238 between system, softirq and hardirq state, so there is a
239 small performance impact. This also enables accounting of
240 stolen time on logically-partitioned systems running on
241 IBM POWER5-based machines.
242
243 If in doubt, say Y here.
244
245config SMP
Kumar Gala00c4b952008-12-01 14:40:46 -0600246 depends on PPC_STD_MMU || FSL_BOOKE
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000247 bool "Symmetric multi-processing support"
248 ---help---
249 This enables support for systems with more than one CPU. If you have
250 a system with only one CPU, say N. If you have a system with more
251 than one CPU, say Y. Note that the kernel does not currently
252 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
253 since they have inadequate hardware support for multiprocessor
254 operation.
255
256 If you say N here, the kernel will run on single and multiprocessor
257 machines, but will use only one CPU of a multiprocessor machine. If
258 you say Y here, the kernel will run on single-processor machines.
259 On a single-processor machine, the kernel will run faster if you say
260 N here.
261
262 If you don't know what to do here, say N.
263
264config NR_CPUS
Tony Breeds90035fe2008-04-24 13:43:49 +1000265 int "Maximum number of CPUs (2-1024)"
266 range 2 1024
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000267 depends on SMP
268 default "32" if PPC64
269 default "4"
270
271config NOT_COHERENT_CACHE
272 bool
John Rigbye177edc2008-01-29 04:28:53 +1100273 depends on 4xx || 8xx || E200 || PPC_MPC512x
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000274 default y
275
Robert P. J. Dayf8eb77d2007-07-18 08:21:29 +1000276config CHECK_CACHE_COHERENCY
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000277 bool
278
279endmenu