Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Include file for Marvell Armada XP family SoC |
| 3 | * |
| 4 | * Copyright (C) 2012 Marvell |
| 5 | * |
| 6 | * Lior Amsalem <alior@marvell.com> |
| 7 | * Gregory CLEMENT <gregory.clement@free-electrons.com> |
| 8 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
| 9 | * Ben Dooks <ben.dooks@codethink.co.uk> |
| 10 | * |
Gregory CLEMENT | ee2ff96 | 2015-01-26 15:16:02 +0100 | [diff] [blame] | 11 | * This file is dual-licensed: you can use it either under the terms |
| 12 | * of the GPL or the X11 license, at your option. Note that this dual |
| 13 | * licensing only applies to this file, and not this project as a |
| 14 | * whole. |
| 15 | * |
| 16 | * a) This file is free software; you can redistribute it and/or |
| 17 | * modify it under the terms of the GNU General Public License as |
| 18 | * published by the Free Software Foundation; either version 2 of the |
| 19 | * License, or (at your option) any later version. |
| 20 | * |
| 21 | * This file is distributed in the hope that it will be useful |
| 22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 24 | * GNU General Public License for more details. |
| 25 | * |
| 26 | * Or, alternatively |
| 27 | * |
| 28 | * b) Permission is hereby granted, free of charge, to any person |
| 29 | * obtaining a copy of this software and associated documentation |
| 30 | * files (the "Software"), to deal in the Software without |
| 31 | * restriction, including without limitation the rights to use |
| 32 | * copy, modify, merge, publish, distribute, sublicense, and/or |
| 33 | * sell copies of the Software, and to permit persons to whom the |
| 34 | * Software is furnished to do so, subject to the following |
| 35 | * conditions: |
| 36 | * |
| 37 | * The above copyright notice and this permission notice shall be |
| 38 | * included in all copies or substantial portions of the Software. |
| 39 | * |
| 40 | * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND |
| 41 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
| 42 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 43 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
| 44 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY |
| 45 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 46 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 47 | * OTHER DEALINGS IN THE SOFTWARE. |
Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 48 | * |
Thomas Petazzoni | 10b683c | 2012-08-02 17:13:47 +0200 | [diff] [blame] | 49 | * Contains definitions specific to the Armada XP SoC that are not |
Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 50 | * common to all Armada SoCs. |
| 51 | */ |
| 52 | |
Ezequiel Garcia | 3814988 | 2013-07-26 10:17:56 -0300 | [diff] [blame] | 53 | #include "armada-370-xp.dtsi" |
Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 54 | |
| 55 | / { |
| 56 | model = "Marvell Armada XP family SoC"; |
| 57 | compatible = "marvell,armadaxp", "marvell,armada-370-xp"; |
| 58 | |
Willy Tarreau | be5a938 | 2013-06-03 18:47:36 +0200 | [diff] [blame] | 59 | aliases { |
Thomas Petazzoni | bf6acf1 | 2015-03-03 15:41:01 +0100 | [diff] [blame] | 60 | serial2 = &uart2; |
| 61 | serial3 = &uart3; |
Willy Tarreau | be5a938 | 2013-06-03 18:47:36 +0200 | [diff] [blame] | 62 | }; |
| 63 | |
Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 64 | soc { |
Ezequiel Garcia | 5e12a61 | 2013-07-26 10:17:57 -0300 | [diff] [blame] | 65 | compatible = "marvell,armadaxp-mbus", "simple-bus"; |
| 66 | |
Ezequiel Garcia | 0cd3754 | 2013-07-26 10:17:58 -0300 | [diff] [blame] | 67 | bootrom { |
| 68 | compatible = "marvell,bootrom"; |
| 69 | reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>; |
| 70 | }; |
| 71 | |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 72 | internal-regs { |
Thomas Petazzoni | 6e6db2b | 2014-11-21 17:00:13 +0100 | [diff] [blame] | 73 | sdramc@1400 { |
| 74 | compatible = "marvell,armada-xp-sdram-controller"; |
| 75 | reg = <0x1400 0x500>; |
| 76 | }; |
| 77 | |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 78 | L2: l2-cache { |
| 79 | compatible = "marvell,aurora-system-cache"; |
| 80 | reg = <0x08000 0x1000>; |
| 81 | cache-id-part = <0x100>; |
Gregory CLEMENT | 292a354 | 2015-03-17 17:33:54 +0100 | [diff] [blame] | 82 | cache-level = <2>; |
Gregory CLEMENT | a9ce1af | 2014-10-06 11:37:56 +0200 | [diff] [blame] | 83 | cache-unified; |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 84 | wt-override; |
| 85 | }; |
Thomas Petazzoni | b18ea4d | 2013-04-12 16:29:07 +0200 | [diff] [blame] | 86 | |
Arnaud Ebalard | 547c653 | 2014-11-22 00:46:39 +0100 | [diff] [blame] | 87 | spi0: spi@10600 { |
Gregory CLEMENT | 2d29592 | 2015-05-26 11:44:44 +0200 | [diff] [blame^] | 88 | compatible = "marvell,armada-xp-spi", |
| 89 | "marvell,orion-spi"; |
Arnaud Ebalard | 547c653 | 2014-11-22 00:46:39 +0100 | [diff] [blame] | 90 | pinctrl-0 = <&spi0_pins>; |
| 91 | pinctrl-names = "default"; |
| 92 | }; |
| 93 | |
Gregory CLEMENT | 2d29592 | 2015-05-26 11:44:44 +0200 | [diff] [blame^] | 94 | spi1: spi@10680 { |
| 95 | compatible = "marvell,armada-xp-spi", |
| 96 | "marvell,orion-spi"; |
| 97 | }; |
| 98 | |
| 99 | |
Jason Cooper | a095b1c | 2013-12-12 13:59:17 +0000 | [diff] [blame] | 100 | i2c0: i2c@11000 { |
| 101 | compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; |
| 102 | reg = <0x11000 0x100>; |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 103 | }; |
Thomas Petazzoni | b18ea4d | 2013-04-12 16:29:07 +0200 | [diff] [blame] | 104 | |
Jason Cooper | a095b1c | 2013-12-12 13:59:17 +0000 | [diff] [blame] | 105 | i2c1: i2c@11100 { |
| 106 | compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; |
| 107 | reg = <0x11100 0x100>; |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 108 | }; |
Thomas Petazzoni | b18ea4d | 2013-04-12 16:29:07 +0200 | [diff] [blame] | 109 | |
Arnaud Ebalard | 181d9b2 | 2014-11-22 00:45:35 +0100 | [diff] [blame] | 110 | uart2: serial@12200 { |
Gregory CLEMENT | b24212f | 2012-12-04 18:04:59 +0100 | [diff] [blame] | 111 | compatible = "snps,dw-apb-uart"; |
Arnaud Ebalard | d352f41 | 2014-11-22 00:46:28 +0100 | [diff] [blame] | 112 | pinctrl-0 = <&uart2_pins>; |
| 113 | pinctrl-names = "default"; |
Gregory CLEMENT | 82a6826 | 2013-04-12 16:29:08 +0200 | [diff] [blame] | 114 | reg = <0x12200 0x100>; |
Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 115 | reg-shift = <2>; |
| 116 | interrupts = <43>; |
Heikki Krogerus | e366154 | 2013-03-06 11:23:33 +0100 | [diff] [blame] | 117 | reg-io-width = <1>; |
Thomas Petazzoni | 64939dc | 2014-04-18 09:41:46 +0200 | [diff] [blame] | 118 | clocks = <&coreclk 0>; |
Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 119 | status = "disabled"; |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 120 | }; |
Arnaud Ebalard | 181d9b2 | 2014-11-22 00:45:35 +0100 | [diff] [blame] | 121 | |
| 122 | uart3: serial@12300 { |
Gregory CLEMENT | b24212f | 2012-12-04 18:04:59 +0100 | [diff] [blame] | 123 | compatible = "snps,dw-apb-uart"; |
Arnaud Ebalard | d352f41 | 2014-11-22 00:46:28 +0100 | [diff] [blame] | 124 | pinctrl-0 = <&uart3_pins>; |
| 125 | pinctrl-names = "default"; |
Gregory CLEMENT | 82a6826 | 2013-04-12 16:29:08 +0200 | [diff] [blame] | 126 | reg = <0x12300 0x100>; |
Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 127 | reg-shift = <2>; |
| 128 | interrupts = <44>; |
Heikki Krogerus | e366154 | 2013-03-06 11:23:33 +0100 | [diff] [blame] | 129 | reg-io-width = <1>; |
Thomas Petazzoni | 64939dc | 2014-04-18 09:41:46 +0200 | [diff] [blame] | 130 | clocks = <&coreclk 0>; |
Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 131 | status = "disabled"; |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 132 | }; |
Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 133 | |
Jason Cooper | a095b1c | 2013-12-12 13:59:17 +0000 | [diff] [blame] | 134 | system-controller@18200 { |
| 135 | compatible = "marvell,armada-370-xp-system-controller"; |
| 136 | reg = <0x18200 0x500>; |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 137 | }; |
Gregory CLEMENT | 9d20278 | 2012-11-17 15:22:24 +0100 | [diff] [blame] | 138 | |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 139 | gateclk: clock-gating-control@18220 { |
| 140 | compatible = "marvell,armada-xp-gating-clock"; |
| 141 | reg = <0x18220 0x4>; |
| 142 | clocks = <&coreclk 0>; |
| 143 | #clock-cells = <1>; |
| 144 | }; |
Gregory CLEMENT | 9d20278 | 2012-11-17 15:22:24 +0100 | [diff] [blame] | 145 | |
Jason Cooper | a095b1c | 2013-12-12 13:59:17 +0000 | [diff] [blame] | 146 | coreclk: mvebu-sar@18230 { |
| 147 | compatible = "marvell,armada-xp-core-clock"; |
| 148 | reg = <0x18230 0x08>; |
| 149 | #clock-cells = <1>; |
| 150 | }; |
| 151 | |
| 152 | thermal@182b0 { |
| 153 | compatible = "marvell,armadaxp-thermal"; |
| 154 | reg = <0x182b0 0x4 |
| 155 | 0x184d0 0x4>; |
| 156 | status = "okay"; |
| 157 | }; |
| 158 | |
| 159 | cpuclk: clock-complex@18700 { |
| 160 | #clock-cells = <1>; |
| 161 | compatible = "marvell,armada-xp-cpu-clock"; |
Nadav Haklai | b7f0184 | 2015-03-17 13:53:34 +0100 | [diff] [blame] | 162 | reg = <0x18700 0x24>, <0x1c054 0x10>; |
Jason Cooper | a095b1c | 2013-12-12 13:59:17 +0000 | [diff] [blame] | 163 | clocks = <&coreclk 1>; |
| 164 | }; |
| 165 | |
Thomas Petazzoni | 24c2573 | 2015-03-03 15:41:03 +0100 | [diff] [blame] | 166 | interrupt-controller@20a00 { |
Jason Cooper | a095b1c | 2013-12-12 13:59:17 +0000 | [diff] [blame] | 167 | reg = <0x20a00 0x2d0>, <0x21070 0x58>; |
| 168 | }; |
| 169 | |
| 170 | timer@20300 { |
| 171 | compatible = "marvell,armada-xp-timer"; |
| 172 | clocks = <&coreclk 2>, <&refclk>; |
| 173 | clock-names = "nbclk", "fixed"; |
| 174 | }; |
| 175 | |
Ezequiel Garcia | 05afeeb | 2014-02-10 20:00:32 -0300 | [diff] [blame] | 176 | watchdog@20300 { |
| 177 | compatible = "marvell,armada-xp-wdt"; |
| 178 | clocks = <&coreclk 2>, <&refclk>; |
| 179 | clock-names = "nbclk", "fixed"; |
| 180 | }; |
| 181 | |
Gregory CLEMENT | b6249d4 | 2014-04-14 15:50:32 +0200 | [diff] [blame] | 182 | cpurst@20800 { |
| 183 | compatible = "marvell,armada-370-cpu-reset"; |
| 184 | reg = <0x20800 0x20>; |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 185 | }; |
Thomas Petazzoni | 323c101 | 2012-09-04 15:06:43 +0200 | [diff] [blame] | 186 | |
Willy Tarreau | be5a938 | 2013-06-03 18:47:36 +0200 | [diff] [blame] | 187 | eth2: ethernet@30000 { |
Thomas Petazzoni | 323c101 | 2012-09-04 15:06:43 +0200 | [diff] [blame] | 188 | compatible = "marvell,armada-370-neta"; |
Thomas Petazzoni | cf8088c | 2013-05-21 12:33:27 +0200 | [diff] [blame] | 189 | reg = <0x30000 0x4000>; |
Thomas Petazzoni | 323c101 | 2012-09-04 15:06:43 +0200 | [diff] [blame] | 190 | interrupts = <12>; |
Thomas Petazzoni | 4aa935a | 2012-11-19 14:18:09 +0100 | [diff] [blame] | 191 | clocks = <&gateclk 2>; |
Thomas Petazzoni | 323c101 | 2012-09-04 15:06:43 +0200 | [diff] [blame] | 192 | status = "disabled"; |
Thomas Petazzoni | a1d53da | 2012-11-20 16:03:19 +0100 | [diff] [blame] | 193 | }; |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 194 | |
Jason Cooper | a095b1c | 2013-12-12 13:59:17 +0000 | [diff] [blame] | 195 | usb@50000 { |
| 196 | clocks = <&gateclk 18>; |
| 197 | }; |
| 198 | |
| 199 | usb@51000 { |
| 200 | clocks = <&gateclk 19>; |
| 201 | }; |
| 202 | |
| 203 | usb@52000 { |
| 204 | compatible = "marvell,orion-ehci"; |
| 205 | reg = <0x52000 0x500>; |
| 206 | interrupts = <47>; |
| 207 | clocks = <&gateclk 20>; |
| 208 | status = "disabled"; |
| 209 | }; |
| 210 | |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 211 | xor@60900 { |
| 212 | compatible = "marvell,orion-xor"; |
| 213 | reg = <0x60900 0x100 |
| 214 | 0x60b00 0x100>; |
| 215 | clocks = <&gateclk 22>; |
| 216 | status = "okay"; |
| 217 | |
| 218 | xor10 { |
| 219 | interrupts = <51>; |
| 220 | dmacap,memcpy; |
| 221 | dmacap,xor; |
| 222 | }; |
| 223 | xor11 { |
| 224 | interrupts = <52>; |
| 225 | dmacap,memcpy; |
| 226 | dmacap,xor; |
| 227 | dmacap,memset; |
| 228 | }; |
Thomas Petazzoni | a1d53da | 2012-11-20 16:03:19 +0100 | [diff] [blame] | 229 | }; |
Thomas Petazzoni | a1d53da | 2012-11-20 16:03:19 +0100 | [diff] [blame] | 230 | |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 231 | xor@f0900 { |
| 232 | compatible = "marvell,orion-xor"; |
| 233 | reg = <0xF0900 0x100 |
| 234 | 0xF0B00 0x100>; |
| 235 | clocks = <&gateclk 28>; |
| 236 | status = "okay"; |
Thomas Petazzoni | a1d53da | 2012-11-20 16:03:19 +0100 | [diff] [blame] | 237 | |
Gregory CLEMENT | 467f54b | 2013-04-12 16:29:09 +0200 | [diff] [blame] | 238 | xor00 { |
| 239 | interrupts = <94>; |
| 240 | dmacap,memcpy; |
| 241 | dmacap,xor; |
| 242 | }; |
| 243 | xor01 { |
| 244 | interrupts = <95>; |
| 245 | dmacap,memcpy; |
| 246 | dmacap,xor; |
| 247 | dmacap,memset; |
| 248 | }; |
Thomas Petazzoni | a1d53da | 2012-11-20 16:03:19 +0100 | [diff] [blame] | 249 | }; |
Ezequiel Garcia | 693a56e | 2013-03-26 07:16:26 -0300 | [diff] [blame] | 250 | }; |
Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 251 | }; |
Ezequiel Garcia | c1bbd43 | 2013-08-20 12:45:50 -0300 | [diff] [blame] | 252 | |
| 253 | clocks { |
| 254 | /* 25 MHz reference crystal */ |
| 255 | refclk: oscillator { |
| 256 | compatible = "fixed-clock"; |
| 257 | #clock-cells = <0>; |
| 258 | clock-frequency = <25000000>; |
| 259 | }; |
| 260 | }; |
Thomas Petazzoni | 9ae6f74 | 2012-06-13 19:01:28 +0200 | [diff] [blame] | 261 | }; |
Arnaud Ebalard | 4904a82 | 2014-11-22 00:45:56 +0100 | [diff] [blame] | 262 | |
| 263 | &pinctrl { |
Arnaud Ebalard | 70ee4e9 | 2014-11-22 17:23:30 +0100 | [diff] [blame] | 264 | ge0_gmii_pins: ge0-gmii-pins { |
Arnaud Ebalard | 4904a82 | 2014-11-22 00:45:56 +0100 | [diff] [blame] | 265 | marvell,pins = |
| 266 | "mpp0", "mpp1", "mpp2", "mpp3", |
| 267 | "mpp4", "mpp5", "mpp6", "mpp7", |
| 268 | "mpp8", "mpp9", "mpp10", "mpp11", |
| 269 | "mpp12", "mpp13", "mpp14", "mpp15", |
| 270 | "mpp16", "mpp17", "mpp18", "mpp19", |
| 271 | "mpp20", "mpp21", "mpp22", "mpp23"; |
| 272 | marvell,function = "ge0"; |
| 273 | }; |
| 274 | |
Arnaud Ebalard | 70ee4e9 | 2014-11-22 17:23:30 +0100 | [diff] [blame] | 275 | ge0_rgmii_pins: ge0-rgmii-pins { |
Arnaud Ebalard | 4904a82 | 2014-11-22 00:45:56 +0100 | [diff] [blame] | 276 | marvell,pins = |
| 277 | "mpp0", "mpp1", "mpp2", "mpp3", |
| 278 | "mpp4", "mpp5", "mpp6", "mpp7", |
| 279 | "mpp8", "mpp9", "mpp10", "mpp11"; |
| 280 | marvell,function = "ge0"; |
| 281 | }; |
| 282 | |
Arnaud Ebalard | 70ee4e9 | 2014-11-22 17:23:30 +0100 | [diff] [blame] | 283 | ge1_rgmii_pins: ge1-rgmii-pins { |
Arnaud Ebalard | 4904a82 | 2014-11-22 00:45:56 +0100 | [diff] [blame] | 284 | marvell,pins = |
| 285 | "mpp12", "mpp13", "mpp14", "mpp15", |
| 286 | "mpp16", "mpp17", "mpp18", "mpp19", |
| 287 | "mpp20", "mpp21", "mpp22", "mpp23"; |
| 288 | marvell,function = "ge1"; |
| 289 | }; |
| 290 | |
| 291 | sdio_pins: sdio-pins { |
| 292 | marvell,pins = "mpp30", "mpp31", "mpp32", |
| 293 | "mpp33", "mpp34", "mpp35"; |
| 294 | marvell,function = "sd0"; |
| 295 | }; |
Arnaud Ebalard | d352f41 | 2014-11-22 00:46:28 +0100 | [diff] [blame] | 296 | |
Arnaud Ebalard | 547c653 | 2014-11-22 00:46:39 +0100 | [diff] [blame] | 297 | spi0_pins: spi0-pins { |
| 298 | marvell,pins = "mpp36", "mpp37", |
| 299 | "mpp38", "mpp39"; |
| 300 | marvell,function = "spi"; |
| 301 | }; |
| 302 | |
Arnaud Ebalard | d352f41 | 2014-11-22 00:46:28 +0100 | [diff] [blame] | 303 | uart2_pins: uart2-pins { |
| 304 | marvell,pins = "mpp42", "mpp43"; |
| 305 | marvell,function = "uart2"; |
| 306 | }; |
| 307 | |
| 308 | uart3_pins: uart3-pins { |
| 309 | marvell,pins = "mpp44", "mpp45"; |
| 310 | marvell,function = "uart3"; |
| 311 | }; |
Arnaud Ebalard | 4904a82 | 2014-11-22 00:45:56 +0100 | [diff] [blame] | 312 | }; |