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R Sricharan6b5de092012-05-10 19:46:00 +05301/*
Sricharan Rfa63d032013-06-07 18:52:47 +05302 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
R Sricharan6b5de092012-05-10 19:46:00 +05303 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
Florian Vaussard98ef79572013-05-31 14:32:55 +020010#include "omap5.dtsi"
J Keerthye00c27e2013-06-13 10:00:11 +053011#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
R Sricharan6b5de092012-05-10 19:46:00 +053013
14/ {
Sricharan Rfa63d032013-06-07 18:52:47 +053015 model = "TI OMAP5 uEVM board";
16 compatible = "ti,omap5-uevm", "ti,omap5";
R Sricharan6b5de092012-05-10 19:46:00 +053017
18 memory {
19 device_type = "memory";
Santosh Shilimkar03178c62013-01-18 11:43:16 +053020 reg = <0x80000000 0x7F000000>; /* 2032 MB */
R Sricharan6b5de092012-05-10 19:46:00 +053021 };
Balaji T K5dd18b02012-08-07 12:48:21 +053022
23 vmmcsd_fixed: fixedregulator-mmcsd {
24 compatible = "regulator-fixed";
25 regulator-name = "vmmcsd_fixed";
26 regulator-min-microvolt = <3000000>;
27 regulator-max-microvolt = <3000000>;
28 };
Sourav Poddar5449fbc2012-07-25 11:03:27 +053029
Roger Quadrosed7f8e82013-06-07 18:52:48 +053030 /* HS USB Host PHY on PORT 2 */
31 hsusb2_phy: hsusb2_phy {
32 compatible = "usb-nop-xceiv";
Roger Quadros8ae9b592013-09-24 11:53:53 +030033 reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
Roger Quadros2ecf8aa2014-02-27 16:18:29 +020034 clocks = <&auxclk1_ck>;
35 clock-names = "main_clk";
Roger Quadros153030c2013-06-18 19:04:46 +030036 clock-frequency = <19200000>;
Roger Quadrosed7f8e82013-06-07 18:52:48 +053037 };
38
Roger Quadrosed7f8e82013-06-07 18:52:48 +053039 /* HS USB Host PHY on PORT 3 */
40 hsusb3_phy: hsusb3_phy {
41 compatible = "usb-nop-xceiv";
Roger Quadros8ae9b592013-09-24 11:53:53 +030042 reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
Roger Quadrosed7f8e82013-06-07 18:52:48 +053043 };
44
Dan Murphy66155302013-06-07 18:52:49 +053045 leds {
46 compatible = "gpio-leds";
47 led@1 {
48 label = "omap5:blue:usr1";
49 gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
50 linux,default-trigger = "heartbeat";
51 default-state = "off";
52 };
53 };
Balaji T K5dd18b02012-08-07 12:48:21 +053054};
55
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030056&omap5_pmx_core {
57 pinctrl-names = "default";
58 pinctrl-0 = <
59 &twl6040_pins
60 &mcpdm_pins
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030061 &mcbsp1_pins
62 &mcbsp2_pins
Roger Quadrosed7f8e82013-06-07 18:52:48 +053063 &usbhost_pins
Dan Murphy66155302013-06-07 18:52:49 +053064 &led_gpio_pins
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030065 >;
66
67 twl6040_pins: pinmux_twl6040_pins {
68 pinctrl-single,pins = <
Peter Ujfalusi472e623d2013-10-23 12:32:19 +030069 0x17e (PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030070 >;
71 };
72
73 mcpdm_pins: pinmux_mcpdm_pins {
74 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020075 0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
76 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */
77 0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */
78 0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */
79 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030080 >;
81 };
82
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030083 mcbsp1_pins: pinmux_mcbsp1_pins {
84 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020085 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
86 0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
87 0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */
88 0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030089 >;
90 };
91
92 mcbsp2_pins: pinmux_mcbsp2_pins {
93 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020094 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */
95 0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
96 0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */
97 0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030098 >;
99 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530100
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200101 i2c1_pins: pinmux_i2c1_pins {
102 pinctrl-single,pins = <
103 0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
104 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
105 >;
106 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530107
Sourav Poddar9be495c2013-02-13 14:58:22 +0530108 i2c5_pins: pinmux_i2c5_pins {
109 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200110 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
111 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
Sourav Poddar9be495c2013-02-13 14:58:22 +0530112 >;
113 };
Sourav Poddar392adaf2013-02-13 14:58:44 +0530114
115 mcspi2_pins: pinmux_mcspi2_pins {
116 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200117 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
118 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
119 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
Eric Witcher05bc85d2013-10-18 02:42:34 -0400120 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530121 >;
122 };
123
124 mcspi3_pins: pinmux_mcspi3_pins {
125 pinctrl-single,pins = <
Eric Witcher05bc85d2013-10-18 02:42:34 -0400126 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi3_somi */
127 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */
128 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi3_simo */
129 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi3_clk */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530130 >;
131 };
132
133 mcspi4_pins: pinmux_mcspi4_pins {
134 pinctrl-single,pins = <
Eric Witcher05bc85d2013-10-18 02:42:34 -0400135 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi4_clk */
136 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi4_simo */
137 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi4_somi */
138 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi4_cs0 */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530139 >;
140 };
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530141
142 usbhost_pins: pinmux_usbhost_pins {
143 pinctrl-single,pins = <
144 0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
145 0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
146
147 0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
148 0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
149
150 0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
151 0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
152 >;
153 };
Dan Murphy66155302013-06-07 18:52:49 +0530154
155 led_gpio_pins: pinmux_led_gpio_pins {
156 pinctrl-single,pins = <
157 0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
158 >;
159 };
Sourav Poddared22fee2013-06-07 18:52:50 +0530160
161 uart1_pins: pinmux_uart1_pins {
162 pinctrl-single,pins = <
163 0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
164 0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
165 0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
166 0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
167 >;
168 };
169
170 uart3_pins: pinmux_uart3_pins {
171 pinctrl-single,pins = <
172 0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
173 0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
174 >;
175 };
176
177 uart5_pins: pinmux_uart5_pins {
178 pinctrl-single,pins = <
179 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
180 0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
181 0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
182 0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
183 >;
184 };
185
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530186};
187
188&omap5_pmx_wkup {
189 pinctrl-names = "default";
190 pinctrl-0 = <
191 &usbhost_wkup_pins
192 >;
193
194 usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
195 pinctrl-single,pins = <
196 0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
197 >;
198 };
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300199};
200
Balaji T K5dd18b02012-08-07 12:48:21 +0530201&mmc1 {
Nishanth Menone18235a2013-07-29 12:03:02 -0500202 vmmc-supply = <&ldo9_reg>;
Balaji T K5dd18b02012-08-07 12:48:21 +0530203 bus-width = <4>;
204};
205
206&mmc2 {
207 vmmc-supply = <&vmmcsd_fixed>;
208 bus-width = <8>;
209 ti,non-removable;
210};
211
212&mmc3 {
213 bus-width = <4>;
214 ti,non-removable;
215};
216
217&mmc4 {
218 status = "disabled";
219};
220
221&mmc5 {
222 status = "disabled";
R Sricharan6b5de092012-05-10 19:46:00 +0530223};
Sourav Poddar08f3e212012-07-25 11:02:43 +0530224
Sourav Poddar9be495c2013-02-13 14:58:22 +0530225&i2c1 {
226 pinctrl-names = "default";
227 pinctrl-0 = <&i2c1_pins>;
228
229 clock-frequency = <400000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530230
231 palmas: palmas@48 {
232 compatible = "ti,palmas";
233 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
234 interrupt-parent = <&gic>;
235 reg = <0x48>;
236 interrupt-controller;
237 #interrupt-cells = <2>;
Nishanth Menon86583372013-09-19 14:11:36 -0500238 ti,system-power-controller;
J Keerthye00c27e2013-06-13 10:00:11 +0530239
Felipe Balbie3a412c2013-08-21 20:01:32 +0530240 extcon_usb3: palmas_usb {
241 compatible = "ti,palmas-usb-vid";
242 ti,enable-vbus-detection;
243 ti,enable-id-detection;
244 ti,wakeup;
245 };
246
J Keerthye00c27e2013-06-13 10:00:11 +0530247 palmas_pmic {
248 compatible = "ti,palmas-pmic";
249 interrupt-parent = <&palmas>;
250 interrupts = <14 IRQ_TYPE_NONE>;
251 interrupt-name = "short-irq";
252
253 ti,ldo6-vibrator;
254
255 regulators {
256 smps123_reg: smps123 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500257 /* VDD_OPP_MPU */
J Keerthye00c27e2013-06-13 10:00:11 +0530258 regulator-name = "smps123";
259 regulator-min-microvolt = < 600000>;
260 regulator-max-microvolt = <1500000>;
261 regulator-always-on;
262 regulator-boot-on;
263 };
264
265 smps45_reg: smps45 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500266 /* VDD_OPP_MM */
J Keerthye00c27e2013-06-13 10:00:11 +0530267 regulator-name = "smps45";
268 regulator-min-microvolt = < 600000>;
269 regulator-max-microvolt = <1310000>;
270 regulator-always-on;
271 regulator-boot-on;
272 };
273
274 smps6_reg: smps6 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500275 /* VDD_DDR3 - over VDD_SMPS6 */
J Keerthye00c27e2013-06-13 10:00:11 +0530276 regulator-name = "smps6";
277 regulator-min-microvolt = <1200000>;
278 regulator-max-microvolt = <1200000>;
279 regulator-always-on;
280 regulator-boot-on;
281 };
282
283 smps7_reg: smps7 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500284 /* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
J Keerthye00c27e2013-06-13 10:00:11 +0530285 regulator-name = "smps7";
286 regulator-min-microvolt = <1800000>;
287 regulator-max-microvolt = <1800000>;
288 regulator-always-on;
289 regulator-boot-on;
290 };
291
292 smps8_reg: smps8 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500293 /* VDD_OPP_CORE */
J Keerthye00c27e2013-06-13 10:00:11 +0530294 regulator-name = "smps8";
295 regulator-min-microvolt = < 600000>;
296 regulator-max-microvolt = <1310000>;
297 regulator-always-on;
298 regulator-boot-on;
299 };
300
301 smps9_reg: smps9 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500302 /* VDDA_2v1_AUD over VDD_2v1 */
J Keerthye00c27e2013-06-13 10:00:11 +0530303 regulator-name = "smps9";
304 regulator-min-microvolt = <2100000>;
305 regulator-max-microvolt = <2100000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530306 ti,smps-range = <0x80>;
307 };
308
Kishon Vijay Abraham I94489962013-08-12 15:07:01 +0530309 smps10_out2_reg: smps10_out2 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500310 /* VBUS_5V_OTG */
Kishon Vijay Abraham I94489962013-08-12 15:07:01 +0530311 regulator-name = "smps10_out2";
312 regulator-min-microvolt = <5000000>;
313 regulator-max-microvolt = <5000000>;
314 regulator-always-on;
315 regulator-boot-on;
316 };
317
318 smps10_out1_reg: smps10_out1 {
319 /* VBUS_5V_OTG */
320 regulator-name = "smps10_out1";
J Keerthye00c27e2013-06-13 10:00:11 +0530321 regulator-min-microvolt = <5000000>;
322 regulator-max-microvolt = <5000000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530323 };
324
325 ldo1_reg: ldo1 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500326 /* VDDAPHY_CAM: vdda_csiport */
J Keerthye00c27e2013-06-13 10:00:11 +0530327 regulator-name = "ldo1";
Nishanth Menone18235a2013-07-29 12:03:02 -0500328 regulator-min-microvolt = <1500000>;
329 regulator-max-microvolt = <1800000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530330 };
331
332 ldo2_reg: ldo2 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500333 /* VCC_2V8_DISP: Does not go anywhere */
J Keerthye00c27e2013-06-13 10:00:11 +0530334 regulator-name = "ldo2";
Nishanth Menonbd3c5542013-07-29 12:03:03 -0500335 regulator-min-microvolt = <2800000>;
336 regulator-max-microvolt = <2800000>;
337 /* Unused */
338 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530339 };
340
341 ldo3_reg: ldo3 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500342 /* VDDAPHY_MDM: vdda_lli */
J Keerthye00c27e2013-06-13 10:00:11 +0530343 regulator-name = "ldo3";
Nishanth Menone18235a2013-07-29 12:03:02 -0500344 regulator-min-microvolt = <1500000>;
345 regulator-max-microvolt = <1500000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530346 regulator-boot-on;
Nishanth Menone18235a2013-07-29 12:03:02 -0500347 /* Only if Modem is used */
348 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530349 };
350
351 ldo4_reg: ldo4 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500352 /* VDDAPHY_DISP: vdda_dsiport/hdmi */
J Keerthye00c27e2013-06-13 10:00:11 +0530353 regulator-name = "ldo4";
Nishanth Menone18235a2013-07-29 12:03:02 -0500354 regulator-min-microvolt = <1500000>;
355 regulator-max-microvolt = <1800000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530356 };
357
358 ldo5_reg: ldo5 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500359 /* VDDA_1V8_PHY: usb/sata/hdmi.. */
J Keerthye00c27e2013-06-13 10:00:11 +0530360 regulator-name = "ldo5";
361 regulator-min-microvolt = <1800000>;
362 regulator-max-microvolt = <1800000>;
363 regulator-always-on;
364 regulator-boot-on;
365 };
366
367 ldo6_reg: ldo6 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500368 /* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
J Keerthye00c27e2013-06-13 10:00:11 +0530369 regulator-name = "ldo6";
Nishanth Menone18235a2013-07-29 12:03:02 -0500370 regulator-min-microvolt = <1200000>;
371 regulator-max-microvolt = <1200000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530372 regulator-always-on;
373 regulator-boot-on;
374 };
375
376 ldo7_reg: ldo7 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500377 /* VDD_VPP: vpp1 */
J Keerthye00c27e2013-06-13 10:00:11 +0530378 regulator-name = "ldo7";
Nishanth Menone18235a2013-07-29 12:03:02 -0500379 regulator-min-microvolt = <2000000>;
380 regulator-max-microvolt = <2000000>;
381 /* Only for efuse reprograming! */
382 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530383 };
384
385 ldo8_reg: ldo8 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500386 /* VDD_3v0: Does not go anywhere */
J Keerthye00c27e2013-06-13 10:00:11 +0530387 regulator-name = "ldo8";
Nishanth Menonbd3c5542013-07-29 12:03:03 -0500388 regulator-min-microvolt = <3000000>;
389 regulator-max-microvolt = <3000000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530390 regulator-boot-on;
Nishanth Menonbd3c5542013-07-29 12:03:03 -0500391 /* Unused */
392 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530393 };
394
395 ldo9_reg: ldo9 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500396 /* VCC_DV_SDIO: vdds_sdcard */
J Keerthye00c27e2013-06-13 10:00:11 +0530397 regulator-name = "ldo9";
398 regulator-min-microvolt = <1800000>;
Nishanth Menone18235a2013-07-29 12:03:02 -0500399 regulator-max-microvolt = <3000000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530400 regulator-boot-on;
401 };
402
403 ldoln_reg: ldoln {
Nishanth Menon3709d322013-07-29 12:03:01 -0500404 /* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
J Keerthye00c27e2013-06-13 10:00:11 +0530405 regulator-name = "ldoln";
406 regulator-min-microvolt = <1800000>;
407 regulator-max-microvolt = <1800000>;
408 regulator-always-on;
409 regulator-boot-on;
410 };
411
412 ldousb_reg: ldousb {
Nishanth Menon3709d322013-07-29 12:03:01 -0500413 /* VDDA_3V_USB: VDDA_USBHS33 */
J Keerthye00c27e2013-06-13 10:00:11 +0530414 regulator-name = "ldousb";
415 regulator-min-microvolt = <3250000>;
416 regulator-max-microvolt = <3250000>;
417 regulator-always-on;
418 regulator-boot-on;
419 };
Nishanth Menone18235a2013-07-29 12:03:02 -0500420
421 regen3_reg: regen3 {
422 /* REGEN3 controls LDO9 supply to card */
423 regulator-name = "regen3";
424 regulator-always-on;
425 regulator-boot-on;
426 };
J Keerthye00c27e2013-06-13 10:00:11 +0530427 };
428 };
429 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530430};
431
Sourav Poddar9be495c2013-02-13 14:58:22 +0530432&i2c5 {
433 pinctrl-names = "default";
434 pinctrl-0 = <&i2c5_pins>;
435
436 clock-frequency = <400000>;
437};
438
Peter Ujfalusi42601d52012-10-04 14:57:24 +0300439&mcbsp3 {
440 status = "disabled";
441};
Lokesh Vutla4d2750f2012-11-05 18:22:52 +0530442
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530443&usbhshost {
444 port2-mode = "ehci-hsic";
445 port3-mode = "ehci-hsic";
446};
447
448&usbhsehci {
449 phys = <0 &hsusb2_phy &hsusb3_phy>;
450};
451
Felipe Balbie3a412c2013-08-21 20:01:32 +0530452&usb3 {
453 extcon = <&extcon_usb3>;
454 vbus-supply = <&smps10_out1_reg>;
455};
456
Sourav Poddar392adaf2013-02-13 14:58:44 +0530457&mcspi1 {
458
459};
460
461&mcspi2 {
462 pinctrl-names = "default";
463 pinctrl-0 = <&mcspi2_pins>;
464};
465
466&mcspi3 {
467 pinctrl-names = "default";
468 pinctrl-0 = <&mcspi3_pins>;
469};
470
471&mcspi4 {
472 pinctrl-names = "default";
473 pinctrl-0 = <&mcspi4_pins>;
474};
Sourav Poddared22fee2013-06-07 18:52:50 +0530475
476&uart1 {
477 pinctrl-names = "default";
478 pinctrl-0 = <&uart1_pins>;
479};
480
481&uart3 {
482 pinctrl-names = "default";
483 pinctrl-0 = <&uart3_pins>;
484};
485
486&uart5 {
487 pinctrl-names = "default";
488 pinctrl-0 = <&uart5_pins>;
489};
Nishanth Menonb8981d72013-10-16 10:39:04 -0500490
491&cpu0 {
492 cpu0-supply = <&smps123_reg>;
493};