Banajit Goswami | b016de9 | 2017-02-15 21:02:30 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. |
Kyle Yan | 679cbee | 2016-07-27 16:55:20 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | &soc { |
Channagoud Kadabi | f777fde | 2017-03-07 14:21:25 -0800 | [diff] [blame] | 14 | tlmm: pinctrl@03800000 { |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 15 | compatible = "qcom,sdm845-pinctrl"; |
Kyle Yan | 679cbee | 2016-07-27 16:55:20 -0700 | [diff] [blame] | 16 | reg = <0x03800000 0xc00000>; |
| 17 | interrupts = <0 208 0>; |
| 18 | gpio-controller; |
| 19 | #gpio-cells = <2>; |
| 20 | interrupt-controller; |
| 21 | #interrupt-cells = <2>; |
Banajit Goswami | b016de9 | 2017-02-15 21:02:30 -0800 | [diff] [blame] | 22 | |
| 23 | wcd9xxx_intr { |
| 24 | wcd_intr_default: wcd_intr_default{ |
| 25 | mux { |
| 26 | pins = "gpio54"; |
| 27 | function = "gpio"; |
| 28 | }; |
| 29 | |
| 30 | config { |
| 31 | pins = "gpio54"; |
| 32 | drive-strength = <2>; /* 2 mA */ |
| 33 | bias-pull-down; /* pull down */ |
| 34 | input-enable; |
| 35 | }; |
| 36 | }; |
| 37 | }; |
| 38 | |
| 39 | cdc_reset_ctrl { |
| 40 | cdc_reset_sleep: cdc_reset_sleep { |
| 41 | mux { |
| 42 | pins = "gpio64"; |
| 43 | function = "gpio"; |
| 44 | }; |
| 45 | config { |
| 46 | pins = "gpio64"; |
| 47 | drive-strength = <2>; |
| 48 | bias-disable; |
| 49 | output-low; |
| 50 | }; |
| 51 | }; |
| 52 | |
| 53 | cdc_reset_active:cdc_reset_active { |
| 54 | mux { |
| 55 | pins = "gpio64"; |
| 56 | function = "gpio"; |
| 57 | }; |
| 58 | config { |
| 59 | pins = "gpio64"; |
| 60 | drive-strength = <8>; |
| 61 | bias-pull-down; |
| 62 | output-high; |
| 63 | }; |
| 64 | }; |
| 65 | }; |
| 66 | |
| 67 | spkr_i2s_clk_pin { |
| 68 | spkr_i2s_clk_sleep: spkr_i2s_clk_sleep { |
| 69 | mux { |
| 70 | pins = "gpio69"; |
| 71 | function = "spkr_i2s"; |
| 72 | }; |
| 73 | |
| 74 | config { |
| 75 | pins = "gpio69"; |
| 76 | drive-strength = <2>; /* 2 mA */ |
| 77 | bias-pull-down; /* PULL DOWN */ |
| 78 | }; |
| 79 | }; |
| 80 | |
| 81 | spkr_i2s_clk_active: spkr_i2s_clk_active { |
| 82 | mux { |
| 83 | pins = "gpio69"; |
| 84 | function = "spkr_i2s"; |
| 85 | }; |
| 86 | |
| 87 | config { |
| 88 | pins = "gpio69"; |
| 89 | drive-strength = <8>; /* 8 mA */ |
| 90 | bias-disable; /* NO PULL */ |
| 91 | }; |
| 92 | }; |
| 93 | }; |
| 94 | |
| 95 | wcd_gnd_mic_swap { |
| 96 | wcd_gnd_mic_swap_idle: wcd_gnd_mic_swap_idle { |
| 97 | mux { |
| 98 | pins = "gpio51"; |
| 99 | function = "gpio"; |
| 100 | }; |
| 101 | config { |
| 102 | pins = "gpio51"; |
| 103 | drive-strength = <2>; |
| 104 | bias-pull-down; |
| 105 | output-low; |
| 106 | }; |
| 107 | }; |
| 108 | |
| 109 | wcd_gnd_mic_swap_active: wcd_gnd_mic_swap_active { |
| 110 | mux { |
| 111 | pins = "gpio51"; |
| 112 | function = "gpio"; |
| 113 | }; |
| 114 | config { |
| 115 | pins = "gpio51"; |
| 116 | drive-strength = <2>; |
| 117 | bias-disable; |
| 118 | output-high; |
| 119 | }; |
| 120 | }; |
| 121 | }; |
| 122 | |
| 123 | pri_aux_pcm_clk { |
| 124 | pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep { |
| 125 | mux { |
| 126 | pins = "gpio65"; |
| 127 | function = "gpio"; |
| 128 | }; |
| 129 | |
| 130 | config { |
| 131 | pins = "gpio65"; |
| 132 | drive-strength = <2>; /* 2 mA */ |
| 133 | bias-pull-down; /* PULL DOWN */ |
| 134 | input-enable; |
| 135 | }; |
| 136 | }; |
| 137 | |
| 138 | pri_aux_pcm_clk_active: pri_aux_pcm_clk_active { |
| 139 | mux { |
| 140 | pins = "gpio65"; |
| 141 | function = "pri_mi2s"; |
| 142 | }; |
| 143 | |
| 144 | config { |
| 145 | pins = "gpio65"; |
| 146 | drive-strength = <8>; /* 8 mA */ |
| 147 | bias-disable; /* NO PULL */ |
| 148 | output-high; |
| 149 | }; |
| 150 | }; |
| 151 | }; |
| 152 | |
| 153 | pri_aux_pcm_sync { |
| 154 | pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep { |
| 155 | mux { |
| 156 | pins = "gpio66"; |
| 157 | function = "gpio"; |
| 158 | }; |
| 159 | |
| 160 | config { |
| 161 | pins = "gpio66"; |
| 162 | drive-strength = <2>; /* 2 mA */ |
| 163 | bias-pull-down; /* PULL DOWN */ |
| 164 | input-enable; |
| 165 | }; |
| 166 | }; |
| 167 | |
| 168 | pri_aux_pcm_sync_active: pri_aux_pcm_sync_active { |
| 169 | mux { |
| 170 | pins = "gpio66"; |
| 171 | function = "pri_mi2s_ws"; |
| 172 | }; |
| 173 | |
| 174 | config { |
| 175 | pins = "gpio66"; |
| 176 | drive-strength = <8>; /* 8 mA */ |
| 177 | bias-disable; /* NO PULL */ |
| 178 | output-high; |
| 179 | }; |
| 180 | }; |
| 181 | }; |
| 182 | |
| 183 | pri_aux_pcm_din { |
| 184 | pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep { |
| 185 | mux { |
| 186 | pins = "gpio67"; |
| 187 | function = "gpio"; |
| 188 | }; |
| 189 | |
| 190 | config { |
| 191 | pins = "gpio67"; |
| 192 | drive-strength = <2>; /* 2 mA */ |
| 193 | bias-pull-down; /* PULL DOWN */ |
| 194 | input-enable; |
| 195 | }; |
| 196 | }; |
| 197 | |
| 198 | pri_aux_pcm_din_active: pri_aux_pcm_din_active { |
| 199 | mux { |
| 200 | pins = "gpio67"; |
| 201 | function = "pri_mi2s"; |
| 202 | }; |
| 203 | |
| 204 | config { |
| 205 | pins = "gpio67"; |
| 206 | drive-strength = <8>; /* 8 mA */ |
| 207 | bias-disable; /* NO PULL */ |
| 208 | }; |
| 209 | }; |
| 210 | }; |
| 211 | |
| 212 | pri_aux_pcm_dout { |
| 213 | pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep { |
| 214 | mux { |
| 215 | pins = "gpio68"; |
| 216 | function = "gpio"; |
| 217 | }; |
| 218 | |
| 219 | config { |
| 220 | pins = "gpio68"; |
| 221 | drive-strength = <2>; /* 2 mA */ |
| 222 | bias-pull-down; /* PULL DOWN */ |
| 223 | input-enable; |
| 224 | }; |
| 225 | }; |
| 226 | |
| 227 | pri_aux_pcm_dout_active: pri_aux_pcm_dout_active { |
| 228 | mux { |
| 229 | pins = "gpio68"; |
| 230 | function = "pri_mi2s"; |
| 231 | }; |
| 232 | |
| 233 | config { |
| 234 | pins = "gpio68"; |
| 235 | drive-strength = <8>; /* 8 mA */ |
| 236 | bias-disable; /* NO PULL */ |
| 237 | }; |
| 238 | }; |
| 239 | }; |
| 240 | |
Shashank Babu Chinta Venkata | 2f40bc7 | 2017-03-21 15:31:38 -0700 | [diff] [blame^] | 241 | pmx_sde: pmx_sde { |
| 242 | sde_dsi_active: sde_dsi_active { |
| 243 | mux { |
| 244 | pins = "gpio6", "gpio52"; |
| 245 | function = "gpio"; |
| 246 | }; |
| 247 | |
| 248 | config { |
| 249 | pins = "gpio6", "gpio52"; |
| 250 | drive-strength = <8>; /* 8 mA */ |
| 251 | bias-disable = <0>; /* no pull */ |
| 252 | }; |
| 253 | }; |
| 254 | sde_dsi_suspend: sde_dsi_suspend { |
| 255 | mux { |
| 256 | pins = "gpio6", "gpio52"; |
| 257 | function = "gpio"; |
| 258 | }; |
| 259 | |
| 260 | config { |
| 261 | pins = "gpio6", "gpio52"; |
| 262 | drive-strength = <2>; /* 2 mA */ |
| 263 | bias-pull-down; /* PULL DOWN */ |
| 264 | }; |
| 265 | }; |
| 266 | }; |
| 267 | |
| 268 | pmx_sde_te { |
| 269 | sde_te_active: sde_te_active { |
| 270 | mux { |
| 271 | pins = "gpio10"; |
| 272 | function = "mdp_vsync"; |
| 273 | }; |
| 274 | |
| 275 | config { |
| 276 | pins = "gpio10"; |
| 277 | drive-strength = <2>; /* 2 mA */ |
| 278 | bias-pull-down; /* PULL DOWN */ |
| 279 | }; |
| 280 | }; |
| 281 | |
| 282 | sde_te_suspend: sde_te_suspend { |
| 283 | mux { |
| 284 | pins = "gpio10"; |
| 285 | function = "mdp_vsync"; |
| 286 | }; |
| 287 | |
| 288 | config { |
| 289 | pins = "gpio10"; |
| 290 | drive-strength = <2>; /* 2 mA */ |
| 291 | bias-pull-down; /* PULL DOWN */ |
| 292 | }; |
| 293 | }; |
| 294 | }; |
| 295 | |
Banajit Goswami | b016de9 | 2017-02-15 21:02:30 -0800 | [diff] [blame] | 296 | sec_aux_pcm { |
| 297 | sec_aux_pcm_sleep: sec_aux_pcm_sleep { |
| 298 | mux { |
| 299 | pins = "gpio80", "gpio81"; |
| 300 | function = "gpio"; |
| 301 | }; |
| 302 | |
| 303 | config { |
| 304 | pins = "gpio80", "gpio81"; |
| 305 | drive-strength = <2>; /* 2 mA */ |
| 306 | bias-pull-down; /* PULL DOWN */ |
| 307 | input-enable; |
| 308 | }; |
| 309 | }; |
| 310 | |
| 311 | sec_aux_pcm_active: sec_aux_pcm_active { |
| 312 | mux { |
| 313 | pins = "gpio80", "gpio81"; |
| 314 | function = "sec_mi2s"; |
| 315 | }; |
| 316 | |
| 317 | config { |
| 318 | pins = "gpio80", "gpio81"; |
| 319 | drive-strength = <8>; /* 8 mA */ |
| 320 | bias-disable; /* NO PULL */ |
| 321 | }; |
| 322 | }; |
| 323 | }; |
| 324 | |
| 325 | sec_aux_pcm_din { |
| 326 | sec_aux_pcm_din_sleep: sec_aux_pcm_din_sleep { |
| 327 | mux { |
| 328 | pins = "gpio82"; |
| 329 | function = "gpio"; |
| 330 | }; |
| 331 | |
| 332 | config { |
| 333 | pins = "gpio82"; |
| 334 | drive-strength = <2>; /* 2 mA */ |
| 335 | bias-pull-down; /* PULL DOWN */ |
| 336 | input-enable; |
| 337 | }; |
| 338 | }; |
| 339 | |
| 340 | sec_aux_pcm_din_active: sec_aux_pcm_din_active { |
| 341 | mux { |
| 342 | pins = "gpio82"; |
| 343 | function = "sec_mi2s"; |
| 344 | }; |
| 345 | |
| 346 | config { |
| 347 | pins = "gpio82"; |
| 348 | drive-strength = <8>; /* 8 mA */ |
| 349 | bias-disable; /* NO PULL */ |
| 350 | }; |
| 351 | }; |
| 352 | }; |
| 353 | |
| 354 | sec_aux_pcm_dout { |
| 355 | sec_aux_pcm_dout_sleep: sec_aux_pcm_dout_sleep { |
| 356 | mux { |
| 357 | pins = "gpio83"; |
| 358 | function = "gpio"; |
| 359 | }; |
| 360 | |
| 361 | config { |
| 362 | pins = "gpio83"; |
| 363 | drive-strength = <2>; /* 2 mA */ |
| 364 | bias-pull-down; /* PULL DOWN */ |
| 365 | input-enable; |
| 366 | }; |
| 367 | }; |
| 368 | |
| 369 | sec_aux_pcm_dout_active: sec_aux_pcm_dout_active { |
| 370 | mux { |
| 371 | pins = "gpio83"; |
| 372 | function = "sec_mi2s"; |
| 373 | }; |
| 374 | |
| 375 | config { |
| 376 | pins = "gpio83"; |
| 377 | drive-strength = <8>; /* 8 mA */ |
| 378 | bias-disable; /* NO PULL */ |
| 379 | }; |
| 380 | }; |
| 381 | }; |
| 382 | |
| 383 | tert_aux_pcm { |
| 384 | tert_aux_pcm_sleep: tert_aux_pcm_sleep { |
| 385 | mux { |
| 386 | pins = "gpio75", "gpio76"; |
| 387 | function = "gpio"; |
| 388 | }; |
| 389 | |
| 390 | config { |
| 391 | pins = "gpio75", "gpio76"; |
| 392 | drive-strength = <2>; /* 2 mA */ |
| 393 | bias-pull-down; /* PULL DOWN */ |
| 394 | input-enable; |
| 395 | }; |
| 396 | }; |
| 397 | |
| 398 | tert_aux_pcm_active: tert_aux_pcm_active { |
| 399 | mux { |
| 400 | pins = "gpio75", "gpio76"; |
| 401 | function = "ter_mi2s"; |
| 402 | }; |
| 403 | |
| 404 | config { |
| 405 | pins = "gpio75", "gpio76"; |
| 406 | drive-strength = <8>; /* 8 mA */ |
| 407 | bias-disable; /* NO PULL */ |
| 408 | output-high; |
| 409 | }; |
| 410 | }; |
| 411 | }; |
| 412 | |
| 413 | tert_aux_pcm_din { |
| 414 | tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep { |
| 415 | mux { |
| 416 | pins = "gpio77"; |
| 417 | function = "gpio"; |
| 418 | }; |
| 419 | |
| 420 | config { |
| 421 | pins = "gpio77"; |
| 422 | drive-strength = <2>; /* 2 mA */ |
| 423 | bias-pull-down; /* PULL DOWN */ |
| 424 | input-enable; |
| 425 | }; |
| 426 | }; |
| 427 | |
| 428 | tert_aux_pcm_din_active: tert_aux_pcm_din_active { |
| 429 | mux { |
| 430 | pins = "gpio77"; |
| 431 | function = "ter_mi2s"; |
| 432 | }; |
| 433 | |
| 434 | config { |
| 435 | pins = "gpio77"; |
| 436 | drive-strength = <8>; /* 8 mA */ |
| 437 | bias-disable; /* NO PULL */ |
| 438 | }; |
| 439 | }; |
| 440 | }; |
| 441 | |
| 442 | tert_aux_pcm_dout { |
| 443 | tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep { |
| 444 | mux { |
| 445 | pins = "gpio78"; |
| 446 | function = "gpio"; |
| 447 | }; |
| 448 | |
| 449 | config { |
| 450 | pins = "gpio78"; |
| 451 | drive-strength = <2>; /* 2 mA */ |
| 452 | bias-pull-down; /* PULL DOWN */ |
| 453 | input-enable; |
| 454 | }; |
| 455 | }; |
| 456 | |
| 457 | tert_aux_pcm_dout_active: tert_aux_pcm_dout_active { |
| 458 | mux { |
| 459 | pins = "gpio78"; |
| 460 | function = "ter_mi2s"; |
| 461 | }; |
| 462 | |
| 463 | config { |
| 464 | pins = "gpio78"; |
| 465 | drive-strength = <8>; /* 8 mA */ |
| 466 | bias-disable; /* NO PULL */ |
| 467 | }; |
| 468 | }; |
| 469 | }; |
| 470 | |
| 471 | quat_aux_pcm { |
| 472 | quat_aux_pcm_sleep: quat_aux_pcm_sleep { |
| 473 | mux { |
| 474 | pins = "gpio58", "gpio59"; |
| 475 | function = "gpio"; |
| 476 | }; |
| 477 | |
| 478 | config { |
| 479 | pins = "gpio58", "gpio59"; |
| 480 | drive-strength = <2>; /* 2 mA */ |
| 481 | bias-pull-down; /* PULL DOWN */ |
| 482 | input-enable; |
| 483 | }; |
| 484 | }; |
| 485 | |
| 486 | quat_aux_pcm_active: quat_aux_pcm_active { |
| 487 | mux { |
| 488 | pins = "gpio58", "gpio59"; |
| 489 | function = "qua_mi2s"; |
| 490 | }; |
| 491 | |
| 492 | config { |
| 493 | pins = "gpio58", "gpio59"; |
| 494 | drive-strength = <8>; /* 8 mA */ |
| 495 | bias-disable; /* NO PULL */ |
| 496 | output-high; |
| 497 | }; |
| 498 | }; |
| 499 | }; |
| 500 | |
| 501 | quat_aux_pcm_din { |
| 502 | quat_aux_pcm_din_sleep: quat_aux_pcm_din_sleep { |
| 503 | mux { |
| 504 | pins = "gpio60"; |
| 505 | function = "gpio"; |
| 506 | }; |
| 507 | |
| 508 | config { |
| 509 | pins = "gpio60"; |
| 510 | drive-strength = <2>; /* 2 mA */ |
| 511 | bias-pull-down; /* PULL DOWN */ |
| 512 | input-enable; |
| 513 | }; |
| 514 | }; |
| 515 | |
| 516 | quat_aux_pcm_din_active: quat_aux_pcm_din_active { |
| 517 | mux { |
| 518 | pins = "gpio60"; |
| 519 | function = "qua_mi2s"; |
| 520 | }; |
| 521 | |
| 522 | config { |
| 523 | pins = "gpio60"; |
| 524 | drive-strength = <8>; /* 8 mA */ |
| 525 | bias-disable; /* NO PULL */ |
| 526 | }; |
| 527 | }; |
| 528 | }; |
| 529 | |
| 530 | quat_aux_pcm_dout { |
| 531 | quat_aux_pcm_dout_sleep: quat_aux_pcm_dout_sleep { |
| 532 | mux { |
| 533 | pins = "gpio61"; |
| 534 | function = "gpio"; |
| 535 | }; |
| 536 | |
| 537 | config { |
| 538 | pins = "gpio61"; |
| 539 | drive-strength = <2>; /* 2 mA */ |
| 540 | bias-pull-down; /* PULL DOWN */ |
| 541 | input-enable; |
| 542 | }; |
| 543 | }; |
| 544 | |
| 545 | quat_aux_pcm_dout_active: quat_aux_pcm_dout_active { |
| 546 | mux { |
| 547 | pins = "gpio61"; |
| 548 | function = "qua_mi2s"; |
| 549 | }; |
| 550 | |
| 551 | config { |
| 552 | pins = "gpio61"; |
| 553 | drive-strength = <8>; /* 8 mA */ |
| 554 | bias-disable; /* NO PULL */ |
| 555 | }; |
| 556 | }; |
| 557 | }; |
| 558 | |
| 559 | pri_mi2s_mclk { |
| 560 | pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep { |
| 561 | mux { |
| 562 | pins = "gpio64"; |
| 563 | function = "gpio"; |
| 564 | }; |
| 565 | |
| 566 | config { |
| 567 | pins = "gpio64"; |
| 568 | drive-strength = <2>; /* 2 mA */ |
| 569 | bias-pull-down; /* PULL DOWN */ |
| 570 | input-enable; |
| 571 | }; |
| 572 | }; |
| 573 | |
| 574 | pri_mi2s_mclk_active: pri_mi2s_mclk_active { |
| 575 | mux { |
| 576 | pins = "gpio64"; |
| 577 | function = "pri_mi2s"; |
| 578 | }; |
| 579 | |
| 580 | config { |
| 581 | pins = "gpio64"; |
| 582 | drive-strength = <8>; /* 8 mA */ |
| 583 | bias-disable; /* NO PULL */ |
| 584 | output-high; |
| 585 | }; |
| 586 | }; |
| 587 | }; |
| 588 | |
| 589 | pri_mi2s_sck { |
| 590 | pri_mi2s_sck_sleep: pri_mi2s_sck_sleep { |
| 591 | mux { |
| 592 | pins = "gpio65"; |
| 593 | function = "gpio"; |
| 594 | }; |
| 595 | |
| 596 | config { |
| 597 | pins = "gpio65"; |
| 598 | drive-strength = <2>; /* 2 mA */ |
| 599 | bias-pull-down; /* PULL DOWN */ |
| 600 | input-enable; |
| 601 | }; |
| 602 | }; |
| 603 | |
| 604 | pri_mi2s_sck_active: pri_mi2s_sck_active { |
| 605 | mux { |
| 606 | pins = "gpio65"; |
| 607 | function = "pri_mi2s"; |
| 608 | }; |
| 609 | |
| 610 | config { |
| 611 | pins = "gpio65"; |
| 612 | drive-strength = <8>; /* 8 mA */ |
| 613 | bias-disable; /* NO PULL */ |
| 614 | output-high; |
| 615 | }; |
| 616 | }; |
| 617 | }; |
| 618 | |
| 619 | pri_mi2s_ws { |
| 620 | pri_mi2s_ws_sleep: pri_mi2s_ws_sleep { |
| 621 | mux { |
| 622 | pins = "gpio66"; |
| 623 | function = "gpio"; |
| 624 | }; |
| 625 | |
| 626 | config { |
| 627 | pins = "gpio66"; |
| 628 | drive-strength = <2>; /* 2 mA */ |
| 629 | bias-pull-down; /* PULL DOWN */ |
| 630 | input-enable; |
| 631 | }; |
| 632 | }; |
| 633 | |
| 634 | pri_mi2s_ws_active: pri_mi2s_ws_active { |
| 635 | mux { |
| 636 | pins = "gpio66"; |
| 637 | function = "pri_mi2s_ws"; |
| 638 | }; |
| 639 | |
| 640 | config { |
| 641 | pins = "gpio66"; |
| 642 | drive-strength = <8>; /* 8 mA */ |
| 643 | bias-disable; /* NO PULL */ |
| 644 | output-high; |
| 645 | }; |
| 646 | }; |
| 647 | }; |
| 648 | |
| 649 | pri_mi2s_sd0 { |
| 650 | pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep { |
| 651 | mux { |
| 652 | pins = "gpio67"; |
| 653 | function = "gpio"; |
| 654 | }; |
| 655 | |
| 656 | config { |
| 657 | pins = "gpio67"; |
| 658 | drive-strength = <2>; /* 2 mA */ |
| 659 | bias-pull-down; /* PULL DOWN */ |
| 660 | input-enable; |
| 661 | }; |
| 662 | }; |
| 663 | |
| 664 | pri_mi2s_sd0_active: pri_mi2s_sd0_active { |
| 665 | mux { |
| 666 | pins = "gpio67"; |
| 667 | function = "pri_mi2s"; |
| 668 | }; |
| 669 | |
| 670 | config { |
| 671 | pins = "gpio67"; |
| 672 | drive-strength = <8>; /* 8 mA */ |
| 673 | bias-disable; /* NO PULL */ |
| 674 | }; |
| 675 | }; |
| 676 | }; |
| 677 | |
| 678 | pri_mi2s_sd1 { |
| 679 | pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep { |
| 680 | mux { |
| 681 | pins = "gpio68"; |
| 682 | function = "gpio"; |
| 683 | }; |
| 684 | |
| 685 | config { |
| 686 | pins = "gpio68"; |
| 687 | drive-strength = <2>; /* 2 mA */ |
| 688 | bias-pull-down; /* PULL DOWN */ |
| 689 | input-enable; |
| 690 | }; |
| 691 | }; |
| 692 | |
| 693 | pri_mi2s_sd1_active: pri_mi2s_sd1_active { |
| 694 | mux { |
| 695 | pins = "gpio68"; |
| 696 | function = "pri_mi2s"; |
| 697 | }; |
| 698 | |
| 699 | config { |
| 700 | pins = "gpio68"; |
| 701 | drive-strength = <8>; /* 8 mA */ |
| 702 | bias-disable; /* NO PULL */ |
| 703 | }; |
| 704 | }; |
| 705 | }; |
| 706 | |
| 707 | sec_mi2s_mclk { |
| 708 | sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep { |
| 709 | mux { |
| 710 | pins = "gpio79"; |
| 711 | function = "gpio"; |
| 712 | }; |
| 713 | |
| 714 | config { |
| 715 | pins = "gpio79"; |
| 716 | drive-strength = <2>; /* 2 mA */ |
| 717 | bias-pull-down; /* PULL DOWN */ |
| 718 | input-enable; |
| 719 | }; |
| 720 | }; |
| 721 | |
| 722 | sec_mi2s_mclk_active: sec_mi2s_mclk_active { |
| 723 | mux { |
| 724 | pins = "gpio79"; |
| 725 | function = "sec_mi2s"; |
| 726 | }; |
| 727 | |
| 728 | config { |
| 729 | pins = "gpio79"; |
| 730 | drive-strength = <8>; /* 8 mA */ |
| 731 | bias-disable; /* NO PULL */ |
| 732 | }; |
| 733 | }; |
| 734 | }; |
| 735 | |
| 736 | sec_mi2s { |
| 737 | sec_mi2s_sleep: sec_mi2s_sleep { |
| 738 | mux { |
| 739 | pins = "gpio80", "gpio81"; |
| 740 | function = "gpio"; |
| 741 | }; |
| 742 | |
| 743 | config { |
| 744 | pins = "gpio80", "gpio81"; |
| 745 | drive-strength = <2>; /* 2 mA */ |
| 746 | bias-disable; /* NO PULL */ |
| 747 | input-enable; |
| 748 | }; |
| 749 | }; |
| 750 | |
| 751 | sec_mi2s_active: sec_mi2s_active { |
| 752 | mux { |
| 753 | pins = "gpio80", "gpio81"; |
| 754 | function = "sec_mi2s"; |
| 755 | }; |
| 756 | |
| 757 | config { |
| 758 | pins = "gpio80", "gpio81"; |
| 759 | drive-strength = <8>; /* 8 mA */ |
| 760 | bias-disable; /* NO PULL */ |
| 761 | }; |
| 762 | }; |
| 763 | }; |
| 764 | |
| 765 | sec_mi2s_sd0 { |
| 766 | sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep { |
| 767 | mux { |
| 768 | pins = "gpio82"; |
| 769 | function = "gpio"; |
| 770 | }; |
| 771 | |
| 772 | config { |
| 773 | pins = "gpio82"; |
| 774 | drive-strength = <2>; /* 2 mA */ |
| 775 | bias-pull-down; /* PULL DOWN */ |
| 776 | input-enable; |
| 777 | }; |
| 778 | }; |
| 779 | |
| 780 | sec_mi2s_sd0_active: sec_mi2s_sd0_active { |
| 781 | mux { |
| 782 | pins = "gpio82"; |
| 783 | function = "sec_mi2s"; |
| 784 | }; |
| 785 | |
| 786 | config { |
| 787 | pins = "gpio82"; |
| 788 | drive-strength = <8>; /* 8 mA */ |
| 789 | bias-disable; /* NO PULL */ |
| 790 | }; |
| 791 | }; |
| 792 | }; |
| 793 | |
| 794 | sec_mi2s_sd1 { |
| 795 | sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep { |
| 796 | mux { |
| 797 | pins = "gpio83"; |
| 798 | function = "gpio"; |
| 799 | }; |
| 800 | |
| 801 | config { |
| 802 | pins = "gpio83"; |
| 803 | drive-strength = <2>; /* 2 mA */ |
| 804 | bias-pull-down; /* PULL DOWN */ |
| 805 | input-enable; |
| 806 | }; |
| 807 | }; |
| 808 | |
| 809 | sec_mi2s_sd1_active: sec_mi2s_sd1_active { |
| 810 | mux { |
| 811 | pins = "gpio83"; |
| 812 | function = "sec_mi2s"; |
| 813 | }; |
| 814 | |
| 815 | config { |
| 816 | pins = "gpio83"; |
| 817 | drive-strength = <8>; /* 8 mA */ |
| 818 | bias-disable; /* NO PULL */ |
| 819 | }; |
| 820 | }; |
| 821 | }; |
| 822 | |
| 823 | tert_mi2s_mclk { |
| 824 | tert_mi2s_mclk_sleep: tert_mi2s_mclk_sleep { |
| 825 | mux { |
| 826 | pins = "gpio74"; |
| 827 | function = "gpio"; |
| 828 | }; |
| 829 | |
| 830 | config { |
| 831 | pins = "gpio74"; |
| 832 | drive-strength = <2>; /* 2 mA */ |
| 833 | bias-pull-down; /* PULL DOWN */ |
| 834 | input-enable; |
| 835 | }; |
| 836 | }; |
| 837 | |
| 838 | tert_mi2s_mclk_active: tert_mi2s_mclk_active { |
| 839 | mux { |
| 840 | pins = "gpio74"; |
| 841 | function = "ter_mi2s"; |
| 842 | }; |
| 843 | |
| 844 | config { |
| 845 | pins = "gpio74"; |
| 846 | drive-strength = <8>; /* 8 mA */ |
| 847 | bias-disable; /* NO PULL */ |
| 848 | }; |
| 849 | }; |
| 850 | }; |
| 851 | |
| 852 | tert_mi2s { |
| 853 | tert_mi2s_sleep: tert_mi2s_sleep { |
| 854 | mux { |
| 855 | pins = "gpio75", "gpio76"; |
| 856 | function = "gpio"; |
| 857 | }; |
| 858 | |
| 859 | config { |
| 860 | pins = "gpio75", "gpio76"; |
| 861 | drive-strength = <2>; /* 2 mA */ |
| 862 | bias-pull-down; /* PULL DOWN */ |
| 863 | input-enable; |
| 864 | }; |
| 865 | }; |
| 866 | |
| 867 | tert_mi2s_active: tert_mi2s_active { |
| 868 | mux { |
| 869 | pins = "gpio75", "gpio76"; |
| 870 | function = "ter_mi2s"; |
| 871 | }; |
| 872 | |
| 873 | config { |
| 874 | pins = "gpio75", "gpio76"; |
| 875 | drive-strength = <8>; /* 8 mA */ |
| 876 | bias-disable; /* NO PULL */ |
| 877 | output-high; |
| 878 | }; |
| 879 | }; |
| 880 | }; |
| 881 | |
| 882 | tert_mi2s_sd0 { |
| 883 | tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep { |
| 884 | mux { |
| 885 | pins = "gpio77"; |
| 886 | function = "gpio"; |
| 887 | }; |
| 888 | |
| 889 | config { |
| 890 | pins = "gpio77"; |
| 891 | drive-strength = <2>; /* 2 mA */ |
| 892 | bias-pull-down; /* PULL DOWN */ |
| 893 | input-enable; |
| 894 | }; |
| 895 | }; |
| 896 | |
| 897 | tert_mi2s_sd0_active: tert_mi2s_sd0_active { |
| 898 | mux { |
| 899 | pins = "gpio77"; |
| 900 | function = "ter_mi2s"; |
| 901 | }; |
| 902 | |
| 903 | config { |
| 904 | pins = "gpio77"; |
| 905 | drive-strength = <8>; /* 8 mA */ |
| 906 | bias-disable; /* NO PULL */ |
| 907 | }; |
| 908 | }; |
| 909 | }; |
| 910 | |
| 911 | tert_mi2s_sd1 { |
| 912 | tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep { |
| 913 | mux { |
| 914 | pins = "gpio78"; |
| 915 | function = "gpio"; |
| 916 | }; |
| 917 | |
| 918 | config { |
| 919 | pins = "gpio78"; |
| 920 | drive-strength = <2>; /* 2 mA */ |
| 921 | bias-pull-down; /* PULL DOWN */ |
| 922 | input-enable; |
| 923 | }; |
| 924 | }; |
| 925 | |
| 926 | tert_mi2s_sd1_active: tert_mi2s_sd1_active { |
| 927 | mux { |
| 928 | pins = "gpio78"; |
| 929 | function = "ter_mi2s"; |
| 930 | }; |
| 931 | |
| 932 | config { |
| 933 | pins = "gpio78"; |
| 934 | drive-strength = <8>; /* 8 mA */ |
| 935 | bias-disable; /* NO PULL */ |
| 936 | }; |
| 937 | }; |
| 938 | }; |
| 939 | |
| 940 | quat_mi2s_mclk { |
| 941 | quat_mi2s_mclk_sleep: quat_mi2s_mclk_sleep { |
| 942 | mux { |
| 943 | pins = "gpio57"; |
| 944 | function = "gpio"; |
| 945 | }; |
| 946 | |
| 947 | config { |
| 948 | pins = "gpio57"; |
| 949 | drive-strength = <2>; /* 2 mA */ |
| 950 | bias-pull-down; /* PULL DOWN */ |
| 951 | input-enable; |
| 952 | }; |
| 953 | }; |
| 954 | |
| 955 | quat_mi2s_mclk_active: quat_mi2s_mclk_active { |
| 956 | mux { |
| 957 | pins = "gpio57"; |
| 958 | function = "qua_mi2s"; |
| 959 | }; |
| 960 | |
| 961 | config { |
| 962 | pins = "gpio57"; |
| 963 | drive-strength = <8>; /* 8 mA */ |
| 964 | bias-disable; /* NO PULL */ |
| 965 | }; |
| 966 | }; |
| 967 | }; |
| 968 | |
| 969 | quat_mi2s { |
| 970 | quat_mi2s_sleep: quat_mi2s_sleep { |
| 971 | mux { |
| 972 | pins = "gpio58", "gpio59"; |
| 973 | function = "gpio"; |
| 974 | }; |
| 975 | |
| 976 | config { |
| 977 | pins = "gpio58", "gpio59"; |
| 978 | drive-strength = <2>; /* 2 mA */ |
| 979 | bias-pull-down; /* PULL DOWN */ |
| 980 | input-enable; |
| 981 | }; |
| 982 | }; |
| 983 | |
| 984 | quat_mi2s_active: quat_mi2s_active { |
| 985 | mux { |
| 986 | pins = "gpio58", "gpio59"; |
| 987 | function = "qua_mi2s"; |
| 988 | }; |
| 989 | |
| 990 | config { |
| 991 | pins = "gpio58", "gpio59"; |
| 992 | drive-strength = <8>; /* 8 mA */ |
| 993 | bias-disable; /* NO PULL */ |
| 994 | output-high; |
| 995 | }; |
| 996 | }; |
| 997 | }; |
| 998 | |
| 999 | quat_mi2s_sd0 { |
| 1000 | quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { |
| 1001 | mux { |
| 1002 | pins = "gpio60"; |
| 1003 | function = "gpio"; |
| 1004 | }; |
| 1005 | |
| 1006 | config { |
| 1007 | pins = "gpio60"; |
| 1008 | drive-strength = <2>; /* 2 mA */ |
| 1009 | bias-pull-down; /* PULL DOWN */ |
| 1010 | input-enable; |
| 1011 | }; |
| 1012 | }; |
| 1013 | |
| 1014 | quat_mi2s_sd0_active: quat_mi2s_sd0_active { |
| 1015 | mux { |
| 1016 | pins = "gpio60"; |
| 1017 | function = "qua_mi2s"; |
| 1018 | }; |
| 1019 | |
| 1020 | config { |
| 1021 | pins = "gpio60"; |
| 1022 | drive-strength = <8>; /* 8 mA */ |
| 1023 | bias-disable; /* NO PULL */ |
| 1024 | }; |
| 1025 | }; |
| 1026 | }; |
| 1027 | |
| 1028 | quat_mi2s_sd1 { |
| 1029 | quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { |
| 1030 | mux { |
| 1031 | pins = "gpio61"; |
| 1032 | function = "gpio"; |
| 1033 | }; |
| 1034 | |
| 1035 | config { |
| 1036 | pins = "gpio61"; |
| 1037 | drive-strength = <2>; /* 2 mA */ |
| 1038 | bias-pull-down; /* PULL DOWN */ |
| 1039 | input-enable; |
| 1040 | }; |
| 1041 | }; |
| 1042 | |
| 1043 | quat_mi2s_sd1_active: quat_mi2s_sd1_active { |
| 1044 | mux { |
| 1045 | pins = "gpio61"; |
| 1046 | function = "qua_mi2s"; |
| 1047 | }; |
| 1048 | |
| 1049 | config { |
| 1050 | pins = "gpio61"; |
| 1051 | drive-strength = <8>; /* 8 mA */ |
| 1052 | bias-disable; /* NO PULL */ |
| 1053 | }; |
| 1054 | }; |
| 1055 | }; |
| 1056 | |
| 1057 | quat_mi2s_sd2 { |
| 1058 | quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep { |
| 1059 | mux { |
| 1060 | pins = "gpio62"; |
| 1061 | function = "gpio"; |
| 1062 | }; |
| 1063 | |
| 1064 | config { |
| 1065 | pins = "gpio62"; |
| 1066 | drive-strength = <2>; /* 2 mA */ |
| 1067 | bias-pull-down; /* PULL DOWN */ |
| 1068 | input-enable; |
| 1069 | }; |
| 1070 | }; |
| 1071 | |
| 1072 | quat_mi2s_sd2_active: quat_mi2s_sd2_active { |
| 1073 | mux { |
| 1074 | pins = "gpio62"; |
| 1075 | function = "qua_mi2s"; |
| 1076 | }; |
| 1077 | |
| 1078 | config { |
| 1079 | pins = "gpio62"; |
| 1080 | drive-strength = <8>; /* 8 mA */ |
| 1081 | bias-disable; /* NO PULL */ |
| 1082 | }; |
| 1083 | }; |
| 1084 | }; |
| 1085 | |
| 1086 | quat_mi2s_sd3 { |
| 1087 | quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep { |
| 1088 | mux { |
| 1089 | pins = "gpio63"; |
| 1090 | function = "gpio"; |
| 1091 | }; |
| 1092 | |
| 1093 | config { |
| 1094 | pins = "gpio63"; |
| 1095 | drive-strength = <2>; /* 2 mA */ |
| 1096 | bias-pull-down; /* PULL DOWN */ |
| 1097 | input-enable; |
| 1098 | }; |
| 1099 | }; |
| 1100 | |
| 1101 | quat_mi2s_sd3_active: quat_mi2s_sd3_active { |
| 1102 | mux { |
| 1103 | pins = "gpio63"; |
| 1104 | function = "qua_mi2s"; |
| 1105 | }; |
| 1106 | |
| 1107 | config { |
| 1108 | pins = "gpio63"; |
| 1109 | drive-strength = <8>; /* 8 mA */ |
| 1110 | bias-disable; /* NO PULL */ |
| 1111 | }; |
| 1112 | }; |
| 1113 | }; |
Kyle Yan | 679cbee | 2016-07-27 16:55:20 -0700 | [diff] [blame] | 1114 | }; |
| 1115 | }; |