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Bellido Nicolas038c5b62005-06-20 18:51:05 +01001/*
2 * linux/arch/arm/mach-aaec2000/core.c
3 *
4 * Code common to all AAEC-2000 machines
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/config.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010016#include <linux/platform_device.h>
Bellido Nicolas038c5b62005-06-20 18:51:05 +010017#include <linux/list.h>
18#include <linux/errno.h>
Bellido Nicolas049eb322005-10-28 16:51:44 +010019#include <linux/dma-mapping.h>
Bellido Nicolas038c5b62005-06-20 18:51:05 +010020#include <linux/interrupt.h>
21#include <linux/timex.h>
22#include <linux/signal.h>
23
24#include <asm/hardware.h>
25#include <asm/irq.h>
Bellido Nicolas049eb322005-10-28 16:51:44 +010026#include <asm/sizes.h>
Bellido Nicolas038c5b62005-06-20 18:51:05 +010027
Bellido Nicolas4a91ca22005-10-28 16:51:42 +010028#include <asm/mach/flash.h>
Bellido Nicolas038c5b62005-06-20 18:51:05 +010029#include <asm/mach/irq.h>
30#include <asm/mach/time.h>
31#include <asm/mach/map.h>
32
Bellido Nicolas049eb322005-10-28 16:51:44 +010033#include "core.h"
34#include "clock.h"
35
Bellido Nicolas038c5b62005-06-20 18:51:05 +010036/*
37 * Common I/O mapping:
38 *
39 * Static virtual address mappings are as follow:
40 *
41 * 0xf8000000-0xf8001ffff: Devices connected to APB bus
42 * 0xf8002000-0xf8003ffff: Devices connected to AHB bus
43 *
44 * Below 0xe8000000 is reserved for vm allocation.
45 *
46 * The machine specific code must provide the extra mapping beside the
47 * default mapping provided here.
48 */
49static struct map_desc standard_io_desc[] __initdata = {
Deepak Saxenaf70cd652005-10-28 15:18:56 +010050 {
51 .virtual = VIO_APB_BASE,
Bellido Nicolas16b6dd42006-05-07 22:49:21 +010052 .pfn = __phys_to_pfn(PIO_APB_BASE),
Deepak Saxenaf70cd652005-10-28 15:18:56 +010053 .length = IO_APB_LENGTH,
54 .type = MT_DEVICE
55 }, {
56 .virtual = VIO_AHB_BASE,
Bellido Nicolas16b6dd42006-05-07 22:49:21 +010057 .pfn = __phys_to_pfn(PIO_AHB_BASE),
Deepak Saxenaf70cd652005-10-28 15:18:56 +010058 .length = IO_AHB_LENGTH,
59 .type = MT_DEVICE
60 }
Bellido Nicolas038c5b62005-06-20 18:51:05 +010061};
62
63void __init aaec2000_map_io(void)
64{
65 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
66}
67
68/*
69 * Interrupt handling routines
70 */
71static void aaec2000_int_ack(unsigned int irq)
72{
73 IRQ_INTSR = 1 << irq;
74}
75
76static void aaec2000_int_mask(unsigned int irq)
77{
78 IRQ_INTENC |= (1 << irq);
79}
80
81static void aaec2000_int_unmask(unsigned int irq)
82{
83 IRQ_INTENS |= (1 << irq);
84}
85
86static struct irqchip aaec2000_irq_chip = {
87 .ack = aaec2000_int_ack,
88 .mask = aaec2000_int_mask,
89 .unmask = aaec2000_int_unmask,
90};
91
92void __init aaec2000_init_irq(void)
93{
94 unsigned int i;
95
96 for (i = 0; i < NR_IRQS; i++) {
97 set_irq_handler(i, do_level_IRQ);
98 set_irq_chip(i, &aaec2000_irq_chip);
99 set_irq_flags(i, IRQF_VALID);
100 }
101
102 /* Disable all interrupts */
103 IRQ_INTENC = 0xffffffff;
104
105 /* Clear any pending interrupts */
106 IRQ_INTSR = IRQ_INTSR;
107}
108
109/*
110 * Time keeping
111 */
112/* IRQs are disabled before entering here from do_gettimeofday() */
113static unsigned long aaec2000_gettimeoffset(void)
114{
115 unsigned long ticks_to_match, elapsed, usec;
116
117 /* Get ticks before next timer match */
118 ticks_to_match = TIMER1_LOAD - TIMER1_VAL;
119
120 /* We need elapsed ticks since last match */
121 elapsed = LATCH - ticks_to_match;
122
123 /* Now, convert them to usec */
124 usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
125
126 return usec;
127}
128
129/* We enter here with IRQs enabled */
130static irqreturn_t
131aaec2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
132{
133 /* TODO: Check timer accuracy */
134 write_seqlock(&xtime_lock);
135
136 timer_tick(regs);
137 TIMER1_CLEAR = 1;
138
139 write_sequnlock(&xtime_lock);
140
141 return IRQ_HANDLED;
142}
143
144static struct irqaction aaec2000_timer_irq = {
145 .name = "AAEC-2000 Timer Tick",
Russell King09b8b5f2005-06-26 17:06:36 +0100146 .flags = SA_INTERRUPT | SA_TIMER,
147 .handler = aaec2000_timer_interrupt,
Bellido Nicolas038c5b62005-06-20 18:51:05 +0100148};
149
150static void __init aaec2000_timer_init(void)
151{
152 /* Disable timer 1 */
153 TIMER1_CTRL = 0;
154
155 /* We have somehow to generate a 100Hz clock.
156 * We then use the 508KHz timer in periodic mode.
157 */
158 TIMER1_LOAD = LATCH;
159 TIMER1_CLEAR = 1; /* Clear interrupt */
160
161 setup_irq(INT_TMR1_OFL, &aaec2000_timer_irq);
162
163 TIMER1_CTRL = TIMER_CTRL_ENABLE |
164 TIMER_CTRL_PERIODIC |
165 TIMER_CTRL_CLKSEL_508K;
166}
167
168struct sys_timer aaec2000_timer = {
169 .init = aaec2000_timer_init,
170 .offset = aaec2000_gettimeoffset,
171};
172
Bellido Nicolas049eb322005-10-28 16:51:44 +0100173static struct clcd_panel mach_clcd_panel;
174
175static int aaec2000_clcd_setup(struct clcd_fb *fb)
176{
177 dma_addr_t dma;
178
179 fb->panel = &mach_clcd_panel;
180
181 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, SZ_1M,
182 &dma, GFP_KERNEL);
183
184 if (!fb->fb.screen_base) {
185 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
186 return -ENOMEM;
187 }
188
189 fb->fb.fix.smem_start = dma;
190 fb->fb.fix.smem_len = SZ_1M;
191
192 return 0;
193}
194
195static int aaec2000_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
196{
197 return dma_mmap_writecombine(&fb->dev->dev, vma,
198 fb->fb.screen_base,
199 fb->fb.fix.smem_start,
200 fb->fb.fix.smem_len);
201}
202
203static void aaec2000_clcd_remove(struct clcd_fb *fb)
204{
205 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
206 fb->fb.screen_base, fb->fb.fix.smem_start);
207}
208
209static struct clcd_board clcd_plat_data = {
210 .name = "AAEC-2000",
211 .check = clcdfb_check,
212 .decode = clcdfb_decode,
213 .setup = aaec2000_clcd_setup,
214 .mmap = aaec2000_clcd_mmap,
215 .remove = aaec2000_clcd_remove,
216};
217
218static struct amba_device clcd_device = {
219 .dev = {
220 .bus_id = "mb:16",
221 .coherent_dma_mask = ~0,
222 .platform_data = &clcd_plat_data,
223 },
224 .res = {
225 .start = AAEC_CLCD_PHYS,
226 .end = AAEC_CLCD_PHYS + SZ_4K - 1,
227 .flags = IORESOURCE_MEM,
228 },
229 .irq = { INT_LCD, NO_IRQ },
230 .periphid = 0x41110,
231};
232
233static struct amba_device *amba_devs[] __initdata = {
234 &clcd_device,
235};
236
237static struct clk aaec2000_clcd_clk = {
238 .name = "CLCDCLK",
239};
240
241void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd)
242{
243 clcd_plat_data.enable = clcd->enable;
244 clcd_plat_data.disable = clcd->disable;
245 memcpy(&mach_clcd_panel, &clcd->panel, sizeof(struct clcd_panel));
246}
247
Bellido Nicolas4a91ca22005-10-28 16:51:42 +0100248static struct flash_platform_data aaec2000_flash_data = {
249 .map_name = "cfi_probe",
250 .width = 4,
251};
252
253static struct resource aaec2000_flash_resource = {
254 .start = AAEC_FLASH_BASE,
255 .end = AAEC_FLASH_BASE + AAEC_FLASH_SIZE,
256 .flags = IORESOURCE_MEM,
257};
258
259static struct platform_device aaec2000_flash_device = {
260 .name = "armflash",
261 .id = 0,
262 .dev = {
263 .platform_data = &aaec2000_flash_data,
264 },
265 .num_resources = 1,
266 .resource = &aaec2000_flash_resource,
267};
268
269static int __init aaec2000_init(void)
270{
Bellido Nicolas049eb322005-10-28 16:51:44 +0100271 int i;
272
273 clk_register(&aaec2000_clcd_clk);
274
275 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
276 struct amba_device *d = amba_devs[i];
277 amba_device_register(d, &iomem_resource);
278 }
279
Bellido Nicolas4a91ca22005-10-28 16:51:42 +0100280 platform_device_register(&aaec2000_flash_device);
281
282 return 0;
283};
284arch_initcall(aaec2000_init);
285