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Narendra Muppalla1b0b3352015-09-29 10:16:51 -07001/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef __SDE_KMS_H__
14#define __SDE_KMS_H__
15
16#include "msm_drv.h"
17#include "msm_kms.h"
18#include "mdp/mdp_kms.h"
19#include "sde_hw_catalog.h"
Clarence Ipc475b082016-06-26 09:27:23 -040020#include "sde_hw_ctl.h"
Abhijit Kulkarni40e38162016-06-26 22:12:09 -040021#include "sde_hw_lm.h"
Ben Chan78647cd2016-06-26 22:02:47 -040022#include "sde_hw_interrupts.h"
23
Clarence Ip31c19b52016-06-10 15:42:08 -040024/**
25 * SDE_DEBUG - macro for kms/plane/crtc/encoder/connector logs
26 * @fmt: Pointer to format string
27 */
28#define SDE_DEBUG(fmt, ...) \
29 do { \
30 if (unlikely(drm_debug & DRM_UT_KMS)) \
31 drm_ut_debug_printk(__func__, fmt, ##__VA_ARGS__); \
32 else \
33 pr_debug(fmt, ##__VA_ARGS__); \
34 } while (0)
35
36/**
37 * SDE_DEBUG_DRIVER - macro for hardware driver logging
38 * @fmt: Pointer to format string
39 */
40#define SDE_DEBUG_DRIVER(fmt, ...) \
41 do { \
42 if (unlikely(drm_debug & DRM_UT_DRIVER)) \
43 drm_ut_debug_printk(__func__, fmt, ##__VA_ARGS__); \
44 else \
45 pr_debug(fmt, ##__VA_ARGS__); \
46 } while (0)
47
48#define SDE_ERROR(fmt, ...) pr_err(fmt, ##__VA_ARGS__)
49
Ben Chan78647cd2016-06-26 22:02:47 -040050/*
51 * struct sde_irq_callback - IRQ callback handlers
52 * @func: intr handler
53 * @arg: argument for the handler
54 */
55struct sde_irq_callback {
56 void (*func)(void *arg, int irq_idx);
57 void *arg;
58};
59
60/**
61 * struct sde_irq: IRQ structure contains callback registration info
62 * @total_irq: total number of irq_idx obtained from HW interrupts mapping
63 * @irq_cb_tbl: array of IRQ callbacks setting
64 * @cb_lock: callback lock
65 */
66struct sde_irq {
67 u32 total_irqs;
68 struct sde_irq_callback *irq_cb_tbl;
69 spinlock_t cb_lock;
70};
Narendra Muppalla1b0b3352015-09-29 10:16:51 -070071
Abhijit Kulkarni40e38162016-06-26 22:12:09 -040072/**
73 * struct sde_hw_res_map : Default resource table identifying default
74 * hw resource map. Primarily used for forcing DSI to use CTL_0/1
Lloyd Atkinsone5c2c0b2016-07-05 12:23:29 -040075 * and PingPong 0/1, if the field is set to SDE_NONE means any HW
76 * instance for that type is allowed as long as it is unused.
Abhijit Kulkarni40e38162016-06-26 22:12:09 -040077 */
78struct sde_hw_res_map {
79 enum sde_intf intf;
80 enum sde_lm lm;
81 enum sde_pingpong pp;
82 enum sde_ctl ctl;
83};
84
Lloyd Atkinsone5c2c0b2016-07-05 12:23:29 -040085/* struct sde_hw_resource_manager : Resource manager maintains the current
Abhijit Kulkarni7acb3262016-07-05 15:27:25 -040086 * default platform config and manages shared
Abhijit Kulkarni40e38162016-06-26 22:12:09 -040087 * hw resources ex:ctl_path hw driver context
88 * is needed by CRTCs/PLANEs/ENCODERs
89 * @ctl : table of control path hw driver contexts allocated
90 * @mixer : list of mixer hw drivers contexts allocated
91 * @intr : pointer to hw interrupt context
92 * @res_table : pointer to default hw_res table for this platform
93 * @feature_map :BIT map for default enabled features ex:specifies if PP_SPLIT
Lloyd Atkinsone5c2c0b2016-07-05 12:23:29 -040094 * is enabled/disabled by default for this platform
Abhijit Kulkarni40e38162016-06-26 22:12:09 -040095 */
96struct sde_hw_resource_manager {
97 struct sde_hw_ctl *ctl[CTL_MAX];
98 struct sde_hw_mixer *mixer[LM_MAX];
99 struct sde_hw_intr *intr;
100 const struct sde_hw_res_map *res_table;
101 bool feature_map;
102};
103
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700104struct sde_kms {
Ben Chan78647cd2016-06-26 22:02:47 -0400105 struct msm_kms base;
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700106 struct drm_device *dev;
107 int rev;
108 struct sde_mdss_cfg *catalog;
109
110 struct msm_mmu *mmu;
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400111 int mmu_id;
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700112
Clarence Ip4ce59322016-06-26 22:27:51 -0400113 /* directory entry for debugfs */
114 void *debugfs_root;
115
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700116 /* io/register spaces: */
117 void __iomem *mmio, *vbif;
118
119 struct regulator *vdd;
120 struct regulator *mmagic;
121 struct regulator *venus;
122
123 struct clk *axi_clk;
124 struct clk *ahb_clk;
125 struct clk *src_clk;
126 struct clk *core_clk;
127 struct clk *lut_clk;
128 struct clk *mmagic_clk;
129 struct clk *iommu_clk;
130 struct clk *vsync_clk;
131
132 struct {
133 unsigned long enabled_mask;
134 struct irq_domain *domain;
135 } irqcontroller;
Ben Chan78647cd2016-06-26 22:02:47 -0400136
137 struct sde_hw_intr *hw_intr;
138 struct sde_irq irq_obj;
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400139 struct sde_hw_resource_manager hw_res;
Ben Chan78647cd2016-06-26 22:02:47 -0400140};
141
142struct vsync_info {
143 u32 frame_count;
144 u32 line_count;
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700145};
146
147#define to_sde_kms(x) container_of(x, struct sde_kms, base)
148
149struct sde_plane_state {
150 struct drm_plane_state base;
151
152 /* aligned with property */
Clarence Ipe78efb72016-06-24 18:35:21 -0400153 uint64_t property_values[PLANE_PROP_COUNT];
154
155 /* blob properties */
156 struct drm_property_blob *property_blobs[PLANE_PROP_BLOBCOUNT];
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700157
Clarence Ipcae1bb62016-07-07 12:07:13 -0400158 /* dereferenced input fence pointer */
159 void *input_fence;
Clarence Ipae4e60c2016-06-26 22:44:04 -0400160
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700161 /* assigned by crtc blender */
162 enum sde_stage stage;
163
164 /* some additional transactional status to help us know in the
165 * apply path whether we need to update SMP allocation, and
166 * whether current update is still pending:
167 */
168 bool mode_changed : 1;
169 bool pending : 1;
170};
171
172#define to_sde_plane_state(x) \
Clarence Ip4c1d9772016-06-26 09:35:38 -0400173 container_of(x, struct sde_plane_state, base)
174
175/**
176 * sde_plane_get_property - Query integer value of plane property
177 *
178 * @S: Pointer to plane state
179 * @X: Property index, from enum msm_mdp_plane_property
180 *
181 * Return: Integer value of requested property
182 */
183#define sde_plane_get_property(S, X) \
184 ((S) && ((X) < PLANE_PROP_COUNT) ? ((S)->property_values[(X)]) : 0)
185
186/**
187 * sde_plane_get_property32 - Query 32-bit representation of plane property
188 *
189 * @S: Pointer to plane state
190 * @X: Property index, from enum msm_mdp_plane_property
191 *
192 * Return: 32-bit value of requested property
193 */
194#define sde_plane_get_property32(S, X) \
195 ((S) && ((X) < PLANE_PROP_COUNT) ? \
196 (uint32_t)((S)->property_values[(X)]) : 0)
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700197
198int sde_disable(struct sde_kms *sde_kms);
199int sde_enable(struct sde_kms *sde_kms);
200
Ben Chan78647cd2016-06-26 22:02:47 -0400201/**
Clarence Ip4ce59322016-06-26 22:27:51 -0400202 * Debugfs functions - extra helper functions for debugfs support
203 *
204 * Main debugfs documentation is located at,
205 *
206 * Documentation/filesystems/debugfs.txt
207 *
208 * @sde_debugfs_setup_regset32: Initialize data for sde_debugfs_create_regset32
209 * @sde_debugfs_create_regset32: Create 32-bit register dump file
210 * @sde_debugfs_get_root: Get root dentry for SDE_KMS's debugfs node
211 */
212
213/**
214 * Companion structure for sde_debugfs_create_regset32. Do not initialize the
215 * members of this structure explicitly; use sde_debugfs_setup_regset32 instead.
216 */
217struct sde_debugfs_regset32 {
218 uint32_t offset;
219 uint32_t blk_len;
220 void __iomem *base;
221};
222
223/**
224 * sde_debugfs_setup_regset32 - Initialize register block definition for debugfs
225 * This function is meant to initialize sde_debugfs_regset32 structures for use
226 * with sde_debugfs_create_regset32.
227 * @regset: opaque register definition structure
228 * @offset: sub-block offset
229 * @length: sub-block length, in bytes
230 * @base: base IOMEM address
231 */
232void sde_debugfs_setup_regset32(struct sde_debugfs_regset32 *regset,
233 uint32_t offset, uint32_t length, void __iomem *base);
234
235/**
236 * sde_debugfs_create_regset32 - Create register read back file for debugfs
237 *
238 * This function is almost identical to the standard debugfs_create_regset32()
239 * function, with the main difference being that a list of register
240 * names/offsets do not need to be provided. The 'read' function simply outputs
241 * sequential register values over a specified range.
242 *
243 * Similar to the related debugfs_create_regset32 API, the structure pointed to
244 * by regset needs to persist for the lifetime of the created file. The calling
245 * code is responsible for initialization/management of this structure.
246 *
247 * The structure pointed to by regset is meant to be opaque. Please use
248 * sde_debugfs_setup_regset32 to initialize it.
249 *
250 * @name: File name within debugfs
251 * @mode: File mode within debugfs
252 * @parent: Parent directory entry within debugfs, can be NULL
253 * @regset: Pointer to persistent register block definition
254 *
255 * Return: dentry pointer for newly created file, use either debugfs_remove()
256 * or debugfs_remove_recursive() (on a parent directory) to remove the
257 * file
258 */
259void *sde_debugfs_create_regset32(const char *name, umode_t mode,
260 void *parent, struct sde_debugfs_regset32 *regset);
261
262/**
263 * sde_debugfs_get_root - Return root directory entry for SDE's debugfs
264 *
265 * The return value should be passed as the 'parent' argument to subsequent
266 * debugfs create calls.
267 *
268 * @sde_kms: Pointer to SDE's KMS structure
269 *
270 * Return: dentry pointer for SDE's debugfs location
271 */
272void *sde_debugfs_get_root(struct sde_kms *sde_kms);
273
274/**
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400275 * HW resource manager functions
276 * @sde_rm_acquire_ctl_path : Allocates control path
277 * @sde_rm_get_ctl_path : returns control path driver context for already
278 * acquired ctl path
279 * @sde_rm_release_ctl_path : Frees control path driver context
280 * @sde_rm_acquire_mixer : Allocates mixer hw driver context
281 * @sde_rm_get_mixer : returns mixer context for already
282 * acquired mixer
283 * @sde_rm_release_mixer : Frees mixer hw driver context
Abhijit Kulkarni7acb3262016-07-05 15:27:25 -0400284 * @sde_rm_acquire_intr : Allocate hw intr context
285 * @sde_rm_get_intr : Returns already acquired intr context
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400286 * @sde_rm_get_hw_res_map : Returns map for the passed INTF
287 */
288struct sde_hw_ctl *sde_rm_acquire_ctl_path(struct sde_kms *sde_kms,
289 enum sde_ctl idx);
290struct sde_hw_ctl *sde_rm_get_ctl_path(struct sde_kms *sde_kms,
291 enum sde_ctl idx);
292void sde_rm_release_ctl_path(struct sde_kms *sde_kms,
293 enum sde_ctl idx);
294struct sde_hw_mixer *sde_rm_acquire_mixer(struct sde_kms *sde_kms,
295 enum sde_lm idx);
296struct sde_hw_mixer *sde_rm_get_mixer(struct sde_kms *sde_kms,
297 enum sde_lm idx);
298void sde_rm_release_mixer(struct sde_kms *sde_kms,
299 enum sde_lm idx);
300struct sde_hw_intr *sde_rm_acquire_intr(struct sde_kms *sde_kms);
301struct sde_hw_intr *sde_rm_get_intr(struct sde_kms *sde_kms);
302
303const struct sde_hw_res_map *sde_rm_get_res_map(struct sde_kms *sde_kms,
304 enum sde_intf idx);
305
306/**
Ben Chan78647cd2016-06-26 22:02:47 -0400307 * IRQ functions
308 */
309int sde_irq_domain_init(struct sde_kms *sde_kms);
310int sde_irq_domain_fini(struct sde_kms *sde_kms);
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700311void sde_irq_preinstall(struct msm_kms *kms);
312int sde_irq_postinstall(struct msm_kms *kms);
313void sde_irq_uninstall(struct msm_kms *kms);
314irqreturn_t sde_irq(struct msm_kms *kms);
Ben Chan78647cd2016-06-26 22:02:47 -0400315
316/**
317 * sde_set_irqmask - IRQ helper function for writing IRQ mask
318 * to SDE HW interrupt register.
319 * @sde_kms: SDE handle
320 * @reg_off: SDE HW interrupt register offset
321 * @irqmask: IRQ mask
322 */
323void sde_set_irqmask(
324 struct sde_kms *sde_kms,
325 uint32_t reg_off,
326 uint32_t irqmask);
327
328/**
329 * sde_irq_idx_lookup - IRQ helper function for lookup irq_idx from HW
330 * interrupt mapping table.
331 * @sde_kms: SDE handle
332 * @intr_type: SDE HW interrupt type for lookup
333 * @instance_idx: SDE HW block instance defined in sde_hw_mdss.h
334 * @return: irq_idx or -EINVAL when fail to lookup
335 */
336int sde_irq_idx_lookup(
337 struct sde_kms *sde_kms,
338 enum sde_intr_type intr_type,
339 uint32_t instance_idx);
340
341/**
342 * sde_enable_irq - IRQ helper function for enabling one or more IRQs
343 * @sde_kms: SDE handle
344 * @irq_idxs: Array of irq index
345 * @irq_count: Number of irq_idx provided in the array
346 * @return: 0 for success enabling IRQ, otherwise failure
347 */
348int sde_enable_irq(
349 struct sde_kms *sde_kms,
350 int *irq_idxs,
351 uint32_t irq_count);
352
353/**
354 * sde_disable_irq - IRQ helper function for diabling one of more IRQs
355 * @sde_kms: SDE handle
356 * @irq_idxs: Array of irq index
357 * @irq_count: Number of irq_idx provided in the array
358 * @return: 0 for success disabling IRQ, otherwise failure
359 */
360int sde_disable_irq(
361 struct sde_kms *sde_kms,
362 int *irq_idxs,
363 uint32_t irq_count);
364
365/**
366 * sde_register_irq_callback - For registering callback function on IRQ
367 * interrupt
368 * @sde_kms: SDE handle
369 * @irq_idx: irq index
370 * @irq_cb: IRQ callback structure, containing callback function
371 * and argument. Passing NULL for irq_cb will unregister
372 * the callback for the given irq_idx
373 * @return: 0 for success registering callback, otherwise failure
374 */
375int sde_register_irq_callback(
376 struct sde_kms *sde_kms,
377 int irq_idx,
378 struct sde_irq_callback *irq_cb);
379
380/**
381 * sde_clear_all_irqs - Clearing all SDE IRQ interrupt status
382 * @sde_kms: SDE handle
383 */
384void sde_clear_all_irqs(struct sde_kms *sde_kms);
385
386/**
387 * sde_disable_all_irqs - Diabling all SDE IRQ interrupt
388 * @sde_kms: SDE handle
389 */
390void sde_disable_all_irqs(struct sde_kms *sde_kms);
391
392/**
393 * Vblank enable/disable functions
394 */
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700395int sde_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
396void sde_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
397
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400398/**
399 * Plane functions
400 */
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700401enum sde_sspp sde_plane_pipe(struct drm_plane *plane);
Clarence Ipcae1bb62016-07-07 12:07:13 -0400402void sde_plane_flush(struct drm_plane *plane);
Clarence Ipdbde9832016-06-26 09:48:36 -0400403struct drm_plane *sde_plane_init(struct drm_device *dev,
404 uint32_t pipe, bool primary_plane);
Clarence Ip7a753bb2016-07-07 11:47:44 -0400405
406/**
Clarence Ipcae1bb62016-07-07 12:07:13 -0400407 * sde_plane_wait_input_fence - wait for input fence object
Clarence Ip7a753bb2016-07-07 11:47:44 -0400408 * @plane: Pointer to DRM plane object
409 * @wait_ms: Wait timeout value
410 * Returns: Zero on success
411 */
Clarence Ipcae1bb62016-07-07 12:07:13 -0400412int sde_plane_wait_input_fence(struct drm_plane *plane, uint32_t wait_ms);
Clarence Ipcb410d42016-06-26 22:52:33 -0400413
414/**
Clarence Ipcae1bb62016-07-07 12:07:13 -0400415 * sde_plane_color_fill - Enables color fill on plane
Clarence Ipcb410d42016-06-26 22:52:33 -0400416 * @plane: Pointer to DRM plane object
417 * @color: RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
418 * @alpha: 8-bit fill alpha value, 255 selects 100% alpha
419 *
420 * Returns: 0 on success
421 */
422int sde_plane_color_fill(struct drm_plane *plane,
423 uint32_t color, uint32_t alpha);
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700424
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400425/**
426 * CRTC functions
427 */
Abhijit Kulkarni7acb3262016-07-05 15:27:25 -0400428int sde_crtc_vblank(struct drm_crtc *crtc, bool en);
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400429void sde_crtc_wait_for_commit_done(struct drm_crtc *crtc);
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700430void sde_crtc_cancel_pending_flip(struct drm_crtc *crtc, struct drm_file *file);
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700431struct drm_crtc *sde_crtc_init(struct drm_device *dev,
432 struct drm_encoder *encoder,
433 struct drm_plane *plane, int id);
434
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400435/**
436 * Encoder functions and data types
437 */
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400438struct sde_encoder_hw_resources {
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400439 enum sde_intf_mode intfs[INTF_MAX];
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400440 bool pingpongs[PINGPONG_MAX];
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400441 bool ctls[CTL_MAX];
442 bool pingpongsplit;
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400443};
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400444
Abhijit Kulkarni3e3e0d22016-06-24 17:56:13 -0400445void sde_encoder_get_hw_resources(struct drm_encoder *encoder,
446 struct sde_encoder_hw_resources *hw_res);
447void sde_encoder_register_vblank_callback(struct drm_encoder *drm_enc,
448 void (*cb)(void *), void *data);
Lloyd Atkinsone5c2c0b2016-07-05 12:23:29 -0400449void sde_encoder_get_vblank_status(struct drm_encoder *encoder,
Abhijit Kulkarni40e38162016-06-26 22:12:09 -0400450 struct vsync_info *vsync);
Lloyd Atkinsone5c2c0b2016-07-05 12:23:29 -0400451void sde_encoders_init(struct drm_device *dev);
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700452
Narendra Muppalla1b0b3352015-09-29 10:16:51 -0700453
454#endif /* __sde_kms_H__ */