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Joonyoung Shim864ee9e2011-12-08 17:54:07 +09001/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
David Howells760285e2012-10-02 18:01:07 +010012#include <drm/drmP.h>
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090013
David Howells760285e2012-10-02 18:01:07 +010014#include <drm/exynos_drm.h>
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090015#include "exynos_drm_drv.h"
16#include "exynos_drm_encoder.h"
Joonyoung Shim4070d212012-06-27 14:27:05 +090017#include "exynos_drm_fb.h"
18#include "exynos_drm_gem.h"
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090019
Joonyoung Shimfdc575e2012-06-27 14:27:03 +090020#define to_exynos_plane(x) container_of(x, struct exynos_plane, base)
21
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090022struct exynos_plane {
23 struct drm_plane base;
24 struct exynos_drm_overlay overlay;
25 bool enabled;
26};
27
Eunchul Kimba3849d2012-03-16 18:47:15 +090028static const uint32_t formats[] = {
29 DRM_FORMAT_XRGB8888,
Seung-Woo Kim6b1c7622012-04-05 11:21:09 +090030 DRM_FORMAT_ARGB8888,
31 DRM_FORMAT_NV12,
Seung-Woo Kim6b1c7622012-04-05 11:21:09 +090032 DRM_FORMAT_NV12MT,
Eunchul Kimba3849d2012-03-16 18:47:15 +090033};
34
Joonyoung Shim2ab97922012-09-27 19:25:21 +090035/*
36 * This function is to get X or Y size shown via screen. This needs length and
37 * start position of CRTC.
38 *
39 * <--- length --->
40 * CRTC ----------------
41 * ^ start ^ end
42 *
43 * There are six cases from a to b.
44 *
45 * <----- SCREEN ----->
46 * 0 last
47 * ----------|------------------|----------
48 * CRTCs
49 * a -------
50 * b -------
51 * c --------------------------
52 * d --------
53 * e -------
54 * f -------
55 */
56static int exynos_plane_get_size(int start, unsigned length, unsigned last)
57{
58 int end = start + length;
59 int size = 0;
60
61 if (start <= 0) {
62 if (end > 0)
63 size = min_t(unsigned, end, last);
64 } else if (start <= last) {
65 size = min_t(unsigned, last - start, length);
66 }
67
68 return size;
69}
70
Joonyoung Shim4070d212012-06-27 14:27:05 +090071int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
72 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
73 unsigned int crtc_w, unsigned int crtc_h,
74 uint32_t src_x, uint32_t src_y,
75 uint32_t src_w, uint32_t src_h)
76{
77 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
78 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
79 unsigned int actual_w;
80 unsigned int actual_h;
81 int nr;
82 int i;
83
84 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
85
Inki Dae01ed8122012-08-20 20:05:56 +090086 nr = exynos_drm_fb_get_buf_cnt(fb);
Joonyoung Shim4070d212012-06-27 14:27:05 +090087 for (i = 0; i < nr; i++) {
88 struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
89
90 if (!buffer) {
91 DRM_LOG_KMS("buffer is null\n");
92 return -EFAULT;
93 }
94
95 overlay->dma_addr[i] = buffer->dma_addr;
96 overlay->vaddr[i] = buffer->kvaddr;
97
98 DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n",
99 i, (unsigned long)overlay->vaddr[i],
100 (unsigned long)overlay->dma_addr[i]);
101 }
102
Joonyoung Shim2ab97922012-09-27 19:25:21 +0900103 actual_w = exynos_plane_get_size(crtc_x, crtc_w, crtc->mode.hdisplay);
104 actual_h = exynos_plane_get_size(crtc_y, crtc_h, crtc->mode.vdisplay);
105
106 if (crtc_x < 0) {
107 if (actual_w)
108 src_x -= crtc_x;
109 else
110 src_x += crtc_w;
111 crtc_x = 0;
112 }
113
114 if (crtc_y < 0) {
115 if (actual_h)
116 src_y -= crtc_y;
117 else
118 src_y += crtc_h;
119 crtc_y = 0;
120 }
Joonyoung Shim4070d212012-06-27 14:27:05 +0900121
122 /* set drm framebuffer data. */
123 overlay->fb_x = src_x;
124 overlay->fb_y = src_y;
125 overlay->fb_width = fb->width;
126 overlay->fb_height = fb->height;
127 overlay->src_width = src_w;
128 overlay->src_height = src_h;
129 overlay->bpp = fb->bits_per_pixel;
130 overlay->pitch = fb->pitches[0];
131 overlay->pixel_format = fb->pixel_format;
132
133 /* set overlay range to be displayed. */
134 overlay->crtc_x = crtc_x;
135 overlay->crtc_y = crtc_y;
136 overlay->crtc_width = actual_w;
137 overlay->crtc_height = actual_h;
138
139 /* set drm mode data. */
140 overlay->mode_width = crtc->mode.hdisplay;
141 overlay->mode_height = crtc->mode.vdisplay;
142 overlay->refresh = crtc->mode.vrefresh;
143 overlay->scan_flag = crtc->mode.flags;
144
145 DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
146 overlay->crtc_x, overlay->crtc_y,
147 overlay->crtc_width, overlay->crtc_height);
148
149 exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_plane_mode_set);
150
151 return 0;
152}
153
154void exynos_plane_commit(struct drm_plane *plane)
155{
156 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
157 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
158
159 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
160 exynos_drm_encoder_plane_commit);
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900161}
Joonyoung Shim4070d212012-06-27 14:27:05 +0900162
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900163void exynos_plane_dpms(struct drm_plane *plane, int mode)
164{
165 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
166 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
167
168 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
169
170 if (mode == DRM_MODE_DPMS_ON) {
171 if (exynos_plane->enabled)
172 return;
173
174 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
175 exynos_drm_encoder_plane_enable);
176
177 exynos_plane->enabled = true;
178 } else {
179 if (!exynos_plane->enabled)
180 return;
181
182 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
183 exynos_drm_encoder_plane_disable);
184
185 exynos_plane->enabled = false;
186 }
Joonyoung Shim4070d212012-06-27 14:27:05 +0900187}
188
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900189static int
190exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
191 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
192 unsigned int crtc_w, unsigned int crtc_h,
193 uint32_t src_x, uint32_t src_y,
194 uint32_t src_w, uint32_t src_h)
195{
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900196 int ret;
197
198 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
199
Joonyoung Shim4070d212012-06-27 14:27:05 +0900200 ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
201 crtc_w, crtc_h, src_x >> 16, src_y >> 16,
202 src_w >> 16, src_h >> 16);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900203 if (ret < 0)
204 return ret;
205
Joonyoung Shim4070d212012-06-27 14:27:05 +0900206 plane->crtc = crtc;
207 plane->fb = crtc->fb;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900208
Joonyoung Shim4070d212012-06-27 14:27:05 +0900209 exynos_plane_commit(plane);
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900210 exynos_plane_dpms(plane, DRM_MODE_DPMS_ON);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900211
212 return 0;
213}
214
215static int exynos_disable_plane(struct drm_plane *plane)
216{
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900217 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
218
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900219 exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900220
221 return 0;
222}
223
224static void exynos_plane_destroy(struct drm_plane *plane)
225{
Joonyoung Shimfdc575e2012-06-27 14:27:03 +0900226 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900227
228 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
229
230 exynos_disable_plane(plane);
231 drm_plane_cleanup(plane);
232 kfree(exynos_plane);
233}
234
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900235static int exynos_plane_set_property(struct drm_plane *plane,
236 struct drm_property *property,
237 uint64_t val)
238{
239 struct drm_device *dev = plane->dev;
240 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
241 struct exynos_drm_private *dev_priv = dev->dev_private;
242
243 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
244
245 if (property == dev_priv->plane_zpos_property) {
246 exynos_plane->overlay.zpos = val;
247 return 0;
248 }
249
250 return -EINVAL;
251}
252
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900253static struct drm_plane_funcs exynos_plane_funcs = {
254 .update_plane = exynos_update_plane,
255 .disable_plane = exynos_disable_plane,
256 .destroy = exynos_plane_destroy,
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900257 .set_property = exynos_plane_set_property,
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900258};
259
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900260static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
261{
262 struct drm_device *dev = plane->dev;
263 struct exynos_drm_private *dev_priv = dev->dev_private;
264 struct drm_property *prop;
265
266 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
267
268 prop = dev_priv->plane_zpos_property;
269 if (!prop) {
270 prop = drm_property_create_range(dev, 0, "zpos", 0,
271 MAX_PLANE - 1);
272 if (!prop)
273 return;
274
275 dev_priv->plane_zpos_property = prop;
276 }
277
278 drm_object_attach_property(&plane->base, prop, 0);
279}
280
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900281struct drm_plane *exynos_plane_init(struct drm_device *dev,
282 unsigned int possible_crtcs, bool priv)
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900283{
284 struct exynos_plane *exynos_plane;
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900285 int err;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900286
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900287 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
288
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900289 exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900290 if (!exynos_plane) {
291 DRM_ERROR("failed to allocate plane\n");
292 return NULL;
293 }
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900294
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900295 err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
Eunchul Kimba3849d2012-03-16 18:47:15 +0900296 &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900297 priv);
298 if (err) {
299 DRM_ERROR("failed to initialize plane\n");
300 kfree(exynos_plane);
301 return NULL;
302 }
303
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900304 if (priv)
305 exynos_plane->overlay.zpos = DEFAULT_ZPOS;
306 else
307 exynos_plane_attach_zpos_property(&exynos_plane->base);
308
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900309 return &exynos_plane->base;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900310}