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Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright 2009 Jerome Glisse.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Jerome Glisse
23 */
24#include <drm/drmP.h>
25#include <drm/radeon_drm.h>
26#include "radeon_reg.h"
27#include "radeon.h"
28
Ilija Hadziccc340512011-10-12 23:29:38 -040029#define RADEON_BENCHMARK_COPY_BLIT 1
30#define RADEON_BENCHMARK_COPY_DMA 0
31
32#define RADEON_BENCHMARK_ITERATIONS 1024
Ilija Hadzic638dd7d2011-10-12 23:29:39 -040033#define RADEON_BENCHMARK_COMMON_MODES_N 17
Ilija Hadziccc340512011-10-12 23:29:38 -040034
35static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size,
36 uint64_t saddr, uint64_t daddr,
37 int flag, int n)
38{
39 unsigned long start_jiffies;
40 unsigned long end_jiffies;
41 struct radeon_fence *fence = NULL;
42 int i, r;
43
44 start_jiffies = jiffies;
45 for (i = 0; i < n; i++) {
Ilija Hadziccc340512011-10-12 23:29:38 -040046 switch (flag) {
47 case RADEON_BENCHMARK_COPY_DMA:
48 r = radeon_copy_dma(rdev, saddr, daddr,
49 size / RADEON_GPU_PAGE_SIZE,
Christian König876dc9f2012-05-08 14:24:01 +020050 &fence);
Ilija Hadziccc340512011-10-12 23:29:38 -040051 break;
52 case RADEON_BENCHMARK_COPY_BLIT:
53 r = radeon_copy_blit(rdev, saddr, daddr,
54 size / RADEON_GPU_PAGE_SIZE,
Christian König876dc9f2012-05-08 14:24:01 +020055 &fence);
Ilija Hadziccc340512011-10-12 23:29:38 -040056 break;
57 default:
58 DRM_ERROR("Unknown copy method\n");
59 r = -EINVAL;
60 }
61 if (r)
62 goto exit_do_move;
63 r = radeon_fence_wait(fence, false);
64 if (r)
65 goto exit_do_move;
66 radeon_fence_unref(&fence);
67 }
68 end_jiffies = jiffies;
69 r = jiffies_to_msecs(end_jiffies - start_jiffies);
70
71exit_do_move:
72 if (fence)
73 radeon_fence_unref(&fence);
74 return r;
75}
76
77
78static void radeon_benchmark_log_results(int n, unsigned size,
79 unsigned int time,
80 unsigned sdomain, unsigned ddomain,
81 char *kind)
82{
83 unsigned int throughput = (n * (size >> 10)) / time;
84 DRM_INFO("radeon: %s %u bo moves of %u kB from"
85 " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
86 kind, n, size >> 10, sdomain, ddomain, time,
87 throughput * 8, throughput);
88}
89
90static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,
91 unsigned sdomain, unsigned ddomain)
Jerome Glisse771fe6b2009-06-05 14:42:42 +020092{
Jerome Glisse4c788672009-11-20 14:29:23 +010093 struct radeon_bo *dobj = NULL;
94 struct radeon_bo *sobj = NULL;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020095 uint64_t saddr, daddr;
Ilija Hadziccc340512011-10-12 23:29:38 -040096 int r, n;
Dan Carpenterbfba1652011-10-29 10:21:28 +030097 int time;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020098
Ilija Hadziccc340512011-10-12 23:29:38 -040099 n = RADEON_BENCHMARK_ITERATIONS;
Alex Deucher40f5cf92012-05-10 18:33:13 -0400100 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, NULL, &sobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200101 if (r) {
102 goto out_cleanup;
103 }
Jerome Glisse4c788672009-11-20 14:29:23 +0100104 r = radeon_bo_reserve(sobj, false);
105 if (unlikely(r != 0))
106 goto out_cleanup;
107 r = radeon_bo_pin(sobj, sdomain, &saddr);
108 radeon_bo_unreserve(sobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200109 if (r) {
110 goto out_cleanup;
111 }
Alex Deucher40f5cf92012-05-10 18:33:13 -0400112 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, NULL, &dobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200113 if (r) {
114 goto out_cleanup;
115 }
Jerome Glisse4c788672009-11-20 14:29:23 +0100116 r = radeon_bo_reserve(dobj, false);
117 if (unlikely(r != 0))
118 goto out_cleanup;
119 r = radeon_bo_pin(dobj, ddomain, &daddr);
120 radeon_bo_unreserve(dobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200121 if (r) {
122 goto out_cleanup;
123 }
Pauli Nieminenc60a2842010-02-11 00:10:33 +0200124
125 /* r100 doesn't have dma engine so skip the test */
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400126 /* also, VRAM-to-VRAM test doesn't make much sense for DMA */
127 /* skip it as well if domains are the same */
Alex Deucher27cd7762012-02-23 17:53:42 -0500128 if ((rdev->asic->copy.dma) && (sdomain != ddomain)) {
Ilija Hadziccc340512011-10-12 23:29:38 -0400129 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
130 RADEON_BENCHMARK_COPY_DMA, n);
131 if (time < 0)
132 goto out_cleanup;
133 if (time > 0)
134 radeon_benchmark_log_results(n, size, time,
135 sdomain, ddomain, "dma");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200136 }
Pauli Nieminenc60a2842010-02-11 00:10:33 +0200137
Ilija Hadziccc340512011-10-12 23:29:38 -0400138 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
139 RADEON_BENCHMARK_COPY_BLIT, n);
140 if (time < 0)
141 goto out_cleanup;
142 if (time > 0)
143 radeon_benchmark_log_results(n, size, time,
144 sdomain, ddomain, "blit");
145
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200146out_cleanup:
147 if (sobj) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100148 r = radeon_bo_reserve(sobj, false);
149 if (likely(r == 0)) {
150 radeon_bo_unpin(sobj);
151 radeon_bo_unreserve(sobj);
152 }
153 radeon_bo_unref(&sobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200154 }
155 if (dobj) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100156 r = radeon_bo_reserve(dobj, false);
157 if (likely(r == 0)) {
158 radeon_bo_unpin(dobj);
159 radeon_bo_unreserve(dobj);
160 }
161 radeon_bo_unref(&dobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200162 }
Ilija Hadziccc340512011-10-12 23:29:38 -0400163
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200164 if (r) {
Ilija Hadziccc340512011-10-12 23:29:38 -0400165 DRM_ERROR("Error while benchmarking BO move.\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200166 }
167}
168
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400169void radeon_benchmark(struct radeon_device *rdev, int test_number)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200170{
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400171 int i;
172 int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = {
173 640 * 480 * 4,
174 720 * 480 * 4,
175 800 * 600 * 4,
176 848 * 480 * 4,
177 1024 * 768 * 4,
178 1152 * 768 * 4,
179 1280 * 720 * 4,
180 1280 * 800 * 4,
181 1280 * 854 * 4,
182 1280 * 960 * 4,
183 1280 * 1024 * 4,
184 1440 * 900 * 4,
185 1400 * 1050 * 4,
186 1680 * 1050 * 4,
187 1600 * 1200 * 4,
188 1920 * 1080 * 4,
189 1920 * 1200 * 4
190 };
191
192 switch (test_number) {
193 case 1:
194 /* simple test, VRAM to GTT and GTT to VRAM */
195 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT,
196 RADEON_GEM_DOMAIN_VRAM);
197 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
198 RADEON_GEM_DOMAIN_GTT);
199 break;
200 case 2:
201 /* simple test, VRAM to VRAM */
202 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
203 RADEON_GEM_DOMAIN_VRAM);
204 break;
205 case 3:
206 /* GTT to VRAM, buffer size sweep, powers of 2 */
Ilija Hadzic6d75e832012-01-31 09:35:25 -0500207 for (i = 1; i <= 16384; i <<= 1)
208 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400209 RADEON_GEM_DOMAIN_GTT,
210 RADEON_GEM_DOMAIN_VRAM);
211 break;
212 case 4:
213 /* VRAM to GTT, buffer size sweep, powers of 2 */
Ilija Hadzic6d75e832012-01-31 09:35:25 -0500214 for (i = 1; i <= 16384; i <<= 1)
215 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400216 RADEON_GEM_DOMAIN_VRAM,
217 RADEON_GEM_DOMAIN_GTT);
218 break;
219 case 5:
220 /* VRAM to VRAM, buffer size sweep, powers of 2 */
Ilija Hadzic6d75e832012-01-31 09:35:25 -0500221 for (i = 1; i <= 16384; i <<= 1)
222 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400223 RADEON_GEM_DOMAIN_VRAM,
224 RADEON_GEM_DOMAIN_VRAM);
225 break;
226 case 6:
227 /* GTT to VRAM, buffer size sweep, common modes */
Chen Jied7d0a752011-12-07 10:18:18 +0800228 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400229 radeon_benchmark_move(rdev, common_modes[i],
230 RADEON_GEM_DOMAIN_GTT,
231 RADEON_GEM_DOMAIN_VRAM);
232 break;
233 case 7:
234 /* VRAM to GTT, buffer size sweep, common modes */
Chen Jied7d0a752011-12-07 10:18:18 +0800235 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400236 radeon_benchmark_move(rdev, common_modes[i],
237 RADEON_GEM_DOMAIN_VRAM,
238 RADEON_GEM_DOMAIN_GTT);
239 break;
240 case 8:
241 /* VRAM to VRAM, buffer size sweep, common modes */
Chen Jied7d0a752011-12-07 10:18:18 +0800242 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
Ilija Hadzic638dd7d2011-10-12 23:29:39 -0400243 radeon_benchmark_move(rdev, common_modes[i],
244 RADEON_GEM_DOMAIN_VRAM,
245 RADEON_GEM_DOMAIN_VRAM);
246 break;
247
248 default:
249 DRM_ERROR("Unknown benchmark\n");
250 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200251}