blob: 85cad05d8c5bf3bc613b9feaa4ac0c0177f3a358 [file] [log] [blame]
Saeed Bishara651c74c2008-06-22 22:45:06 +02001/*
2 * arch/arm/mach-kirkwood/common.c
3 *
4 * Core functions for Marvell Kirkwood SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/serial_8250.h>
15#include <linux/mbus.h>
16#include <linux/mv643xx_eth.h>
17#include <linux/ata_platform.h>
Lennert Buytenhek18365d12008-08-09 15:38:18 +020018#include <linux/spi/orion_spi.h>
Saeed Bishara651c74c2008-06-22 22:45:06 +020019#include <asm/page.h>
20#include <asm/timex.h>
21#include <asm/mach/map.h>
22#include <asm/mach/time.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010023#include <mach/kirkwood.h>
Lennert Buytenhek6f088f12008-08-09 13:44:58 +020024#include <plat/cache-feroceon-l2.h>
25#include <plat/ehci-orion.h>
Saeed Bishara09c0ed22008-06-23 04:26:07 -110026#include <plat/mv_xor.h>
Lennert Buytenhek6f088f12008-08-09 13:44:58 +020027#include <plat/orion_nand.h>
28#include <plat/time.h>
Saeed Bishara651c74c2008-06-22 22:45:06 +020029#include "common.h"
30
31/*****************************************************************************
32 * I/O Address Mapping
33 ****************************************************************************/
34static struct map_desc kirkwood_io_desc[] __initdata = {
35 {
36 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
37 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
38 .length = KIRKWOOD_PCIE_IO_SIZE,
39 .type = MT_DEVICE,
40 }, {
41 .virtual = KIRKWOOD_REGS_VIRT_BASE,
42 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
43 .length = KIRKWOOD_REGS_SIZE,
44 .type = MT_DEVICE,
45 },
46};
47
48void __init kirkwood_map_io(void)
49{
50 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
51}
52
53
54/*****************************************************************************
55 * EHCI
56 ****************************************************************************/
57static struct orion_ehci_data kirkwood_ehci_data = {
58 .dram = &kirkwood_mbus_dram_info,
59};
60
61static u64 ehci_dmamask = 0xffffffffUL;
62
63
64/*****************************************************************************
65 * EHCI0
66 ****************************************************************************/
67static struct resource kirkwood_ehci_resources[] = {
68 {
69 .start = USB_PHYS_BASE,
70 .end = USB_PHYS_BASE + 0x0fff,
71 .flags = IORESOURCE_MEM,
72 }, {
73 .start = IRQ_KIRKWOOD_USB,
74 .end = IRQ_KIRKWOOD_USB,
75 .flags = IORESOURCE_IRQ,
76 },
77};
78
79static struct platform_device kirkwood_ehci = {
80 .name = "orion-ehci",
81 .id = 0,
82 .dev = {
83 .dma_mask = &ehci_dmamask,
84 .coherent_dma_mask = 0xffffffff,
85 .platform_data = &kirkwood_ehci_data,
86 },
87 .resource = kirkwood_ehci_resources,
88 .num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
89};
90
91void __init kirkwood_ehci_init(void)
92{
93 platform_device_register(&kirkwood_ehci);
94}
95
96
97/*****************************************************************************
98 * GE00
99 ****************************************************************************/
100struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
Saeed Bishara651c74c2008-06-22 22:45:06 +0200101 .dram = &kirkwood_mbus_dram_info,
102};
103
104static struct resource kirkwood_ge00_shared_resources[] = {
105 {
106 .name = "ge00 base",
107 .start = GE00_PHYS_BASE + 0x2000,
108 .end = GE00_PHYS_BASE + 0x3fff,
109 .flags = IORESOURCE_MEM,
Lennert Buytenhek144f8142008-08-26 16:04:05 +0200110 }, {
111 .name = "ge00 err irq",
112 .start = IRQ_KIRKWOOD_GE00_ERR,
113 .end = IRQ_KIRKWOOD_GE00_ERR,
114 .flags = IORESOURCE_IRQ,
Saeed Bishara651c74c2008-06-22 22:45:06 +0200115 },
116};
117
118static struct platform_device kirkwood_ge00_shared = {
119 .name = MV643XX_ETH_SHARED_NAME,
120 .id = 0,
121 .dev = {
122 .platform_data = &kirkwood_ge00_shared_data,
123 },
Lennert Buytenhek144f8142008-08-26 16:04:05 +0200124 .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
Saeed Bishara651c74c2008-06-22 22:45:06 +0200125 .resource = kirkwood_ge00_shared_resources,
126};
127
128static struct resource kirkwood_ge00_resources[] = {
129 {
130 .name = "ge00 irq",
131 .start = IRQ_KIRKWOOD_GE00_SUM,
132 .end = IRQ_KIRKWOOD_GE00_SUM,
133 .flags = IORESOURCE_IRQ,
134 },
135};
136
137static struct platform_device kirkwood_ge00 = {
138 .name = MV643XX_ETH_NAME,
139 .id = 0,
140 .num_resources = 1,
141 .resource = kirkwood_ge00_resources,
142};
143
144void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
145{
146 eth_data->shared = &kirkwood_ge00_shared;
147 kirkwood_ge00.dev.platform_data = eth_data;
148
149 platform_device_register(&kirkwood_ge00_shared);
150 platform_device_register(&kirkwood_ge00);
151}
152
153
154/*****************************************************************************
155 * SoC RTC
156 ****************************************************************************/
157static struct resource kirkwood_rtc_resource = {
158 .start = RTC_PHYS_BASE,
159 .end = RTC_PHYS_BASE + SZ_16 - 1,
160 .flags = IORESOURCE_MEM,
161};
162
163void __init kirkwood_rtc_init(void)
164{
165 platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
166}
167
168
169/*****************************************************************************
170 * SATA
171 ****************************************************************************/
172static struct resource kirkwood_sata_resources[] = {
173 {
174 .name = "sata base",
175 .start = SATA_PHYS_BASE,
176 .end = SATA_PHYS_BASE + 0x5000 - 1,
177 .flags = IORESOURCE_MEM,
178 }, {
179 .name = "sata irq",
180 .start = IRQ_KIRKWOOD_SATA,
181 .end = IRQ_KIRKWOOD_SATA,
182 .flags = IORESOURCE_IRQ,
183 },
184};
185
186static struct platform_device kirkwood_sata = {
187 .name = "sata_mv",
188 .id = 0,
189 .dev = {
190 .coherent_dma_mask = 0xffffffff,
191 },
192 .num_resources = ARRAY_SIZE(kirkwood_sata_resources),
193 .resource = kirkwood_sata_resources,
194};
195
196void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
197{
198 sata_data->dram = &kirkwood_mbus_dram_info;
199 kirkwood_sata.dev.platform_data = sata_data;
200 platform_device_register(&kirkwood_sata);
201}
202
203
204/*****************************************************************************
Lennert Buytenhek18365d12008-08-09 15:38:18 +0200205 * SPI
206 ****************************************************************************/
207static struct orion_spi_info kirkwood_spi_plat_data = {
Lennert Buytenhek18365d12008-08-09 15:38:18 +0200208};
209
210static struct resource kirkwood_spi_resources[] = {
211 {
212 .start = SPI_PHYS_BASE,
213 .end = SPI_PHYS_BASE + SZ_512 - 1,
214 .flags = IORESOURCE_MEM,
215 },
216};
217
218static struct platform_device kirkwood_spi = {
219 .name = "orion_spi",
220 .id = 0,
221 .resource = kirkwood_spi_resources,
222 .dev = {
223 .platform_data = &kirkwood_spi_plat_data,
224 },
225 .num_resources = ARRAY_SIZE(kirkwood_spi_resources),
226};
227
228void __init kirkwood_spi_init()
229{
230 platform_device_register(&kirkwood_spi);
231}
232
233
234/*****************************************************************************
Saeed Bishara651c74c2008-06-22 22:45:06 +0200235 * UART0
236 ****************************************************************************/
237static struct plat_serial8250_port kirkwood_uart0_data[] = {
238 {
239 .mapbase = UART0_PHYS_BASE,
240 .membase = (char *)UART0_VIRT_BASE,
241 .irq = IRQ_KIRKWOOD_UART_0,
242 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
243 .iotype = UPIO_MEM,
244 .regshift = 2,
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200245 .uartclk = 0,
Saeed Bishara651c74c2008-06-22 22:45:06 +0200246 }, {
247 },
248};
249
250static struct resource kirkwood_uart0_resources[] = {
251 {
252 .start = UART0_PHYS_BASE,
253 .end = UART0_PHYS_BASE + 0xff,
254 .flags = IORESOURCE_MEM,
255 }, {
256 .start = IRQ_KIRKWOOD_UART_0,
257 .end = IRQ_KIRKWOOD_UART_0,
258 .flags = IORESOURCE_IRQ,
259 },
260};
261
262static struct platform_device kirkwood_uart0 = {
263 .name = "serial8250",
264 .id = 0,
265 .dev = {
266 .platform_data = kirkwood_uart0_data,
267 },
268 .resource = kirkwood_uart0_resources,
269 .num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
270};
271
272void __init kirkwood_uart0_init(void)
273{
274 platform_device_register(&kirkwood_uart0);
275}
276
277
278/*****************************************************************************
279 * UART1
280 ****************************************************************************/
281static struct plat_serial8250_port kirkwood_uart1_data[] = {
282 {
283 .mapbase = UART1_PHYS_BASE,
284 .membase = (char *)UART1_VIRT_BASE,
285 .irq = IRQ_KIRKWOOD_UART_1,
286 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
287 .iotype = UPIO_MEM,
288 .regshift = 2,
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200289 .uartclk = 0,
Saeed Bishara651c74c2008-06-22 22:45:06 +0200290 }, {
291 },
292};
293
294static struct resource kirkwood_uart1_resources[] = {
295 {
296 .start = UART1_PHYS_BASE,
297 .end = UART1_PHYS_BASE + 0xff,
298 .flags = IORESOURCE_MEM,
299 }, {
300 .start = IRQ_KIRKWOOD_UART_1,
301 .end = IRQ_KIRKWOOD_UART_1,
302 .flags = IORESOURCE_IRQ,
303 },
304};
305
306static struct platform_device kirkwood_uart1 = {
307 .name = "serial8250",
308 .id = 1,
309 .dev = {
310 .platform_data = kirkwood_uart1_data,
311 },
312 .resource = kirkwood_uart1_resources,
313 .num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
314};
315
316void __init kirkwood_uart1_init(void)
317{
318 platform_device_register(&kirkwood_uart1);
319}
320
321
322/*****************************************************************************
Saeed Bishara09c0ed22008-06-23 04:26:07 -1100323 * XOR
324 ****************************************************************************/
325static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
326 .dram = &kirkwood_mbus_dram_info,
327};
328
329static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK;
330
331
332/*****************************************************************************
333 * XOR0
334 ****************************************************************************/
335static struct resource kirkwood_xor0_shared_resources[] = {
336 {
337 .name = "xor 0 low",
338 .start = XOR0_PHYS_BASE,
339 .end = XOR0_PHYS_BASE + 0xff,
340 .flags = IORESOURCE_MEM,
341 }, {
342 .name = "xor 0 high",
343 .start = XOR0_HIGH_PHYS_BASE,
344 .end = XOR0_HIGH_PHYS_BASE + 0xff,
345 .flags = IORESOURCE_MEM,
346 },
347};
348
349static struct platform_device kirkwood_xor0_shared = {
350 .name = MV_XOR_SHARED_NAME,
351 .id = 0,
352 .dev = {
353 .platform_data = &kirkwood_xor_shared_data,
354 },
355 .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
356 .resource = kirkwood_xor0_shared_resources,
357};
358
359static struct resource kirkwood_xor00_resources[] = {
360 [0] = {
361 .start = IRQ_KIRKWOOD_XOR_00,
362 .end = IRQ_KIRKWOOD_XOR_00,
363 .flags = IORESOURCE_IRQ,
364 },
365};
366
367static struct mv_xor_platform_data kirkwood_xor00_data = {
368 .shared = &kirkwood_xor0_shared,
369 .hw_id = 0,
370 .pool_size = PAGE_SIZE,
371};
372
373static struct platform_device kirkwood_xor00_channel = {
374 .name = MV_XOR_NAME,
375 .id = 0,
376 .num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
377 .resource = kirkwood_xor00_resources,
378 .dev = {
379 .dma_mask = &kirkwood_xor_dmamask,
380 .coherent_dma_mask = DMA_64BIT_MASK,
381 .platform_data = (void *)&kirkwood_xor00_data,
382 },
383};
384
385static struct resource kirkwood_xor01_resources[] = {
386 [0] = {
387 .start = IRQ_KIRKWOOD_XOR_01,
388 .end = IRQ_KIRKWOOD_XOR_01,
389 .flags = IORESOURCE_IRQ,
390 },
391};
392
393static struct mv_xor_platform_data kirkwood_xor01_data = {
394 .shared = &kirkwood_xor0_shared,
395 .hw_id = 1,
396 .pool_size = PAGE_SIZE,
397};
398
399static struct platform_device kirkwood_xor01_channel = {
400 .name = MV_XOR_NAME,
401 .id = 1,
402 .num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
403 .resource = kirkwood_xor01_resources,
404 .dev = {
405 .dma_mask = &kirkwood_xor_dmamask,
406 .coherent_dma_mask = DMA_64BIT_MASK,
407 .platform_data = (void *)&kirkwood_xor01_data,
408 },
409};
410
411void __init kirkwood_xor0_init(void)
412{
413 platform_device_register(&kirkwood_xor0_shared);
414
415 /*
416 * two engines can't do memset simultaneously, this limitation
417 * satisfied by removing memset support from one of the engines.
418 */
419 dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
420 dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
421 platform_device_register(&kirkwood_xor00_channel);
422
423 dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
424 dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
425 dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
426 platform_device_register(&kirkwood_xor01_channel);
427}
428
429
430/*****************************************************************************
431 * XOR1
432 ****************************************************************************/
433static struct resource kirkwood_xor1_shared_resources[] = {
434 {
435 .name = "xor 1 low",
436 .start = XOR1_PHYS_BASE,
437 .end = XOR1_PHYS_BASE + 0xff,
438 .flags = IORESOURCE_MEM,
439 }, {
440 .name = "xor 1 high",
441 .start = XOR1_HIGH_PHYS_BASE,
442 .end = XOR1_HIGH_PHYS_BASE + 0xff,
443 .flags = IORESOURCE_MEM,
444 },
445};
446
447static struct platform_device kirkwood_xor1_shared = {
448 .name = MV_XOR_SHARED_NAME,
449 .id = 1,
450 .dev = {
451 .platform_data = &kirkwood_xor_shared_data,
452 },
453 .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
454 .resource = kirkwood_xor1_shared_resources,
455};
456
457static struct resource kirkwood_xor10_resources[] = {
458 [0] = {
459 .start = IRQ_KIRKWOOD_XOR_10,
460 .end = IRQ_KIRKWOOD_XOR_10,
461 .flags = IORESOURCE_IRQ,
462 },
463};
464
465static struct mv_xor_platform_data kirkwood_xor10_data = {
466 .shared = &kirkwood_xor1_shared,
467 .hw_id = 0,
468 .pool_size = PAGE_SIZE,
469};
470
471static struct platform_device kirkwood_xor10_channel = {
472 .name = MV_XOR_NAME,
473 .id = 2,
474 .num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
475 .resource = kirkwood_xor10_resources,
476 .dev = {
477 .dma_mask = &kirkwood_xor_dmamask,
478 .coherent_dma_mask = DMA_64BIT_MASK,
479 .platform_data = (void *)&kirkwood_xor10_data,
480 },
481};
482
483static struct resource kirkwood_xor11_resources[] = {
484 [0] = {
485 .start = IRQ_KIRKWOOD_XOR_11,
486 .end = IRQ_KIRKWOOD_XOR_11,
487 .flags = IORESOURCE_IRQ,
488 },
489};
490
491static struct mv_xor_platform_data kirkwood_xor11_data = {
492 .shared = &kirkwood_xor1_shared,
493 .hw_id = 1,
494 .pool_size = PAGE_SIZE,
495};
496
497static struct platform_device kirkwood_xor11_channel = {
498 .name = MV_XOR_NAME,
499 .id = 3,
500 .num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
501 .resource = kirkwood_xor11_resources,
502 .dev = {
503 .dma_mask = &kirkwood_xor_dmamask,
504 .coherent_dma_mask = DMA_64BIT_MASK,
505 .platform_data = (void *)&kirkwood_xor11_data,
506 },
507};
508
509void __init kirkwood_xor1_init(void)
510{
511 platform_device_register(&kirkwood_xor1_shared);
512
513 /*
514 * two engines can't do memset simultaneously, this limitation
515 * satisfied by removing memset support from one of the engines.
516 */
517 dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
518 dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
519 platform_device_register(&kirkwood_xor10_channel);
520
521 dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
522 dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
523 dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
524 platform_device_register(&kirkwood_xor11_channel);
525}
526
527
528/*****************************************************************************
Saeed Bishara651c74c2008-06-22 22:45:06 +0200529 * Time handling
530 ****************************************************************************/
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200531int kirkwood_tclk;
532
533int __init kirkwood_find_tclk(void)
534{
Ronen Shitritb2b3dc22008-09-15 10:40:35 +0300535 u32 dev, rev;
536
537 kirkwood_pcie_id(&dev, &rev);
538 if (dev == MV88F6281_DEV_ID && rev == MV88F6281_REV_A0)
539 return 200000000;
540
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200541 return 166666667;
542}
543
Saeed Bishara651c74c2008-06-22 22:45:06 +0200544static void kirkwood_timer_init(void)
545{
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200546 kirkwood_tclk = kirkwood_find_tclk();
547 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
Saeed Bishara651c74c2008-06-22 22:45:06 +0200548}
549
550struct sys_timer kirkwood_timer = {
551 .init = kirkwood_timer_init,
552};
553
554
555/*****************************************************************************
556 * General
557 ****************************************************************************/
Ronen Shitritb2b3dc22008-09-15 10:40:35 +0300558/*
559 * Identify device ID and revision.
560 */
Saeed Bishara651c74c2008-06-22 22:45:06 +0200561static char * __init kirkwood_id(void)
562{
Ronen Shitritb2b3dc22008-09-15 10:40:35 +0300563 u32 dev, rev;
Saeed Bishara651c74c2008-06-22 22:45:06 +0200564
Ronen Shitritb2b3dc22008-09-15 10:40:35 +0300565 kirkwood_pcie_id(&dev, &rev);
566
567 if (dev == MV88F6281_DEV_ID) {
568 if (rev == MV88F6281_REV_Z0)
569 return "MV88F6281-Z0";
570 else if (rev == MV88F6281_REV_A0)
571 return "MV88F6281-A0";
572 else
573 return "MV88F6281-Rev-Unsupported";
574 } else if (dev == MV88F6192_DEV_ID) {
575 if (rev == MV88F6192_REV_Z0)
576 return "MV88F6192-Z0";
577 else if (rev == MV88F6192_REV_A0)
578 return "MV88F6192-A0";
579 else
580 return "MV88F6192-Rev-Unsupported";
581 } else if (dev == MV88F6180_DEV_ID) {
582 if (rev == MV88F6180_REV_A0)
583 return "MV88F6180-Rev-A0";
584 else
585 return "MV88F6180-Rev-Unsupported";
586 } else {
587 return "Device-Unknown";
588 }
Saeed Bishara651c74c2008-06-22 22:45:06 +0200589}
590
Ronen Shitrit4360bb42008-09-23 15:28:10 +0300591static void __init kirkwood_l2_init(void)
Saeed Bishara13387602008-06-23 01:05:08 -1100592{
Ronen Shitrit4360bb42008-09-23 15:28:10 +0300593#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
594 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
595 feroceon_l2_init(1);
596#else
597 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
598 feroceon_l2_init(0);
599#endif
Saeed Bishara13387602008-06-23 01:05:08 -1100600}
601
Saeed Bishara651c74c2008-06-22 22:45:06 +0200602void __init kirkwood_init(void)
603{
604 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
Ronen Shitrit79d4dd72008-09-15 00:56:38 +0200605 kirkwood_id(), kirkwood_tclk);
606 kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
607 kirkwood_spi_plat_data.tclk = kirkwood_tclk;
608 kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
609 kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
Saeed Bishara651c74c2008-06-22 22:45:06 +0200610
611 kirkwood_setup_cpu_mbus();
612
613#ifdef CONFIG_CACHE_FEROCEON_L2
Ronen Shitrit4360bb42008-09-23 15:28:10 +0300614 kirkwood_l2_init();
Saeed Bishara651c74c2008-06-22 22:45:06 +0200615#endif
616}