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gerrit-public.fairphone.software / kernel / msm-4.9 / 35d23047f8ba1b7cc9a067b9506352fd257c8df5 / . / arch / arm / boot / dts / imx28.dtsi
blob: 8596bdf9c19e8cd35333515e38a46b22c04283b9 [file] [log] [blame]
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 interrupt-parent = <&icoll>;
16
Shawn Guoce4c6f92012-05-04 14:32:35 +0800[diff] [blame]17 aliases {
18 gpio0 = &gpio0;
19 gpio1 = &gpio1;
20 gpio2 = &gpio2;
21 gpio3 = &gpio3;
22 gpio4 = &gpio4;
23 };
24
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]25 cpus {
26 cpu@0 {
27 compatible = "arm,arm926ejs";
28 };
29 };
30
31 apb@80000000 {
32 compatible = "simple-bus";
33 #address-cells = <1>;
34 #size-cells = <1>;
35 reg = <0x80000000 0x80000>;
36 ranges;
37
38 apbh@80000000 {
39 compatible = "simple-bus";
40 #address-cells = <1>;
41 #size-cells = <1>;
42 reg = <0x80000000 0x3c900>;
43 ranges;
44
45 icoll: interrupt-controller@80000000 {
46 compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
47 interrupt-controller;
48 #interrupt-cells = <1>;
49 reg = <0x80000000 0x2000>;
50 };
51
52 hsadc@80002000 {
53 reg = <0x80002000 2000>;
54 interrupts = <13 87>;
55 status = "disabled";
56 };
57
58 dma-apbh@80004000 {
Dong Aisheng84f35702012-05-04 20:12:19 +0800[diff] [blame]59 compatible = "fsl,imx28-dma-apbh";
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]60 reg = <0x80004000 2000>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]61 };
62
63 perfmon@80006000 {
64 reg = <0x80006000 800>;
65 interrupts = <27>;
66 status = "disabled";
67 };
68
69 bch@8000a000 {
70 reg = <0x8000a000 2000>;
71 interrupts = <41>;
72 status = "disabled";
73 };
74
75 gpmi@8000c000 {
76 reg = <0x8000c000 2000>;
77 interrupts = <42 88>;
78 status = "disabled";
79 };
80
81 ssp0: ssp@80010000 {
82 reg = <0x80010000 2000>;
83 interrupts = <96 82>;
Shawn Guo35d23042012-05-06 16:33:34 +0800[diff] [blame^]84 fsl,ssp-dma-channel = <0>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]85 status = "disabled";
86 };
87
88 ssp1: ssp@80012000 {
89 reg = <0x80012000 2000>;
90 interrupts = <97 83>;
Shawn Guo35d23042012-05-06 16:33:34 +0800[diff] [blame^]91 fsl,ssp-dma-channel = <1>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]92 status = "disabled";
93 };
94
95 ssp2: ssp@80014000 {
96 reg = <0x80014000 2000>;
97 interrupts = <98 84>;
Shawn Guo35d23042012-05-06 16:33:34 +0800[diff] [blame^]98 fsl,ssp-dma-channel = <2>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]99 status = "disabled";
100 };
101
102 ssp3: ssp@80016000 {
103 reg = <0x80016000 2000>;
104 interrupts = <99 85>;
Shawn Guo35d23042012-05-06 16:33:34 +0800[diff] [blame^]105 fsl,ssp-dma-channel = <3>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]106 status = "disabled";
107 };
108
109 pinctrl@80018000 {
110 #address-cells = <1>;
111 #size-cells = <0>;
Shawn Guoce4c6f92012-05-04 14:32:35 +0800[diff] [blame]112 compatible = "fsl,imx28-pinctrl", "simple-bus";
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]113 reg = <0x80018000 2000>;
114
Shawn Guoce4c6f92012-05-04 14:32:35 +0800[diff] [blame]115 gpio0: gpio@0 {
116 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
117 interrupts = <127>;
118 gpio-controller;
119 #gpio-cells = <2>;
120 interrupt-controller;
121 #interrupt-cells = <2>;
122 };
123
124 gpio1: gpio@1 {
125 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
126 interrupts = <126>;
127 gpio-controller;
128 #gpio-cells = <2>;
129 interrupt-controller;
130 #interrupt-cells = <2>;
131 };
132
133 gpio2: gpio@2 {
134 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
135 interrupts = <125>;
136 gpio-controller;
137 #gpio-cells = <2>;
138 interrupt-controller;
139 #interrupt-cells = <2>;
140 };
141
142 gpio3: gpio@3 {
143 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
144 interrupts = <124>;
145 gpio-controller;
146 #gpio-cells = <2>;
147 interrupt-controller;
148 #interrupt-cells = <2>;
149 };
150
151 gpio4: gpio@4 {
152 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
153 interrupts = <123>;
154 gpio-controller;
155 #gpio-cells = <2>;
156 interrupt-controller;
157 #interrupt-cells = <2>;
158 };
159
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]160 duart_pins_a: duart@0 {
161 reg = <0>;
162 fsl,pinmux-ids = <0x3102 0x3112>;
163 fsl,drive-strength = <0>;
164 fsl,voltage = <1>;
165 fsl,pull-up = <0>;
166 };
167
168 mac0_pins_a: mac0@0 {
169 reg = <0>;
170 fsl,pinmux-ids = <0x4000 0x4010 0x4020
171 0x4030 0x4040 0x4060 0x4070
172 0x4080 0x4100>;
173 fsl,drive-strength = <1>;
174 fsl,voltage = <1>;
175 fsl,pull-up = <1>;
176 };
177
178 mac1_pins_a: mac1@0 {
179 reg = <0>;
180 fsl,pinmux-ids = <0x40f1 0x4091 0x40a1
181 0x40e1 0x40b1 0x40c1>;
182 fsl,drive-strength = <1>;
183 fsl,voltage = <1>;
184 fsl,pull-up = <1>;
185 };
Shawn Guo35d23042012-05-06 16:33:34 +0800[diff] [blame^]186
187 mmc0_8bit_pins_a: mmc0-8bit@0 {
188 reg = <0>;
189 fsl,pinmux-ids = <0x2000 0x2010 0x2020
190 0x2030 0x2040 0x2050 0x2060
191 0x2070 0x2080 0x2090 0x20a0>;
192 fsl,drive-strength = <1>;
193 fsl,voltage = <1>;
194 fsl,pull-up = <1>;
195 };
196
197 mmc0_cd_cfg: mmc0-cd-cfg {
198 fsl,pinmux-ids = <0x2090>;
199 fsl,pull-up = <0>;
200 };
201
202 mmc0_sck_cfg: mmc0-sck-cfg {
203 fsl,pinmux-ids = <0x20a0>;
204 fsl,drive-strength = <2>;
205 fsl,pull-up = <0>;
206 };
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]207 };
208
209 digctl@8001c000 {
210 reg = <0x8001c000 2000>;
211 interrupts = <89>;
212 status = "disabled";
213 };
214
215 etm@80022000 {
216 reg = <0x80022000 2000>;
217 status = "disabled";
218 };
219
220 dma-apbx@80024000 {
Dong Aisheng84f35702012-05-04 20:12:19 +0800[diff] [blame]221 compatible = "fsl,imx28-dma-apbx";
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]222 reg = <0x80024000 2000>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]223 };
224
225 dcp@80028000 {
226 reg = <0x80028000 2000>;
227 interrupts = <52 53 54>;
228 status = "disabled";
229 };
230
231 pxp@8002a000 {
232 reg = <0x8002a000 2000>;
233 interrupts = <39>;
234 status = "disabled";
235 };
236
237 ocotp@8002c000 {
238 reg = <0x8002c000 2000>;
239 status = "disabled";
240 };
241
242 axi-ahb@8002e000 {
243 reg = <0x8002e000 2000>;
244 status = "disabled";
245 };
246
247 lcdif@80030000 {
248 reg = <0x80030000 2000>;
249 interrupts = <38 86>;
250 status = "disabled";
251 };
252
253 can0: can@80032000 {
254 reg = <0x80032000 2000>;
255 interrupts = <8>;
256 status = "disabled";
257 };
258
259 can1: can@80034000 {
260 reg = <0x80034000 2000>;
261 interrupts = <9>;
262 status = "disabled";
263 };
264
265 simdbg@8003c000 {
266 reg = <0x8003c000 200>;
267 status = "disabled";
268 };
269
270 simgpmisel@8003c200 {
271 reg = <0x8003c200 100>;
272 status = "disabled";
273 };
274
275 simsspsel@8003c300 {
276 reg = <0x8003c300 100>;
277 status = "disabled";
278 };
279
280 simmemsel@8003c400 {
281 reg = <0x8003c400 100>;
282 status = "disabled";
283 };
284
285 gpiomon@8003c500 {
286 reg = <0x8003c500 100>;
287 status = "disabled";
288 };
289
290 simenet@8003c700 {
291 reg = <0x8003c700 100>;
292 status = "disabled";
293 };
294
295 armjtag@8003c800 {
296 reg = <0x8003c800 100>;
297 status = "disabled";
298 };
299 };
300
301 apbx@80040000 {
302 compatible = "simple-bus";
303 #address-cells = <1>;
304 #size-cells = <1>;
305 reg = <0x80040000 0x40000>;
306 ranges;
307
308 clkctl@80040000 {
309 reg = <0x80040000 2000>;
310 status = "disabled";
311 };
312
313 saif0: saif@80042000 {
314 reg = <0x80042000 2000>;
315 interrupts = <59 80>;
316 status = "disabled";
317 };
318
319 power@80044000 {
320 reg = <0x80044000 2000>;
321 status = "disabled";
322 };
323
324 saif1: saif@80046000 {
325 reg = <0x80046000 2000>;
326 interrupts = <58 81>;
327 status = "disabled";
328 };
329
330 lradc@80050000 {
331 reg = <0x80050000 2000>;
332 status = "disabled";
333 };
334
335 spdif@80054000 {
336 reg = <0x80054000 2000>;
337 interrupts = <45 66>;
338 status = "disabled";
339 };
340
341 rtc@80056000 {
342 reg = <0x80056000 2000>;
343 interrupts = <28 29>;
344 status = "disabled";
345 };
346
347 i2c0: i2c@80058000 {
348 reg = <0x80058000 2000>;
349 interrupts = <111 68>;
350 status = "disabled";
351 };
352
353 i2c1: i2c@8005a000 {
354 reg = <0x8005a000 2000>;
355 interrupts = <110 69>;
356 status = "disabled";
357 };
358
359 pwm@80064000 {
360 reg = <0x80064000 2000>;
361 status = "disabled";
362 };
363
364 timrot@80068000 {
365 reg = <0x80068000 2000>;
366 status = "disabled";
367 };
368
369 auart0: serial@8006a000 {
370 reg = <0x8006a000 0x2000>;
371 interrupts = <112 70 71>;
372 status = "disabled";
373 };
374
375 auart1: serial@8006c000 {
376 reg = <0x8006c000 0x2000>;
377 interrupts = <113 72 73>;
378 status = "disabled";
379 };
380
381 auart2: serial@8006e000 {
382 reg = <0x8006e000 0x2000>;
383 interrupts = <114 74 75>;
384 status = "disabled";
385 };
386
387 auart3: serial@80070000 {
388 reg = <0x80070000 0x2000>;
389 interrupts = <115 76 77>;
390 status = "disabled";
391 };
392
393 auart4: serial@80072000 {
394 reg = <0x80072000 0x2000>;
395 interrupts = <116 78 79>;
396 status = "disabled";
397 };
398
399 duart: serial@80074000 {
400 compatible = "arm,pl011", "arm,primecell";
401 reg = <0x80074000 0x1000>;
402 interrupts = <47>;
403 status = "disabled";
404 };
405
406 usbphy0: usbphy@8007c000 {
407 reg = <0x8007c000 0x2000>;
408 status = "disabled";
409 };
410
411 usbphy1: usbphy@8007e000 {
412 reg = <0x8007e000 0x2000>;
413 status = "disabled";
414 };
415 };
416 };
417
418 ahb@80080000 {
419 compatible = "simple-bus";
420 #address-cells = <1>;
421 #size-cells = <1>;
422 reg = <0x80080000 0x80000>;
423 ranges;
424
425 usbctrl0: usbctrl@80080000 {
426 reg = <0x80080000 0x10000>;
427 status = "disabled";
428 };
429
430 usbctrl1: usbctrl@80090000 {
431 reg = <0x80090000 0x10000>;
432 status = "disabled";
433 };
434
435 dflpt@800c0000 {
436 reg = <0x800c0000 0x10000>;
437 status = "disabled";
438 };
439
440 mac0: ethernet@800f0000 {
441 compatible = "fsl,imx28-fec";
442 reg = <0x800f0000 0x4000>;
443 interrupts = <101>;
444 status = "disabled";
445 };
446
447 mac1: ethernet@800f4000 {
448 compatible = "fsl,imx28-fec";
449 reg = <0x800f4000 0x4000>;
450 interrupts = <102>;
451 status = "disabled";
452 };
453
454 switch@800f8000 {
455 reg = <0x800f8000 0x8000>;
456 status = "disabled";
457 };
458
459 };
460};