blob: 494b4c79524508c4775b103ddd1a1e0d94ababd6 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
20
21#include "core.h"
22#include "mac.h"
23#include "htc.h"
24#include "hif.h"
25#include "wmi.h"
26#include "bmi.h"
27#include "debug.h"
28#include "htt.h"
29
30unsigned int ath10k_debug_mask;
31static bool uart_print;
32static unsigned int ath10k_p2p;
33module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
34module_param(uart_print, bool, 0644);
35module_param_named(p2p, ath10k_p2p, uint, 0644);
36MODULE_PARM_DESC(debug_mask, "Debugging mask");
37MODULE_PARM_DESC(uart_print, "Uart target debugging");
38MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
39
40static const struct ath10k_hw_params ath10k_hw_params_list[] = {
41 {
Kalle Valo5e3dd152013-06-12 20:52:10 +030042 .id = QCA988X_HW_2_0_VERSION,
43 .name = "qca988x hw2.0",
44 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
45 .fw = {
46 .dir = QCA988X_HW_2_0_FW_DIR,
47 .fw = QCA988X_HW_2_0_FW_FILE,
48 .otp = QCA988X_HW_2_0_OTP_FILE,
49 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
50 },
51 },
52};
53
54static void ath10k_send_suspend_complete(struct ath10k *ar)
55{
Kalle Valoeffea962013-09-08 17:55:44 +030056 ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030057
58 ar->is_target_paused = true;
59 wake_up(&ar->event_queue);
60}
61
Kalle Valo5e3dd152013-06-12 20:52:10 +030062static int ath10k_init_connect_htc(struct ath10k *ar)
63{
64 int status;
65
66 status = ath10k_wmi_connect_htc_service(ar);
67 if (status)
68 goto conn_fail;
69
70 /* Start HTC */
Michal Kaziorcd003fa2013-07-05 16:15:13 +030071 status = ath10k_htc_start(&ar->htc);
Kalle Valo5e3dd152013-06-12 20:52:10 +030072 if (status)
73 goto conn_fail;
74
75 /* Wait for WMI event to be ready */
76 status = ath10k_wmi_wait_for_service_ready(ar);
77 if (status <= 0) {
78 ath10k_warn("wmi service ready event not received");
79 status = -ETIMEDOUT;
80 goto timeout;
81 }
82
Kalle Valoeffea962013-09-08 17:55:44 +030083 ath10k_dbg(ATH10K_DBG_BOOT, "boot wmi ready\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030084 return 0;
85
86timeout:
Michal Kaziorcd003fa2013-07-05 16:15:13 +030087 ath10k_htc_stop(&ar->htc);
Kalle Valo5e3dd152013-06-12 20:52:10 +030088conn_fail:
89 return status;
90}
91
92static int ath10k_init_configure_target(struct ath10k *ar)
93{
94 u32 param_host;
95 int ret;
96
97 /* tell target which HTC version it is used*/
98 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
99 HTC_PROTOCOL_VERSION);
100 if (ret) {
101 ath10k_err("settings HTC version failed\n");
102 return ret;
103 }
104
105 /* set the firmware mode to STA/IBSS/AP */
106 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
107 if (ret) {
108 ath10k_err("setting firmware mode (1/2) failed\n");
109 return ret;
110 }
111
112 /* TODO following parameters need to be re-visited. */
113 /* num_device */
114 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
115 /* Firmware mode */
116 /* FIXME: Why FW_MODE_AP ??.*/
117 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
118 /* mac_addr_method */
119 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
120 /* firmware_bridge */
121 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
122 /* fwsubmode */
123 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
124
125 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
126 if (ret) {
127 ath10k_err("setting firmware mode (2/2) failed\n");
128 return ret;
129 }
130
131 /* We do all byte-swapping on the host */
132 ret = ath10k_bmi_write32(ar, hi_be, 0);
133 if (ret) {
134 ath10k_err("setting host CPU BE mode failed\n");
135 return ret;
136 }
137
138 /* FW descriptor/Data swap flags */
139 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
140
141 if (ret) {
142 ath10k_err("setting FW data/desc swap flags failed\n");
143 return ret;
144 }
145
146 return 0;
147}
148
149static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
150 const char *dir,
151 const char *file)
152{
153 char filename[100];
154 const struct firmware *fw;
155 int ret;
156
157 if (file == NULL)
158 return ERR_PTR(-ENOENT);
159
160 if (dir == NULL)
161 dir = ".";
162
163 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
164 ret = request_firmware(&fw, filename, ar->dev);
165 if (ret)
166 return ERR_PTR(ret);
167
168 return fw;
169}
170
171static int ath10k_push_board_ext_data(struct ath10k *ar,
172 const struct firmware *fw)
173{
174 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
175 u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
176 u32 board_ext_data_addr;
177 int ret;
178
179 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
180 if (ret) {
181 ath10k_err("could not read board ext data addr (%d)\n", ret);
182 return ret;
183 }
184
Kalle Valob52b7682013-09-08 17:55:38 +0300185 ath10k_dbg(ATH10K_DBG_BOOT,
Kalle Valoeffea962013-09-08 17:55:44 +0300186 "boot push board extended data addr 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300187 board_ext_data_addr);
188
189 if (board_ext_data_addr == 0)
190 return 0;
191
192 if (fw->size != (board_data_size + board_ext_data_size)) {
193 ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n",
194 fw->size, board_data_size, board_ext_data_size);
195 return -EINVAL;
196 }
197
198 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
199 fw->data + board_data_size,
200 board_ext_data_size);
201 if (ret) {
202 ath10k_err("could not write board ext data (%d)\n", ret);
203 return ret;
204 }
205
206 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
207 (board_ext_data_size << 16) | 1);
208 if (ret) {
209 ath10k_err("could not write board ext data bit (%d)\n", ret);
210 return ret;
211 }
212
213 return 0;
214}
215
216static int ath10k_download_board_data(struct ath10k *ar)
217{
Kalle Valo36527912013-09-27 19:54:55 +0300218 const struct firmware *fw = ar->board;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300219 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
220 u32 address;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300221 int ret;
222
Kalle Valo5e3dd152013-06-12 20:52:10 +0300223 ret = ath10k_push_board_ext_data(ar, fw);
224 if (ret) {
225 ath10k_err("could not push board ext data (%d)\n", ret);
226 goto exit;
227 }
228
229 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
230 if (ret) {
231 ath10k_err("could not read board data addr (%d)\n", ret);
232 goto exit;
233 }
234
235 ret = ath10k_bmi_write_memory(ar, address, fw->data,
236 min_t(u32, board_data_size, fw->size));
237 if (ret) {
238 ath10k_err("could not write board data (%d)\n", ret);
239 goto exit;
240 }
241
242 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
243 if (ret) {
244 ath10k_err("could not write board data bit (%d)\n", ret);
245 goto exit;
246 }
247
248exit:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300249 return ret;
250}
251
252static int ath10k_download_and_run_otp(struct ath10k *ar)
253{
Michal Kazior29385052013-07-16 09:38:58 +0200254 const struct firmware *fw = ar->otp;
255 u32 address = ar->hw_params.patch_load_addr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256 u32 exec_param;
257 int ret;
258
259 /* OTP is optional */
260
Michal Kazior29385052013-07-16 09:38:58 +0200261 if (!ar->otp)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300262 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300263
264 ret = ath10k_bmi_fast_download(ar, address, fw->data, fw->size);
265 if (ret) {
266 ath10k_err("could not write otp (%d)\n", ret);
267 goto exit;
268 }
269
270 exec_param = 0;
271 ret = ath10k_bmi_execute(ar, address, &exec_param);
272 if (ret) {
273 ath10k_err("could not execute otp (%d)\n", ret);
274 goto exit;
275 }
276
277exit:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300278 return ret;
279}
280
281static int ath10k_download_fw(struct ath10k *ar)
282{
Michal Kazior29385052013-07-16 09:38:58 +0200283 const struct firmware *fw = ar->firmware;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300284 u32 address;
285 int ret;
286
Kalle Valo5e3dd152013-06-12 20:52:10 +0300287 address = ar->hw_params.patch_load_addr;
288
Kalle Valo5e3dd152013-06-12 20:52:10 +0300289 ret = ath10k_bmi_fast_download(ar, address, fw->data, fw->size);
290 if (ret) {
291 ath10k_err("could not write fw (%d)\n", ret);
292 goto exit;
293 }
294
295exit:
Michal Kazior29385052013-07-16 09:38:58 +0200296 return ret;
297}
298
299static void ath10k_core_free_firmware_files(struct ath10k *ar)
300{
Kalle Valo36527912013-09-27 19:54:55 +0300301 if (ar->board && !IS_ERR(ar->board))
302 release_firmware(ar->board);
Michal Kazior29385052013-07-16 09:38:58 +0200303
304 if (ar->otp && !IS_ERR(ar->otp))
305 release_firmware(ar->otp);
306
307 if (ar->firmware && !IS_ERR(ar->firmware))
308 release_firmware(ar->firmware);
309
Kalle Valo36527912013-09-27 19:54:55 +0300310 ar->board = NULL;
Michal Kazior29385052013-07-16 09:38:58 +0200311 ar->otp = NULL;
312 ar->firmware = NULL;
313}
314
315static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
316{
317 int ret = 0;
318
319 if (ar->hw_params.fw.fw == NULL) {
320 ath10k_err("firmware file not defined\n");
321 return -EINVAL;
322 }
323
324 if (ar->hw_params.fw.board == NULL) {
325 ath10k_err("board data file not defined");
326 return -EINVAL;
327 }
328
Kalle Valo36527912013-09-27 19:54:55 +0300329 ar->board = ath10k_fetch_fw_file(ar,
330 ar->hw_params.fw.dir,
331 ar->hw_params.fw.board);
332 if (IS_ERR(ar->board)) {
333 ret = PTR_ERR(ar->board);
Michal Kazior29385052013-07-16 09:38:58 +0200334 ath10k_err("could not fetch board data (%d)\n", ret);
335 goto err;
336 }
337
338 ar->firmware = ath10k_fetch_fw_file(ar,
339 ar->hw_params.fw.dir,
340 ar->hw_params.fw.fw);
341 if (IS_ERR(ar->firmware)) {
342 ret = PTR_ERR(ar->firmware);
343 ath10k_err("could not fetch firmware (%d)\n", ret);
344 goto err;
345 }
346
347 /* OTP may be undefined. If so, don't fetch it at all */
348 if (ar->hw_params.fw.otp == NULL)
349 return 0;
350
351 ar->otp = ath10k_fetch_fw_file(ar,
352 ar->hw_params.fw.dir,
353 ar->hw_params.fw.otp);
354 if (IS_ERR(ar->otp)) {
355 ret = PTR_ERR(ar->otp);
356 ath10k_err("could not fetch otp (%d)\n", ret);
357 goto err;
358 }
359
360 return 0;
361
362err:
363 ath10k_core_free_firmware_files(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300364 return ret;
365}
366
367static int ath10k_init_download_firmware(struct ath10k *ar)
368{
369 int ret;
370
371 ret = ath10k_download_board_data(ar);
372 if (ret)
373 return ret;
374
375 ret = ath10k_download_and_run_otp(ar);
376 if (ret)
377 return ret;
378
379 ret = ath10k_download_fw(ar);
380 if (ret)
381 return ret;
382
383 return ret;
384}
385
386static int ath10k_init_uart(struct ath10k *ar)
387{
388 int ret;
389
390 /*
391 * Explicitly setting UART prints to zero as target turns it on
392 * based on scratch registers.
393 */
394 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
395 if (ret) {
396 ath10k_warn("could not disable UART prints (%d)\n", ret);
397 return ret;
398 }
399
400 if (!uart_print) {
401 ath10k_info("UART prints disabled\n");
402 return 0;
403 }
404
405 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
406 if (ret) {
407 ath10k_warn("could not enable UART prints (%d)\n", ret);
408 return ret;
409 }
410
411 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
412 if (ret) {
413 ath10k_warn("could not enable UART prints (%d)\n", ret);
414 return ret;
415 }
416
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200417 /* Set the UART baud rate to 19200. */
418 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
419 if (ret) {
420 ath10k_warn("could not set the baud rate (%d)\n", ret);
421 return ret;
422 }
423
Kalle Valo5e3dd152013-06-12 20:52:10 +0300424 ath10k_info("UART prints enabled\n");
425 return 0;
426}
427
428static int ath10k_init_hw_params(struct ath10k *ar)
429{
430 const struct ath10k_hw_params *uninitialized_var(hw_params);
431 int i;
432
433 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
434 hw_params = &ath10k_hw_params_list[i];
435
436 if (hw_params->id == ar->target_version)
437 break;
438 }
439
440 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
441 ath10k_err("Unsupported hardware version: 0x%x\n",
442 ar->target_version);
443 return -EINVAL;
444 }
445
446 ar->hw_params = *hw_params;
447
448 ath10k_info("Hardware name %s version 0x%x\n",
449 ar->hw_params.name, ar->target_version);
450
451 return 0;
452}
453
Michal Kazioraffd3212013-07-16 09:54:35 +0200454static void ath10k_core_restart(struct work_struct *work)
455{
456 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
457
458 mutex_lock(&ar->conf_mutex);
459
460 switch (ar->state) {
461 case ATH10K_STATE_ON:
462 ath10k_halt(ar);
463 ar->state = ATH10K_STATE_RESTARTING;
464 ieee80211_restart_hw(ar->hw);
465 break;
466 case ATH10K_STATE_OFF:
467 /* this can happen if driver is being unloaded */
468 ath10k_warn("cannot restart a device that hasn't been started\n");
469 break;
470 case ATH10K_STATE_RESTARTING:
471 case ATH10K_STATE_RESTARTED:
472 ar->state = ATH10K_STATE_WEDGED;
473 /* fall through */
474 case ATH10K_STATE_WEDGED:
475 ath10k_warn("device is wedged, will not restart\n");
476 break;
477 }
478
479 mutex_unlock(&ar->conf_mutex);
480}
481
Kalle Valo5e3dd152013-06-12 20:52:10 +0300482struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300483 const struct ath10k_hif_ops *hif_ops)
484{
485 struct ath10k *ar;
486
487 ar = ath10k_mac_create();
488 if (!ar)
489 return NULL;
490
491 ar->ath_common.priv = ar;
492 ar->ath_common.hw = ar->hw;
493
494 ar->p2p = !!ath10k_p2p;
495 ar->dev = dev;
496
497 ar->hif.priv = hif_priv;
498 ar->hif.ops = hif_ops;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300499
Kalle Valo5e3dd152013-06-12 20:52:10 +0300500 init_completion(&ar->scan.started);
501 init_completion(&ar->scan.completed);
502 init_completion(&ar->scan.on_channel);
503
504 init_completion(&ar->install_key_done);
505 init_completion(&ar->vdev_setup_done);
506
507 setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar);
508
509 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
510 if (!ar->workqueue)
511 goto err_wq;
512
513 mutex_init(&ar->conf_mutex);
514 spin_lock_init(&ar->data_lock);
515
516 INIT_LIST_HEAD(&ar->peers);
517 init_waitqueue_head(&ar->peer_mapping_wq);
518
519 init_completion(&ar->offchan_tx_completed);
520 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
521 skb_queue_head_init(&ar->offchan_tx_queue);
522
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200523 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
524 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
525
Kalle Valo5e3dd152013-06-12 20:52:10 +0300526 init_waitqueue_head(&ar->event_queue);
527
Michal Kazioraffd3212013-07-16 09:54:35 +0200528 INIT_WORK(&ar->restart_work, ath10k_core_restart);
529
Kalle Valo5e3dd152013-06-12 20:52:10 +0300530 return ar;
531
532err_wq:
533 ath10k_mac_destroy(ar);
534 return NULL;
535}
536EXPORT_SYMBOL(ath10k_core_create);
537
538void ath10k_core_destroy(struct ath10k *ar)
539{
540 flush_workqueue(ar->workqueue);
541 destroy_workqueue(ar->workqueue);
542
543 ath10k_mac_destroy(ar);
544}
545EXPORT_SYMBOL(ath10k_core_destroy);
546
Michal Kaziordd30a362013-07-16 09:38:51 +0200547int ath10k_core_start(struct ath10k *ar)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300548{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300549 int status;
550
Michal Kazior64d151d2013-07-16 09:38:53 +0200551 ath10k_bmi_start(ar);
552
Kalle Valo5e3dd152013-06-12 20:52:10 +0300553 if (ath10k_init_configure_target(ar)) {
554 status = -EINVAL;
555 goto err;
556 }
557
558 status = ath10k_init_download_firmware(ar);
559 if (status)
560 goto err;
561
562 status = ath10k_init_uart(ar);
563 if (status)
564 goto err;
565
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300566 ar->htc.htc_ops.target_send_suspend_complete =
567 ath10k_send_suspend_complete;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300568
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300569 status = ath10k_htc_init(ar);
570 if (status) {
571 ath10k_err("could not init HTC (%d)\n", status);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300572 goto err;
573 }
574
575 status = ath10k_bmi_done(ar);
576 if (status)
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300577 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300578
579 status = ath10k_wmi_attach(ar);
580 if (status) {
581 ath10k_err("WMI attach failed: %d\n", status);
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300582 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300583 }
584
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300585 status = ath10k_htc_wait_target(&ar->htc);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300586 if (status)
587 goto err_wmi_detach;
588
Michal Kazioredb82362013-07-05 16:15:14 +0300589 status = ath10k_htt_attach(ar);
590 if (status) {
591 ath10k_err("could not attach htt (%d)\n", status);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300592 goto err_wmi_detach;
593 }
594
595 status = ath10k_init_connect_htc(ar);
596 if (status)
597 goto err_htt_detach;
598
599 ath10k_info("firmware %s booted\n", ar->hw->wiphy->fw_version);
600
Kalle Valo5e3dd152013-06-12 20:52:10 +0300601 status = ath10k_wmi_cmd_init(ar);
602 if (status) {
603 ath10k_err("could not send WMI init command (%d)\n", status);
604 goto err_disconnect_htc;
605 }
606
607 status = ath10k_wmi_wait_for_unified_ready(ar);
608 if (status <= 0) {
609 ath10k_err("wmi unified ready event not received\n");
610 status = -ETIMEDOUT;
611 goto err_disconnect_htc;
612 }
613
Michal Kazioredb82362013-07-05 16:15:14 +0300614 status = ath10k_htt_attach_target(&ar->htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300615 if (status)
616 goto err_disconnect_htc;
617
Kalle Valodb66ea02013-09-03 11:44:03 +0300618 status = ath10k_debug_start(ar);
619 if (status)
620 goto err_disconnect_htc;
621
Michal Kazior1a1b8a82013-07-16 09:38:55 +0200622 ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
623
Michal Kaziordd30a362013-07-16 09:38:51 +0200624 return 0;
625
626err_disconnect_htc:
627 ath10k_htc_stop(&ar->htc);
628err_htt_detach:
629 ath10k_htt_detach(&ar->htt);
630err_wmi_detach:
631 ath10k_wmi_detach(ar);
632err:
633 return status;
634}
Michal Kazior818bdd12013-07-16 09:38:57 +0200635EXPORT_SYMBOL(ath10k_core_start);
Michal Kaziordd30a362013-07-16 09:38:51 +0200636
637void ath10k_core_stop(struct ath10k *ar)
638{
Kalle Valodb66ea02013-09-03 11:44:03 +0300639 ath10k_debug_stop(ar);
Michal Kaziordd30a362013-07-16 09:38:51 +0200640 ath10k_htc_stop(&ar->htc);
641 ath10k_htt_detach(&ar->htt);
642 ath10k_wmi_detach(ar);
643}
Michal Kazior818bdd12013-07-16 09:38:57 +0200644EXPORT_SYMBOL(ath10k_core_stop);
645
646/* mac80211 manages fw/hw initialization through start/stop hooks. However in
647 * order to know what hw capabilities should be advertised to mac80211 it is
648 * necessary to load the firmware (and tear it down immediately since start
649 * hook will try to init it again) before registering */
650static int ath10k_core_probe_fw(struct ath10k *ar)
651{
Michal Kazior29385052013-07-16 09:38:58 +0200652 struct bmi_target_info target_info;
653 int ret = 0;
Michal Kazior818bdd12013-07-16 09:38:57 +0200654
655 ret = ath10k_hif_power_up(ar);
656 if (ret) {
657 ath10k_err("could not start pci hif (%d)\n", ret);
658 return ret;
659 }
660
Michal Kazior29385052013-07-16 09:38:58 +0200661 memset(&target_info, 0, sizeof(target_info));
662 ret = ath10k_bmi_get_target_info(ar, &target_info);
663 if (ret) {
664 ath10k_err("could not get target info (%d)\n", ret);
665 ath10k_hif_power_down(ar);
666 return ret;
667 }
668
669 ar->target_version = target_info.version;
670 ar->hw->wiphy->hw_version = target_info.version;
671
672 ret = ath10k_init_hw_params(ar);
673 if (ret) {
674 ath10k_err("could not get hw params (%d)\n", ret);
675 ath10k_hif_power_down(ar);
676 return ret;
677 }
678
679 ret = ath10k_core_fetch_firmware_files(ar);
680 if (ret) {
681 ath10k_err("could not fetch firmware files (%d)\n", ret);
682 ath10k_hif_power_down(ar);
683 return ret;
684 }
685
Michal Kazior818bdd12013-07-16 09:38:57 +0200686 ret = ath10k_core_start(ar);
687 if (ret) {
688 ath10k_err("could not init core (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200689 ath10k_core_free_firmware_files(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +0200690 ath10k_hif_power_down(ar);
691 return ret;
692 }
693
694 ath10k_core_stop(ar);
695 ath10k_hif_power_down(ar);
696 return 0;
697}
Michal Kaziordd30a362013-07-16 09:38:51 +0200698
Kalle Valoe01ae682013-09-01 11:22:14 +0300699static int ath10k_core_check_chip_id(struct ath10k *ar)
700{
701 u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
702
Kalle Valoeffea962013-09-08 17:55:44 +0300703 ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
704 ar->chip_id, hw_revision);
705
Kalle Valoe01ae682013-09-01 11:22:14 +0300706 /* Check that we are not using hw1.0 (some of them have same pci id
707 * as hw2.0) before doing anything else as ath10k crashes horribly
708 * due to missing hw1.0 workarounds. */
709 switch (hw_revision) {
710 case QCA988X_HW_1_0_CHIP_ID_REV:
711 ath10k_err("ERROR: qca988x hw1.0 is not supported\n");
712 return -EOPNOTSUPP;
713
714 case QCA988X_HW_2_0_CHIP_ID_REV:
715 /* known hardware revision, continue normally */
716 return 0;
717
718 default:
719 ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n",
720 ar->chip_id);
721 return 0;
722 }
723
724 return 0;
725}
726
727int ath10k_core_register(struct ath10k *ar, u32 chip_id)
Michal Kaziordd30a362013-07-16 09:38:51 +0200728{
729 int status;
730
Kalle Valoe01ae682013-09-01 11:22:14 +0300731 ar->chip_id = chip_id;
732
733 status = ath10k_core_check_chip_id(ar);
734 if (status) {
735 ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id);
736 return status;
737 }
738
Michal Kazior818bdd12013-07-16 09:38:57 +0200739 status = ath10k_core_probe_fw(ar);
740 if (status) {
741 ath10k_err("could not probe fw (%d)\n", status);
742 return status;
743 }
Michal Kaziordd30a362013-07-16 09:38:51 +0200744
Kalle Valo5e3dd152013-06-12 20:52:10 +0300745 status = ath10k_mac_register(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +0200746 if (status) {
747 ath10k_err("could not register to mac80211 (%d)\n", status);
Michal Kazior29385052013-07-16 09:38:58 +0200748 goto err_release_fw;
Michal Kazior818bdd12013-07-16 09:38:57 +0200749 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300750
751 status = ath10k_debug_create(ar);
752 if (status) {
753 ath10k_err("unable to initialize debugfs\n");
754 goto err_unregister_mac;
755 }
756
757 return 0;
758
759err_unregister_mac:
760 ath10k_mac_unregister(ar);
Michal Kazior29385052013-07-16 09:38:58 +0200761err_release_fw:
762 ath10k_core_free_firmware_files(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300763 return status;
764}
765EXPORT_SYMBOL(ath10k_core_register);
766
767void ath10k_core_unregister(struct ath10k *ar)
768{
769 /* We must unregister from mac80211 before we stop HTC and HIF.
770 * Otherwise we will fail to submit commands to FW and mac80211 will be
771 * unhappy about callback failures. */
772 ath10k_mac_unregister(ar);
Kalle Valodb66ea02013-09-03 11:44:03 +0300773
Michal Kazior29385052013-07-16 09:38:58 +0200774 ath10k_core_free_firmware_files(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300775}
776EXPORT_SYMBOL(ath10k_core_unregister);
777
Kalle Valo5e3dd152013-06-12 20:52:10 +0300778MODULE_AUTHOR("Qualcomm Atheros");
779MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
780MODULE_LICENSE("Dual BSD/GPL");