David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 1 | /* iommu.c: Generic sparc64 IOMMU support. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 3 | * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com) |
| 5 | */ |
| 6 | |
| 7 | #include <linux/kernel.h> |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 8 | #include <linux/module.h> |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 9 | #include <linux/delay.h> |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 10 | #include <linux/device.h> |
| 11 | #include <linux/dma-mapping.h> |
| 12 | #include <linux/errno.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 14 | #ifdef CONFIG_PCI |
| 15 | #include <linux/pci.h> |
| 16 | #endif |
| 17 | |
| 18 | #include <asm/iommu.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | |
| 20 | #include "iommu_common.h" |
| 21 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 22 | #define STC_CTXMATCH_ADDR(STC, CTX) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | ((STC)->strbuf_ctxmatch_base + ((CTX) << 3)) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 24 | #define STC_FLUSHFLAG_INIT(STC) \ |
| 25 | (*((STC)->strbuf_flushflag) = 0UL) |
| 26 | #define STC_FLUSHFLAG_SET(STC) \ |
| 27 | (*((STC)->strbuf_flushflag) != 0UL) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 29 | #define iommu_read(__reg) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | ({ u64 __ret; \ |
| 31 | __asm__ __volatile__("ldxa [%1] %2, %0" \ |
| 32 | : "=r" (__ret) \ |
| 33 | : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \ |
| 34 | : "memory"); \ |
| 35 | __ret; \ |
| 36 | }) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 37 | #define iommu_write(__reg, __val) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | __asm__ __volatile__("stxa %0, [%1] %2" \ |
| 39 | : /* no outputs */ \ |
| 40 | : "r" (__val), "r" (__reg), \ |
| 41 | "i" (ASI_PHYS_BYPASS_EC_E)) |
| 42 | |
| 43 | /* Must be invoked under the IOMMU lock. */ |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 44 | static void __iommu_flushall(struct iommu *iommu) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | { |
David S. Miller | 861fe90 | 2007-05-02 17:31:36 -0700 | [diff] [blame] | 46 | if (iommu->iommu_flushinv) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 47 | iommu_write(iommu->iommu_flushinv, ~(u64)0); |
David S. Miller | 861fe90 | 2007-05-02 17:31:36 -0700 | [diff] [blame] | 48 | } else { |
| 49 | unsigned long tag; |
| 50 | int entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 52 | tag = iommu->iommu_tags; |
David S. Miller | 861fe90 | 2007-05-02 17:31:36 -0700 | [diff] [blame] | 53 | for (entry = 0; entry < 16; entry++) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 54 | iommu_write(tag, 0); |
David S. Miller | 861fe90 | 2007-05-02 17:31:36 -0700 | [diff] [blame] | 55 | tag += 8; |
| 56 | } |
| 57 | |
| 58 | /* Ensure completion of previous PIO writes. */ |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 59 | (void) iommu_read(iommu->write_complete_reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | } |
| 62 | |
| 63 | #define IOPTE_CONSISTENT(CTX) \ |
| 64 | (IOPTE_VALID | IOPTE_CACHE | \ |
| 65 | (((CTX) << 47) & IOPTE_CONTEXT)) |
| 66 | |
| 67 | #define IOPTE_STREAMING(CTX) \ |
| 68 | (IOPTE_CONSISTENT(CTX) | IOPTE_STBUF) |
| 69 | |
| 70 | /* Existing mappings are never marked invalid, instead they |
| 71 | * are pointed to a dummy page. |
| 72 | */ |
| 73 | #define IOPTE_IS_DUMMY(iommu, iopte) \ |
| 74 | ((iopte_val(*iopte) & IOPTE_PAGE) == (iommu)->dummy_page_pa) |
| 75 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 76 | static inline void iopte_make_dummy(struct iommu *iommu, iopte_t *iopte) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | { |
| 78 | unsigned long val = iopte_val(*iopte); |
| 79 | |
| 80 | val &= ~IOPTE_PAGE; |
| 81 | val |= iommu->dummy_page_pa; |
| 82 | |
| 83 | iopte_val(*iopte) = val; |
| 84 | } |
| 85 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 86 | /* Based largely upon the ppc64 iommu allocator. */ |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 87 | static long arena_alloc(struct iommu *iommu, unsigned long npages) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 88 | { |
David S. Miller | 9b3627f | 2007-04-24 23:51:18 -0700 | [diff] [blame] | 89 | struct iommu_arena *arena = &iommu->arena; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 90 | unsigned long n, i, start, end, limit; |
| 91 | int pass; |
| 92 | |
| 93 | limit = arena->limit; |
| 94 | start = arena->hint; |
| 95 | pass = 0; |
| 96 | |
| 97 | again: |
| 98 | n = find_next_zero_bit(arena->map, limit, start); |
| 99 | end = n + npages; |
| 100 | if (unlikely(end >= limit)) { |
| 101 | if (likely(pass < 1)) { |
| 102 | limit = start; |
| 103 | start = 0; |
| 104 | __iommu_flushall(iommu); |
| 105 | pass++; |
| 106 | goto again; |
| 107 | } else { |
| 108 | /* Scanned the whole thing, give up. */ |
| 109 | return -1; |
| 110 | } |
| 111 | } |
| 112 | |
| 113 | for (i = n; i < end; i++) { |
| 114 | if (test_bit(i, arena->map)) { |
| 115 | start = i + 1; |
| 116 | goto again; |
| 117 | } |
| 118 | } |
| 119 | |
| 120 | for (i = n; i < end; i++) |
| 121 | __set_bit(i, arena->map); |
| 122 | |
| 123 | arena->hint = end; |
| 124 | |
| 125 | return n; |
| 126 | } |
| 127 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 128 | static void arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 129 | { |
| 130 | unsigned long i; |
| 131 | |
| 132 | for (i = base; i < (base + npages); i++) |
| 133 | __clear_bit(i, arena->map); |
| 134 | } |
| 135 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 136 | int iommu_table_init(struct iommu *iommu, int tsbsize, |
| 137 | u32 dma_offset, u32 dma_addr_mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 139 | unsigned long i, tsbbase, order, sz, num_tsb_entries; |
| 140 | |
| 141 | num_tsb_entries = tsbsize / sizeof(iopte_t); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 143 | /* Setup initial software IOMMU state. */ |
| 144 | spin_lock_init(&iommu->lock); |
| 145 | iommu->ctx_lowest_free = 1; |
| 146 | iommu->page_table_map_base = dma_offset; |
| 147 | iommu->dma_addr_mask = dma_addr_mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 149 | /* Allocate and initialize the free area map. */ |
| 150 | sz = num_tsb_entries / 8; |
| 151 | sz = (sz + 7UL) & ~7UL; |
Eric Sesterhenn | 9132983 | 2006-03-06 13:48:40 -0800 | [diff] [blame] | 152 | iommu->arena.map = kzalloc(sz, GFP_KERNEL); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 153 | if (!iommu->arena.map) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 154 | printk(KERN_ERR "IOMMU: Error, kmalloc(arena.map) failed.\n"); |
| 155 | return -ENOMEM; |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 156 | } |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 157 | iommu->arena.limit = num_tsb_entries; |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 158 | |
| 159 | /* Allocate and initialize the dummy page which we |
| 160 | * set inactive IO PTEs to point to. |
| 161 | */ |
| 162 | iommu->dummy_page = __get_free_pages(GFP_KERNEL, 0); |
| 163 | if (!iommu->dummy_page) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 164 | printk(KERN_ERR "IOMMU: Error, gfp(dummy_page) failed.\n"); |
| 165 | goto out_free_map; |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 166 | } |
| 167 | memset((void *)iommu->dummy_page, 0, PAGE_SIZE); |
| 168 | iommu->dummy_page_pa = (unsigned long) __pa(iommu->dummy_page); |
| 169 | |
| 170 | /* Now allocate and setup the IOMMU page table itself. */ |
| 171 | order = get_order(tsbsize); |
| 172 | tsbbase = __get_free_pages(GFP_KERNEL, order); |
| 173 | if (!tsbbase) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 174 | printk(KERN_ERR "IOMMU: Error, gfp(tsb) failed.\n"); |
| 175 | goto out_free_dummy_page; |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 176 | } |
| 177 | iommu->page_table = (iopte_t *)tsbbase; |
| 178 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 179 | for (i = 0; i < num_tsb_entries; i++) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 | iopte_make_dummy(iommu, &iommu->page_table[i]); |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 181 | |
| 182 | return 0; |
| 183 | |
| 184 | out_free_dummy_page: |
| 185 | free_page(iommu->dummy_page); |
| 186 | iommu->dummy_page = 0UL; |
| 187 | |
| 188 | out_free_map: |
| 189 | kfree(iommu->arena.map); |
| 190 | iommu->arena.map = NULL; |
| 191 | |
| 192 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | } |
| 194 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 195 | static inline iopte_t *alloc_npages(struct iommu *iommu, unsigned long npages) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 196 | { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 197 | long entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 199 | entry = arena_alloc(iommu, npages); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 200 | if (unlikely(entry < 0)) |
| 201 | return NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 203 | return iommu->page_table + entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | } |
| 205 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 206 | static inline void free_npages(struct iommu *iommu, dma_addr_t base, unsigned long npages) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 208 | arena_free(&iommu->arena, base >> IO_PAGE_SHIFT, npages); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 209 | } |
| 210 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 211 | static int iommu_alloc_ctx(struct iommu *iommu) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 212 | { |
| 213 | int lowest = iommu->ctx_lowest_free; |
| 214 | int sz = IOMMU_NUM_CTXS - lowest; |
| 215 | int n = find_next_zero_bit(iommu->ctx_bitmap, sz, lowest); |
| 216 | |
| 217 | if (unlikely(n == sz)) { |
| 218 | n = find_next_zero_bit(iommu->ctx_bitmap, lowest, 1); |
| 219 | if (unlikely(n == lowest)) { |
| 220 | printk(KERN_WARNING "IOMMU: Ran out of contexts.\n"); |
| 221 | n = 0; |
| 222 | } |
| 223 | } |
| 224 | if (n) |
| 225 | __set_bit(n, iommu->ctx_bitmap); |
| 226 | |
| 227 | return n; |
| 228 | } |
| 229 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 230 | static inline void iommu_free_ctx(struct iommu *iommu, int ctx) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 231 | { |
| 232 | if (likely(ctx)) { |
| 233 | __clear_bit(ctx, iommu->ctx_bitmap); |
| 234 | if (ctx < iommu->ctx_lowest_free) |
| 235 | iommu->ctx_lowest_free = ctx; |
| 236 | } |
| 237 | } |
| 238 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 239 | static void *dma_4u_alloc_coherent(struct device *dev, size_t size, |
| 240 | dma_addr_t *dma_addrp, gfp_t gfp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 241 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 242 | struct iommu *iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | iopte_t *iopte; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 244 | unsigned long flags, order, first_page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 245 | void *ret; |
| 246 | int npages; |
| 247 | |
| 248 | size = IO_PAGE_ALIGN(size); |
| 249 | order = get_order(size); |
| 250 | if (order >= 10) |
| 251 | return NULL; |
| 252 | |
David S. Miller | 42f1423 | 2006-05-23 02:07:22 -0700 | [diff] [blame] | 253 | first_page = __get_free_pages(gfp, order); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 254 | if (first_page == 0UL) |
| 255 | return NULL; |
| 256 | memset((char *)first_page, 0, PAGE_SIZE << order); |
| 257 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 258 | iommu = dev->archdata.iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | |
| 260 | spin_lock_irqsave(&iommu->lock, flags); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 261 | iopte = alloc_npages(iommu, size >> IO_PAGE_SHIFT); |
| 262 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 263 | |
| 264 | if (unlikely(iopte == NULL)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | free_pages(first_page, order); |
| 266 | return NULL; |
| 267 | } |
| 268 | |
| 269 | *dma_addrp = (iommu->page_table_map_base + |
| 270 | ((iopte - iommu->page_table) << IO_PAGE_SHIFT)); |
| 271 | ret = (void *) first_page; |
| 272 | npages = size >> IO_PAGE_SHIFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 273 | first_page = __pa(first_page); |
| 274 | while (npages--) { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 275 | iopte_val(*iopte) = (IOPTE_CONSISTENT(0UL) | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | IOPTE_WRITE | |
| 277 | (first_page & IOPTE_PAGE)); |
| 278 | iopte++; |
| 279 | first_page += IO_PAGE_SIZE; |
| 280 | } |
| 281 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | return ret; |
| 283 | } |
| 284 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 285 | static void dma_4u_free_coherent(struct device *dev, size_t size, |
| 286 | void *cpu, dma_addr_t dvma) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 288 | struct iommu *iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | iopte_t *iopte; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 290 | unsigned long flags, order, npages; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 291 | |
| 292 | npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT; |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 293 | iommu = dev->archdata.iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | iopte = iommu->page_table + |
| 295 | ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 296 | |
| 297 | spin_lock_irqsave(&iommu->lock, flags); |
| 298 | |
David S. Miller | 012d64f | 2006-10-25 22:33:07 -0700 | [diff] [blame] | 299 | free_npages(iommu, dvma - iommu->page_table_map_base, npages); |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 300 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 301 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 302 | |
| 303 | order = get_order(size); |
| 304 | if (order < 10) |
| 305 | free_pages((unsigned long)cpu, order); |
| 306 | } |
| 307 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 308 | static dma_addr_t dma_4u_map_single(struct device *dev, void *ptr, size_t sz, |
| 309 | enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 311 | struct iommu *iommu; |
| 312 | struct strbuf *strbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 313 | iopte_t *base; |
| 314 | unsigned long flags, npages, oaddr; |
| 315 | unsigned long i, base_paddr, ctx; |
| 316 | u32 bus_addr, ret; |
| 317 | unsigned long iopte_protection; |
| 318 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 319 | iommu = dev->archdata.iommu; |
| 320 | strbuf = dev->archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 321 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 322 | if (unlikely(direction == DMA_NONE)) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 323 | goto bad_no_ctx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 324 | |
| 325 | oaddr = (unsigned long)ptr; |
| 326 | npages = IO_PAGE_ALIGN(oaddr + sz) - (oaddr & IO_PAGE_MASK); |
| 327 | npages >>= IO_PAGE_SHIFT; |
| 328 | |
| 329 | spin_lock_irqsave(&iommu->lock, flags); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 330 | base = alloc_npages(iommu, npages); |
| 331 | ctx = 0; |
| 332 | if (iommu->iommu_ctxflush) |
| 333 | ctx = iommu_alloc_ctx(iommu); |
| 334 | spin_unlock_irqrestore(&iommu->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 336 | if (unlikely(!base)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | goto bad; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 338 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | bus_addr = (iommu->page_table_map_base + |
| 340 | ((base - iommu->page_table) << IO_PAGE_SHIFT)); |
| 341 | ret = bus_addr | (oaddr & ~IO_PAGE_MASK); |
| 342 | base_paddr = __pa(oaddr & IO_PAGE_MASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | if (strbuf->strbuf_enabled) |
| 344 | iopte_protection = IOPTE_STREAMING(ctx); |
| 345 | else |
| 346 | iopte_protection = IOPTE_CONSISTENT(ctx); |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 347 | if (direction != DMA_TO_DEVICE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 348 | iopte_protection |= IOPTE_WRITE; |
| 349 | |
| 350 | for (i = 0; i < npages; i++, base++, base_paddr += IO_PAGE_SIZE) |
| 351 | iopte_val(*base) = iopte_protection | base_paddr; |
| 352 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | return ret; |
| 354 | |
| 355 | bad: |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 356 | iommu_free_ctx(iommu, ctx); |
| 357 | bad_no_ctx: |
| 358 | if (printk_ratelimit()) |
| 359 | WARN_ON(1); |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 360 | return DMA_ERROR_CODE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 361 | } |
| 362 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 363 | static void strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, |
| 364 | u32 vaddr, unsigned long ctx, unsigned long npages, |
| 365 | enum dma_data_direction direction) |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 366 | { |
| 367 | int limit; |
| 368 | |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 369 | if (strbuf->strbuf_ctxflush && |
| 370 | iommu->iommu_ctxflush) { |
| 371 | unsigned long matchreg, flushreg; |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 372 | u64 val; |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 373 | |
| 374 | flushreg = strbuf->strbuf_ctxflush; |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 375 | matchreg = STC_CTXMATCH_ADDR(strbuf, ctx); |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 376 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 377 | iommu_write(flushreg, ctx); |
| 378 | val = iommu_read(matchreg); |
David S. Miller | 88314ee | 2005-05-31 19:13:52 -0700 | [diff] [blame] | 379 | val &= 0xffff; |
| 380 | if (!val) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 381 | goto do_flush_sync; |
| 382 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 383 | while (val) { |
| 384 | if (val & 0x1) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 385 | iommu_write(flushreg, ctx); |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 386 | val >>= 1; |
David S. Miller | a228dfd | 2005-05-20 11:40:32 -0700 | [diff] [blame] | 387 | } |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 388 | val = iommu_read(matchreg); |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 389 | if (unlikely(val)) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 390 | printk(KERN_WARNING "strbuf_flush: ctx flush " |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 391 | "timeout matchreg[%lx] ctx[%lx]\n", |
| 392 | val, ctx); |
| 393 | goto do_page_flush; |
| 394 | } |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 395 | } else { |
| 396 | unsigned long i; |
| 397 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 398 | do_page_flush: |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 399 | for (i = 0; i < npages; i++, vaddr += IO_PAGE_SIZE) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 400 | iommu_write(strbuf->strbuf_pflush, vaddr); |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 401 | } |
| 402 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 403 | do_flush_sync: |
| 404 | /* If the device could not have possibly put dirty data into |
| 405 | * the streaming cache, no flush-flag synchronization needs |
| 406 | * to be performed. |
| 407 | */ |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 408 | if (direction == DMA_TO_DEVICE) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 409 | return; |
| 410 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 411 | STC_FLUSHFLAG_INIT(strbuf); |
| 412 | iommu_write(strbuf->strbuf_fsync, strbuf->strbuf_flushflag_pa); |
| 413 | (void) iommu_read(iommu->write_complete_reg); |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 414 | |
David S. Miller | a228dfd | 2005-05-20 11:40:32 -0700 | [diff] [blame] | 415 | limit = 100000; |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 416 | while (!STC_FLUSHFLAG_SET(strbuf)) { |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 417 | limit--; |
| 418 | if (!limit) |
| 419 | break; |
David S. Miller | a228dfd | 2005-05-20 11:40:32 -0700 | [diff] [blame] | 420 | udelay(1); |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 421 | rmb(); |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 422 | } |
| 423 | if (!limit) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 424 | printk(KERN_WARNING "strbuf_flush: flushflag timeout " |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 425 | "vaddr[%08x] ctx[%lx] npages[%ld]\n", |
| 426 | vaddr, ctx, npages); |
| 427 | } |
| 428 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 429 | static void dma_4u_unmap_single(struct device *dev, dma_addr_t bus_addr, |
| 430 | size_t sz, enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 431 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 432 | struct iommu *iommu; |
| 433 | struct strbuf *strbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 434 | iopte_t *base; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 435 | unsigned long flags, npages, ctx, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 436 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 437 | if (unlikely(direction == DMA_NONE)) { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 438 | if (printk_ratelimit()) |
| 439 | WARN_ON(1); |
| 440 | return; |
| 441 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 443 | iommu = dev->archdata.iommu; |
| 444 | strbuf = dev->archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | |
| 446 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); |
| 447 | npages >>= IO_PAGE_SHIFT; |
| 448 | base = iommu->page_table + |
| 449 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 450 | bus_addr &= IO_PAGE_MASK; |
| 451 | |
| 452 | spin_lock_irqsave(&iommu->lock, flags); |
| 453 | |
| 454 | /* Record the context, if any. */ |
| 455 | ctx = 0; |
| 456 | if (iommu->iommu_ctxflush) |
| 457 | ctx = (iopte_val(*base) & IOPTE_CONTEXT) >> 47UL; |
| 458 | |
| 459 | /* Step 1: Kick data out of streaming buffers if necessary. */ |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 460 | if (strbuf->strbuf_enabled) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 461 | strbuf_flush(strbuf, iommu, bus_addr, ctx, |
| 462 | npages, direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 463 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 464 | /* Step 2: Clear out TSB entries. */ |
| 465 | for (i = 0; i < npages; i++) |
| 466 | iopte_make_dummy(iommu, base + i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 467 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 468 | free_npages(iommu, bus_addr - iommu->page_table_map_base, npages); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 469 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 470 | iommu_free_ctx(iommu, ctx); |
| 471 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 472 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 473 | } |
| 474 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 475 | static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist, |
| 476 | int nelems, enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | { |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame^] | 478 | unsigned long flags, ctx, i, npages, iopte_protection; |
| 479 | struct scatterlist *sg; |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 480 | struct strbuf *strbuf; |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame^] | 481 | struct iommu *iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | iopte_t *base; |
| 483 | u32 dma_base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 484 | |
| 485 | /* Fast path single entry scatterlists. */ |
| 486 | if (nelems == 1) { |
| 487 | sglist->dma_address = |
Jens Axboe | 58b053e | 2007-10-22 20:02:46 +0200 | [diff] [blame] | 488 | dma_4u_map_single(dev, sg_virt(sglist), |
David S. Miller | 1839794 | 2006-02-10 00:08:26 -0800 | [diff] [blame] | 489 | sglist->length, direction); |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 490 | if (unlikely(sglist->dma_address == DMA_ERROR_CODE)) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 491 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 492 | sglist->dma_length = sglist->length; |
| 493 | return 1; |
| 494 | } |
| 495 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 496 | iommu = dev->archdata.iommu; |
| 497 | strbuf = dev->archdata.stc; |
| 498 | |
| 499 | if (unlikely(direction == DMA_NONE)) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 500 | goto bad_no_ctx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame^] | 502 | npages = calc_npages(sglist, nelems); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 503 | |
| 504 | spin_lock_irqsave(&iommu->lock, flags); |
| 505 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 506 | base = alloc_npages(iommu, npages); |
| 507 | ctx = 0; |
| 508 | if (iommu->iommu_ctxflush) |
| 509 | ctx = iommu_alloc_ctx(iommu); |
| 510 | |
| 511 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 512 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | if (base == NULL) |
| 514 | goto bad; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 515 | |
| 516 | dma_base = iommu->page_table_map_base + |
| 517 | ((base - iommu->page_table) << IO_PAGE_SHIFT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 518 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 519 | if (strbuf->strbuf_enabled) |
| 520 | iopte_protection = IOPTE_STREAMING(ctx); |
| 521 | else |
| 522 | iopte_protection = IOPTE_CONSISTENT(ctx); |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 523 | if (direction != DMA_TO_DEVICE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | iopte_protection |= IOPTE_WRITE; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 525 | |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame^] | 526 | for_each_sg(sglist, sg, nelems, i) { |
| 527 | unsigned long paddr = SG_ENT_PHYS_ADDRESS(sg); |
| 528 | unsigned long slen = sg->length; |
| 529 | unsigned long this_npages; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 530 | |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame^] | 531 | this_npages = iommu_num_pages(paddr, slen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 532 | |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame^] | 533 | sg->dma_address = dma_base | (paddr & ~IO_PAGE_MASK); |
| 534 | sg->dma_length = slen; |
| 535 | |
| 536 | paddr &= IO_PAGE_MASK; |
| 537 | while (this_npages--) { |
| 538 | iopte_val(*base) = iopte_protection | paddr; |
| 539 | |
| 540 | base++; |
| 541 | paddr += IO_PAGE_SIZE; |
| 542 | dma_base += IO_PAGE_SIZE; |
| 543 | } |
| 544 | } |
| 545 | |
| 546 | return nelems; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 547 | |
| 548 | bad: |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 549 | iommu_free_ctx(iommu, ctx); |
| 550 | bad_no_ctx: |
| 551 | if (printk_ratelimit()) |
| 552 | WARN_ON(1); |
| 553 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 554 | } |
| 555 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 556 | static void dma_4u_unmap_sg(struct device *dev, struct scatterlist *sglist, |
| 557 | int nelems, enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 559 | unsigned long flags, ctx, i, npages; |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame^] | 560 | struct strbuf *strbuf; |
| 561 | struct iommu *iommu; |
| 562 | iopte_t *base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 563 | u32 bus_addr; |
| 564 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 565 | if (unlikely(direction == DMA_NONE)) { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 566 | if (printk_ratelimit()) |
| 567 | WARN_ON(1); |
| 568 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 570 | iommu = dev->archdata.iommu; |
| 571 | strbuf = dev->archdata.stc; |
| 572 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | bus_addr = sglist->dma_address & IO_PAGE_MASK; |
| 574 | |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame^] | 575 | npages = calc_npages(sglist, nelems); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 576 | |
| 577 | base = iommu->page_table + |
| 578 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 579 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 580 | spin_lock_irqsave(&iommu->lock, flags); |
| 581 | |
| 582 | /* Record the context, if any. */ |
| 583 | ctx = 0; |
| 584 | if (iommu->iommu_ctxflush) |
| 585 | ctx = (iopte_val(*base) & IOPTE_CONTEXT) >> 47UL; |
| 586 | |
| 587 | /* Step 1: Kick data out of streaming buffers if necessary. */ |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 588 | if (strbuf->strbuf_enabled) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 589 | strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 590 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 591 | /* Step 2: Clear out the TSB entries. */ |
| 592 | for (i = 0; i < npages; i++) |
| 593 | iopte_make_dummy(iommu, base + i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 595 | free_npages(iommu, bus_addr - iommu->page_table_map_base, npages); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 596 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 597 | iommu_free_ctx(iommu, ctx); |
| 598 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 599 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 600 | } |
| 601 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 602 | static void dma_4u_sync_single_for_cpu(struct device *dev, |
| 603 | dma_addr_t bus_addr, size_t sz, |
| 604 | enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 605 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 606 | struct iommu *iommu; |
| 607 | struct strbuf *strbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 608 | unsigned long flags, ctx, npages; |
| 609 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 610 | iommu = dev->archdata.iommu; |
| 611 | strbuf = dev->archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 612 | |
| 613 | if (!strbuf->strbuf_enabled) |
| 614 | return; |
| 615 | |
| 616 | spin_lock_irqsave(&iommu->lock, flags); |
| 617 | |
| 618 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); |
| 619 | npages >>= IO_PAGE_SHIFT; |
| 620 | bus_addr &= IO_PAGE_MASK; |
| 621 | |
| 622 | /* Step 1: Record the context, if any. */ |
| 623 | ctx = 0; |
| 624 | if (iommu->iommu_ctxflush && |
| 625 | strbuf->strbuf_ctxflush) { |
| 626 | iopte_t *iopte; |
| 627 | |
| 628 | iopte = iommu->page_table + |
| 629 | ((bus_addr - iommu->page_table_map_base)>>IO_PAGE_SHIFT); |
| 630 | ctx = (iopte_val(*iopte) & IOPTE_CONTEXT) >> 47UL; |
| 631 | } |
| 632 | |
| 633 | /* Step 2: Kick data out of streaming buffers. */ |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 634 | strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | |
| 636 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 637 | } |
| 638 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 639 | static void dma_4u_sync_sg_for_cpu(struct device *dev, |
| 640 | struct scatterlist *sglist, int nelems, |
| 641 | enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 643 | struct iommu *iommu; |
| 644 | struct strbuf *strbuf; |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 645 | unsigned long flags, ctx, npages, i; |
Jens Axboe | 2c941a2 | 2007-08-07 09:37:10 +0200 | [diff] [blame] | 646 | struct scatterlist *sg, *sgprv; |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 647 | u32 bus_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 649 | iommu = dev->archdata.iommu; |
| 650 | strbuf = dev->archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 651 | |
| 652 | if (!strbuf->strbuf_enabled) |
| 653 | return; |
| 654 | |
| 655 | spin_lock_irqsave(&iommu->lock, flags); |
| 656 | |
| 657 | /* Step 1: Record the context, if any. */ |
| 658 | ctx = 0; |
| 659 | if (iommu->iommu_ctxflush && |
| 660 | strbuf->strbuf_ctxflush) { |
| 661 | iopte_t *iopte; |
| 662 | |
| 663 | iopte = iommu->page_table + |
| 664 | ((sglist[0].dma_address - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 665 | ctx = (iopte_val(*iopte) & IOPTE_CONTEXT) >> 47UL; |
| 666 | } |
| 667 | |
| 668 | /* Step 2: Kick data out of streaming buffers. */ |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 669 | bus_addr = sglist[0].dma_address & IO_PAGE_MASK; |
Jens Axboe | 2c941a2 | 2007-08-07 09:37:10 +0200 | [diff] [blame] | 670 | sgprv = NULL; |
| 671 | for_each_sg(sglist, sg, nelems, i) { |
| 672 | if (sg->dma_length == 0) |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 673 | break; |
Jens Axboe | 2c941a2 | 2007-08-07 09:37:10 +0200 | [diff] [blame] | 674 | sgprv = sg; |
| 675 | } |
| 676 | |
| 677 | npages = (IO_PAGE_ALIGN(sgprv->dma_address + sgprv->dma_length) |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 678 | - bus_addr) >> IO_PAGE_SHIFT; |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 679 | strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | |
| 681 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 682 | } |
| 683 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 684 | const struct dma_ops sun4u_dma_ops = { |
| 685 | .alloc_coherent = dma_4u_alloc_coherent, |
| 686 | .free_coherent = dma_4u_free_coherent, |
| 687 | .map_single = dma_4u_map_single, |
| 688 | .unmap_single = dma_4u_unmap_single, |
| 689 | .map_sg = dma_4u_map_sg, |
| 690 | .unmap_sg = dma_4u_unmap_sg, |
| 691 | .sync_single_for_cpu = dma_4u_sync_single_for_cpu, |
| 692 | .sync_sg_for_cpu = dma_4u_sync_sg_for_cpu, |
David S. Miller | 8f6a93a | 2006-02-09 21:32:07 -0800 | [diff] [blame] | 693 | }; |
| 694 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 695 | const struct dma_ops *dma_ops = &sun4u_dma_ops; |
| 696 | EXPORT_SYMBOL(dma_ops); |
| 697 | |
| 698 | int dma_supported(struct device *dev, u64 device_mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 699 | { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 700 | struct iommu *iommu = dev->archdata.iommu; |
| 701 | u64 dma_addr_mask = iommu->dma_addr_mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 702 | |
| 703 | if (device_mask >= (1UL << 32UL)) |
| 704 | return 0; |
| 705 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 706 | if ((device_mask & dma_addr_mask) == dma_addr_mask) |
| 707 | return 1; |
| 708 | |
| 709 | #ifdef CONFIG_PCI |
| 710 | if (dev->bus == &pci_bus_type) |
| 711 | return pci_dma_supported(to_pci_dev(dev), device_mask); |
| 712 | #endif |
| 713 | |
| 714 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 715 | } |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 716 | EXPORT_SYMBOL(dma_supported); |
| 717 | |
| 718 | int dma_set_mask(struct device *dev, u64 dma_mask) |
| 719 | { |
| 720 | #ifdef CONFIG_PCI |
| 721 | if (dev->bus == &pci_bus_type) |
| 722 | return pci_set_dma_mask(to_pci_dev(dev), dma_mask); |
| 723 | #endif |
| 724 | return -EINVAL; |
| 725 | } |
| 726 | EXPORT_SYMBOL(dma_set_mask); |