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Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001/*
2 * Renesas SuperH DMA Engine support
3 *
4 * base is drivers/dma/flsdma.c
5 *
6 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
7 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
8 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
9 *
10 * This is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * - DMA of SuperH does not have Hardware DMA chain mode.
16 * - MAX DMA size is 16MB.
17 *
18 */
19
20#include <linux/init.h>
21#include <linux/module.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090022#include <linux/slab.h>
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000023#include <linux/interrupt.h>
24#include <linux/dmaengine.h>
25#include <linux/delay.h>
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000026#include <linux/platform_device.h>
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +000027#include <linux/pm_runtime.h>
Magnus Dammb2623a62010-03-19 04:47:10 +000028#include <linux/sh_dma.h>
Paul Mundt03aa18f2010-12-17 19:16:10 +090029#include <linux/notifier.h>
30#include <linux/kdebug.h>
31#include <linux/spinlock.h>
32#include <linux/rculist.h>
Russell King - ARM Linuxd2ebfb32012-03-06 22:34:26 +000033
34#include "dmaengine.h"
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000035#include "shdma.h"
36
37/* DMA descriptor control */
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -070038enum sh_dmae_desc_status {
39 DESC_IDLE,
40 DESC_PREPARED,
41 DESC_SUBMITTED,
42 DESC_COMPLETED, /* completed, have to call callback */
43 DESC_WAITING, /* callback called, waiting for ack / re-submit */
44};
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000045
46#define NR_DESCS_PER_CHANNEL 32
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +000047/* Default MEMCPY transfer size = 2^2 = 4 bytes */
48#define LOG2_DEFAULT_XFER_SIZE 2
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000049
Paul Mundt03aa18f2010-12-17 19:16:10 +090050/*
51 * Used for write-side mutual exclusion for the global device list,
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +000052 * read-side synchronization by way of RCU, and per-controller data.
Paul Mundt03aa18f2010-12-17 19:16:10 +090053 */
54static DEFINE_SPINLOCK(sh_dmae_lock);
55static LIST_HEAD(sh_dmae_devices);
56
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +000057/* A bitmask with bits enough for enum sh_dmae_slave_chan_id */
Magnus Damm02ca5082010-03-19 04:46:47 +000058static unsigned long sh_dmae_slave_used[BITS_TO_LONGS(SH_DMA_SLAVE_NUMBER)];
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +000059
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -070060static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all);
Guennadi Liakhovetskic11b46c322012-01-04 15:34:17 +010061static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan);
62
63static void chclr_write(struct sh_dmae_chan *sh_dc, u32 data)
64{
65 struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
66
67 __raw_writel(data, shdev->chan_reg +
68 shdev->pdata->channel[sh_dc->id].chclr_offset);
69}
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -070070
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000071static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg)
72{
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +000073 __raw_writel(data, sh_dc->base + reg / sizeof(u32));
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000074}
75
76static u32 sh_dmae_readl(struct sh_dmae_chan *sh_dc, u32 reg)
77{
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +000078 return __raw_readl(sh_dc->base + reg / sizeof(u32));
79}
80
81static u16 dmaor_read(struct sh_dmae_device *shdev)
82{
Kuninori Morimotoe76c3af2011-06-17 08:20:56 +000083 u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32);
84
85 if (shdev->pdata->dmaor_is_32bit)
86 return __raw_readl(addr);
87 else
88 return __raw_readw(addr);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +000089}
90
91static void dmaor_write(struct sh_dmae_device *shdev, u16 data)
92{
Kuninori Morimotoe76c3af2011-06-17 08:20:56 +000093 u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32);
94
95 if (shdev->pdata->dmaor_is_32bit)
96 __raw_writel(data, addr);
97 else
98 __raw_writew(data, addr);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +000099}
100
Kuninori Morimoto5899a722011-06-17 08:20:40 +0000101static void chcr_write(struct sh_dmae_chan *sh_dc, u32 data)
102{
103 struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
104
105 __raw_writel(data, sh_dc->base + shdev->chcr_offset / sizeof(u32));
106}
107
108static u32 chcr_read(struct sh_dmae_chan *sh_dc)
109{
110 struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
111
112 return __raw_readl(sh_dc->base + shdev->chcr_offset / sizeof(u32));
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000113}
114
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000115/*
116 * Reset DMA controller
117 *
118 * SH7780 has two DMAOR register
119 */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000120static void sh_dmae_ctl_stop(struct sh_dmae_device *shdev)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000121{
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000122 unsigned short dmaor;
123 unsigned long flags;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000124
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000125 spin_lock_irqsave(&sh_dmae_lock, flags);
126
127 dmaor = dmaor_read(shdev);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000128 dmaor_write(shdev, dmaor & ~(DMAOR_NMIF | DMAOR_AE | DMAOR_DME));
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000129
130 spin_unlock_irqrestore(&sh_dmae_lock, flags);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000131}
132
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000133static int sh_dmae_rst(struct sh_dmae_device *shdev)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000134{
135 unsigned short dmaor;
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000136 unsigned long flags;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000137
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000138 spin_lock_irqsave(&sh_dmae_lock, flags);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000139
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000140 dmaor = dmaor_read(shdev) & ~(DMAOR_NMIF | DMAOR_AE | DMAOR_DME);
141
Guennadi Liakhovetskic11b46c322012-01-04 15:34:17 +0100142 if (shdev->pdata->chclr_present) {
143 int i;
144 for (i = 0; i < shdev->pdata->channel_num; i++) {
145 struct sh_dmae_chan *sh_chan = shdev->chan[i];
146 if (sh_chan)
147 chclr_write(sh_chan, 0);
148 }
149 }
150
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000151 dmaor_write(shdev, dmaor | shdev->pdata->dmaor_init);
152
153 dmaor = dmaor_read(shdev);
154
155 spin_unlock_irqrestore(&sh_dmae_lock, flags);
156
157 if (dmaor & (DMAOR_AE | DMAOR_NMIF)) {
158 dev_warn(shdev->common.dev, "Can't initialize DMAOR.\n");
159 return -EIO;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000160 }
Guennadi Liakhovetskic11b46c322012-01-04 15:34:17 +0100161 if (shdev->pdata->dmaor_init & ~dmaor)
162 dev_warn(shdev->common.dev,
163 "DMAOR=0x%x hasn't latched the initial value 0x%x.\n",
164 dmaor, shdev->pdata->dmaor_init);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000165 return 0;
166}
167
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000168static bool dmae_is_busy(struct sh_dmae_chan *sh_chan)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000169{
Kuninori Morimoto5899a722011-06-17 08:20:40 +0000170 u32 chcr = chcr_read(sh_chan);
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000171
172 if ((chcr & (CHCR_DE | CHCR_TE)) == CHCR_DE)
173 return true; /* working */
174
175 return false; /* waiting */
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000176}
177
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000178static unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan, u32 chcr)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000179{
Kuninori Morimotoc4e0dd72011-06-16 05:08:09 +0000180 struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000181 struct sh_dmae_pdata *pdata = shdev->pdata;
182 int cnt = ((chcr & pdata->ts_low_mask) >> pdata->ts_low_shift) |
183 ((chcr & pdata->ts_high_mask) >> pdata->ts_high_shift);
Guennadi Liakhovetski623b4ac2010-02-03 14:44:12 +0000184
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000185 if (cnt >= pdata->ts_shift_num)
186 cnt = 0;
187
188 return pdata->ts_shift[cnt];
189}
190
191static u32 log2size_to_chcr(struct sh_dmae_chan *sh_chan, int l2size)
192{
Kuninori Morimotoc4e0dd72011-06-16 05:08:09 +0000193 struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000194 struct sh_dmae_pdata *pdata = shdev->pdata;
195 int i;
196
197 for (i = 0; i < pdata->ts_shift_num; i++)
198 if (pdata->ts_shift[i] == l2size)
199 break;
200
201 if (i == pdata->ts_shift_num)
202 i = 0;
203
204 return ((i << pdata->ts_low_shift) & pdata->ts_low_mask) |
205 ((i << pdata->ts_high_shift) & pdata->ts_high_mask);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000206}
207
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700208static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000209{
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700210 sh_dmae_writel(sh_chan, hw->sar, SAR);
211 sh_dmae_writel(sh_chan, hw->dar, DAR);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000212 sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000213}
214
215static void dmae_start(struct sh_dmae_chan *sh_chan)
216{
Kuninori Morimoto67c62692011-06-17 08:20:51 +0000217 struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
Kuninori Morimoto5899a722011-06-17 08:20:40 +0000218 u32 chcr = chcr_read(sh_chan);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000219
Kuninori Morimoto260bf2c2011-06-17 08:21:05 +0000220 if (shdev->pdata->needs_tend_set)
221 sh_dmae_writel(sh_chan, 0xFFFFFFFF, TEND);
222
Kuninori Morimoto67c62692011-06-17 08:20:51 +0000223 chcr |= CHCR_DE | shdev->chcr_ie_bit;
Kuninori Morimoto5899a722011-06-17 08:20:40 +0000224 chcr_write(sh_chan, chcr & ~CHCR_TE);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000225}
226
227static void dmae_halt(struct sh_dmae_chan *sh_chan)
228{
Kuninori Morimoto67c62692011-06-17 08:20:51 +0000229 struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
Kuninori Morimoto5899a722011-06-17 08:20:40 +0000230 u32 chcr = chcr_read(sh_chan);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000231
Kuninori Morimoto67c62692011-06-17 08:20:51 +0000232 chcr &= ~(CHCR_DE | CHCR_TE | shdev->chcr_ie_bit);
Kuninori Morimoto5899a722011-06-17 08:20:40 +0000233 chcr_write(sh_chan, chcr);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000234}
235
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000236static void dmae_init(struct sh_dmae_chan *sh_chan)
237{
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000238 /*
239 * Default configuration for dual address memory-memory transfer.
240 * 0x400 represents auto-request.
241 */
242 u32 chcr = DM_INC | SM_INC | 0x400 | log2size_to_chcr(sh_chan,
243 LOG2_DEFAULT_XFER_SIZE);
244 sh_chan->xmit_shift = calc_xmit_shift(sh_chan, chcr);
Kuninori Morimoto5899a722011-06-17 08:20:40 +0000245 chcr_write(sh_chan, chcr);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000246}
247
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000248static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val)
249{
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000250 /* If DMA is active, cannot set CHCR. TODO: remove this superfluous check */
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000251 if (dmae_is_busy(sh_chan))
252 return -EBUSY;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000253
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000254 sh_chan->xmit_shift = calc_xmit_shift(sh_chan, val);
Kuninori Morimoto5899a722011-06-17 08:20:40 +0000255 chcr_write(sh_chan, val);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000256
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000257 return 0;
258}
259
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000260static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
261{
Kuninori Morimotoc4e0dd72011-06-16 05:08:09 +0000262 struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000263 struct sh_dmae_pdata *pdata = shdev->pdata;
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000264 const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->id];
Magnus Damm26fc02a2011-05-24 10:31:12 +0000265 u16 __iomem *addr = shdev->dmars;
Kuninori Morimoto090b9182011-06-16 05:08:28 +0000266 unsigned int shift = chan_pdata->dmars_bit;
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000267
268 if (dmae_is_busy(sh_chan))
269 return -EBUSY;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000270
Kuninori Morimoto260bf2c2011-06-17 08:21:05 +0000271 if (pdata->no_dmars)
272 return 0;
273
Magnus Damm26fc02a2011-05-24 10:31:12 +0000274 /* in the case of a missing DMARS resource use first memory window */
275 if (!addr)
276 addr = (u16 __iomem *)shdev->chan_reg;
277 addr += chan_pdata->dmars / sizeof(u16);
278
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000279 __raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift),
280 addr);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000281
282 return 0;
283}
284
285static dma_cookie_t sh_dmae_tx_submit(struct dma_async_tx_descriptor *tx)
286{
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700287 struct sh_desc *desc = tx_to_sh_desc(tx), *chunk, *last = desc, *c;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000288 struct sh_dmae_chan *sh_chan = to_sh_chan(tx->chan);
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +0200289 struct sh_dmae_slave *param = tx->chan->private;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700290 dma_async_tx_callback callback = tx->callback;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000291 dma_cookie_t cookie;
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +0200292 bool power_up;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000293
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +0200294 spin_lock_irq(&sh_chan->desc_lock);
295
296 if (list_empty(&sh_chan->ld_queue))
297 power_up = true;
298 else
299 power_up = false;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000300
Russell King - ARM Linux884485e2012-03-06 22:34:46 +0000301 cookie = dma_cookie_assign(tx);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000302
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700303 /* Mark all chunks of this descriptor as submitted, move to the queue */
304 list_for_each_entry_safe(chunk, c, desc->node.prev, node) {
305 /*
306 * All chunks are on the global ld_free, so, we have to find
307 * the end of the chain ourselves
308 */
309 if (chunk != desc && (chunk->mark == DESC_IDLE ||
310 chunk->async_tx.cookie > 0 ||
311 chunk->async_tx.cookie == -EBUSY ||
312 &chunk->node == &sh_chan->ld_free))
313 break;
314 chunk->mark = DESC_SUBMITTED;
315 /* Callback goes to the last chunk */
316 chunk->async_tx.callback = NULL;
317 chunk->cookie = cookie;
318 list_move_tail(&chunk->node, &sh_chan->ld_queue);
319 last = chunk;
320 }
321
322 last->async_tx.callback = callback;
323 last->async_tx.callback_param = tx->callback_param;
324
325 dev_dbg(sh_chan->dev, "submit #%d@%p on %d: %x[%d] -> %x\n",
326 tx->cookie, &last->async_tx, sh_chan->id,
327 desc->hw.sar, desc->hw.tcr, desc->hw.dar);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000328
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +0200329 if (power_up) {
330 sh_chan->pm_state = DMAE_PM_BUSY;
331
332 pm_runtime_get(sh_chan->dev);
333
334 spin_unlock_irq(&sh_chan->desc_lock);
335
336 pm_runtime_barrier(sh_chan->dev);
337
338 spin_lock_irq(&sh_chan->desc_lock);
339
340 /* Have we been reset, while waiting? */
341 if (sh_chan->pm_state != DMAE_PM_ESTABLISHED) {
342 dev_dbg(sh_chan->dev, "Bring up channel %d\n",
343 sh_chan->id);
344 if (param) {
345 const struct sh_dmae_slave_config *cfg =
346 param->config;
347
348 dmae_set_dmars(sh_chan, cfg->mid_rid);
349 dmae_set_chcr(sh_chan, cfg->chcr);
350 } else {
351 dmae_init(sh_chan);
352 }
353
354 if (sh_chan->pm_state == DMAE_PM_PENDING)
355 sh_chan_xfer_ld_queue(sh_chan);
356 sh_chan->pm_state = DMAE_PM_ESTABLISHED;
357 }
Guennadi Liakhovetskic11b46c322012-01-04 15:34:17 +0100358 } else {
359 sh_chan->pm_state = DMAE_PM_PENDING;
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +0200360 }
361
362 spin_unlock_irq(&sh_chan->desc_lock);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000363
364 return cookie;
365}
366
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700367/* Called with desc_lock held */
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000368static struct sh_desc *sh_dmae_get_desc(struct sh_dmae_chan *sh_chan)
369{
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700370 struct sh_desc *desc;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000371
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700372 list_for_each_entry(desc, &sh_chan->ld_free, node)
373 if (desc->mark != DESC_PREPARED) {
374 BUG_ON(desc->mark != DESC_IDLE);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000375 list_del(&desc->node);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700376 return desc;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000377 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000378
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700379 return NULL;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000380}
381
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000382static const struct sh_dmae_slave_config *sh_dmae_find_slave(
Magnus Damm4bab9d42010-03-19 04:46:38 +0000383 struct sh_dmae_chan *sh_chan, struct sh_dmae_slave *param)
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000384{
Kuninori Morimotoc4e0dd72011-06-16 05:08:09 +0000385 struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000386 struct sh_dmae_pdata *pdata = shdev->pdata;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000387 int i;
388
Magnus Damm02ca5082010-03-19 04:46:47 +0000389 if (param->slave_id >= SH_DMA_SLAVE_NUMBER)
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000390 return NULL;
391
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000392 for (i = 0; i < pdata->slave_num; i++)
Magnus Damm4bab9d42010-03-19 04:46:38 +0000393 if (pdata->slave[i].slave_id == param->slave_id)
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000394 return pdata->slave + i;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000395
396 return NULL;
397}
398
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000399static int sh_dmae_alloc_chan_resources(struct dma_chan *chan)
400{
401 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
402 struct sh_desc *desc;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000403 struct sh_dmae_slave *param = chan->private;
Guennadi Liakhovetski83515bc2010-04-19 08:39:39 +0000404 int ret;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000405
406 /*
407 * This relies on the guarantee from dmaengine that alloc_chan_resources
408 * never runs concurrently with itself or free_chan_resources.
409 */
410 if (param) {
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000411 const struct sh_dmae_slave_config *cfg;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000412
Magnus Damm4bab9d42010-03-19 04:46:38 +0000413 cfg = sh_dmae_find_slave(sh_chan, param);
Guennadi Liakhovetski83515bc2010-04-19 08:39:39 +0000414 if (!cfg) {
415 ret = -EINVAL;
416 goto efindslave;
417 }
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000418
Guennadi Liakhovetski83515bc2010-04-19 08:39:39 +0000419 if (test_and_set_bit(param->slave_id, sh_dmae_slave_used)) {
420 ret = -EBUSY;
421 goto etestused;
422 }
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000423
424 param->config = cfg;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000425 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000426
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000427 while (sh_chan->descs_allocated < NR_DESCS_PER_CHANNEL) {
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000428 desc = kzalloc(sizeof(struct sh_desc), GFP_KERNEL);
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200429 if (!desc)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000430 break;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000431 dma_async_tx_descriptor_init(&desc->async_tx,
432 &sh_chan->common);
433 desc->async_tx.tx_submit = sh_dmae_tx_submit;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700434 desc->mark = DESC_IDLE;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000435
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700436 list_add(&desc->node, &sh_chan->ld_free);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000437 sh_chan->descs_allocated++;
438 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000439
Guennadi Liakhovetski83515bc2010-04-19 08:39:39 +0000440 if (!sh_chan->descs_allocated) {
441 ret = -ENOMEM;
442 goto edescalloc;
443 }
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +0000444
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000445 return sh_chan->descs_allocated;
Guennadi Liakhovetski83515bc2010-04-19 08:39:39 +0000446
447edescalloc:
448 if (param)
449 clear_bit(param->slave_id, sh_dmae_slave_used);
450etestused:
451efindslave:
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200452 chan->private = NULL;
Guennadi Liakhovetski83515bc2010-04-19 08:39:39 +0000453 return ret;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000454}
455
456/*
457 * sh_dma_free_chan_resources - Free all resources of the channel.
458 */
459static void sh_dmae_free_chan_resources(struct dma_chan *chan)
460{
461 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
462 struct sh_desc *desc, *_desc;
463 LIST_HEAD(list);
464
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000465 /* Protect against ISR */
466 spin_lock_irq(&sh_chan->desc_lock);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000467 dmae_halt(sh_chan);
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000468 spin_unlock_irq(&sh_chan->desc_lock);
469
470 /* Now no new interrupts will occur */
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000471
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700472 /* Prepared and not submitted descriptors can still be on the queue */
473 if (!list_empty(&sh_chan->ld_queue))
474 sh_dmae_chan_ld_cleanup(sh_chan, true);
475
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000476 if (chan->private) {
477 /* The caller is holding dma_list_mutex */
478 struct sh_dmae_slave *param = chan->private;
479 clear_bit(param->slave_id, sh_dmae_slave_used);
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000480 chan->private = NULL;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000481 }
482
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200483 spin_lock_irq(&sh_chan->desc_lock);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000484
485 list_splice_init(&sh_chan->ld_free, &list);
486 sh_chan->descs_allocated = 0;
487
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200488 spin_unlock_irq(&sh_chan->desc_lock);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000489
490 list_for_each_entry_safe(desc, _desc, &list, node)
491 kfree(desc);
492}
493
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000494/**
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000495 * sh_dmae_add_desc - get, set up and return one transfer descriptor
496 * @sh_chan: DMA channel
497 * @flags: DMA transfer flags
498 * @dest: destination DMA address, incremented when direction equals
Vinod Kouldb8196d2011-10-13 22:34:23 +0530499 * DMA_DEV_TO_MEM
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000500 * @src: source DMA address, incremented when direction equals
Vinod Kouldb8196d2011-10-13 22:34:23 +0530501 * DMA_MEM_TO_DEV
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000502 * @len: DMA transfer length
503 * @first: if NULL, set to the current descriptor and cookie set to -EBUSY
504 * @direction: needed for slave DMA to decide which address to keep constant,
Vinod Kouldb8196d2011-10-13 22:34:23 +0530505 * equals DMA_MEM_TO_MEM for MEMCPY
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000506 * Returns 0 or an error
507 * Locks: called with desc_lock held
508 */
509static struct sh_desc *sh_dmae_add_desc(struct sh_dmae_chan *sh_chan,
510 unsigned long flags, dma_addr_t *dest, dma_addr_t *src, size_t *len,
Vinod Kouldb8196d2011-10-13 22:34:23 +0530511 struct sh_desc **first, enum dma_transfer_direction direction)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000512{
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000513 struct sh_desc *new;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000514 size_t copy_size;
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000515
516 if (!*len)
517 return NULL;
518
519 /* Allocate the link descriptor from the free list */
520 new = sh_dmae_get_desc(sh_chan);
521 if (!new) {
522 dev_err(sh_chan->dev, "No free link descriptor available\n");
523 return NULL;
524 }
525
526 copy_size = min(*len, (size_t)SH_DMA_TCR_MAX + 1);
527
528 new->hw.sar = *src;
529 new->hw.dar = *dest;
530 new->hw.tcr = copy_size;
531
532 if (!*first) {
533 /* First desc */
534 new->async_tx.cookie = -EBUSY;
535 *first = new;
536 } else {
537 /* Other desc - invisible to the user */
538 new->async_tx.cookie = -EINVAL;
539 }
540
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000541 dev_dbg(sh_chan->dev,
542 "chaining (%u/%u)@%x -> %x with %p, cookie %d, shift %d\n",
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000543 copy_size, *len, *src, *dest, &new->async_tx,
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000544 new->async_tx.cookie, sh_chan->xmit_shift);
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000545
546 new->mark = DESC_PREPARED;
547 new->async_tx.flags = flags;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000548 new->direction = direction;
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000549
550 *len -= copy_size;
Vinod Kouldb8196d2011-10-13 22:34:23 +0530551 if (direction == DMA_MEM_TO_MEM || direction == DMA_MEM_TO_DEV)
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000552 *src += copy_size;
Vinod Kouldb8196d2011-10-13 22:34:23 +0530553 if (direction == DMA_MEM_TO_MEM || direction == DMA_DEV_TO_MEM)
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000554 *dest += copy_size;
555
556 return new;
557}
558
559/*
560 * sh_dmae_prep_sg - prepare transfer descriptors from an SG list
561 *
562 * Common routine for public (MEMCPY) and slave DMA. The MEMCPY case is also
563 * converted to scatter-gather to guarantee consistent locking and a correct
564 * list manipulation. For slave DMA direction carries the usual meaning, and,
565 * logically, the SG list is RAM and the addr variable contains slave address,
Vinod Kouldb8196d2011-10-13 22:34:23 +0530566 * e.g., the FIFO I/O register. For MEMCPY direction equals DMA_MEM_TO_MEM
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000567 * and the SG list contains only one element and points at the source buffer.
568 */
569static struct dma_async_tx_descriptor *sh_dmae_prep_sg(struct sh_dmae_chan *sh_chan,
570 struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr,
Vinod Kouldb8196d2011-10-13 22:34:23 +0530571 enum dma_transfer_direction direction, unsigned long flags)
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000572{
573 struct scatterlist *sg;
574 struct sh_desc *first = NULL, *new = NULL /* compiler... */;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700575 LIST_HEAD(tx_list);
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000576 int chunks = 0;
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200577 unsigned long irq_flags;
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000578 int i;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000579
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000580 if (!sg_len)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000581 return NULL;
582
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000583 for_each_sg(sgl, sg, sg_len, i)
584 chunks += (sg_dma_len(sg) + SH_DMA_TCR_MAX) /
585 (SH_DMA_TCR_MAX + 1);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000586
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700587 /* Have to lock the whole loop to protect against concurrent release */
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200588 spin_lock_irqsave(&sh_chan->desc_lock, irq_flags);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700589
590 /*
591 * Chaining:
592 * first descriptor is what user is dealing with in all API calls, its
593 * cookie is at first set to -EBUSY, at tx-submit to a positive
594 * number
595 * if more than one chunk is needed further chunks have cookie = -EINVAL
596 * the last chunk, if not equal to the first, has cookie = -ENOSPC
597 * all chunks are linked onto the tx_list head with their .node heads
598 * only during this function, then they are immediately spliced
599 * back onto the free list in form of a chain
600 */
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000601 for_each_sg(sgl, sg, sg_len, i) {
602 dma_addr_t sg_addr = sg_dma_address(sg);
603 size_t len = sg_dma_len(sg);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000604
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000605 if (!len)
606 goto err_get_desc;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000607
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000608 do {
609 dev_dbg(sh_chan->dev, "Add SG #%d@%p[%d], dma %llx\n",
610 i, sg, len, (unsigned long long)sg_addr);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000611
Vinod Kouldb8196d2011-10-13 22:34:23 +0530612 if (direction == DMA_DEV_TO_MEM)
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000613 new = sh_dmae_add_desc(sh_chan, flags,
614 &sg_addr, addr, &len, &first,
615 direction);
616 else
617 new = sh_dmae_add_desc(sh_chan, flags,
618 addr, &sg_addr, &len, &first,
619 direction);
620 if (!new)
621 goto err_get_desc;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700622
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000623 new->chunks = chunks--;
624 list_add_tail(&new->node, &tx_list);
625 } while (len);
626 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000627
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700628 if (new != first)
629 new->async_tx.cookie = -ENOSPC;
630
631 /* Put them back on the free list, so, they don't get lost */
632 list_splice_tail(&tx_list, &sh_chan->ld_free);
633
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200634 spin_unlock_irqrestore(&sh_chan->desc_lock, irq_flags);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000635
636 return &first->async_tx;
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000637
638err_get_desc:
639 list_for_each_entry(new, &tx_list, node)
640 new->mark = DESC_IDLE;
641 list_splice(&tx_list, &sh_chan->ld_free);
642
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200643 spin_unlock_irqrestore(&sh_chan->desc_lock, irq_flags);
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000644
645 return NULL;
646}
647
648static struct dma_async_tx_descriptor *sh_dmae_prep_memcpy(
649 struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src,
650 size_t len, unsigned long flags)
651{
652 struct sh_dmae_chan *sh_chan;
653 struct scatterlist sg;
654
655 if (!chan || !len)
656 return NULL;
657
658 sh_chan = to_sh_chan(chan);
659
660 sg_init_table(&sg, 1);
661 sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_src)), len,
662 offset_in_page(dma_src));
663 sg_dma_address(&sg) = dma_src;
664 sg_dma_len(&sg) = len;
665
Vinod Kouldb8196d2011-10-13 22:34:23 +0530666 return sh_dmae_prep_sg(sh_chan, &sg, 1, &dma_dest, DMA_MEM_TO_MEM,
Guennadi Liakhovetskifc461852010-01-19 07:24:55 +0000667 flags);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700668}
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000669
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000670static struct dma_async_tx_descriptor *sh_dmae_prep_slave_sg(
671 struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
Alexandre Bounine185ecb52012-03-08 15:35:13 -0500672 enum dma_transfer_direction direction, unsigned long flags,
673 void *context)
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000674{
675 struct sh_dmae_slave *param;
676 struct sh_dmae_chan *sh_chan;
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000677 dma_addr_t slave_addr;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000678
679 if (!chan)
680 return NULL;
681
682 sh_chan = to_sh_chan(chan);
683 param = chan->private;
684
685 /* Someone calling slave DMA on a public channel? */
686 if (!param || !sg_len) {
687 dev_warn(sh_chan->dev, "%s: bad parameter: %p, %d, %d\n",
688 __func__, param, sg_len, param ? param->slave_id : -1);
689 return NULL;
690 }
691
Dan Carpenter9f9ff202010-08-14 11:01:45 +0200692 slave_addr = param->config->addr;
693
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000694 /*
695 * if (param != NULL), this is a successfully requested slave channel,
696 * therefore param->config != NULL too.
697 */
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +0000698 return sh_dmae_prep_sg(sh_chan, sgl, sg_len, &slave_addr,
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000699 direction, flags);
700}
701
Linus Walleij05827632010-05-17 16:30:42 -0700702static int sh_dmae_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
703 unsigned long arg)
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000704{
705 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200706 unsigned long flags;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000707
Linus Walleijc3635c72010-03-26 16:44:01 -0700708 /* Only supports DMA_TERMINATE_ALL */
709 if (cmd != DMA_TERMINATE_ALL)
710 return -ENXIO;
711
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000712 if (!chan)
Linus Walleijc3635c72010-03-26 16:44:01 -0700713 return -EINVAL;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000714
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200715 spin_lock_irqsave(&sh_chan->desc_lock, flags);
Guennadi Liakhovetskic0149062010-02-18 16:30:02 +0000716 dmae_halt(sh_chan);
717
Guennadi Liakhovetskic0149062010-02-18 16:30:02 +0000718 if (!list_empty(&sh_chan->ld_queue)) {
719 /* Record partial transfer */
720 struct sh_desc *desc = list_entry(sh_chan->ld_queue.next,
721 struct sh_desc, node);
722 desc->partial = (desc->hw.tcr - sh_dmae_readl(sh_chan, TCR)) <<
723 sh_chan->xmit_shift;
Guennadi Liakhovetskic0149062010-02-18 16:30:02 +0000724 }
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200725 spin_unlock_irqrestore(&sh_chan->desc_lock, flags);
Guennadi Liakhovetskic0149062010-02-18 16:30:02 +0000726
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000727 sh_dmae_chan_ld_cleanup(sh_chan, true);
Linus Walleijc3635c72010-03-26 16:44:01 -0700728
729 return 0;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000730}
731
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700732static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all)
733{
734 struct sh_desc *desc, *_desc;
735 /* Is the "exposed" head of a chain acked? */
736 bool head_acked = false;
737 dma_cookie_t cookie = 0;
738 dma_async_tx_callback callback = NULL;
739 void *param = NULL;
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200740 unsigned long flags;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000741
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200742 spin_lock_irqsave(&sh_chan->desc_lock, flags);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700743 list_for_each_entry_safe(desc, _desc, &sh_chan->ld_queue, node) {
744 struct dma_async_tx_descriptor *tx = &desc->async_tx;
745
746 BUG_ON(tx->cookie > 0 && tx->cookie != desc->cookie);
747 BUG_ON(desc->mark != DESC_SUBMITTED &&
748 desc->mark != DESC_COMPLETED &&
749 desc->mark != DESC_WAITING);
750
751 /*
752 * queue is ordered, and we use this loop to (1) clean up all
753 * completed descriptors, and to (2) update descriptor flags of
754 * any chunks in a (partially) completed chain
755 */
756 if (!all && desc->mark == DESC_SUBMITTED &&
757 desc->cookie != cookie)
758 break;
759
760 if (tx->cookie > 0)
761 cookie = tx->cookie;
762
763 if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
Russell King - ARM Linux4d4e58d2012-03-06 22:34:06 +0000764 if (sh_chan->common.completed_cookie != desc->cookie - 1)
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +0000765 dev_dbg(sh_chan->dev,
766 "Completing cookie %d, expected %d\n",
767 desc->cookie,
Russell King - ARM Linux4d4e58d2012-03-06 22:34:06 +0000768 sh_chan->common.completed_cookie + 1);
769 sh_chan->common.completed_cookie = desc->cookie;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700770 }
771
772 /* Call callback on the last chunk */
773 if (desc->mark == DESC_COMPLETED && tx->callback) {
774 desc->mark = DESC_WAITING;
775 callback = tx->callback;
776 param = tx->callback_param;
777 dev_dbg(sh_chan->dev, "descriptor #%d@%p on %d callback\n",
778 tx->cookie, tx, sh_chan->id);
779 BUG_ON(desc->chunks != 1);
780 break;
781 }
782
783 if (tx->cookie > 0 || tx->cookie == -EBUSY) {
784 if (desc->mark == DESC_COMPLETED) {
785 BUG_ON(tx->cookie < 0);
786 desc->mark = DESC_WAITING;
787 }
788 head_acked = async_tx_test_ack(tx);
789 } else {
790 switch (desc->mark) {
791 case DESC_COMPLETED:
792 desc->mark = DESC_WAITING;
793 /* Fall through */
794 case DESC_WAITING:
795 if (head_acked)
796 async_tx_ack(&desc->async_tx);
797 }
798 }
799
800 dev_dbg(sh_chan->dev, "descriptor %p #%d completed.\n",
801 tx, tx->cookie);
802
803 if (((desc->mark == DESC_COMPLETED ||
804 desc->mark == DESC_WAITING) &&
805 async_tx_test_ack(&desc->async_tx)) || all) {
806 /* Remove from ld_queue list */
807 desc->mark = DESC_IDLE;
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +0200808
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700809 list_move(&desc->node, &sh_chan->ld_free);
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +0200810
811 if (list_empty(&sh_chan->ld_queue)) {
812 dev_dbg(sh_chan->dev, "Bring down channel %d\n", sh_chan->id);
813 pm_runtime_put(sh_chan->dev);
814 }
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700815 }
816 }
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000817
818 if (all && !callback)
819 /*
820 * Terminating and the loop completed normally: forgive
821 * uncompleted cookies
822 */
Russell King - ARM Linux4d4e58d2012-03-06 22:34:06 +0000823 sh_chan->common.completed_cookie = sh_chan->common.cookie;
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000824
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200825 spin_unlock_irqrestore(&sh_chan->desc_lock, flags);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700826
827 if (callback)
828 callback(param);
829
830 return callback;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000831}
832
833/*
834 * sh_chan_ld_cleanup - Clean up link descriptors
835 *
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700836 * This function cleans up the ld_queue of DMA channel.
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000837 */
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700838static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000839{
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700840 while (__ld_cleanup(sh_chan, all))
841 ;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000842}
843
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +0200844/* Called under spin_lock_irq(&sh_chan->desc_lock) */
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000845static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan)
846{
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000847 struct sh_desc *desc;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000848
849 /* DMA work check */
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +0200850 if (dmae_is_busy(sh_chan))
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200851 return;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000852
Justin P. Mattock5a3a76582011-01-19 15:36:38 +0100853 /* Find the first not transferred descriptor */
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000854 list_for_each_entry(desc, &sh_chan->ld_queue, node)
855 if (desc->mark == DESC_SUBMITTED) {
Guennadi Liakhovetskic0149062010-02-18 16:30:02 +0000856 dev_dbg(sh_chan->dev, "Queue #%d to %d: %u@%x -> %x\n",
857 desc->async_tx.cookie, sh_chan->id,
858 desc->hw.tcr, desc->hw.sar, desc->hw.dar);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700859 /* Get the ld start address from ld_queue */
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000860 dmae_set_reg(sh_chan, &desc->hw);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700861 dmae_start(sh_chan);
862 break;
863 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000864}
865
866static void sh_dmae_memcpy_issue_pending(struct dma_chan *chan)
867{
868 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +0200869
870 spin_lock_irq(&sh_chan->desc_lock);
871 if (sh_chan->pm_state == DMAE_PM_ESTABLISHED)
872 sh_chan_xfer_ld_queue(sh_chan);
873 else
874 sh_chan->pm_state = DMAE_PM_PENDING;
875 spin_unlock_irq(&sh_chan->desc_lock);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000876}
877
Linus Walleij07934482010-03-26 16:50:49 -0700878static enum dma_status sh_dmae_tx_status(struct dma_chan *chan,
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000879 dma_cookie_t cookie,
Linus Walleij07934482010-03-26 16:50:49 -0700880 struct dma_tx_state *txstate)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000881{
882 struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000883 enum dma_status status;
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200884 unsigned long flags;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000885
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -0700886 sh_dmae_chan_ld_cleanup(sh_chan, false);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000887
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200888 spin_lock_irqsave(&sh_chan->desc_lock, flags);
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000889
Russell King - ARM Linux96a2af42012-03-06 22:35:27 +0000890 status = dma_cookie_status(chan, cookie, txstate);
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000891
892 /*
893 * If we don't find cookie on the queue, it has been aborted and we have
894 * to report error
895 */
896 if (status != DMA_SUCCESS) {
897 struct sh_desc *desc;
898 status = DMA_ERROR;
899 list_for_each_entry(desc, &sh_chan->ld_queue, node)
900 if (desc->cookie == cookie) {
901 status = DMA_IN_PROGRESS;
902 break;
903 }
904 }
905
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +0200906 spin_unlock_irqrestore(&sh_chan->desc_lock, flags);
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000907
908 return status;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000909}
910
911static irqreturn_t sh_dmae_interrupt(int irq, void *data)
912{
913 irqreturn_t ret = IRQ_NONE;
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000914 struct sh_dmae_chan *sh_chan = data;
915 u32 chcr;
916
917 spin_lock(&sh_chan->desc_lock);
918
Kuninori Morimoto5899a722011-06-17 08:20:40 +0000919 chcr = chcr_read(sh_chan);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000920
921 if (chcr & CHCR_TE) {
922 /* DMA stop */
923 dmae_halt(sh_chan);
924
925 ret = IRQ_HANDLED;
926 tasklet_schedule(&sh_chan->tasklet);
927 }
928
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000929 spin_unlock(&sh_chan->desc_lock);
930
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000931 return ret;
932}
933
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000934/* Called from error IRQ or NMI */
935static bool sh_dmae_reset(struct sh_dmae_device *shdev)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000936{
Paul Mundt03aa18f2010-12-17 19:16:10 +0900937 unsigned int handled = 0;
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000938 int i;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000939
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000940 /* halt the dma controller */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000941 sh_dmae_ctl_stop(shdev);
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000942
943 /* We cannot detect, which channel caused the error, have to reset all */
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +0000944 for (i = 0; i < SH_DMAC_MAX_CHANNELS; i++) {
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000945 struct sh_dmae_chan *sh_chan = shdev->chan[i];
Paul Mundt03aa18f2010-12-17 19:16:10 +0900946 struct sh_desc *desc;
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000947 LIST_HEAD(dl);
Paul Mundt03aa18f2010-12-17 19:16:10 +0900948
949 if (!sh_chan)
950 continue;
951
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000952 spin_lock(&sh_chan->desc_lock);
953
Paul Mundt03aa18f2010-12-17 19:16:10 +0900954 /* Stop the channel */
955 dmae_halt(sh_chan);
956
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000957 list_splice_init(&sh_chan->ld_queue, &dl);
958
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +0200959 if (!list_empty(&dl)) {
960 dev_dbg(sh_chan->dev, "Bring down channel %d\n", sh_chan->id);
961 pm_runtime_put(sh_chan->dev);
962 }
963 sh_chan->pm_state = DMAE_PM_ESTABLISHED;
964
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000965 spin_unlock(&sh_chan->desc_lock);
966
Paul Mundt03aa18f2010-12-17 19:16:10 +0900967 /* Complete all */
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000968 list_for_each_entry(desc, &dl, node) {
Paul Mundt03aa18f2010-12-17 19:16:10 +0900969 struct dma_async_tx_descriptor *tx = &desc->async_tx;
970 desc->mark = DESC_IDLE;
971 if (tx->callback)
972 tx->callback(tx->callback_param);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000973 }
Paul Mundt03aa18f2010-12-17 19:16:10 +0900974
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000975 spin_lock(&sh_chan->desc_lock);
976 list_splice(&dl, &sh_chan->ld_free);
977 spin_unlock(&sh_chan->desc_lock);
978
Paul Mundt03aa18f2010-12-17 19:16:10 +0900979 handled++;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000980 }
Paul Mundt03aa18f2010-12-17 19:16:10 +0900981
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +0000982 sh_dmae_rst(shdev);
Guennadi Liakhovetski47a4dc22010-02-11 16:50:05 +0000983
Paul Mundt03aa18f2010-12-17 19:16:10 +0900984 return !!handled;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000985}
Paul Mundt03aa18f2010-12-17 19:16:10 +0900986
987static irqreturn_t sh_dmae_err(int irq, void *data)
988{
Yoshihiro Shimodaff7690b2011-02-09 07:46:47 +0000989 struct sh_dmae_device *shdev = data;
990
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000991 if (!(dmaor_read(shdev) & DMAOR_AE))
Yoshihiro Shimodaff7690b2011-02-09 07:46:47 +0000992 return IRQ_NONE;
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +0000993
994 sh_dmae_reset(data);
995 return IRQ_HANDLED;
Paul Mundt03aa18f2010-12-17 19:16:10 +0900996}
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000997
998static void dmae_do_tasklet(unsigned long data)
999{
1000 struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data;
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -07001001 struct sh_desc *desc;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001002 u32 sar_buf = sh_dmae_readl(sh_chan, SAR);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +00001003 u32 dar_buf = sh_dmae_readl(sh_chan, DAR);
Guennadi Liakhovetski86d61b32009-12-10 18:35:07 +01001004
Guennadi Liakhovetskib4dae6e2011-09-25 16:12:18 +02001005 spin_lock_irq(&sh_chan->desc_lock);
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -07001006 list_for_each_entry(desc, &sh_chan->ld_queue, node) {
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +00001007 if (desc->mark == DESC_SUBMITTED &&
Vinod Kouldb8196d2011-10-13 22:34:23 +05301008 ((desc->direction == DMA_DEV_TO_MEM &&
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +00001009 (desc->hw.dar + desc->hw.tcr) == dar_buf) ||
1010 (desc->hw.sar + desc->hw.tcr) == sar_buf)) {
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -07001011 dev_dbg(sh_chan->dev, "done #%d@%p dst %u\n",
1012 desc->async_tx.cookie, &desc->async_tx,
1013 desc->hw.dar);
1014 desc->mark = DESC_COMPLETED;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001015 break;
1016 }
1017 }
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001018 /* Next desc */
1019 sh_chan_xfer_ld_queue(sh_chan);
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +02001020 spin_unlock_irq(&sh_chan->desc_lock);
1021
Guennadi Liakhovetski3542a112009-12-17 09:41:39 -07001022 sh_dmae_chan_ld_cleanup(sh_chan, false);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001023}
1024
Paul Mundt03aa18f2010-12-17 19:16:10 +09001025static bool sh_dmae_nmi_notify(struct sh_dmae_device *shdev)
1026{
Paul Mundt03aa18f2010-12-17 19:16:10 +09001027 /* Fast path out if NMIF is not asserted for this controller */
1028 if ((dmaor_read(shdev) & DMAOR_NMIF) == 0)
1029 return false;
1030
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +00001031 return sh_dmae_reset(shdev);
Paul Mundt03aa18f2010-12-17 19:16:10 +09001032}
1033
1034static int sh_dmae_nmi_handler(struct notifier_block *self,
1035 unsigned long cmd, void *data)
1036{
1037 struct sh_dmae_device *shdev;
1038 int ret = NOTIFY_DONE;
1039 bool triggered;
1040
1041 /*
1042 * Only concern ourselves with NMI events.
1043 *
1044 * Normally we would check the die chain value, but as this needs
1045 * to be architecture independent, check for NMI context instead.
1046 */
1047 if (!in_nmi())
1048 return NOTIFY_DONE;
1049
1050 rcu_read_lock();
1051 list_for_each_entry_rcu(shdev, &sh_dmae_devices, node) {
1052 /*
1053 * Only stop if one of the controllers has NMIF asserted,
1054 * we do not want to interfere with regular address error
1055 * handling or NMI events that don't concern the DMACs.
1056 */
1057 triggered = sh_dmae_nmi_notify(shdev);
1058 if (triggered == true)
1059 ret = NOTIFY_OK;
1060 }
1061 rcu_read_unlock();
1062
1063 return ret;
1064}
1065
1066static struct notifier_block sh_dmae_nmi_notifier __read_mostly = {
1067 .notifier_call = sh_dmae_nmi_handler,
1068
1069 /* Run before NMI debug handler and KGDB */
1070 .priority = 1,
1071};
1072
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001073static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id,
1074 int irq, unsigned long flags)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001075{
1076 int err;
Guennadi Liakhovetski5bac9422010-04-21 15:36:49 +00001077 const struct sh_dmae_channel *chan_pdata = &shdev->pdata->channel[id];
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001078 struct platform_device *pdev = to_platform_device(shdev->common.dev);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001079 struct sh_dmae_chan *new_sh_chan;
1080
1081 /* alloc channel */
1082 new_sh_chan = kzalloc(sizeof(struct sh_dmae_chan), GFP_KERNEL);
1083 if (!new_sh_chan) {
Guennadi Liakhovetski86d61b32009-12-10 18:35:07 +01001084 dev_err(shdev->common.dev,
1085 "No free memory for allocating dma channels!\n");
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001086 return -ENOMEM;
1087 }
1088
Guennadi Liakhovetski7a1cd9a2011-08-18 16:55:27 +02001089 new_sh_chan->pm_state = DMAE_PM_ESTABLISHED;
1090
1091 /* reference struct dma_device */
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +00001092 new_sh_chan->common.device = &shdev->common;
Russell King - ARM Linux8ac69542012-03-06 22:36:27 +00001093 dma_cookie_init(&new_sh_chan->common);
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +00001094
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001095 new_sh_chan->dev = shdev->common.dev;
1096 new_sh_chan->id = id;
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001097 new_sh_chan->irq = irq;
1098 new_sh_chan->base = shdev->chan_reg + chan_pdata->offset / sizeof(u32);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001099
1100 /* Init DMA tasklet */
1101 tasklet_init(&new_sh_chan->tasklet, dmae_do_tasklet,
1102 (unsigned long)new_sh_chan);
1103
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001104 spin_lock_init(&new_sh_chan->desc_lock);
1105
1106 /* Init descripter manage list */
1107 INIT_LIST_HEAD(&new_sh_chan->ld_queue);
1108 INIT_LIST_HEAD(&new_sh_chan->ld_free);
1109
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001110 /* Add the channel to DMA device channel list */
1111 list_add_tail(&new_sh_chan->common.device_node,
1112 &shdev->common.channels);
1113 shdev->common.chancnt++;
1114
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001115 if (pdev->id >= 0)
1116 snprintf(new_sh_chan->dev_id, sizeof(new_sh_chan->dev_id),
1117 "sh-dmae%d.%d", pdev->id, new_sh_chan->id);
1118 else
1119 snprintf(new_sh_chan->dev_id, sizeof(new_sh_chan->dev_id),
1120 "sh-dma%d", new_sh_chan->id);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001121
1122 /* set up channel irq */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001123 err = request_irq(irq, &sh_dmae_interrupt, flags,
Guennadi Liakhovetski86d61b32009-12-10 18:35:07 +01001124 new_sh_chan->dev_id, new_sh_chan);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001125 if (err) {
1126 dev_err(shdev->common.dev, "DMA channel %d request_irq error "
1127 "with return %d\n", id, err);
1128 goto err_no_irq;
1129 }
1130
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001131 shdev->chan[id] = new_sh_chan;
1132 return 0;
1133
1134err_no_irq:
1135 /* remove from dmaengine device node */
1136 list_del(&new_sh_chan->common.device_node);
1137 kfree(new_sh_chan);
1138 return err;
1139}
1140
1141static void sh_dmae_chan_remove(struct sh_dmae_device *shdev)
1142{
1143 int i;
1144
1145 for (i = shdev->common.chancnt - 1 ; i >= 0 ; i--) {
1146 if (shdev->chan[i]) {
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001147 struct sh_dmae_chan *sh_chan = shdev->chan[i];
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001148
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001149 free_irq(sh_chan->irq, sh_chan);
1150
1151 list_del(&sh_chan->common.device_node);
1152 kfree(sh_chan);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001153 shdev->chan[i] = NULL;
1154 }
1155 }
1156 shdev->common.chancnt = 0;
1157}
1158
1159static int __init sh_dmae_probe(struct platform_device *pdev)
1160{
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001161 struct sh_dmae_pdata *pdata = pdev->dev.platform_data;
1162 unsigned long irqflags = IRQF_DISABLED,
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +00001163 chan_flag[SH_DMAC_MAX_CHANNELS] = {};
1164 int errirq, chan_irq[SH_DMAC_MAX_CHANNELS];
Magnus Damm300e5f92011-05-24 10:31:20 +00001165 int err, i, irq_cnt = 0, irqres = 0, irq_cap = 0;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001166 struct sh_dmae_device *shdev;
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001167 struct resource *chan, *dmars, *errirq_res, *chanirq_res;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001168
Dan Williams56adf7e2009-11-22 12:10:10 -07001169 /* get platform data */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001170 if (!pdata || !pdata->channel_num)
Dan Williams56adf7e2009-11-22 12:10:10 -07001171 return -ENODEV;
1172
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001173 chan = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Magnus Damm26fc02a2011-05-24 10:31:12 +00001174 /* DMARS area is optional */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001175 dmars = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1176 /*
1177 * IRQ resources:
1178 * 1. there always must be at least one IRQ IO-resource. On SH4 it is
1179 * the error IRQ, in which case it is the only IRQ in this resource:
1180 * start == end. If it is the only IRQ resource, all channels also
1181 * use the same IRQ.
1182 * 2. DMA channel IRQ resources can be specified one per resource or in
1183 * ranges (start != end)
1184 * 3. iff all events (channels and, optionally, error) on this
1185 * controller use the same IRQ, only one IRQ resource can be
1186 * specified, otherwise there must be one IRQ per channel, even if
1187 * some of them are equal
1188 * 4. if all IRQs on this controller are equal or if some specific IRQs
1189 * specify IORESOURCE_IRQ_SHAREABLE in their resources, they will be
1190 * requested with the IRQF_SHARED flag
1191 */
1192 errirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1193 if (!chan || !errirq_res)
1194 return -ENODEV;
1195
1196 if (!request_mem_region(chan->start, resource_size(chan), pdev->name)) {
1197 dev_err(&pdev->dev, "DMAC register region already claimed\n");
1198 return -EBUSY;
1199 }
1200
1201 if (dmars && !request_mem_region(dmars->start, resource_size(dmars), pdev->name)) {
1202 dev_err(&pdev->dev, "DMAC DMARS region already claimed\n");
1203 err = -EBUSY;
1204 goto ermrdmars;
1205 }
1206
1207 err = -ENOMEM;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001208 shdev = kzalloc(sizeof(struct sh_dmae_device), GFP_KERNEL);
1209 if (!shdev) {
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001210 dev_err(&pdev->dev, "Not enough memory\n");
1211 goto ealloc;
1212 }
1213
1214 shdev->chan_reg = ioremap(chan->start, resource_size(chan));
1215 if (!shdev->chan_reg)
1216 goto emapchan;
1217 if (dmars) {
1218 shdev->dmars = ioremap(dmars->start, resource_size(dmars));
1219 if (!shdev->dmars)
1220 goto emapdmars;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001221 }
1222
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001223 /* platform data */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001224 shdev->pdata = pdata;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001225
Kuninori Morimoto5899a722011-06-17 08:20:40 +00001226 if (pdata->chcr_offset)
1227 shdev->chcr_offset = pdata->chcr_offset;
1228 else
1229 shdev->chcr_offset = CHCR;
1230
Kuninori Morimoto67c62692011-06-17 08:20:51 +00001231 if (pdata->chcr_ie_bit)
1232 shdev->chcr_ie_bit = pdata->chcr_ie_bit;
1233 else
1234 shdev->chcr_ie_bit = CHCR_IE;
1235
Paul Mundt5c2de442011-05-31 15:53:03 +09001236 platform_set_drvdata(pdev, shdev);
1237
Guennadi Liakhovetskic11b46c322012-01-04 15:34:17 +01001238 shdev->common.dev = &pdev->dev;
1239
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +00001240 pm_runtime_enable(&pdev->dev);
1241 pm_runtime_get_sync(&pdev->dev);
1242
Guennadi Liakhovetski31705e22011-05-02 07:59:02 +00001243 spin_lock_irq(&sh_dmae_lock);
Paul Mundt03aa18f2010-12-17 19:16:10 +09001244 list_add_tail_rcu(&shdev->node, &sh_dmae_devices);
Guennadi Liakhovetski31705e22011-05-02 07:59:02 +00001245 spin_unlock_irq(&sh_dmae_lock);
Paul Mundt03aa18f2010-12-17 19:16:10 +09001246
Guennadi Liakhovetski2dc66662011-04-29 17:09:21 +00001247 /* reset dma controller - only needed as a test */
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001248 err = sh_dmae_rst(shdev);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001249 if (err)
1250 goto rst_err;
1251
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001252 INIT_LIST_HEAD(&shdev->common.channels);
1253
Guennadi Liakhovetskie9c8d7a02012-01-18 10:14:25 +01001254 if (!pdata->slave_only)
1255 dma_cap_set(DMA_MEMCPY, shdev->common.cap_mask);
Magnus Damm26fc02a2011-05-24 10:31:12 +00001256 if (pdata->slave && pdata->slave_num)
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001257 dma_cap_set(DMA_SLAVE, shdev->common.cap_mask);
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +00001258
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001259 shdev->common.device_alloc_chan_resources
1260 = sh_dmae_alloc_chan_resources;
1261 shdev->common.device_free_chan_resources = sh_dmae_free_chan_resources;
1262 shdev->common.device_prep_dma_memcpy = sh_dmae_prep_memcpy;
Linus Walleij07934482010-03-26 16:50:49 -07001263 shdev->common.device_tx_status = sh_dmae_tx_status;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001264 shdev->common.device_issue_pending = sh_dmae_memcpy_issue_pending;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +00001265
1266 /* Compulsory for DMA_SLAVE fields */
1267 shdev->common.device_prep_slave_sg = sh_dmae_prep_slave_sg;
Linus Walleijc3635c72010-03-26 16:44:01 -07001268 shdev->common.device_control = sh_dmae_control;
Guennadi Liakhovetskicfefe992010-02-03 14:46:41 +00001269
Guennadi Liakhovetskiddb4f0f2009-12-04 19:44:41 +01001270 /* Default transfer size of 32 bytes requires 32-byte alignment */
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +00001271 shdev->common.copy_align = LOG2_DEFAULT_XFER_SIZE;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001272
Magnus Damm927a7c92010-03-19 04:47:19 +00001273#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001274 chanirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
1275
1276 if (!chanirq_res)
1277 chanirq_res = errirq_res;
1278 else
1279 irqres++;
1280
1281 if (chanirq_res == errirq_res ||
1282 (errirq_res->flags & IORESOURCE_BITS) == IORESOURCE_IRQ_SHAREABLE)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001283 irqflags = IRQF_SHARED;
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001284
1285 errirq = errirq_res->start;
1286
1287 err = request_irq(errirq, sh_dmae_err, irqflags,
1288 "DMAC Address Error", shdev);
1289 if (err) {
1290 dev_err(&pdev->dev,
1291 "DMA failed requesting irq #%d, error %d\n",
1292 errirq, err);
1293 goto eirq_err;
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001294 }
1295
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001296#else
1297 chanirq_res = errirq_res;
Magnus Damm927a7c92010-03-19 04:47:19 +00001298#endif /* CONFIG_CPU_SH4 || CONFIG_ARCH_SHMOBILE */
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001299
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001300 if (chanirq_res->start == chanirq_res->end &&
1301 !platform_get_resource(pdev, IORESOURCE_IRQ, 1)) {
1302 /* Special case - all multiplexed */
1303 for (; irq_cnt < pdata->channel_num; irq_cnt++) {
Magnus Damm300e5f92011-05-24 10:31:20 +00001304 if (irq_cnt < SH_DMAC_MAX_CHANNELS) {
1305 chan_irq[irq_cnt] = chanirq_res->start;
1306 chan_flag[irq_cnt] = IRQF_SHARED;
1307 } else {
1308 irq_cap = 1;
1309 break;
1310 }
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001311 }
1312 } else {
1313 do {
1314 for (i = chanirq_res->start; i <= chanirq_res->end; i++) {
Magnus Dammdcee0bb2011-06-09 06:35:08 +00001315 if (irq_cnt >= SH_DMAC_MAX_CHANNELS) {
1316 irq_cap = 1;
1317 break;
1318 }
1319
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001320 if ((errirq_res->flags & IORESOURCE_BITS) ==
1321 IORESOURCE_IRQ_SHAREABLE)
1322 chan_flag[irq_cnt] = IRQF_SHARED;
1323 else
1324 chan_flag[irq_cnt] = IRQF_DISABLED;
1325 dev_dbg(&pdev->dev,
1326 "Found IRQ %d for channel %d\n",
1327 i, irq_cnt);
1328 chan_irq[irq_cnt++] = i;
Magnus Damm300e5f92011-05-24 10:31:20 +00001329 }
1330
Magnus Dammdcee0bb2011-06-09 06:35:08 +00001331 if (irq_cnt >= SH_DMAC_MAX_CHANNELS)
Magnus Damm300e5f92011-05-24 10:31:20 +00001332 break;
Magnus Dammdcee0bb2011-06-09 06:35:08 +00001333
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001334 chanirq_res = platform_get_resource(pdev,
1335 IORESOURCE_IRQ, ++irqres);
1336 } while (irq_cnt < pdata->channel_num && chanirq_res);
1337 }
1338
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001339 /* Create DMA Channel */
Magnus Damm300e5f92011-05-24 10:31:20 +00001340 for (i = 0; i < irq_cnt; i++) {
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001341 err = sh_dmae_chan_probe(shdev, i, chan_irq[i], chan_flag[i]);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001342 if (err)
1343 goto chan_probe_err;
1344 }
1345
Magnus Damm300e5f92011-05-24 10:31:20 +00001346 if (irq_cap)
1347 dev_notice(&pdev->dev, "Attempting to register %d DMA "
1348 "channels when a maximum of %d are supported.\n",
1349 pdata->channel_num, SH_DMAC_MAX_CHANNELS);
1350
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +00001351 pm_runtime_put(&pdev->dev);
1352
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001353 dma_async_device_register(&shdev->common);
1354
1355 return err;
1356
1357chan_probe_err:
1358 sh_dmae_chan_remove(shdev);
Magnus Damm300e5f92011-05-24 10:31:20 +00001359
Magnus Damm927a7c92010-03-19 04:47:19 +00001360#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001361 free_irq(errirq, shdev);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001362eirq_err:
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001363#endif
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001364rst_err:
Guennadi Liakhovetski31705e22011-05-02 07:59:02 +00001365 spin_lock_irq(&sh_dmae_lock);
Paul Mundt03aa18f2010-12-17 19:16:10 +09001366 list_del_rcu(&shdev->node);
Guennadi Liakhovetski31705e22011-05-02 07:59:02 +00001367 spin_unlock_irq(&sh_dmae_lock);
Paul Mundt03aa18f2010-12-17 19:16:10 +09001368
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +00001369 pm_runtime_put(&pdev->dev);
Guennadi Liakhovetski467017b2011-04-29 17:09:25 +00001370 pm_runtime_disable(&pdev->dev);
1371
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001372 if (dmars)
1373 iounmap(shdev->dmars);
Paul Mundt5c2de442011-05-31 15:53:03 +09001374
1375 platform_set_drvdata(pdev, NULL);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001376emapdmars:
1377 iounmap(shdev->chan_reg);
Guennadi Liakhovetski31705e22011-05-02 07:59:02 +00001378 synchronize_rcu();
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001379emapchan:
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001380 kfree(shdev);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001381ealloc:
1382 if (dmars)
1383 release_mem_region(dmars->start, resource_size(dmars));
1384ermrdmars:
1385 release_mem_region(chan->start, resource_size(chan));
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001386
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001387 return err;
1388}
1389
1390static int __exit sh_dmae_remove(struct platform_device *pdev)
1391{
1392 struct sh_dmae_device *shdev = platform_get_drvdata(pdev);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001393 struct resource *res;
1394 int errirq = platform_get_irq(pdev, 0);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001395
1396 dma_async_device_unregister(&shdev->common);
1397
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001398 if (errirq > 0)
1399 free_irq(errirq, shdev);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001400
Guennadi Liakhovetski31705e22011-05-02 07:59:02 +00001401 spin_lock_irq(&sh_dmae_lock);
Paul Mundt03aa18f2010-12-17 19:16:10 +09001402 list_del_rcu(&shdev->node);
Guennadi Liakhovetski31705e22011-05-02 07:59:02 +00001403 spin_unlock_irq(&sh_dmae_lock);
Paul Mundt03aa18f2010-12-17 19:16:10 +09001404
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001405 /* channel data remove */
1406 sh_dmae_chan_remove(shdev);
1407
Guennadi Liakhovetski20f2a3b2010-02-11 16:50:18 +00001408 pm_runtime_disable(&pdev->dev);
1409
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001410 if (shdev->dmars)
1411 iounmap(shdev->dmars);
1412 iounmap(shdev->chan_reg);
1413
Paul Mundt5c2de442011-05-31 15:53:03 +09001414 platform_set_drvdata(pdev, NULL);
1415
Guennadi Liakhovetski31705e22011-05-02 07:59:02 +00001416 synchronize_rcu();
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001417 kfree(shdev);
1418
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001419 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1420 if (res)
1421 release_mem_region(res->start, resource_size(res));
1422 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1423 if (res)
1424 release_mem_region(res->start, resource_size(res));
1425
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001426 return 0;
1427}
1428
1429static void sh_dmae_shutdown(struct platform_device *pdev)
1430{
1431 struct sh_dmae_device *shdev = platform_get_drvdata(pdev);
Guennadi Liakhovetski027811b2010-02-11 16:50:10 +00001432 sh_dmae_ctl_stop(shdev);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001433}
1434
Guennadi Liakhovetski467017b2011-04-29 17:09:25 +00001435static int sh_dmae_runtime_suspend(struct device *dev)
1436{
1437 return 0;
1438}
1439
1440static int sh_dmae_runtime_resume(struct device *dev)
1441{
1442 struct sh_dmae_device *shdev = dev_get_drvdata(dev);
1443
1444 return sh_dmae_rst(shdev);
1445}
1446
1447#ifdef CONFIG_PM
1448static int sh_dmae_suspend(struct device *dev)
1449{
Guennadi Liakhovetski467017b2011-04-29 17:09:25 +00001450 return 0;
1451}
1452
1453static int sh_dmae_resume(struct device *dev)
1454{
1455 struct sh_dmae_device *shdev = dev_get_drvdata(dev);
Guennadi Liakhovetskic11b46c322012-01-04 15:34:17 +01001456 int i, ret;
1457
1458 ret = sh_dmae_rst(shdev);
1459 if (ret < 0)
1460 dev_err(dev, "Failed to reset!\n");
Guennadi Liakhovetski467017b2011-04-29 17:09:25 +00001461
1462 for (i = 0; i < shdev->pdata->channel_num; i++) {
1463 struct sh_dmae_chan *sh_chan = shdev->chan[i];
1464 struct sh_dmae_slave *param = sh_chan->common.private;
1465
1466 if (!sh_chan->descs_allocated)
1467 continue;
1468
Guennadi Liakhovetski467017b2011-04-29 17:09:25 +00001469 if (param) {
1470 const struct sh_dmae_slave_config *cfg = param->config;
1471 dmae_set_dmars(sh_chan, cfg->mid_rid);
1472 dmae_set_chcr(sh_chan, cfg->chcr);
1473 } else {
1474 dmae_init(sh_chan);
1475 }
1476 }
1477
1478 return 0;
1479}
1480#else
1481#define sh_dmae_suspend NULL
1482#define sh_dmae_resume NULL
1483#endif
1484
1485const struct dev_pm_ops sh_dmae_pm = {
1486 .suspend = sh_dmae_suspend,
1487 .resume = sh_dmae_resume,
1488 .runtime_suspend = sh_dmae_runtime_suspend,
1489 .runtime_resume = sh_dmae_runtime_resume,
1490};
1491
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001492static struct platform_driver sh_dmae_driver = {
1493 .remove = __exit_p(sh_dmae_remove),
1494 .shutdown = sh_dmae_shutdown,
1495 .driver = {
Guennadi Liakhovetski7a5c1062010-05-21 15:28:51 +00001496 .owner = THIS_MODULE,
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001497 .name = "sh-dma-engine",
Guennadi Liakhovetski467017b2011-04-29 17:09:25 +00001498 .pm = &sh_dmae_pm,
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001499 },
1500};
1501
1502static int __init sh_dmae_init(void)
1503{
Guennadi Liakhovetski661382f2011-01-06 17:04:50 +00001504 /* Wire up NMI handling */
1505 int err = register_die_notifier(&sh_dmae_nmi_notifier);
1506 if (err)
1507 return err;
1508
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001509 return platform_driver_probe(&sh_dmae_driver, sh_dmae_probe);
1510}
1511module_init(sh_dmae_init);
1512
1513static void __exit sh_dmae_exit(void)
1514{
1515 platform_driver_unregister(&sh_dmae_driver);
Guennadi Liakhovetski661382f2011-01-06 17:04:50 +00001516
1517 unregister_die_notifier(&sh_dmae_nmi_notifier);
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +00001518}
1519module_exit(sh_dmae_exit);
1520
1521MODULE_AUTHOR("Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>");
1522MODULE_DESCRIPTION("Renesas SH DMA Engine driver");
1523MODULE_LICENSE("GPL");
Guennadi Liakhovetskie5843342010-11-24 09:48:10 +00001524MODULE_ALIAS("platform:sh-dma-engine");