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Joonyoung Shim864ee9e2011-12-08 17:54:07 +09001/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
12#include "drmP.h"
13
14#include "exynos_drm.h"
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090015#include "exynos_drm_drv.h"
16#include "exynos_drm_encoder.h"
Joonyoung Shim4070d212012-06-27 14:27:05 +090017#include "exynos_drm_fb.h"
18#include "exynos_drm_gem.h"
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090019
Joonyoung Shimfdc575e2012-06-27 14:27:03 +090020#define to_exynos_plane(x) container_of(x, struct exynos_plane, base)
21
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090022struct exynos_plane {
23 struct drm_plane base;
24 struct exynos_drm_overlay overlay;
25 bool enabled;
26};
27
Eunchul Kimba3849d2012-03-16 18:47:15 +090028static const uint32_t formats[] = {
29 DRM_FORMAT_XRGB8888,
Seung-Woo Kim6b1c7622012-04-05 11:21:09 +090030 DRM_FORMAT_ARGB8888,
31 DRM_FORMAT_NV12,
Seung-Woo Kim6b1c7622012-04-05 11:21:09 +090032 DRM_FORMAT_NV12MT,
Eunchul Kimba3849d2012-03-16 18:47:15 +090033};
34
Joonyoung Shim4070d212012-06-27 14:27:05 +090035int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
36 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
37 unsigned int crtc_w, unsigned int crtc_h,
38 uint32_t src_x, uint32_t src_y,
39 uint32_t src_w, uint32_t src_h)
40{
41 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
42 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
43 unsigned int actual_w;
44 unsigned int actual_h;
45 int nr;
46 int i;
47
48 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
49
50 nr = exynos_drm_format_num_buffers(fb->pixel_format);
51 for (i = 0; i < nr; i++) {
52 struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
53
54 if (!buffer) {
55 DRM_LOG_KMS("buffer is null\n");
56 return -EFAULT;
57 }
58
59 overlay->dma_addr[i] = buffer->dma_addr;
60 overlay->vaddr[i] = buffer->kvaddr;
61
62 DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n",
63 i, (unsigned long)overlay->vaddr[i],
64 (unsigned long)overlay->dma_addr[i]);
65 }
66
67 actual_w = min((unsigned)(crtc->mode.hdisplay - crtc_x), crtc_w);
68 actual_h = min((unsigned)(crtc->mode.vdisplay - crtc_y), crtc_h);
69
70 /* set drm framebuffer data. */
71 overlay->fb_x = src_x;
72 overlay->fb_y = src_y;
73 overlay->fb_width = fb->width;
74 overlay->fb_height = fb->height;
75 overlay->src_width = src_w;
76 overlay->src_height = src_h;
77 overlay->bpp = fb->bits_per_pixel;
78 overlay->pitch = fb->pitches[0];
79 overlay->pixel_format = fb->pixel_format;
80
81 /* set overlay range to be displayed. */
82 overlay->crtc_x = crtc_x;
83 overlay->crtc_y = crtc_y;
84 overlay->crtc_width = actual_w;
85 overlay->crtc_height = actual_h;
86
87 /* set drm mode data. */
88 overlay->mode_width = crtc->mode.hdisplay;
89 overlay->mode_height = crtc->mode.vdisplay;
90 overlay->refresh = crtc->mode.vrefresh;
91 overlay->scan_flag = crtc->mode.flags;
92
93 DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
94 overlay->crtc_x, overlay->crtc_y,
95 overlay->crtc_width, overlay->crtc_height);
96
97 exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_plane_mode_set);
98
99 return 0;
100}
101
102void exynos_plane_commit(struct drm_plane *plane)
103{
104 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
105 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
106
107 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
108 exynos_drm_encoder_plane_commit);
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900109}
Joonyoung Shim4070d212012-06-27 14:27:05 +0900110
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900111void exynos_plane_dpms(struct drm_plane *plane, int mode)
112{
113 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
114 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
115
116 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
117
118 if (mode == DRM_MODE_DPMS_ON) {
119 if (exynos_plane->enabled)
120 return;
121
122 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
123 exynos_drm_encoder_plane_enable);
124
125 exynos_plane->enabled = true;
126 } else {
127 if (!exynos_plane->enabled)
128 return;
129
130 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
131 exynos_drm_encoder_plane_disable);
132
133 exynos_plane->enabled = false;
134 }
Joonyoung Shim4070d212012-06-27 14:27:05 +0900135}
136
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900137static int
138exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
139 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
140 unsigned int crtc_w, unsigned int crtc_h,
141 uint32_t src_x, uint32_t src_y,
142 uint32_t src_w, uint32_t src_h)
143{
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900144 int ret;
145
146 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
147
Joonyoung Shim4070d212012-06-27 14:27:05 +0900148 ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
149 crtc_w, crtc_h, src_x >> 16, src_y >> 16,
150 src_w >> 16, src_h >> 16);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900151 if (ret < 0)
152 return ret;
153
Joonyoung Shim4070d212012-06-27 14:27:05 +0900154 plane->crtc = crtc;
155 plane->fb = crtc->fb;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900156
Joonyoung Shim4070d212012-06-27 14:27:05 +0900157 exynos_plane_commit(plane);
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900158 exynos_plane_dpms(plane, DRM_MODE_DPMS_ON);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900159
160 return 0;
161}
162
163static int exynos_disable_plane(struct drm_plane *plane)
164{
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900165 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
166
Joonyoung Shimcf5188a2012-06-27 14:27:09 +0900167 exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900168
169 return 0;
170}
171
172static void exynos_plane_destroy(struct drm_plane *plane)
173{
Joonyoung Shimfdc575e2012-06-27 14:27:03 +0900174 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900175
176 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
177
178 exynos_disable_plane(plane);
179 drm_plane_cleanup(plane);
180 kfree(exynos_plane);
181}
182
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900183static int exynos_plane_set_property(struct drm_plane *plane,
184 struct drm_property *property,
185 uint64_t val)
186{
187 struct drm_device *dev = plane->dev;
188 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
189 struct exynos_drm_private *dev_priv = dev->dev_private;
190
191 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
192
193 if (property == dev_priv->plane_zpos_property) {
194 exynos_plane->overlay.zpos = val;
195 return 0;
196 }
197
198 return -EINVAL;
199}
200
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900201static struct drm_plane_funcs exynos_plane_funcs = {
202 .update_plane = exynos_update_plane,
203 .disable_plane = exynos_disable_plane,
204 .destroy = exynos_plane_destroy,
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900205 .set_property = exynos_plane_set_property,
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900206};
207
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900208static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
209{
210 struct drm_device *dev = plane->dev;
211 struct exynos_drm_private *dev_priv = dev->dev_private;
212 struct drm_property *prop;
213
214 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
215
216 prop = dev_priv->plane_zpos_property;
217 if (!prop) {
218 prop = drm_property_create_range(dev, 0, "zpos", 0,
219 MAX_PLANE - 1);
220 if (!prop)
221 return;
222
223 dev_priv->plane_zpos_property = prop;
224 }
225
226 drm_object_attach_property(&plane->base, prop, 0);
227}
228
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900229struct drm_plane *exynos_plane_init(struct drm_device *dev,
230 unsigned int possible_crtcs, bool priv)
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900231{
232 struct exynos_plane *exynos_plane;
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900233 int err;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900234
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900235 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
236
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900237 exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900238 if (!exynos_plane) {
239 DRM_ERROR("failed to allocate plane\n");
240 return NULL;
241 }
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900242
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900243 err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
Eunchul Kimba3849d2012-03-16 18:47:15 +0900244 &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900245 priv);
246 if (err) {
247 DRM_ERROR("failed to initialize plane\n");
248 kfree(exynos_plane);
249 return NULL;
250 }
251
Joonyoung Shim00ae67c2012-06-27 14:27:06 +0900252 if (priv)
253 exynos_plane->overlay.zpos = DEFAULT_ZPOS;
254 else
255 exynos_plane_attach_zpos_property(&exynos_plane->base);
256
Joonyoung Shimb5d2eb32012-06-27 14:27:04 +0900257 return &exynos_plane->base;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900258}