Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Support for the Tundra Universe I/II VME-PCI Bridge Chips |
| 3 | * |
Martyn Welch | 66bd8db | 2010-02-18 15:12:52 +0000 | [diff] [blame] | 4 | * Author: Martyn Welch <martyn.welch@ge.com> |
| 5 | * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 6 | * |
| 7 | * Based on work by Tom Armistead and Ajit Prem |
| 8 | * Copyright 2004 Motorola Inc. |
| 9 | * |
| 10 | * Derived from ca91c042.c by Michael Wyrick |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify it |
| 13 | * under the terms of the GNU General Public License as published by the |
| 14 | * Free Software Foundation; either version 2 of the License, or (at your |
| 15 | * option) any later version. |
| 16 | */ |
| 17 | |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 18 | #include <linux/module.h> |
| 19 | #include <linux/mm.h> |
| 20 | #include <linux/types.h> |
| 21 | #include <linux/errno.h> |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 22 | #include <linux/pci.h> |
| 23 | #include <linux/dma-mapping.h> |
| 24 | #include <linux/poll.h> |
| 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/spinlock.h> |
Greg Kroah-Hartman | 6af783c | 2009-10-12 15:00:08 -0700 | [diff] [blame] | 27 | #include <linux/sched.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 28 | #include <linux/slab.h> |
Martyn Welch | 7946328 | 2010-03-22 14:58:57 +0000 | [diff] [blame] | 29 | #include <linux/time.h> |
| 30 | #include <linux/io.h> |
| 31 | #include <linux/uaccess.h> |
Greg Kroah-Hartman | db3b9e9 | 2012-04-26 12:34:58 -0700 | [diff] [blame] | 32 | #include <linux/vme.h> |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 33 | |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 34 | #include "../vme_bridge.h" |
| 35 | #include "vme_ca91cx42.h" |
| 36 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 37 | static int ca91cx42_probe(struct pci_dev *, const struct pci_device_id *); |
| 38 | static void ca91cx42_remove(struct pci_dev *); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 39 | |
Martyn Welch | 12b2d5c | 2009-12-15 08:42:56 +0000 | [diff] [blame] | 40 | /* Module parameters */ |
| 41 | static int geoid; |
| 42 | |
Vincent Bossier | 584721c | 2011-06-03 10:07:39 +0100 | [diff] [blame] | 43 | static const char driver_name[] = "vme_ca91cx42"; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 44 | |
Jingoo Han | c3a09c1 | 2013-12-03 08:29:48 +0900 | [diff] [blame] | 45 | static const struct pci_device_id ca91cx42_ids[] = { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 46 | { PCI_DEVICE(PCI_VENDOR_ID_TUNDRA, PCI_DEVICE_ID_TUNDRA_CA91C142) }, |
| 47 | { }, |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 48 | }; |
| 49 | |
Alessio Igor Bogani | 553ebb8 | 2016-06-14 16:36:55 +0200 | [diff] [blame] | 50 | MODULE_DEVICE_TABLE(pci, ca91cx42_ids); |
| 51 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 52 | static struct pci_driver ca91cx42_driver = { |
| 53 | .name = driver_name, |
| 54 | .id_table = ca91cx42_ids, |
| 55 | .probe = ca91cx42_probe, |
| 56 | .remove = ca91cx42_remove, |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 57 | }; |
| 58 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 59 | static u32 ca91cx42_DMA_irqhandler(struct ca91cx42_driver *bridge) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 60 | { |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 61 | wake_up(&bridge->dma_queue); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 62 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 63 | return CA91CX42_LINT_DMA; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 64 | } |
| 65 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 66 | static u32 ca91cx42_LM_irqhandler(struct ca91cx42_driver *bridge, u32 stat) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 67 | { |
| 68 | int i; |
| 69 | u32 serviced = 0; |
| 70 | |
| 71 | for (i = 0; i < 4; i++) { |
| 72 | if (stat & CA91CX42_LINT_LM[i]) { |
| 73 | /* We only enable interrupts if the callback is set */ |
Aaron Sierra | fa54b32 | 2016-04-29 16:41:02 -0500 | [diff] [blame] | 74 | bridge->lm_callback[i](bridge->lm_data[i]); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 75 | serviced |= CA91CX42_LINT_LM[i]; |
| 76 | } |
| 77 | } |
| 78 | |
| 79 | return serviced; |
| 80 | } |
| 81 | |
| 82 | /* XXX This needs to be split into 4 queues */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 83 | static u32 ca91cx42_MB_irqhandler(struct ca91cx42_driver *bridge, int mbox_mask) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 84 | { |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 85 | wake_up(&bridge->mbox_queue); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 86 | |
| 87 | return CA91CX42_LINT_MBOX; |
| 88 | } |
| 89 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 90 | static u32 ca91cx42_IACK_irqhandler(struct ca91cx42_driver *bridge) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 91 | { |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 92 | wake_up(&bridge->iack_queue); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 93 | |
| 94 | return CA91CX42_LINT_SW_IACK; |
| 95 | } |
| 96 | |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 97 | static u32 ca91cx42_VERR_irqhandler(struct vme_bridge *ca91cx42_bridge) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 98 | { |
| 99 | int val; |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 100 | struct ca91cx42_driver *bridge; |
| 101 | |
| 102 | bridge = ca91cx42_bridge->driver_priv; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 103 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 104 | val = ioread32(bridge->base + DGCS); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 105 | |
| 106 | if (!(val & 0x00000800)) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 107 | dev_err(ca91cx42_bridge->parent, "ca91cx42_VERR_irqhandler DMA " |
| 108 | "Read Error DGCS=%08X\n", val); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 109 | } |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 110 | |
| 111 | return CA91CX42_LINT_VERR; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 112 | } |
| 113 | |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 114 | static u32 ca91cx42_LERR_irqhandler(struct vme_bridge *ca91cx42_bridge) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 115 | { |
| 116 | int val; |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 117 | struct ca91cx42_driver *bridge; |
| 118 | |
| 119 | bridge = ca91cx42_bridge->driver_priv; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 120 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 121 | val = ioread32(bridge->base + DGCS); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 122 | |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 123 | if (!(val & 0x00000800)) |
| 124 | dev_err(ca91cx42_bridge->parent, "ca91cx42_LERR_irqhandler DMA " |
| 125 | "Read Error DGCS=%08X\n", val); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 126 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 127 | return CA91CX42_LINT_LERR; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 128 | } |
| 129 | |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 130 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 131 | static u32 ca91cx42_VIRQ_irqhandler(struct vme_bridge *ca91cx42_bridge, |
| 132 | int stat) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 133 | { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 134 | int vec, i, serviced = 0; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 135 | struct ca91cx42_driver *bridge; |
| 136 | |
| 137 | bridge = ca91cx42_bridge->driver_priv; |
| 138 | |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 139 | |
| 140 | for (i = 7; i > 0; i--) { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 141 | if (stat & (1 << i)) { |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 142 | vec = ioread32(bridge->base + |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 143 | CA91CX42_V_STATID[i]) & 0xff; |
| 144 | |
Martyn Welch | c813f59 | 2009-10-29 16:34:54 +0000 | [diff] [blame] | 145 | vme_irq_handler(ca91cx42_bridge, i, vec); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 146 | |
| 147 | serviced |= (1 << i); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 148 | } |
| 149 | } |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 150 | |
| 151 | return serviced; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 152 | } |
| 153 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 154 | static irqreturn_t ca91cx42_irqhandler(int irq, void *ptr) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 155 | { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 156 | u32 stat, enable, serviced = 0; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 157 | struct vme_bridge *ca91cx42_bridge; |
| 158 | struct ca91cx42_driver *bridge; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 159 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 160 | ca91cx42_bridge = ptr; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 161 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 162 | bridge = ca91cx42_bridge->driver_priv; |
| 163 | |
| 164 | enable = ioread32(bridge->base + LINT_EN); |
| 165 | stat = ioread32(bridge->base + LINT_STAT); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 166 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 167 | /* Only look at unmasked interrupts */ |
| 168 | stat &= enable; |
| 169 | |
| 170 | if (unlikely(!stat)) |
| 171 | return IRQ_NONE; |
| 172 | |
| 173 | if (stat & CA91CX42_LINT_DMA) |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 174 | serviced |= ca91cx42_DMA_irqhandler(bridge); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 175 | if (stat & (CA91CX42_LINT_LM0 | CA91CX42_LINT_LM1 | CA91CX42_LINT_LM2 | |
| 176 | CA91CX42_LINT_LM3)) |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 177 | serviced |= ca91cx42_LM_irqhandler(bridge, stat); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 178 | if (stat & CA91CX42_LINT_MBOX) |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 179 | serviced |= ca91cx42_MB_irqhandler(bridge, stat); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 180 | if (stat & CA91CX42_LINT_SW_IACK) |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 181 | serviced |= ca91cx42_IACK_irqhandler(bridge); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 182 | if (stat & CA91CX42_LINT_VERR) |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 183 | serviced |= ca91cx42_VERR_irqhandler(ca91cx42_bridge); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 184 | if (stat & CA91CX42_LINT_LERR) |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 185 | serviced |= ca91cx42_LERR_irqhandler(ca91cx42_bridge); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 186 | if (stat & (CA91CX42_LINT_VIRQ1 | CA91CX42_LINT_VIRQ2 | |
| 187 | CA91CX42_LINT_VIRQ3 | CA91CX42_LINT_VIRQ4 | |
| 188 | CA91CX42_LINT_VIRQ5 | CA91CX42_LINT_VIRQ6 | |
| 189 | CA91CX42_LINT_VIRQ7)) |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 190 | serviced |= ca91cx42_VIRQ_irqhandler(ca91cx42_bridge, stat); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 191 | |
| 192 | /* Clear serviced interrupts */ |
Vincent Bossier | 56fc508 | 2011-06-02 12:30:02 +0200 | [diff] [blame] | 193 | iowrite32(serviced, bridge->base + LINT_STAT); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 194 | |
| 195 | return IRQ_HANDLED; |
| 196 | } |
| 197 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 198 | static int ca91cx42_irq_init(struct vme_bridge *ca91cx42_bridge) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 199 | { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 200 | int result, tmp; |
| 201 | struct pci_dev *pdev; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 202 | struct ca91cx42_driver *bridge; |
| 203 | |
| 204 | bridge = ca91cx42_bridge->driver_priv; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 205 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 206 | /* Need pdev */ |
Geliang Tang | 445f824 | 2015-12-27 18:46:04 +0800 | [diff] [blame] | 207 | pdev = to_pci_dev(ca91cx42_bridge->parent); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 208 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 209 | /* Disable interrupts from PCI to VME */ |
| 210 | iowrite32(0, bridge->base + VINT_EN); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 211 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 212 | /* Disable PCI interrupts */ |
| 213 | iowrite32(0, bridge->base + LINT_EN); |
| 214 | /* Clear Any Pending PCI Interrupts */ |
| 215 | iowrite32(0x00FFFFFF, bridge->base + LINT_STAT); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 216 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 217 | result = request_irq(pdev->irq, ca91cx42_irqhandler, IRQF_SHARED, |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 218 | driver_name, ca91cx42_bridge); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 219 | if (result) { |
| 220 | dev_err(&pdev->dev, "Can't get assigned pci irq vector %02X\n", |
| 221 | pdev->irq); |
| 222 | return result; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 223 | } |
| 224 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 225 | /* Ensure all interrupts are mapped to PCI Interrupt 0 */ |
| 226 | iowrite32(0, bridge->base + LINT_MAP0); |
| 227 | iowrite32(0, bridge->base + LINT_MAP1); |
| 228 | iowrite32(0, bridge->base + LINT_MAP2); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 229 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 230 | /* Enable DMA, mailbox & LM Interrupts */ |
| 231 | tmp = CA91CX42_LINT_MBOX3 | CA91CX42_LINT_MBOX2 | CA91CX42_LINT_MBOX1 | |
| 232 | CA91CX42_LINT_MBOX0 | CA91CX42_LINT_SW_IACK | |
| 233 | CA91CX42_LINT_VERR | CA91CX42_LINT_LERR | CA91CX42_LINT_DMA; |
| 234 | |
| 235 | iowrite32(tmp, bridge->base + LINT_EN); |
| 236 | |
| 237 | return 0; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 238 | } |
| 239 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 240 | static void ca91cx42_irq_exit(struct ca91cx42_driver *bridge, |
| 241 | struct pci_dev *pdev) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 242 | { |
Wei Yongjun | ef22d57 | 2013-08-26 12:04:05 +0800 | [diff] [blame] | 243 | struct vme_bridge *ca91cx42_bridge; |
| 244 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 245 | /* Disable interrupts from PCI to VME */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 246 | iowrite32(0, bridge->base + VINT_EN); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 247 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 248 | /* Disable PCI interrupts */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 249 | iowrite32(0, bridge->base + LINT_EN); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 250 | /* Clear Any Pending PCI Interrupts */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 251 | iowrite32(0x00FFFFFF, bridge->base + LINT_STAT); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 252 | |
Wei Yongjun | ef22d57 | 2013-08-26 12:04:05 +0800 | [diff] [blame] | 253 | ca91cx42_bridge = container_of((void *)bridge, struct vme_bridge, |
| 254 | driver_priv); |
| 255 | free_irq(pdev->irq, ca91cx42_bridge); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 256 | } |
| 257 | |
Vincent Bossier | 54b4a77 | 2011-06-09 08:59:43 +0100 | [diff] [blame] | 258 | static int ca91cx42_iack_received(struct ca91cx42_driver *bridge, int level) |
| 259 | { |
| 260 | u32 tmp; |
| 261 | |
| 262 | tmp = ioread32(bridge->base + LINT_STAT); |
| 263 | |
| 264 | if (tmp & (1 << level)) |
| 265 | return 0; |
| 266 | else |
| 267 | return 1; |
| 268 | } |
| 269 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 270 | /* |
| 271 | * Set up an VME interrupt |
| 272 | */ |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 273 | static void ca91cx42_irq_set(struct vme_bridge *ca91cx42_bridge, int level, |
| 274 | int state, int sync) |
Martyn Welch | c813f59 | 2009-10-29 16:34:54 +0000 | [diff] [blame] | 275 | |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 276 | { |
Martyn Welch | c813f59 | 2009-10-29 16:34:54 +0000 | [diff] [blame] | 277 | struct pci_dev *pdev; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 278 | u32 tmp; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 279 | struct ca91cx42_driver *bridge; |
| 280 | |
| 281 | bridge = ca91cx42_bridge->driver_priv; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 282 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 283 | /* Enable IRQ level */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 284 | tmp = ioread32(bridge->base + LINT_EN); |
Martyn Welch | c813f59 | 2009-10-29 16:34:54 +0000 | [diff] [blame] | 285 | |
| 286 | if (state == 0) |
| 287 | tmp &= ~CA91CX42_LINT_VIRQ[level]; |
| 288 | else |
| 289 | tmp |= CA91CX42_LINT_VIRQ[level]; |
| 290 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 291 | iowrite32(tmp, bridge->base + LINT_EN); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 292 | |
Martyn Welch | c813f59 | 2009-10-29 16:34:54 +0000 | [diff] [blame] | 293 | if ((state == 0) && (sync != 0)) { |
Geliang Tang | 445f824 | 2015-12-27 18:46:04 +0800 | [diff] [blame] | 294 | pdev = to_pci_dev(ca91cx42_bridge->parent); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 295 | |
| 296 | synchronize_irq(pdev->irq); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 297 | } |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 298 | } |
| 299 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 300 | static int ca91cx42_irq_generate(struct vme_bridge *ca91cx42_bridge, int level, |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 301 | int statid) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 302 | { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 303 | u32 tmp; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 304 | struct ca91cx42_driver *bridge; |
| 305 | |
| 306 | bridge = ca91cx42_bridge->driver_priv; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 307 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 308 | /* Universe can only generate even vectors */ |
| 309 | if (statid & 1) |
| 310 | return -EINVAL; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 311 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 312 | mutex_lock(&bridge->vme_int); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 313 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 314 | tmp = ioread32(bridge->base + VINT_EN); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 315 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 316 | /* Set Status/ID */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 317 | iowrite32(statid << 24, bridge->base + STATID); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 318 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 319 | /* Assert VMEbus IRQ */ |
| 320 | tmp = tmp | (1 << (level + 24)); |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 321 | iowrite32(tmp, bridge->base + VINT_EN); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 322 | |
| 323 | /* Wait for IACK */ |
Vincent Bossier | 54b4a77 | 2011-06-09 08:59:43 +0100 | [diff] [blame] | 324 | wait_event_interruptible(bridge->iack_queue, |
| 325 | ca91cx42_iack_received(bridge, level)); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 326 | |
| 327 | /* Return interrupt to low state */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 328 | tmp = ioread32(bridge->base + VINT_EN); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 329 | tmp = tmp & ~(1 << (level + 24)); |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 330 | iowrite32(tmp, bridge->base + VINT_EN); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 331 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 332 | mutex_unlock(&bridge->vme_int); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 333 | |
| 334 | return 0; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 335 | } |
| 336 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 337 | static int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 338 | unsigned long long vme_base, unsigned long long size, |
Martyn Welch | 6af04b0 | 2011-12-01 17:06:29 +0000 | [diff] [blame] | 339 | dma_addr_t pci_base, u32 aspace, u32 cycle) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 340 | { |
Martyn Welch | 21e0cf6 | 2010-02-18 15:13:32 +0000 | [diff] [blame] | 341 | unsigned int i, addr = 0, granularity; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 342 | unsigned int temp_ctl = 0; |
| 343 | unsigned int vme_bound, pci_offset; |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 344 | struct vme_bridge *ca91cx42_bridge; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 345 | struct ca91cx42_driver *bridge; |
| 346 | |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 347 | ca91cx42_bridge = image->parent; |
| 348 | |
| 349 | bridge = ca91cx42_bridge->driver_priv; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 350 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 351 | i = image->number; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 352 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 353 | switch (aspace) { |
| 354 | case VME_A16: |
| 355 | addr |= CA91CX42_VSI_CTL_VAS_A16; |
| 356 | break; |
| 357 | case VME_A24: |
| 358 | addr |= CA91CX42_VSI_CTL_VAS_A24; |
| 359 | break; |
| 360 | case VME_A32: |
| 361 | addr |= CA91CX42_VSI_CTL_VAS_A32; |
| 362 | break; |
| 363 | case VME_USER1: |
| 364 | addr |= CA91CX42_VSI_CTL_VAS_USER1; |
| 365 | break; |
| 366 | case VME_USER2: |
| 367 | addr |= CA91CX42_VSI_CTL_VAS_USER2; |
| 368 | break; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 369 | case VME_A64: |
| 370 | case VME_CRCSR: |
| 371 | case VME_USER3: |
| 372 | case VME_USER4: |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 373 | default: |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 374 | dev_err(ca91cx42_bridge->parent, "Invalid address space\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 375 | return -EINVAL; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 376 | break; |
| 377 | } |
| 378 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 379 | /* |
| 380 | * Bound address is a valid address for the window, adjust |
| 381 | * accordingly |
| 382 | */ |
Martyn Welch | 21e0cf6 | 2010-02-18 15:13:32 +0000 | [diff] [blame] | 383 | vme_bound = vme_base + size; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 384 | pci_offset = pci_base - vme_base; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 385 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 386 | if ((i == 0) || (i == 4)) |
| 387 | granularity = 0x1000; |
| 388 | else |
| 389 | granularity = 0x10000; |
| 390 | |
| 391 | if (vme_base & (granularity - 1)) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 392 | dev_err(ca91cx42_bridge->parent, "Invalid VME base " |
| 393 | "alignment\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 394 | return -EINVAL; |
| 395 | } |
| 396 | if (vme_bound & (granularity - 1)) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 397 | dev_err(ca91cx42_bridge->parent, "Invalid VME bound " |
| 398 | "alignment\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 399 | return -EINVAL; |
| 400 | } |
| 401 | if (pci_offset & (granularity - 1)) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 402 | dev_err(ca91cx42_bridge->parent, "Invalid PCI Offset " |
| 403 | "alignment\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 404 | return -EINVAL; |
| 405 | } |
| 406 | |
| 407 | /* Disable while we are mucking around */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 408 | temp_ctl = ioread32(bridge->base + CA91CX42_VSI_CTL[i]); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 409 | temp_ctl &= ~CA91CX42_VSI_CTL_EN; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 410 | iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 411 | |
| 412 | /* Setup mapping */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 413 | iowrite32(vme_base, bridge->base + CA91CX42_VSI_BS[i]); |
| 414 | iowrite32(vme_bound, bridge->base + CA91CX42_VSI_BD[i]); |
| 415 | iowrite32(pci_offset, bridge->base + CA91CX42_VSI_TO[i]); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 416 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 417 | /* Setup address space */ |
| 418 | temp_ctl &= ~CA91CX42_VSI_CTL_VAS_M; |
| 419 | temp_ctl |= addr; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 420 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 421 | /* Setup cycle types */ |
| 422 | temp_ctl &= ~(CA91CX42_VSI_CTL_PGM_M | CA91CX42_VSI_CTL_SUPER_M); |
| 423 | if (cycle & VME_SUPER) |
| 424 | temp_ctl |= CA91CX42_VSI_CTL_SUPER_SUPR; |
| 425 | if (cycle & VME_USER) |
| 426 | temp_ctl |= CA91CX42_VSI_CTL_SUPER_NPRIV; |
| 427 | if (cycle & VME_PROG) |
| 428 | temp_ctl |= CA91CX42_VSI_CTL_PGM_PGM; |
| 429 | if (cycle & VME_DATA) |
| 430 | temp_ctl |= CA91CX42_VSI_CTL_PGM_DATA; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 431 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 432 | /* Write ctl reg without enable */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 433 | iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 434 | |
| 435 | if (enabled) |
| 436 | temp_ctl |= CA91CX42_VSI_CTL_EN; |
| 437 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 438 | iowrite32(temp_ctl, bridge->base + CA91CX42_VSI_CTL[i]); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 439 | |
| 440 | return 0; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 441 | } |
| 442 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 443 | static int ca91cx42_slave_get(struct vme_slave_resource *image, int *enabled, |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 444 | unsigned long long *vme_base, unsigned long long *size, |
Martyn Welch | 6af04b0 | 2011-12-01 17:06:29 +0000 | [diff] [blame] | 445 | dma_addr_t *pci_base, u32 *aspace, u32 *cycle) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 446 | { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 447 | unsigned int i, granularity = 0, ctl = 0; |
| 448 | unsigned long long vme_bound, pci_offset; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 449 | struct ca91cx42_driver *bridge; |
| 450 | |
| 451 | bridge = image->parent->driver_priv; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 452 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 453 | i = image->number; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 454 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 455 | if ((i == 0) || (i == 4)) |
| 456 | granularity = 0x1000; |
| 457 | else |
| 458 | granularity = 0x10000; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 459 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 460 | /* Read Registers */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 461 | ctl = ioread32(bridge->base + CA91CX42_VSI_CTL[i]); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 462 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 463 | *vme_base = ioread32(bridge->base + CA91CX42_VSI_BS[i]); |
| 464 | vme_bound = ioread32(bridge->base + CA91CX42_VSI_BD[i]); |
| 465 | pci_offset = ioread32(bridge->base + CA91CX42_VSI_TO[i]); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 466 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 467 | *pci_base = (dma_addr_t)vme_base + pci_offset; |
| 468 | *size = (unsigned long long)((vme_bound - *vme_base) + granularity); |
| 469 | |
| 470 | *enabled = 0; |
| 471 | *aspace = 0; |
| 472 | *cycle = 0; |
| 473 | |
| 474 | if (ctl & CA91CX42_VSI_CTL_EN) |
| 475 | *enabled = 1; |
| 476 | |
| 477 | if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A16) |
| 478 | *aspace = VME_A16; |
| 479 | if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A24) |
| 480 | *aspace = VME_A24; |
| 481 | if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A32) |
| 482 | *aspace = VME_A32; |
| 483 | if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_USER1) |
| 484 | *aspace = VME_USER1; |
| 485 | if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_USER2) |
| 486 | *aspace = VME_USER2; |
| 487 | |
| 488 | if (ctl & CA91CX42_VSI_CTL_SUPER_SUPR) |
| 489 | *cycle |= VME_SUPER; |
| 490 | if (ctl & CA91CX42_VSI_CTL_SUPER_NPRIV) |
| 491 | *cycle |= VME_USER; |
| 492 | if (ctl & CA91CX42_VSI_CTL_PGM_PGM) |
| 493 | *cycle |= VME_PROG; |
| 494 | if (ctl & CA91CX42_VSI_CTL_PGM_DATA) |
| 495 | *cycle |= VME_DATA; |
| 496 | |
| 497 | return 0; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 498 | } |
| 499 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 500 | /* |
| 501 | * Allocate and map PCI Resource |
| 502 | */ |
| 503 | static int ca91cx42_alloc_resource(struct vme_master_resource *image, |
| 504 | unsigned long long size) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 505 | { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 506 | unsigned long long existing_size; |
| 507 | int retval = 0; |
| 508 | struct pci_dev *pdev; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 509 | struct vme_bridge *ca91cx42_bridge; |
| 510 | |
| 511 | ca91cx42_bridge = image->parent; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 512 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 513 | /* Find pci_dev container of dev */ |
| 514 | if (ca91cx42_bridge->parent == NULL) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 515 | dev_err(ca91cx42_bridge->parent, "Dev entry NULL\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 516 | return -EINVAL; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 517 | } |
Geliang Tang | 445f824 | 2015-12-27 18:46:04 +0800 | [diff] [blame] | 518 | pdev = to_pci_dev(ca91cx42_bridge->parent); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 519 | |
Martyn Welch | 8fafb47 | 2010-02-18 15:13:12 +0000 | [diff] [blame] | 520 | existing_size = (unsigned long long)(image->bus_resource.end - |
| 521 | image->bus_resource.start); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 522 | |
| 523 | /* If the existing size is OK, return */ |
| 524 | if (existing_size == (size - 1)) |
| 525 | return 0; |
| 526 | |
| 527 | if (existing_size != 0) { |
| 528 | iounmap(image->kern_base); |
| 529 | image->kern_base = NULL; |
Ilia Mirkin | 794a894 | 2011-03-13 00:29:13 -0500 | [diff] [blame] | 530 | kfree(image->bus_resource.name); |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 531 | release_resource(&image->bus_resource); |
| 532 | memset(&image->bus_resource, 0, sizeof(struct resource)); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 533 | } |
| 534 | |
Martyn Welch | 8fafb47 | 2010-02-18 15:13:12 +0000 | [diff] [blame] | 535 | if (image->bus_resource.name == NULL) { |
Julia Lawall | 0aa3f13 | 2010-05-30 22:27:46 +0200 | [diff] [blame] | 536 | image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_ATOMIC); |
Martyn Welch | 8fafb47 | 2010-02-18 15:13:12 +0000 | [diff] [blame] | 537 | if (image->bus_resource.name == NULL) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 538 | dev_err(ca91cx42_bridge->parent, "Unable to allocate " |
| 539 | "memory for resource name\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 540 | retval = -ENOMEM; |
| 541 | goto err_name; |
| 542 | } |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 543 | } |
| 544 | |
Martyn Welch | 8fafb47 | 2010-02-18 15:13:12 +0000 | [diff] [blame] | 545 | sprintf((char *)image->bus_resource.name, "%s.%d", |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 546 | ca91cx42_bridge->name, image->number); |
| 547 | |
Martyn Welch | 8fafb47 | 2010-02-18 15:13:12 +0000 | [diff] [blame] | 548 | image->bus_resource.start = 0; |
| 549 | image->bus_resource.end = (unsigned long)size; |
| 550 | image->bus_resource.flags = IORESOURCE_MEM; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 551 | |
| 552 | retval = pci_bus_alloc_resource(pdev->bus, |
Dmitry Kalinkin | da5ae8a | 2015-07-08 17:42:17 +0300 | [diff] [blame] | 553 | &image->bus_resource, size, 0x10000, PCIBIOS_MIN_MEM, |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 554 | 0, NULL, NULL); |
| 555 | if (retval) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 556 | dev_err(ca91cx42_bridge->parent, "Failed to allocate mem " |
| 557 | "resource for window %d size 0x%lx start 0x%lx\n", |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 558 | image->number, (unsigned long)size, |
Martyn Welch | 8fafb47 | 2010-02-18 15:13:12 +0000 | [diff] [blame] | 559 | (unsigned long)image->bus_resource.start); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 560 | goto err_resource; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 561 | } |
| 562 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 563 | image->kern_base = ioremap_nocache( |
Martyn Welch | 8fafb47 | 2010-02-18 15:13:12 +0000 | [diff] [blame] | 564 | image->bus_resource.start, size); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 565 | if (image->kern_base == NULL) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 566 | dev_err(ca91cx42_bridge->parent, "Failed to remap resource\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 567 | retval = -ENOMEM; |
| 568 | goto err_remap; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 569 | } |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 570 | |
| 571 | return 0; |
| 572 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 573 | err_remap: |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 574 | release_resource(&image->bus_resource); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 575 | err_resource: |
Martyn Welch | 8fafb47 | 2010-02-18 15:13:12 +0000 | [diff] [blame] | 576 | kfree(image->bus_resource.name); |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 577 | memset(&image->bus_resource, 0, sizeof(struct resource)); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 578 | err_name: |
| 579 | return retval; |
| 580 | } |
| 581 | |
| 582 | /* |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 583 | * Free and unmap PCI Resource |
| 584 | */ |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 585 | static void ca91cx42_free_resource(struct vme_master_resource *image) |
| 586 | { |
| 587 | iounmap(image->kern_base); |
| 588 | image->kern_base = NULL; |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 589 | release_resource(&image->bus_resource); |
Martyn Welch | 8fafb47 | 2010-02-18 15:13:12 +0000 | [diff] [blame] | 590 | kfree(image->bus_resource.name); |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 591 | memset(&image->bus_resource, 0, sizeof(struct resource)); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 592 | } |
| 593 | |
| 594 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 595 | static int ca91cx42_master_set(struct vme_master_resource *image, int enabled, |
Martyn Welch | 6af04b0 | 2011-12-01 17:06:29 +0000 | [diff] [blame] | 596 | unsigned long long vme_base, unsigned long long size, u32 aspace, |
| 597 | u32 cycle, u32 dwidth) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 598 | { |
| 599 | int retval = 0; |
Martyn Welch | 21e0cf6 | 2010-02-18 15:13:32 +0000 | [diff] [blame] | 600 | unsigned int i, granularity = 0; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 601 | unsigned int temp_ctl = 0; |
| 602 | unsigned long long pci_bound, vme_offset, pci_base; |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 603 | struct vme_bridge *ca91cx42_bridge; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 604 | struct ca91cx42_driver *bridge; |
| 605 | |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 606 | ca91cx42_bridge = image->parent; |
| 607 | |
| 608 | bridge = ca91cx42_bridge->driver_priv; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 609 | |
Martyn Welch | 21e0cf6 | 2010-02-18 15:13:32 +0000 | [diff] [blame] | 610 | i = image->number; |
| 611 | |
| 612 | if ((i == 0) || (i == 4)) |
| 613 | granularity = 0x1000; |
| 614 | else |
| 615 | granularity = 0x10000; |
| 616 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 617 | /* Verify input data */ |
Martyn Welch | 21e0cf6 | 2010-02-18 15:13:32 +0000 | [diff] [blame] | 618 | if (vme_base & (granularity - 1)) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 619 | dev_err(ca91cx42_bridge->parent, "Invalid VME Window " |
| 620 | "alignment\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 621 | retval = -EINVAL; |
| 622 | goto err_window; |
| 623 | } |
Martyn Welch | 21e0cf6 | 2010-02-18 15:13:32 +0000 | [diff] [blame] | 624 | if (size & (granularity - 1)) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 625 | dev_err(ca91cx42_bridge->parent, "Invalid VME Window " |
| 626 | "alignment\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 627 | retval = -EINVAL; |
| 628 | goto err_window; |
| 629 | } |
| 630 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 631 | spin_lock(&image->lock); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 632 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 633 | /* |
| 634 | * Let's allocate the resource here rather than further up the stack as |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 635 | * it avoids pushing loads of bus dependent stuff up the stack |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 636 | */ |
| 637 | retval = ca91cx42_alloc_resource(image, size); |
| 638 | if (retval) { |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 639 | spin_unlock(&image->lock); |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 640 | dev_err(ca91cx42_bridge->parent, "Unable to allocate memory " |
| 641 | "for resource name\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 642 | retval = -ENOMEM; |
| 643 | goto err_res; |
| 644 | } |
| 645 | |
Martyn Welch | 8fafb47 | 2010-02-18 15:13:12 +0000 | [diff] [blame] | 646 | pci_base = (unsigned long long)image->bus_resource.start; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 647 | |
| 648 | /* |
| 649 | * Bound address is a valid address for the window, adjust |
| 650 | * according to window granularity. |
| 651 | */ |
Martyn Welch | 21e0cf6 | 2010-02-18 15:13:32 +0000 | [diff] [blame] | 652 | pci_bound = pci_base + size; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 653 | vme_offset = vme_base - pci_base; |
| 654 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 655 | /* Disable while we are mucking around */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 656 | temp_ctl = ioread32(bridge->base + CA91CX42_LSI_CTL[i]); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 657 | temp_ctl &= ~CA91CX42_LSI_CTL_EN; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 658 | iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 659 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 660 | /* Setup cycle types */ |
| 661 | temp_ctl &= ~CA91CX42_LSI_CTL_VCT_M; |
| 662 | if (cycle & VME_BLT) |
| 663 | temp_ctl |= CA91CX42_LSI_CTL_VCT_BLT; |
| 664 | if (cycle & VME_MBLT) |
| 665 | temp_ctl |= CA91CX42_LSI_CTL_VCT_MBLT; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 666 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 667 | /* Setup data width */ |
| 668 | temp_ctl &= ~CA91CX42_LSI_CTL_VDW_M; |
| 669 | switch (dwidth) { |
| 670 | case VME_D8: |
| 671 | temp_ctl |= CA91CX42_LSI_CTL_VDW_D8; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 672 | break; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 673 | case VME_D16: |
| 674 | temp_ctl |= CA91CX42_LSI_CTL_VDW_D16; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 675 | break; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 676 | case VME_D32: |
| 677 | temp_ctl |= CA91CX42_LSI_CTL_VDW_D32; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 678 | break; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 679 | case VME_D64: |
| 680 | temp_ctl |= CA91CX42_LSI_CTL_VDW_D64; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 681 | break; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 682 | default: |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 683 | spin_unlock(&image->lock); |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 684 | dev_err(ca91cx42_bridge->parent, "Invalid data width\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 685 | retval = -EINVAL; |
| 686 | goto err_dwidth; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 687 | break; |
| 688 | } |
| 689 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 690 | /* Setup address space */ |
| 691 | temp_ctl &= ~CA91CX42_LSI_CTL_VAS_M; |
| 692 | switch (aspace) { |
| 693 | case VME_A16: |
| 694 | temp_ctl |= CA91CX42_LSI_CTL_VAS_A16; |
| 695 | break; |
| 696 | case VME_A24: |
| 697 | temp_ctl |= CA91CX42_LSI_CTL_VAS_A24; |
| 698 | break; |
| 699 | case VME_A32: |
| 700 | temp_ctl |= CA91CX42_LSI_CTL_VAS_A32; |
| 701 | break; |
| 702 | case VME_CRCSR: |
| 703 | temp_ctl |= CA91CX42_LSI_CTL_VAS_CRCSR; |
| 704 | break; |
| 705 | case VME_USER1: |
| 706 | temp_ctl |= CA91CX42_LSI_CTL_VAS_USER1; |
| 707 | break; |
| 708 | case VME_USER2: |
| 709 | temp_ctl |= CA91CX42_LSI_CTL_VAS_USER2; |
| 710 | break; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 711 | case VME_A64: |
| 712 | case VME_USER3: |
| 713 | case VME_USER4: |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 714 | default: |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 715 | spin_unlock(&image->lock); |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 716 | dev_err(ca91cx42_bridge->parent, "Invalid address space\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 717 | retval = -EINVAL; |
| 718 | goto err_aspace; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 719 | break; |
| 720 | } |
| 721 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 722 | temp_ctl &= ~(CA91CX42_LSI_CTL_PGM_M | CA91CX42_LSI_CTL_SUPER_M); |
| 723 | if (cycle & VME_SUPER) |
| 724 | temp_ctl |= CA91CX42_LSI_CTL_SUPER_SUPR; |
| 725 | if (cycle & VME_PROG) |
| 726 | temp_ctl |= CA91CX42_LSI_CTL_PGM_PGM; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 727 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 728 | /* Setup mapping */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 729 | iowrite32(pci_base, bridge->base + CA91CX42_LSI_BS[i]); |
| 730 | iowrite32(pci_bound, bridge->base + CA91CX42_LSI_BD[i]); |
| 731 | iowrite32(vme_offset, bridge->base + CA91CX42_LSI_TO[i]); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 732 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 733 | /* Write ctl reg without enable */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 734 | iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 735 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 736 | if (enabled) |
| 737 | temp_ctl |= CA91CX42_LSI_CTL_EN; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 738 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 739 | iowrite32(temp_ctl, bridge->base + CA91CX42_LSI_CTL[i]); |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 740 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 741 | spin_unlock(&image->lock); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 742 | return 0; |
| 743 | |
| 744 | err_aspace: |
| 745 | err_dwidth: |
| 746 | ca91cx42_free_resource(image); |
| 747 | err_res: |
| 748 | err_window: |
| 749 | return retval; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 750 | } |
| 751 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 752 | static int __ca91cx42_master_get(struct vme_master_resource *image, |
| 753 | int *enabled, unsigned long long *vme_base, unsigned long long *size, |
Martyn Welch | 6af04b0 | 2011-12-01 17:06:29 +0000 | [diff] [blame] | 754 | u32 *aspace, u32 *cycle, u32 *dwidth) |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 755 | { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 756 | unsigned int i, ctl; |
| 757 | unsigned long long pci_base, pci_bound, vme_offset; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 758 | struct ca91cx42_driver *bridge; |
| 759 | |
| 760 | bridge = image->parent->driver_priv; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 761 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 762 | i = image->number; |
| 763 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 764 | ctl = ioread32(bridge->base + CA91CX42_LSI_CTL[i]); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 765 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 766 | pci_base = ioread32(bridge->base + CA91CX42_LSI_BS[i]); |
| 767 | vme_offset = ioread32(bridge->base + CA91CX42_LSI_TO[i]); |
| 768 | pci_bound = ioread32(bridge->base + CA91CX42_LSI_BD[i]); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 769 | |
| 770 | *vme_base = pci_base + vme_offset; |
Martyn Welch | 21e0cf6 | 2010-02-18 15:13:32 +0000 | [diff] [blame] | 771 | *size = (unsigned long long)(pci_bound - pci_base); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 772 | |
| 773 | *enabled = 0; |
| 774 | *aspace = 0; |
| 775 | *cycle = 0; |
| 776 | *dwidth = 0; |
| 777 | |
| 778 | if (ctl & CA91CX42_LSI_CTL_EN) |
| 779 | *enabled = 1; |
| 780 | |
| 781 | /* Setup address space */ |
| 782 | switch (ctl & CA91CX42_LSI_CTL_VAS_M) { |
| 783 | case CA91CX42_LSI_CTL_VAS_A16: |
| 784 | *aspace = VME_A16; |
| 785 | break; |
| 786 | case CA91CX42_LSI_CTL_VAS_A24: |
| 787 | *aspace = VME_A24; |
| 788 | break; |
| 789 | case CA91CX42_LSI_CTL_VAS_A32: |
| 790 | *aspace = VME_A32; |
| 791 | break; |
| 792 | case CA91CX42_LSI_CTL_VAS_CRCSR: |
| 793 | *aspace = VME_CRCSR; |
| 794 | break; |
| 795 | case CA91CX42_LSI_CTL_VAS_USER1: |
| 796 | *aspace = VME_USER1; |
| 797 | break; |
| 798 | case CA91CX42_LSI_CTL_VAS_USER2: |
| 799 | *aspace = VME_USER2; |
| 800 | break; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 801 | } |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 802 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 803 | /* XXX Not sure howto check for MBLT */ |
| 804 | /* Setup cycle types */ |
| 805 | if (ctl & CA91CX42_LSI_CTL_VCT_BLT) |
| 806 | *cycle |= VME_BLT; |
| 807 | else |
| 808 | *cycle |= VME_SCT; |
| 809 | |
| 810 | if (ctl & CA91CX42_LSI_CTL_SUPER_SUPR) |
| 811 | *cycle |= VME_SUPER; |
| 812 | else |
| 813 | *cycle |= VME_USER; |
| 814 | |
| 815 | if (ctl & CA91CX42_LSI_CTL_PGM_PGM) |
| 816 | *cycle = VME_PROG; |
| 817 | else |
| 818 | *cycle = VME_DATA; |
| 819 | |
| 820 | /* Setup data width */ |
| 821 | switch (ctl & CA91CX42_LSI_CTL_VDW_M) { |
| 822 | case CA91CX42_LSI_CTL_VDW_D8: |
| 823 | *dwidth = VME_D8; |
| 824 | break; |
| 825 | case CA91CX42_LSI_CTL_VDW_D16: |
| 826 | *dwidth = VME_D16; |
| 827 | break; |
| 828 | case CA91CX42_LSI_CTL_VDW_D32: |
| 829 | *dwidth = VME_D32; |
| 830 | break; |
| 831 | case CA91CX42_LSI_CTL_VDW_D64: |
| 832 | *dwidth = VME_D64; |
| 833 | break; |
| 834 | } |
| 835 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 836 | return 0; |
Martyn Welch | 6047969 | 2009-07-31 09:28:17 +0100 | [diff] [blame] | 837 | } |
| 838 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 839 | static int ca91cx42_master_get(struct vme_master_resource *image, int *enabled, |
Martyn Welch | 6af04b0 | 2011-12-01 17:06:29 +0000 | [diff] [blame] | 840 | unsigned long long *vme_base, unsigned long long *size, u32 *aspace, |
| 841 | u32 *cycle, u32 *dwidth) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 842 | { |
| 843 | int retval; |
| 844 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 845 | spin_lock(&image->lock); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 846 | |
| 847 | retval = __ca91cx42_master_get(image, enabled, vme_base, size, aspace, |
| 848 | cycle, dwidth); |
| 849 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 850 | spin_unlock(&image->lock); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 851 | |
| 852 | return retval; |
| 853 | } |
| 854 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 855 | static ssize_t ca91cx42_master_read(struct vme_master_resource *image, |
| 856 | void *buf, size_t count, loff_t offset) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 857 | { |
Martyn Welch | 21e0cf6 | 2010-02-18 15:13:32 +0000 | [diff] [blame] | 858 | ssize_t retval; |
Jingoo Han | d90f32c | 2013-08-19 16:39:40 +0900 | [diff] [blame] | 859 | void __iomem *addr = image->kern_base + offset; |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 860 | unsigned int done = 0; |
| 861 | unsigned int count32; |
| 862 | |
| 863 | if (count == 0) |
| 864 | return 0; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 865 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 866 | spin_lock(&image->lock); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 867 | |
Martyn Welch | a2a720e | 2014-02-06 13:35:36 +0000 | [diff] [blame] | 868 | /* The following code handles VME address alignment. We cannot use |
| 869 | * memcpy_xxx here because it may cut data transfers in to 8-bit |
| 870 | * cycles when D16 or D32 cycles are required on the VME bus. |
| 871 | * On the other hand, the bridge itself assures that the maximum data |
| 872 | * cycle configured for the transfer is used and splits it |
| 873 | * automatically for non-aligned addresses, so we don't want the |
| 874 | * overhead of needlessly forcing small transfers for the entire cycle. |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 875 | */ |
Manohar Vanga | b91a936 | 2011-11-02 16:50:39 +0100 | [diff] [blame] | 876 | if ((uintptr_t)addr & 0x1) { |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 877 | *(u8 *)buf = ioread8(addr); |
| 878 | done += 1; |
| 879 | if (done == count) |
| 880 | goto out; |
| 881 | } |
Martyn Welch | f0342e6 | 2014-02-07 15:48:56 +0000 | [diff] [blame] | 882 | if ((uintptr_t)(addr + done) & 0x2) { |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 883 | if ((count - done) < 2) { |
| 884 | *(u8 *)(buf + done) = ioread8(addr + done); |
| 885 | done += 1; |
| 886 | goto out; |
| 887 | } else { |
| 888 | *(u16 *)(buf + done) = ioread16(addr + done); |
| 889 | done += 2; |
| 890 | } |
| 891 | } |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 892 | |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 893 | count32 = (count - done) & ~0x3; |
Martyn Welch | a2a720e | 2014-02-06 13:35:36 +0000 | [diff] [blame] | 894 | while (done < count32) { |
| 895 | *(u32 *)(buf + done) = ioread32(addr + done); |
| 896 | done += 4; |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 897 | } |
| 898 | |
| 899 | if ((count - done) & 0x2) { |
| 900 | *(u16 *)(buf + done) = ioread16(addr + done); |
| 901 | done += 2; |
| 902 | } |
| 903 | if ((count - done) & 0x1) { |
| 904 | *(u8 *)(buf + done) = ioread8(addr + done); |
| 905 | done += 1; |
| 906 | } |
| 907 | out: |
| 908 | retval = count; |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 909 | spin_unlock(&image->lock); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 910 | |
| 911 | return retval; |
| 912 | } |
| 913 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 914 | static ssize_t ca91cx42_master_write(struct vme_master_resource *image, |
| 915 | void *buf, size_t count, loff_t offset) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 916 | { |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 917 | ssize_t retval; |
Jingoo Han | d90f32c | 2013-08-19 16:39:40 +0900 | [diff] [blame] | 918 | void __iomem *addr = image->kern_base + offset; |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 919 | unsigned int done = 0; |
| 920 | unsigned int count32; |
| 921 | |
| 922 | if (count == 0) |
| 923 | return 0; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 924 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 925 | spin_lock(&image->lock); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 926 | |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 927 | /* Here we apply for the same strategy we do in master_read |
Martyn Welch | a2a720e | 2014-02-06 13:35:36 +0000 | [diff] [blame] | 928 | * function in order to assure the correct cycles. |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 929 | */ |
Manohar Vanga | b91a936 | 2011-11-02 16:50:39 +0100 | [diff] [blame] | 930 | if ((uintptr_t)addr & 0x1) { |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 931 | iowrite8(*(u8 *)buf, addr); |
| 932 | done += 1; |
| 933 | if (done == count) |
| 934 | goto out; |
| 935 | } |
Martyn Welch | f0342e6 | 2014-02-07 15:48:56 +0000 | [diff] [blame] | 936 | if ((uintptr_t)(addr + done) & 0x2) { |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 937 | if ((count - done) < 2) { |
| 938 | iowrite8(*(u8 *)(buf + done), addr + done); |
| 939 | done += 1; |
| 940 | goto out; |
| 941 | } else { |
| 942 | iowrite16(*(u16 *)(buf + done), addr + done); |
| 943 | done += 2; |
| 944 | } |
| 945 | } |
| 946 | |
| 947 | count32 = (count - done) & ~0x3; |
Martyn Welch | a2a720e | 2014-02-06 13:35:36 +0000 | [diff] [blame] | 948 | while (done < count32) { |
| 949 | iowrite32(*(u32 *)(buf + done), addr + done); |
| 950 | done += 4; |
Arthur Benilov | 53059aa | 2010-09-24 19:26:13 +0200 | [diff] [blame] | 951 | } |
| 952 | |
| 953 | if ((count - done) & 0x2) { |
| 954 | iowrite16(*(u16 *)(buf + done), addr + done); |
| 955 | done += 2; |
| 956 | } |
| 957 | if ((count - done) & 0x1) { |
| 958 | iowrite8(*(u8 *)(buf + done), addr + done); |
| 959 | done += 1; |
| 960 | } |
| 961 | out: |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 962 | retval = count; |
| 963 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 964 | spin_unlock(&image->lock); |
| 965 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 966 | return retval; |
| 967 | } |
| 968 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 969 | static unsigned int ca91cx42_master_rmw(struct vme_master_resource *image, |
Martyn Welch | 04e10e1 | 2010-02-18 15:13:38 +0000 | [diff] [blame] | 970 | unsigned int mask, unsigned int compare, unsigned int swap, |
| 971 | loff_t offset) |
| 972 | { |
Manohar Vanga | b91a936 | 2011-11-02 16:50:39 +0100 | [diff] [blame] | 973 | u32 result; |
| 974 | uintptr_t pci_addr; |
Martyn Welch | 04e10e1 | 2010-02-18 15:13:38 +0000 | [diff] [blame] | 975 | int i; |
| 976 | struct ca91cx42_driver *bridge; |
| 977 | struct device *dev; |
| 978 | |
| 979 | bridge = image->parent->driver_priv; |
| 980 | dev = image->parent->parent; |
| 981 | |
| 982 | /* Find the PCI address that maps to the desired VME address */ |
| 983 | i = image->number; |
| 984 | |
| 985 | /* Locking as we can only do one of these at a time */ |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 986 | mutex_lock(&bridge->vme_rmw); |
Martyn Welch | 04e10e1 | 2010-02-18 15:13:38 +0000 | [diff] [blame] | 987 | |
| 988 | /* Lock image */ |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 989 | spin_lock(&image->lock); |
Martyn Welch | 04e10e1 | 2010-02-18 15:13:38 +0000 | [diff] [blame] | 990 | |
Manohar Vanga | b91a936 | 2011-11-02 16:50:39 +0100 | [diff] [blame] | 991 | pci_addr = (uintptr_t)image->kern_base + offset; |
Martyn Welch | 04e10e1 | 2010-02-18 15:13:38 +0000 | [diff] [blame] | 992 | |
| 993 | /* Address must be 4-byte aligned */ |
| 994 | if (pci_addr & 0x3) { |
| 995 | dev_err(dev, "RMW Address not 4-byte aligned\n"); |
Julia Lawall | 7c0ace5 | 2010-05-26 17:59:11 +0200 | [diff] [blame] | 996 | result = -EINVAL; |
| 997 | goto out; |
Martyn Welch | 04e10e1 | 2010-02-18 15:13:38 +0000 | [diff] [blame] | 998 | } |
| 999 | |
| 1000 | /* Ensure RMW Disabled whilst configuring */ |
| 1001 | iowrite32(0, bridge->base + SCYC_CTL); |
| 1002 | |
| 1003 | /* Configure registers */ |
| 1004 | iowrite32(mask, bridge->base + SCYC_EN); |
| 1005 | iowrite32(compare, bridge->base + SCYC_CMP); |
| 1006 | iowrite32(swap, bridge->base + SCYC_SWP); |
| 1007 | iowrite32(pci_addr, bridge->base + SCYC_ADDR); |
| 1008 | |
| 1009 | /* Enable RMW */ |
| 1010 | iowrite32(CA91CX42_SCYC_CTL_CYC_RMW, bridge->base + SCYC_CTL); |
| 1011 | |
| 1012 | /* Kick process off with a read to the required address. */ |
| 1013 | result = ioread32(image->kern_base + offset); |
| 1014 | |
| 1015 | /* Disable RMW */ |
| 1016 | iowrite32(0, bridge->base + SCYC_CTL); |
| 1017 | |
Julia Lawall | 7c0ace5 | 2010-05-26 17:59:11 +0200 | [diff] [blame] | 1018 | out: |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1019 | spin_unlock(&image->lock); |
Martyn Welch | 04e10e1 | 2010-02-18 15:13:38 +0000 | [diff] [blame] | 1020 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1021 | mutex_unlock(&bridge->vme_rmw); |
Martyn Welch | 04e10e1 | 2010-02-18 15:13:38 +0000 | [diff] [blame] | 1022 | |
| 1023 | return result; |
| 1024 | } |
| 1025 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 1026 | static int ca91cx42_dma_list_add(struct vme_dma_list *list, |
| 1027 | struct vme_dma_attr *src, struct vme_dma_attr *dest, size_t count) |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1028 | { |
| 1029 | struct ca91cx42_dma_entry *entry, *prev; |
| 1030 | struct vme_dma_pci *pci_attr; |
| 1031 | struct vme_dma_vme *vme_attr; |
| 1032 | dma_addr_t desc_ptr; |
| 1033 | int retval = 0; |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 1034 | struct device *dev; |
| 1035 | |
| 1036 | dev = list->parent->parent->parent; |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1037 | |
| 1038 | /* XXX descriptor must be aligned on 64-bit boundaries */ |
Julia Lawall | 3241487 | 2010-05-11 20:26:57 +0200 | [diff] [blame] | 1039 | entry = kmalloc(sizeof(struct ca91cx42_dma_entry), GFP_KERNEL); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1040 | if (entry == NULL) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 1041 | dev_err(dev, "Failed to allocate memory for dma resource " |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1042 | "structure\n"); |
| 1043 | retval = -ENOMEM; |
| 1044 | goto err_mem; |
| 1045 | } |
| 1046 | |
| 1047 | /* Test descriptor alignment */ |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1048 | if ((unsigned long)&entry->descriptor & CA91CX42_DCPP_M) { |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 1049 | dev_err(dev, "Descriptor not aligned to 16 byte boundary as " |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1050 | "required: %p\n", &entry->descriptor); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1051 | retval = -EINVAL; |
| 1052 | goto err_align; |
| 1053 | } |
| 1054 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1055 | memset(&entry->descriptor, 0, sizeof(struct ca91cx42_dma_descriptor)); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1056 | |
| 1057 | if (dest->type == VME_DMA_VME) { |
| 1058 | entry->descriptor.dctl |= CA91CX42_DCTL_L2V; |
Kulikov Vasiliy | feffce4 | 2010-06-29 14:16:16 +0400 | [diff] [blame] | 1059 | vme_attr = dest->private; |
| 1060 | pci_attr = src->private; |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1061 | } else { |
Kulikov Vasiliy | feffce4 | 2010-06-29 14:16:16 +0400 | [diff] [blame] | 1062 | vme_attr = src->private; |
| 1063 | pci_attr = dest->private; |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1064 | } |
| 1065 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1066 | /* Check we can do fulfill required attributes */ |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1067 | if ((vme_attr->aspace & ~(VME_A16 | VME_A24 | VME_A32 | VME_USER1 | |
| 1068 | VME_USER2)) != 0) { |
| 1069 | |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 1070 | dev_err(dev, "Unsupported cycle type\n"); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1071 | retval = -EINVAL; |
| 1072 | goto err_aspace; |
| 1073 | } |
| 1074 | |
| 1075 | if ((vme_attr->cycle & ~(VME_SCT | VME_BLT | VME_SUPER | VME_USER | |
| 1076 | VME_PROG | VME_DATA)) != 0) { |
| 1077 | |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 1078 | dev_err(dev, "Unsupported cycle type\n"); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1079 | retval = -EINVAL; |
| 1080 | goto err_cycle; |
| 1081 | } |
| 1082 | |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1083 | /* Check to see if we can fulfill source and destination */ |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1084 | if (!(((src->type == VME_DMA_PCI) && (dest->type == VME_DMA_VME)) || |
| 1085 | ((src->type == VME_DMA_VME) && (dest->type == VME_DMA_PCI)))) { |
| 1086 | |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 1087 | dev_err(dev, "Cannot perform transfer with this " |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1088 | "source-destination combination\n"); |
| 1089 | retval = -EINVAL; |
| 1090 | goto err_direct; |
| 1091 | } |
| 1092 | |
| 1093 | /* Setup cycle types */ |
| 1094 | if (vme_attr->cycle & VME_BLT) |
| 1095 | entry->descriptor.dctl |= CA91CX42_DCTL_VCT_BLT; |
| 1096 | |
| 1097 | /* Setup data width */ |
| 1098 | switch (vme_attr->dwidth) { |
| 1099 | case VME_D8: |
| 1100 | entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D8; |
| 1101 | break; |
| 1102 | case VME_D16: |
| 1103 | entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D16; |
| 1104 | break; |
| 1105 | case VME_D32: |
| 1106 | entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D32; |
| 1107 | break; |
| 1108 | case VME_D64: |
| 1109 | entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D64; |
| 1110 | break; |
| 1111 | default: |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 1112 | dev_err(dev, "Invalid data width\n"); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1113 | return -EINVAL; |
| 1114 | } |
| 1115 | |
| 1116 | /* Setup address space */ |
| 1117 | switch (vme_attr->aspace) { |
| 1118 | case VME_A16: |
| 1119 | entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A16; |
| 1120 | break; |
| 1121 | case VME_A24: |
| 1122 | entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A24; |
| 1123 | break; |
| 1124 | case VME_A32: |
| 1125 | entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A32; |
| 1126 | break; |
| 1127 | case VME_USER1: |
| 1128 | entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER1; |
| 1129 | break; |
| 1130 | case VME_USER2: |
| 1131 | entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER2; |
| 1132 | break; |
| 1133 | default: |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 1134 | dev_err(dev, "Invalid address space\n"); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1135 | return -EINVAL; |
| 1136 | break; |
| 1137 | } |
| 1138 | |
| 1139 | if (vme_attr->cycle & VME_SUPER) |
| 1140 | entry->descriptor.dctl |= CA91CX42_DCTL_SUPER_SUPR; |
| 1141 | if (vme_attr->cycle & VME_PROG) |
| 1142 | entry->descriptor.dctl |= CA91CX42_DCTL_PGM_PGM; |
| 1143 | |
| 1144 | entry->descriptor.dtbc = count; |
| 1145 | entry->descriptor.dla = pci_attr->address; |
| 1146 | entry->descriptor.dva = vme_attr->address; |
| 1147 | entry->descriptor.dcpp = CA91CX42_DCPP_NULL; |
| 1148 | |
| 1149 | /* Add to list */ |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1150 | list_add_tail(&entry->list, &list->entries); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1151 | |
| 1152 | /* Fill out previous descriptors "Next Address" */ |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1153 | if (entry->list.prev != &list->entries) { |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1154 | prev = list_entry(entry->list.prev, struct ca91cx42_dma_entry, |
| 1155 | list); |
| 1156 | /* We need the bus address for the pointer */ |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1157 | desc_ptr = virt_to_bus(&entry->descriptor); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1158 | prev->descriptor.dcpp = desc_ptr & ~CA91CX42_DCPP_M; |
| 1159 | } |
| 1160 | |
| 1161 | return 0; |
| 1162 | |
| 1163 | err_cycle: |
| 1164 | err_aspace: |
| 1165 | err_direct: |
| 1166 | err_align: |
| 1167 | kfree(entry); |
| 1168 | err_mem: |
| 1169 | return retval; |
| 1170 | } |
| 1171 | |
| 1172 | static int ca91cx42_dma_busy(struct vme_bridge *ca91cx42_bridge) |
| 1173 | { |
| 1174 | u32 tmp; |
| 1175 | struct ca91cx42_driver *bridge; |
| 1176 | |
| 1177 | bridge = ca91cx42_bridge->driver_priv; |
| 1178 | |
| 1179 | tmp = ioread32(bridge->base + DGCS); |
| 1180 | |
| 1181 | if (tmp & CA91CX42_DGCS_ACT) |
| 1182 | return 0; |
| 1183 | else |
| 1184 | return 1; |
| 1185 | } |
| 1186 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 1187 | static int ca91cx42_dma_list_exec(struct vme_dma_list *list) |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1188 | { |
| 1189 | struct vme_dma_resource *ctrlr; |
| 1190 | struct ca91cx42_dma_entry *entry; |
Dmitry Kalinkin | 75c66b6 | 2015-05-28 15:07:01 +0300 | [diff] [blame] | 1191 | int retval; |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1192 | dma_addr_t bus_addr; |
| 1193 | u32 val; |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 1194 | struct device *dev; |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1195 | struct ca91cx42_driver *bridge; |
| 1196 | |
| 1197 | ctrlr = list->parent; |
| 1198 | |
| 1199 | bridge = ctrlr->parent->driver_priv; |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 1200 | dev = ctrlr->parent->parent; |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1201 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1202 | mutex_lock(&ctrlr->mtx); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1203 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1204 | if (!(list_empty(&ctrlr->running))) { |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1205 | /* |
| 1206 | * XXX We have an active DMA transfer and currently haven't |
| 1207 | * sorted out the mechanism for "pending" DMA transfers. |
| 1208 | * Return busy. |
| 1209 | */ |
| 1210 | /* Need to add to pending here */ |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1211 | mutex_unlock(&ctrlr->mtx); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1212 | return -EBUSY; |
| 1213 | } else { |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1214 | list_add(&list->list, &ctrlr->running); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1215 | } |
| 1216 | |
| 1217 | /* Get first bus address and write into registers */ |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1218 | entry = list_first_entry(&list->entries, struct ca91cx42_dma_entry, |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1219 | list); |
| 1220 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1221 | bus_addr = virt_to_bus(&entry->descriptor); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1222 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1223 | mutex_unlock(&ctrlr->mtx); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1224 | |
| 1225 | iowrite32(0, bridge->base + DTBC); |
| 1226 | iowrite32(bus_addr & ~CA91CX42_DCPP_M, bridge->base + DCPP); |
| 1227 | |
| 1228 | /* Start the operation */ |
| 1229 | val = ioread32(bridge->base + DGCS); |
| 1230 | |
| 1231 | /* XXX Could set VMEbus On and Off Counters here */ |
| 1232 | val &= (CA91CX42_DGCS_VON_M | CA91CX42_DGCS_VOFF_M); |
| 1233 | |
| 1234 | val |= (CA91CX42_DGCS_CHAIN | CA91CX42_DGCS_STOP | CA91CX42_DGCS_HALT | |
| 1235 | CA91CX42_DGCS_DONE | CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR | |
| 1236 | CA91CX42_DGCS_PERR); |
| 1237 | |
| 1238 | iowrite32(val, bridge->base + DGCS); |
| 1239 | |
| 1240 | val |= CA91CX42_DGCS_GO; |
| 1241 | |
| 1242 | iowrite32(val, bridge->base + DGCS); |
| 1243 | |
Dmitry Kalinkin | 75c66b6 | 2015-05-28 15:07:01 +0300 | [diff] [blame] | 1244 | retval = wait_event_interruptible(bridge->dma_queue, |
| 1245 | ca91cx42_dma_busy(ctrlr->parent)); |
| 1246 | |
| 1247 | if (retval) { |
| 1248 | val = ioread32(bridge->base + DGCS); |
| 1249 | iowrite32(val | CA91CX42_DGCS_STOP_REQ, bridge->base + DGCS); |
| 1250 | /* Wait for the operation to abort */ |
| 1251 | wait_event(bridge->dma_queue, |
| 1252 | ca91cx42_dma_busy(ctrlr->parent)); |
| 1253 | retval = -EINTR; |
| 1254 | goto exit; |
| 1255 | } |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1256 | |
| 1257 | /* |
| 1258 | * Read status register, this register is valid until we kick off a |
| 1259 | * new transfer. |
| 1260 | */ |
| 1261 | val = ioread32(bridge->base + DGCS); |
| 1262 | |
| 1263 | if (val & (CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR | |
| 1264 | CA91CX42_DGCS_PERR)) { |
| 1265 | |
Martyn Welch | 48d9356e | 2010-03-22 14:58:50 +0000 | [diff] [blame] | 1266 | dev_err(dev, "ca91c042: DMA Error. DGCS=%08X\n", val); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1267 | val = ioread32(bridge->base + DCTL); |
Dmitry Kalinkin | 1cfb645 | 2015-05-28 15:07:06 +0300 | [diff] [blame] | 1268 | retval = -EIO; |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1269 | } |
| 1270 | |
Dmitry Kalinkin | 75c66b6 | 2015-05-28 15:07:01 +0300 | [diff] [blame] | 1271 | exit: |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1272 | /* Remove list from running list */ |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1273 | mutex_lock(&ctrlr->mtx); |
| 1274 | list_del(&list->list); |
| 1275 | mutex_unlock(&ctrlr->mtx); |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1276 | |
| 1277 | return retval; |
| 1278 | |
| 1279 | } |
| 1280 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 1281 | static int ca91cx42_dma_list_empty(struct vme_dma_list *list) |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1282 | { |
| 1283 | struct list_head *pos, *temp; |
| 1284 | struct ca91cx42_dma_entry *entry; |
| 1285 | |
| 1286 | /* detach and free each entry */ |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1287 | list_for_each_safe(pos, temp, &list->entries) { |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1288 | list_del(pos); |
| 1289 | entry = list_entry(pos, struct ca91cx42_dma_entry, list); |
| 1290 | kfree(entry); |
| 1291 | } |
| 1292 | |
| 1293 | return 0; |
| 1294 | } |
| 1295 | |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1296 | /* |
| 1297 | * All 4 location monitors reside at the same base - this is therefore a |
| 1298 | * system wide configuration. |
| 1299 | * |
| 1300 | * This does not enable the LM monitor - that should be done when the first |
| 1301 | * callback is attached and disabled when the last callback is removed. |
| 1302 | */ |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 1303 | static int ca91cx42_lm_set(struct vme_lm_resource *lm, |
Martyn Welch | 6af04b0 | 2011-12-01 17:06:29 +0000 | [diff] [blame] | 1304 | unsigned long long lm_base, u32 aspace, u32 cycle) |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1305 | { |
| 1306 | u32 temp_base, lm_ctl = 0; |
| 1307 | int i; |
| 1308 | struct ca91cx42_driver *bridge; |
| 1309 | struct device *dev; |
| 1310 | |
| 1311 | bridge = lm->parent->driver_priv; |
| 1312 | dev = lm->parent->parent; |
| 1313 | |
| 1314 | /* Check the alignment of the location monitor */ |
| 1315 | temp_base = (u32)lm_base; |
| 1316 | if (temp_base & 0xffff) { |
| 1317 | dev_err(dev, "Location monitor must be aligned to 64KB " |
| 1318 | "boundary"); |
| 1319 | return -EINVAL; |
| 1320 | } |
| 1321 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1322 | mutex_lock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1323 | |
| 1324 | /* If we already have a callback attached, we can't move it! */ |
| 1325 | for (i = 0; i < lm->monitors; i++) { |
| 1326 | if (bridge->lm_callback[i] != NULL) { |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1327 | mutex_unlock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1328 | dev_err(dev, "Location monitor callback attached, " |
| 1329 | "can't reset\n"); |
| 1330 | return -EBUSY; |
| 1331 | } |
| 1332 | } |
| 1333 | |
| 1334 | switch (aspace) { |
| 1335 | case VME_A16: |
| 1336 | lm_ctl |= CA91CX42_LM_CTL_AS_A16; |
| 1337 | break; |
| 1338 | case VME_A24: |
| 1339 | lm_ctl |= CA91CX42_LM_CTL_AS_A24; |
| 1340 | break; |
| 1341 | case VME_A32: |
| 1342 | lm_ctl |= CA91CX42_LM_CTL_AS_A32; |
| 1343 | break; |
| 1344 | default: |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1345 | mutex_unlock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1346 | dev_err(dev, "Invalid address space\n"); |
| 1347 | return -EINVAL; |
| 1348 | break; |
| 1349 | } |
| 1350 | |
| 1351 | if (cycle & VME_SUPER) |
| 1352 | lm_ctl |= CA91CX42_LM_CTL_SUPR; |
| 1353 | if (cycle & VME_USER) |
| 1354 | lm_ctl |= CA91CX42_LM_CTL_NPRIV; |
| 1355 | if (cycle & VME_PROG) |
| 1356 | lm_ctl |= CA91CX42_LM_CTL_PGM; |
| 1357 | if (cycle & VME_DATA) |
| 1358 | lm_ctl |= CA91CX42_LM_CTL_DATA; |
| 1359 | |
| 1360 | iowrite32(lm_base, bridge->base + LM_BS); |
| 1361 | iowrite32(lm_ctl, bridge->base + LM_CTL); |
| 1362 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1363 | mutex_unlock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1364 | |
| 1365 | return 0; |
| 1366 | } |
| 1367 | |
| 1368 | /* Get configuration of the callback monitor and return whether it is enabled |
| 1369 | * or disabled. |
| 1370 | */ |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 1371 | static int ca91cx42_lm_get(struct vme_lm_resource *lm, |
Martyn Welch | 6af04b0 | 2011-12-01 17:06:29 +0000 | [diff] [blame] | 1372 | unsigned long long *lm_base, u32 *aspace, u32 *cycle) |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1373 | { |
| 1374 | u32 lm_ctl, enabled = 0; |
| 1375 | struct ca91cx42_driver *bridge; |
| 1376 | |
| 1377 | bridge = lm->parent->driver_priv; |
| 1378 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1379 | mutex_lock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1380 | |
| 1381 | *lm_base = (unsigned long long)ioread32(bridge->base + LM_BS); |
| 1382 | lm_ctl = ioread32(bridge->base + LM_CTL); |
| 1383 | |
| 1384 | if (lm_ctl & CA91CX42_LM_CTL_EN) |
| 1385 | enabled = 1; |
| 1386 | |
| 1387 | if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A16) |
| 1388 | *aspace = VME_A16; |
| 1389 | if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A24) |
| 1390 | *aspace = VME_A24; |
| 1391 | if ((lm_ctl & CA91CX42_LM_CTL_AS_M) == CA91CX42_LM_CTL_AS_A32) |
| 1392 | *aspace = VME_A32; |
| 1393 | |
| 1394 | *cycle = 0; |
| 1395 | if (lm_ctl & CA91CX42_LM_CTL_SUPR) |
| 1396 | *cycle |= VME_SUPER; |
| 1397 | if (lm_ctl & CA91CX42_LM_CTL_NPRIV) |
| 1398 | *cycle |= VME_USER; |
| 1399 | if (lm_ctl & CA91CX42_LM_CTL_PGM) |
| 1400 | *cycle |= VME_PROG; |
| 1401 | if (lm_ctl & CA91CX42_LM_CTL_DATA) |
| 1402 | *cycle |= VME_DATA; |
| 1403 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1404 | mutex_unlock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1405 | |
| 1406 | return enabled; |
| 1407 | } |
| 1408 | |
| 1409 | /* |
| 1410 | * Attach a callback to a specific location monitor. |
| 1411 | * |
| 1412 | * Callback will be passed the monitor triggered. |
| 1413 | */ |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 1414 | static int ca91cx42_lm_attach(struct vme_lm_resource *lm, int monitor, |
Aaron Sierra | fa54b32 | 2016-04-29 16:41:02 -0500 | [diff] [blame] | 1415 | void (*callback)(void *), void *data) |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1416 | { |
| 1417 | u32 lm_ctl, tmp; |
| 1418 | struct ca91cx42_driver *bridge; |
| 1419 | struct device *dev; |
| 1420 | |
| 1421 | bridge = lm->parent->driver_priv; |
| 1422 | dev = lm->parent->parent; |
| 1423 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1424 | mutex_lock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1425 | |
| 1426 | /* Ensure that the location monitor is configured - need PGM or DATA */ |
| 1427 | lm_ctl = ioread32(bridge->base + LM_CTL); |
| 1428 | if ((lm_ctl & (CA91CX42_LM_CTL_PGM | CA91CX42_LM_CTL_DATA)) == 0) { |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1429 | mutex_unlock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1430 | dev_err(dev, "Location monitor not properly configured\n"); |
| 1431 | return -EINVAL; |
| 1432 | } |
| 1433 | |
| 1434 | /* Check that a callback isn't already attached */ |
| 1435 | if (bridge->lm_callback[monitor] != NULL) { |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1436 | mutex_unlock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1437 | dev_err(dev, "Existing callback attached\n"); |
| 1438 | return -EBUSY; |
| 1439 | } |
| 1440 | |
| 1441 | /* Attach callback */ |
| 1442 | bridge->lm_callback[monitor] = callback; |
Aaron Sierra | fa54b32 | 2016-04-29 16:41:02 -0500 | [diff] [blame] | 1443 | bridge->lm_data[monitor] = data; |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1444 | |
| 1445 | /* Enable Location Monitor interrupt */ |
| 1446 | tmp = ioread32(bridge->base + LINT_EN); |
| 1447 | tmp |= CA91CX42_LINT_LM[monitor]; |
| 1448 | iowrite32(tmp, bridge->base + LINT_EN); |
| 1449 | |
| 1450 | /* Ensure that global Location Monitor Enable set */ |
| 1451 | if ((lm_ctl & CA91CX42_LM_CTL_EN) == 0) { |
| 1452 | lm_ctl |= CA91CX42_LM_CTL_EN; |
| 1453 | iowrite32(lm_ctl, bridge->base + LM_CTL); |
| 1454 | } |
| 1455 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1456 | mutex_unlock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1457 | |
| 1458 | return 0; |
| 1459 | } |
| 1460 | |
| 1461 | /* |
| 1462 | * Detach a callback function forn a specific location monitor. |
| 1463 | */ |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 1464 | static int ca91cx42_lm_detach(struct vme_lm_resource *lm, int monitor) |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1465 | { |
| 1466 | u32 tmp; |
| 1467 | struct ca91cx42_driver *bridge; |
| 1468 | |
| 1469 | bridge = lm->parent->driver_priv; |
| 1470 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1471 | mutex_lock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1472 | |
| 1473 | /* Disable Location Monitor and ensure previous interrupts are clear */ |
| 1474 | tmp = ioread32(bridge->base + LINT_EN); |
| 1475 | tmp &= ~CA91CX42_LINT_LM[monitor]; |
| 1476 | iowrite32(tmp, bridge->base + LINT_EN); |
| 1477 | |
| 1478 | iowrite32(CA91CX42_LINT_LM[monitor], |
| 1479 | bridge->base + LINT_STAT); |
| 1480 | |
| 1481 | /* Detach callback */ |
| 1482 | bridge->lm_callback[monitor] = NULL; |
Aaron Sierra | fa54b32 | 2016-04-29 16:41:02 -0500 | [diff] [blame] | 1483 | bridge->lm_data[monitor] = NULL; |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1484 | |
| 1485 | /* If all location monitors disabled, disable global Location Monitor */ |
| 1486 | if ((tmp & (CA91CX42_LINT_LM0 | CA91CX42_LINT_LM1 | CA91CX42_LINT_LM2 | |
| 1487 | CA91CX42_LINT_LM3)) == 0) { |
| 1488 | tmp = ioread32(bridge->base + LM_CTL); |
| 1489 | tmp &= ~CA91CX42_LM_CTL_EN; |
| 1490 | iowrite32(tmp, bridge->base + LM_CTL); |
| 1491 | } |
| 1492 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1493 | mutex_unlock(&lm->mtx); |
Martyn Welch | 2b82beb | 2010-02-18 15:13:19 +0000 | [diff] [blame] | 1494 | |
| 1495 | return 0; |
| 1496 | } |
| 1497 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 1498 | static int ca91cx42_slot_get(struct vme_bridge *ca91cx42_bridge) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1499 | { |
| 1500 | u32 slot = 0; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1501 | struct ca91cx42_driver *bridge; |
| 1502 | |
| 1503 | bridge = ca91cx42_bridge->driver_priv; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1504 | |
Martyn Welch | 12b2d5c | 2009-12-15 08:42:56 +0000 | [diff] [blame] | 1505 | if (!geoid) { |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1506 | slot = ioread32(bridge->base + VCSR_BS); |
Martyn Welch | 12b2d5c | 2009-12-15 08:42:56 +0000 | [diff] [blame] | 1507 | slot = ((slot & CA91CX42_VCSR_BS_SLOT_M) >> 27); |
| 1508 | } else |
| 1509 | slot = geoid; |
| 1510 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1511 | return (int)slot; |
| 1512 | |
| 1513 | } |
| 1514 | |
H Hartley Sweeten | a11cfdf | 2012-05-02 17:12:22 -0700 | [diff] [blame] | 1515 | static void *ca91cx42_alloc_consistent(struct device *parent, size_t size, |
Manohar Vanga | 7f58f02 | 2011-08-10 11:33:46 +0200 | [diff] [blame] | 1516 | dma_addr_t *dma) |
| 1517 | { |
| 1518 | struct pci_dev *pdev; |
| 1519 | |
| 1520 | /* Find pci_dev container of dev */ |
Geliang Tang | 445f824 | 2015-12-27 18:46:04 +0800 | [diff] [blame] | 1521 | pdev = to_pci_dev(parent); |
Manohar Vanga | 7f58f02 | 2011-08-10 11:33:46 +0200 | [diff] [blame] | 1522 | |
| 1523 | return pci_alloc_consistent(pdev, size, dma); |
| 1524 | } |
| 1525 | |
H Hartley Sweeten | a11cfdf | 2012-05-02 17:12:22 -0700 | [diff] [blame] | 1526 | static void ca91cx42_free_consistent(struct device *parent, size_t size, |
| 1527 | void *vaddr, dma_addr_t dma) |
Manohar Vanga | 7f58f02 | 2011-08-10 11:33:46 +0200 | [diff] [blame] | 1528 | { |
| 1529 | struct pci_dev *pdev; |
| 1530 | |
| 1531 | /* Find pci_dev container of dev */ |
Geliang Tang | 445f824 | 2015-12-27 18:46:04 +0800 | [diff] [blame] | 1532 | pdev = to_pci_dev(parent); |
Manohar Vanga | 7f58f02 | 2011-08-10 11:33:46 +0200 | [diff] [blame] | 1533 | |
| 1534 | pci_free_consistent(pdev, size, vaddr, dma); |
| 1535 | } |
| 1536 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1537 | /* |
| 1538 | * Configure CR/CSR space |
| 1539 | * |
| 1540 | * Access to the CR/CSR can be configured at power-up. The location of the |
| 1541 | * CR/CSR registers in the CR/CSR address space is determined by the boards |
| 1542 | * Auto-ID or Geographic address. This function ensures that the window is |
| 1543 | * enabled at an offset consistent with the boards geopgraphic address. |
| 1544 | */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1545 | static int ca91cx42_crcsr_init(struct vme_bridge *ca91cx42_bridge, |
| 1546 | struct pci_dev *pdev) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1547 | { |
| 1548 | unsigned int crcsr_addr; |
| 1549 | int tmp, slot; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1550 | struct ca91cx42_driver *bridge; |
| 1551 | |
| 1552 | bridge = ca91cx42_bridge->driver_priv; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1553 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1554 | slot = ca91cx42_slot_get(ca91cx42_bridge); |
Martyn Welch | 25331ba | 2010-02-18 15:13:45 +0000 | [diff] [blame] | 1555 | |
| 1556 | /* Write CSR Base Address if slot ID is supplied as a module param */ |
| 1557 | if (geoid) |
| 1558 | iowrite32(geoid << 27, bridge->base + VCSR_BS); |
| 1559 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1560 | dev_info(&pdev->dev, "CR/CSR Offset: %d\n", slot); |
| 1561 | if (slot == 0) { |
| 1562 | dev_err(&pdev->dev, "Slot number is unset, not configuring " |
| 1563 | "CR/CSR space\n"); |
| 1564 | return -EINVAL; |
| 1565 | } |
| 1566 | |
| 1567 | /* Allocate mem for CR/CSR image */ |
Joe Perches | 88b2608 | 2014-08-08 14:24:53 -0700 | [diff] [blame] | 1568 | bridge->crcsr_kernel = pci_zalloc_consistent(pdev, VME_CRCSR_BUF_SIZE, |
| 1569 | &bridge->crcsr_bus); |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1570 | if (bridge->crcsr_kernel == NULL) { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1571 | dev_err(&pdev->dev, "Failed to allocate memory for CR/CSR " |
| 1572 | "image\n"); |
| 1573 | return -ENOMEM; |
| 1574 | } |
| 1575 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1576 | crcsr_addr = slot * (512 * 1024); |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1577 | iowrite32(bridge->crcsr_bus - crcsr_addr, bridge->base + VCSR_TO); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1578 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1579 | tmp = ioread32(bridge->base + VCSR_CTL); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1580 | tmp |= CA91CX42_VCSR_CTL_EN; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1581 | iowrite32(tmp, bridge->base + VCSR_CTL); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1582 | |
| 1583 | return 0; |
| 1584 | } |
| 1585 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1586 | static void ca91cx42_crcsr_exit(struct vme_bridge *ca91cx42_bridge, |
| 1587 | struct pci_dev *pdev) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1588 | { |
| 1589 | u32 tmp; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1590 | struct ca91cx42_driver *bridge; |
| 1591 | |
| 1592 | bridge = ca91cx42_bridge->driver_priv; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1593 | |
| 1594 | /* Turn off CR/CSR space */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1595 | tmp = ioread32(bridge->base + VCSR_CTL); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1596 | tmp &= ~CA91CX42_VCSR_CTL_EN; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1597 | iowrite32(tmp, bridge->base + VCSR_CTL); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1598 | |
| 1599 | /* Free image */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1600 | iowrite32(0, bridge->base + VCSR_TO); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1601 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1602 | pci_free_consistent(pdev, VME_CRCSR_BUF_SIZE, bridge->crcsr_kernel, |
| 1603 | bridge->crcsr_bus); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1604 | } |
| 1605 | |
| 1606 | static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
| 1607 | { |
| 1608 | int retval, i; |
| 1609 | u32 data; |
Wei Yongjun | 43f5e46 | 2012-08-21 12:17:34 +0800 | [diff] [blame] | 1610 | struct list_head *pos = NULL, *n; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1611 | struct vme_bridge *ca91cx42_bridge; |
| 1612 | struct ca91cx42_driver *ca91cx42_device; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1613 | struct vme_master_resource *master_image; |
| 1614 | struct vme_slave_resource *slave_image; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1615 | struct vme_dma_resource *dma_ctrlr; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1616 | struct vme_lm_resource *lm; |
| 1617 | |
| 1618 | /* We want to support more than one of each bridge so we need to |
| 1619 | * dynamically allocate the bridge structure |
| 1620 | */ |
Julia Lawall | 7a6cb0d | 2010-05-13 22:00:05 +0200 | [diff] [blame] | 1621 | ca91cx42_bridge = kzalloc(sizeof(struct vme_bridge), GFP_KERNEL); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1622 | |
| 1623 | if (ca91cx42_bridge == NULL) { |
| 1624 | dev_err(&pdev->dev, "Failed to allocate memory for device " |
| 1625 | "structure\n"); |
| 1626 | retval = -ENOMEM; |
| 1627 | goto err_struct; |
| 1628 | } |
Aaron Sierra | 326071b | 2016-04-24 15:11:38 -0500 | [diff] [blame] | 1629 | vme_init_bridge(ca91cx42_bridge); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1630 | |
Julia Lawall | 7a6cb0d | 2010-05-13 22:00:05 +0200 | [diff] [blame] | 1631 | ca91cx42_device = kzalloc(sizeof(struct ca91cx42_driver), GFP_KERNEL); |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1632 | |
| 1633 | if (ca91cx42_device == NULL) { |
| 1634 | dev_err(&pdev->dev, "Failed to allocate memory for device " |
| 1635 | "structure\n"); |
| 1636 | retval = -ENOMEM; |
| 1637 | goto err_driver; |
| 1638 | } |
| 1639 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1640 | ca91cx42_bridge->driver_priv = ca91cx42_device; |
| 1641 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1642 | /* Enable the device */ |
| 1643 | retval = pci_enable_device(pdev); |
| 1644 | if (retval) { |
| 1645 | dev_err(&pdev->dev, "Unable to enable device\n"); |
| 1646 | goto err_enable; |
| 1647 | } |
| 1648 | |
| 1649 | /* Map Registers */ |
| 1650 | retval = pci_request_regions(pdev, driver_name); |
| 1651 | if (retval) { |
| 1652 | dev_err(&pdev->dev, "Unable to reserve resources\n"); |
| 1653 | goto err_resource; |
| 1654 | } |
| 1655 | |
| 1656 | /* map registers in BAR 0 */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1657 | ca91cx42_device->base = ioremap_nocache(pci_resource_start(pdev, 0), |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1658 | 4096); |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1659 | if (!ca91cx42_device->base) { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1660 | dev_err(&pdev->dev, "Unable to remap CRG region\n"); |
| 1661 | retval = -EIO; |
| 1662 | goto err_remap; |
| 1663 | } |
| 1664 | |
| 1665 | /* Check to see if the mapping worked out */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1666 | data = ioread32(ca91cx42_device->base + CA91CX42_PCI_ID) & 0x0000FFFF; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1667 | if (data != PCI_VENDOR_ID_TUNDRA) { |
| 1668 | dev_err(&pdev->dev, "PCI_ID check failed\n"); |
| 1669 | retval = -EIO; |
| 1670 | goto err_test; |
| 1671 | } |
| 1672 | |
| 1673 | /* Initialize wait queues & mutual exclusion flags */ |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1674 | init_waitqueue_head(&ca91cx42_device->dma_queue); |
| 1675 | init_waitqueue_head(&ca91cx42_device->iack_queue); |
| 1676 | mutex_init(&ca91cx42_device->vme_int); |
| 1677 | mutex_init(&ca91cx42_device->vme_rmw); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1678 | |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1679 | ca91cx42_bridge->parent = &pdev->dev; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1680 | strcpy(ca91cx42_bridge->name, driver_name); |
| 1681 | |
| 1682 | /* Setup IRQ */ |
| 1683 | retval = ca91cx42_irq_init(ca91cx42_bridge); |
| 1684 | if (retval != 0) { |
| 1685 | dev_err(&pdev->dev, "Chip Initialization failed.\n"); |
| 1686 | goto err_irq; |
| 1687 | } |
| 1688 | |
| 1689 | /* Add master windows to list */ |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1690 | for (i = 0; i < CA91C142_MAX_MASTER; i++) { |
| 1691 | master_image = kmalloc(sizeof(struct vme_master_resource), |
| 1692 | GFP_KERNEL); |
| 1693 | if (master_image == NULL) { |
| 1694 | dev_err(&pdev->dev, "Failed to allocate memory for " |
| 1695 | "master resource structure\n"); |
| 1696 | retval = -ENOMEM; |
| 1697 | goto err_master; |
| 1698 | } |
| 1699 | master_image->parent = ca91cx42_bridge; |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1700 | spin_lock_init(&master_image->lock); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1701 | master_image->locked = 0; |
| 1702 | master_image->number = i; |
| 1703 | master_image->address_attr = VME_A16 | VME_A24 | VME_A32 | |
| 1704 | VME_CRCSR | VME_USER1 | VME_USER2; |
| 1705 | master_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT | |
| 1706 | VME_SUPER | VME_USER | VME_PROG | VME_DATA; |
| 1707 | master_image->width_attr = VME_D8 | VME_D16 | VME_D32 | VME_D64; |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1708 | memset(&master_image->bus_resource, 0, |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1709 | sizeof(struct resource)); |
| 1710 | master_image->kern_base = NULL; |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1711 | list_add_tail(&master_image->list, |
| 1712 | &ca91cx42_bridge->master_resources); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1713 | } |
| 1714 | |
| 1715 | /* Add slave windows to list */ |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1716 | for (i = 0; i < CA91C142_MAX_SLAVE; i++) { |
| 1717 | slave_image = kmalloc(sizeof(struct vme_slave_resource), |
| 1718 | GFP_KERNEL); |
| 1719 | if (slave_image == NULL) { |
| 1720 | dev_err(&pdev->dev, "Failed to allocate memory for " |
| 1721 | "slave resource structure\n"); |
| 1722 | retval = -ENOMEM; |
| 1723 | goto err_slave; |
| 1724 | } |
| 1725 | slave_image->parent = ca91cx42_bridge; |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1726 | mutex_init(&slave_image->mtx); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1727 | slave_image->locked = 0; |
| 1728 | slave_image->number = i; |
| 1729 | slave_image->address_attr = VME_A24 | VME_A32 | VME_USER1 | |
| 1730 | VME_USER2; |
| 1731 | |
| 1732 | /* Only windows 0 and 4 support A16 */ |
| 1733 | if (i == 0 || i == 4) |
| 1734 | slave_image->address_attr |= VME_A16; |
| 1735 | |
| 1736 | slave_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT | |
| 1737 | VME_SUPER | VME_USER | VME_PROG | VME_DATA; |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1738 | list_add_tail(&slave_image->list, |
| 1739 | &ca91cx42_bridge->slave_resources); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1740 | } |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1741 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1742 | /* Add dma engines to list */ |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1743 | for (i = 0; i < CA91C142_MAX_DMA; i++) { |
| 1744 | dma_ctrlr = kmalloc(sizeof(struct vme_dma_resource), |
| 1745 | GFP_KERNEL); |
| 1746 | if (dma_ctrlr == NULL) { |
| 1747 | dev_err(&pdev->dev, "Failed to allocate memory for " |
| 1748 | "dma resource structure\n"); |
| 1749 | retval = -ENOMEM; |
| 1750 | goto err_dma; |
| 1751 | } |
| 1752 | dma_ctrlr->parent = ca91cx42_bridge; |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1753 | mutex_init(&dma_ctrlr->mtx); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1754 | dma_ctrlr->locked = 0; |
| 1755 | dma_ctrlr->number = i; |
Martyn Welch | 4f723df | 2010-02-18 15:12:58 +0000 | [diff] [blame] | 1756 | dma_ctrlr->route_attr = VME_DMA_VME_TO_MEM | |
| 1757 | VME_DMA_MEM_TO_VME; |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1758 | INIT_LIST_HEAD(&dma_ctrlr->pending); |
| 1759 | INIT_LIST_HEAD(&dma_ctrlr->running); |
| 1760 | list_add_tail(&dma_ctrlr->list, |
| 1761 | &ca91cx42_bridge->dma_resources); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1762 | } |
Martyn Welch | 4860ab7 | 2010-02-18 15:13:25 +0000 | [diff] [blame] | 1763 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1764 | /* Add location monitor to list */ |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1765 | lm = kmalloc(sizeof(struct vme_lm_resource), GFP_KERNEL); |
| 1766 | if (lm == NULL) { |
| 1767 | dev_err(&pdev->dev, "Failed to allocate memory for " |
| 1768 | "location monitor resource structure\n"); |
| 1769 | retval = -ENOMEM; |
| 1770 | goto err_lm; |
| 1771 | } |
| 1772 | lm->parent = ca91cx42_bridge; |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1773 | mutex_init(&lm->mtx); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1774 | lm->locked = 0; |
| 1775 | lm->number = 1; |
| 1776 | lm->monitors = 4; |
Emilio G. Cota | 886953e | 2010-11-12 11:14:07 +0000 | [diff] [blame] | 1777 | list_add_tail(&lm->list, &ca91cx42_bridge->lm_resources); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1778 | |
| 1779 | ca91cx42_bridge->slave_get = ca91cx42_slave_get; |
| 1780 | ca91cx42_bridge->slave_set = ca91cx42_slave_set; |
| 1781 | ca91cx42_bridge->master_get = ca91cx42_master_get; |
| 1782 | ca91cx42_bridge->master_set = ca91cx42_master_set; |
| 1783 | ca91cx42_bridge->master_read = ca91cx42_master_read; |
| 1784 | ca91cx42_bridge->master_write = ca91cx42_master_write; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1785 | ca91cx42_bridge->master_rmw = ca91cx42_master_rmw; |
| 1786 | ca91cx42_bridge->dma_list_add = ca91cx42_dma_list_add; |
| 1787 | ca91cx42_bridge->dma_list_exec = ca91cx42_dma_list_exec; |
| 1788 | ca91cx42_bridge->dma_list_empty = ca91cx42_dma_list_empty; |
Martyn Welch | c813f59 | 2009-10-29 16:34:54 +0000 | [diff] [blame] | 1789 | ca91cx42_bridge->irq_set = ca91cx42_irq_set; |
| 1790 | ca91cx42_bridge->irq_generate = ca91cx42_irq_generate; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1791 | ca91cx42_bridge->lm_set = ca91cx42_lm_set; |
| 1792 | ca91cx42_bridge->lm_get = ca91cx42_lm_get; |
| 1793 | ca91cx42_bridge->lm_attach = ca91cx42_lm_attach; |
| 1794 | ca91cx42_bridge->lm_detach = ca91cx42_lm_detach; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1795 | ca91cx42_bridge->slot_get = ca91cx42_slot_get; |
Manohar Vanga | 7f58f02 | 2011-08-10 11:33:46 +0200 | [diff] [blame] | 1796 | ca91cx42_bridge->alloc_consistent = ca91cx42_alloc_consistent; |
| 1797 | ca91cx42_bridge->free_consistent = ca91cx42_free_consistent; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1798 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1799 | data = ioread32(ca91cx42_device->base + MISC_CTL); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1800 | dev_info(&pdev->dev, "Board is%s the VME system controller\n", |
| 1801 | (data & CA91CX42_MISC_CTL_SYSCON) ? "" : " not"); |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1802 | dev_info(&pdev->dev, "Slot ID is %d\n", |
| 1803 | ca91cx42_slot_get(ca91cx42_bridge)); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1804 | |
Martyn Welch | 7946328 | 2010-03-22 14:58:57 +0000 | [diff] [blame] | 1805 | if (ca91cx42_crcsr_init(ca91cx42_bridge, pdev)) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1806 | dev_err(&pdev->dev, "CR/CSR configuration failed.\n"); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1807 | |
| 1808 | /* Need to save ca91cx42_bridge pointer locally in link list for use in |
| 1809 | * ca91cx42_remove() |
| 1810 | */ |
| 1811 | retval = vme_register_bridge(ca91cx42_bridge); |
| 1812 | if (retval != 0) { |
| 1813 | dev_err(&pdev->dev, "Chip Registration failed.\n"); |
| 1814 | goto err_reg; |
| 1815 | } |
| 1816 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1817 | pci_set_drvdata(pdev, ca91cx42_bridge); |
| 1818 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1819 | return 0; |
| 1820 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1821 | err_reg: |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1822 | ca91cx42_crcsr_exit(ca91cx42_bridge, pdev); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1823 | err_lm: |
| 1824 | /* resources are stored in link list */ |
Wei Yongjun | 43f5e46 | 2012-08-21 12:17:34 +0800 | [diff] [blame] | 1825 | list_for_each_safe(pos, n, &ca91cx42_bridge->lm_resources) { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1826 | lm = list_entry(pos, struct vme_lm_resource, list); |
| 1827 | list_del(pos); |
| 1828 | kfree(lm); |
| 1829 | } |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1830 | err_dma: |
| 1831 | /* resources are stored in link list */ |
Wei Yongjun | 43f5e46 | 2012-08-21 12:17:34 +0800 | [diff] [blame] | 1832 | list_for_each_safe(pos, n, &ca91cx42_bridge->dma_resources) { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1833 | dma_ctrlr = list_entry(pos, struct vme_dma_resource, list); |
| 1834 | list_del(pos); |
| 1835 | kfree(dma_ctrlr); |
| 1836 | } |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1837 | err_slave: |
| 1838 | /* resources are stored in link list */ |
Wei Yongjun | 43f5e46 | 2012-08-21 12:17:34 +0800 | [diff] [blame] | 1839 | list_for_each_safe(pos, n, &ca91cx42_bridge->slave_resources) { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1840 | slave_image = list_entry(pos, struct vme_slave_resource, list); |
| 1841 | list_del(pos); |
| 1842 | kfree(slave_image); |
| 1843 | } |
| 1844 | err_master: |
| 1845 | /* resources are stored in link list */ |
Wei Yongjun | 43f5e46 | 2012-08-21 12:17:34 +0800 | [diff] [blame] | 1846 | list_for_each_safe(pos, n, &ca91cx42_bridge->master_resources) { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1847 | master_image = list_entry(pos, struct vme_master_resource, |
| 1848 | list); |
| 1849 | list_del(pos); |
| 1850 | kfree(master_image); |
| 1851 | } |
| 1852 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1853 | ca91cx42_irq_exit(ca91cx42_device, pdev); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1854 | err_irq: |
| 1855 | err_test: |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1856 | iounmap(ca91cx42_device->base); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1857 | err_remap: |
| 1858 | pci_release_regions(pdev); |
| 1859 | err_resource: |
| 1860 | pci_disable_device(pdev); |
| 1861 | err_enable: |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1862 | kfree(ca91cx42_device); |
| 1863 | err_driver: |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1864 | kfree(ca91cx42_bridge); |
| 1865 | err_struct: |
| 1866 | return retval; |
| 1867 | |
| 1868 | } |
| 1869 | |
Emilio G. Cota | efbb979 | 2010-11-12 11:15:07 +0000 | [diff] [blame] | 1870 | static void ca91cx42_remove(struct pci_dev *pdev) |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1871 | { |
Wei Yongjun | 43f5e46 | 2012-08-21 12:17:34 +0800 | [diff] [blame] | 1872 | struct list_head *pos = NULL, *n; |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1873 | struct vme_master_resource *master_image; |
| 1874 | struct vme_slave_resource *slave_image; |
| 1875 | struct vme_dma_resource *dma_ctrlr; |
| 1876 | struct vme_lm_resource *lm; |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1877 | struct ca91cx42_driver *bridge; |
| 1878 | struct vme_bridge *ca91cx42_bridge = pci_get_drvdata(pdev); |
| 1879 | |
| 1880 | bridge = ca91cx42_bridge->driver_priv; |
| 1881 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1882 | |
| 1883 | /* Turn off Ints */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1884 | iowrite32(0, bridge->base + LINT_EN); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1885 | |
| 1886 | /* Turn off the windows */ |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1887 | iowrite32(0x00800000, bridge->base + LSI0_CTL); |
| 1888 | iowrite32(0x00800000, bridge->base + LSI1_CTL); |
| 1889 | iowrite32(0x00800000, bridge->base + LSI2_CTL); |
| 1890 | iowrite32(0x00800000, bridge->base + LSI3_CTL); |
| 1891 | iowrite32(0x00800000, bridge->base + LSI4_CTL); |
| 1892 | iowrite32(0x00800000, bridge->base + LSI5_CTL); |
| 1893 | iowrite32(0x00800000, bridge->base + LSI6_CTL); |
| 1894 | iowrite32(0x00800000, bridge->base + LSI7_CTL); |
| 1895 | iowrite32(0x00F00000, bridge->base + VSI0_CTL); |
| 1896 | iowrite32(0x00F00000, bridge->base + VSI1_CTL); |
| 1897 | iowrite32(0x00F00000, bridge->base + VSI2_CTL); |
| 1898 | iowrite32(0x00F00000, bridge->base + VSI3_CTL); |
| 1899 | iowrite32(0x00F00000, bridge->base + VSI4_CTL); |
| 1900 | iowrite32(0x00F00000, bridge->base + VSI5_CTL); |
| 1901 | iowrite32(0x00F00000, bridge->base + VSI6_CTL); |
| 1902 | iowrite32(0x00F00000, bridge->base + VSI7_CTL); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1903 | |
| 1904 | vme_unregister_bridge(ca91cx42_bridge); |
Martyn Welch | bb9ea89 | 2010-02-18 16:22:13 +0000 | [diff] [blame] | 1905 | |
| 1906 | ca91cx42_crcsr_exit(ca91cx42_bridge, pdev); |
| 1907 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1908 | /* resources are stored in link list */ |
Wei Yongjun | 43f5e46 | 2012-08-21 12:17:34 +0800 | [diff] [blame] | 1909 | list_for_each_safe(pos, n, &ca91cx42_bridge->lm_resources) { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1910 | lm = list_entry(pos, struct vme_lm_resource, list); |
| 1911 | list_del(pos); |
| 1912 | kfree(lm); |
| 1913 | } |
| 1914 | |
| 1915 | /* resources are stored in link list */ |
Wei Yongjun | 43f5e46 | 2012-08-21 12:17:34 +0800 | [diff] [blame] | 1916 | list_for_each_safe(pos, n, &ca91cx42_bridge->dma_resources) { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1917 | dma_ctrlr = list_entry(pos, struct vme_dma_resource, list); |
| 1918 | list_del(pos); |
| 1919 | kfree(dma_ctrlr); |
| 1920 | } |
| 1921 | |
| 1922 | /* resources are stored in link list */ |
Wei Yongjun | 43f5e46 | 2012-08-21 12:17:34 +0800 | [diff] [blame] | 1923 | list_for_each_safe(pos, n, &ca91cx42_bridge->slave_resources) { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1924 | slave_image = list_entry(pos, struct vme_slave_resource, list); |
| 1925 | list_del(pos); |
| 1926 | kfree(slave_image); |
| 1927 | } |
| 1928 | |
| 1929 | /* resources are stored in link list */ |
Wei Yongjun | 43f5e46 | 2012-08-21 12:17:34 +0800 | [diff] [blame] | 1930 | list_for_each_safe(pos, n, &ca91cx42_bridge->master_resources) { |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1931 | master_image = list_entry(pos, struct vme_master_resource, |
| 1932 | list); |
| 1933 | list_del(pos); |
| 1934 | kfree(master_image); |
| 1935 | } |
| 1936 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1937 | ca91cx42_irq_exit(bridge, pdev); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1938 | |
Martyn Welch | 29848ac | 2010-02-18 15:13:05 +0000 | [diff] [blame] | 1939 | iounmap(bridge->base); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1940 | |
| 1941 | pci_release_regions(pdev); |
| 1942 | |
| 1943 | pci_disable_device(pdev); |
| 1944 | |
| 1945 | kfree(ca91cx42_bridge); |
| 1946 | } |
| 1947 | |
Wei Yongjun | c7b50a2 | 2012-10-18 23:13:37 +0800 | [diff] [blame] | 1948 | module_pci_driver(ca91cx42_driver); |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1949 | |
Martyn Welch | 12b2d5c | 2009-12-15 08:42:56 +0000 | [diff] [blame] | 1950 | MODULE_PARM_DESC(geoid, "Override geographical addressing"); |
| 1951 | module_param(geoid, int, 0); |
| 1952 | |
Martyn Welch | 3d0f8bc | 2009-08-27 17:00:40 +0100 | [diff] [blame] | 1953 | MODULE_DESCRIPTION("VME driver for the Tundra Universe II VME bridge"); |
| 1954 | MODULE_LICENSE("GPL"); |