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Dan Williams4d88a972015-05-31 14:41:48 -04001/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13#ifndef __ND_H__
14#define __ND_H__
Dan Williams1f7df6f2015-06-09 20:13:14 -040015#include <linux/libnvdimm.h>
Dan Williamsf0dc0892015-05-16 12:28:53 -040016#include <linux/blkdev.h>
Dan Williams4d88a972015-05-31 14:41:48 -040017#include <linux/device.h>
18#include <linux/mutex.h>
19#include <linux/ndctl.h>
Dan Williamsbf9bccc2015-06-17 17:14:46 -040020#include <linux/types.h>
Dan Williams4a826c82015-06-09 16:09:36 -040021#include "label.h"
Dan Williams4d88a972015-05-31 14:41:48 -040022
Dan Williams8c2f7e82015-06-25 04:20:04 -040023enum {
Vishal Verma5212e112015-06-25 04:20:32 -040024 /*
25 * Limits the maximum number of block apertures a dimm can
26 * support and is an input to the geometry/on-disk-format of a
27 * BTT instance
28 */
29 ND_MAX_LANES = 256,
Dan Williams8c2f7e82015-06-25 04:20:04 -040030 SECTOR_SHIFT = 9,
Vishal Vermafcae6952015-06-25 04:22:39 -040031 INT_LBASIZE_ALIGNMENT = 64,
Dan Williams8c2f7e82015-06-25 04:20:04 -040032};
33
Dan Williams4d88a972015-05-31 14:41:48 -040034struct nvdimm_drvdata {
35 struct device *dev;
Dan Williams4a826c82015-06-09 16:09:36 -040036 int nsindex_size;
Dan Williams4d88a972015-05-31 14:41:48 -040037 struct nd_cmd_get_config_size nsarea;
38 void *data;
Dan Williams4a826c82015-06-09 16:09:36 -040039 int ns_current, ns_next;
40 struct resource dpa;
Dan Williamsbf9bccc2015-06-17 17:14:46 -040041 struct kref kref;
Dan Williams4d88a972015-05-31 14:41:48 -040042};
43
Dan Williams3d880022015-05-31 15:02:11 -040044struct nd_region_namespaces {
45 int count;
46 int active;
47};
48
Dan Williams4a826c82015-06-09 16:09:36 -040049static inline struct nd_namespace_index *to_namespace_index(
50 struct nvdimm_drvdata *ndd, int i)
51{
52 if (i < 0)
53 return NULL;
54
55 return ndd->data + sizeof_namespace_index(ndd) * i;
56}
57
58static inline struct nd_namespace_index *to_current_namespace_index(
59 struct nvdimm_drvdata *ndd)
60{
61 return to_namespace_index(ndd, ndd->ns_current);
62}
63
64static inline struct nd_namespace_index *to_next_namespace_index(
65 struct nvdimm_drvdata *ndd)
66{
67 return to_namespace_index(ndd, ndd->ns_next);
68}
69
70#define nd_dbg_dpa(r, d, res, fmt, arg...) \
71 dev_dbg((r) ? &(r)->dev : (d)->dev, "%s: %.13s: %#llx @ %#llx " fmt, \
72 (r) ? dev_name((d)->dev) : "", res ? res->name : "null", \
73 (unsigned long long) (res ? resource_size(res) : 0), \
74 (unsigned long long) (res ? res->start : 0), ##arg)
75
Dan Williamsbf9bccc2015-06-17 17:14:46 -040076#define for_each_label(l, label, labels) \
77 for (l = 0; (label = labels ? labels[l] : NULL); l++)
78
79#define for_each_dpa_resource(ndd, res) \
80 for (res = (ndd)->dpa.child; res; res = res->sibling)
81
Dan Williams4a826c82015-06-09 16:09:36 -040082#define for_each_dpa_resource_safe(ndd, res, next) \
83 for (res = (ndd)->dpa.child, next = res ? res->sibling : NULL; \
84 res; res = next, next = next ? next->sibling : NULL)
85
Vishal Verma5212e112015-06-25 04:20:32 -040086struct nd_percpu_lane {
87 int count;
88 spinlock_t lock;
89};
90
Dan Williams1f7df6f2015-06-09 20:13:14 -040091struct nd_region {
92 struct device dev;
Dan Williams1b40e092015-05-01 13:34:01 -040093 struct ida ns_ida;
Dan Williams8c2f7e82015-06-25 04:20:04 -040094 struct ida btt_ida;
Dan Williamsbf9bccc2015-06-17 17:14:46 -040095 struct device *ns_seed;
Dan Williams8c2f7e82015-06-25 04:20:04 -040096 struct device *btt_seed;
Dan Williams1f7df6f2015-06-09 20:13:14 -040097 u16 ndr_mappings;
98 u64 ndr_size;
99 u64 ndr_start;
Toshi Kani41d7a6d2015-06-19 12:18:33 -0600100 int id, num_lanes, ro, numa_node;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400101 void *provider_data;
Dan Williamseaf96152015-05-01 13:11:27 -0400102 struct nd_interleave_set *nd_set;
Vishal Verma5212e112015-06-25 04:20:32 -0400103 struct nd_percpu_lane __percpu *lane;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400104 struct nd_mapping mapping[0];
105};
106
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400107struct nd_blk_region {
108 int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev);
109 void (*disable)(struct nvdimm_bus *nvdimm_bus, struct device *dev);
110 int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
111 void *iobuf, u64 len, int rw);
112 void *blk_provider_data;
113 struct nd_region nd_region;
114};
115
Dan Williams4a826c82015-06-09 16:09:36 -0400116/*
117 * Lookup next in the repeating sequence of 01, 10, and 11.
118 */
119static inline unsigned nd_inc_seq(unsigned seq)
120{
121 static const unsigned next[] = { 0, 2, 3, 1 };
122
123 return next[seq & 3];
124}
Dan Williamsf524bf22015-05-30 12:36:02 -0400125
Vishal Verma5212e112015-06-25 04:20:32 -0400126struct btt;
Dan Williams8c2f7e82015-06-25 04:20:04 -0400127struct nd_btt {
128 struct device dev;
129 struct nd_namespace_common *ndns;
Vishal Verma5212e112015-06-25 04:20:32 -0400130 struct btt *btt;
Dan Williams8c2f7e82015-06-25 04:20:04 -0400131 unsigned long lbasize;
132 u8 *uuid;
133 int id;
134};
135
Dan Williams4d88a972015-05-31 14:41:48 -0400136enum nd_async_mode {
137 ND_SYNC,
138 ND_ASYNC,
139};
140
Vishal Verma41cd8b72015-06-25 04:21:52 -0400141int nd_integrity_init(struct gendisk *disk, unsigned long meta_size);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400142void wait_nvdimm_bus_probe_idle(struct device *dev);
Dan Williams4d88a972015-05-31 14:41:48 -0400143void nd_device_register(struct device *dev);
144void nd_device_unregister(struct device *dev, enum nd_async_mode mode);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400145int nd_uuid_store(struct device *dev, u8 **uuid_out, const char *buf,
146 size_t len);
Dan Williams1b40e092015-05-01 13:34:01 -0400147ssize_t nd_sector_size_show(unsigned long current_lbasize,
148 const unsigned long *supported, char *buf);
149ssize_t nd_sector_size_store(struct device *dev, const char *buf,
150 unsigned long *current_lbasize, const unsigned long *supported);
Dan Williams4d88a972015-05-31 14:41:48 -0400151int __init nvdimm_init(void);
Dan Williams3d880022015-05-31 15:02:11 -0400152int __init nd_region_init(void);
Dan Williams4d88a972015-05-31 14:41:48 -0400153void nvdimm_exit(void);
Dan Williams3d880022015-05-31 15:02:11 -0400154void nd_region_exit(void);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400155struct nvdimm;
156struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping);
Dan Williams4d88a972015-05-31 14:41:48 -0400157int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd);
158int nvdimm_init_config_data(struct nvdimm_drvdata *ndd);
Dan Williamsf524bf22015-05-30 12:36:02 -0400159int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset,
160 void *buf, size_t len);
Dan Williams8c2f7e82015-06-25 04:20:04 -0400161struct nd_btt *to_nd_btt(struct device *dev);
162struct btt_sb;
163u64 nd_btt_sb_checksum(struct btt_sb *btt_sb);
164#if IS_ENABLED(CONFIG_BTT)
165int nd_btt_probe(struct nd_namespace_common *ndns, void *drvdata);
166bool is_nd_btt(struct device *dev);
167struct device *nd_btt_create(struct nd_region *nd_region);
168#else
169static inline nd_btt_probe(struct nd_namespace_common *ndns, void *drvdata)
170{
171 return -ENODEV;
172}
173
174static inline bool is_nd_btt(struct device *dev)
175{
176 return false;
177}
178
179static inline struct device *nd_btt_create(struct nd_region *nd_region)
180{
181 return NULL;
182}
183
184#endif
Dan Williams3d880022015-05-31 15:02:11 -0400185struct nd_region *to_nd_region(struct device *dev);
186int nd_region_to_nstype(struct nd_region *nd_region);
187int nd_region_register_namespaces(struct nd_region *nd_region, int *err);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400188u64 nd_region_interleave_set_cookie(struct nd_region *nd_region);
Dan Williams3d880022015-05-31 15:02:11 -0400189void nvdimm_bus_lock(struct device *dev);
190void nvdimm_bus_unlock(struct device *dev);
191bool is_nvdimm_bus_locked(struct device *dev);
Dan Williams58138822015-06-23 20:08:34 -0400192int nvdimm_revalidate_disk(struct gendisk *disk);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400193void nvdimm_drvdata_release(struct kref *kref);
194void put_ndd(struct nvdimm_drvdata *ndd);
Dan Williams4a826c82015-06-09 16:09:36 -0400195int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd);
196void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res);
197struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd,
198 struct nd_label_id *label_id, resource_size_t start,
199 resource_size_t n);
Dan Williams8c2f7e82015-06-25 04:20:04 -0400200resource_size_t nvdimm_namespace_capacity(struct nd_namespace_common *ndns);
201struct nd_namespace_common *nvdimm_namespace_common_probe(struct device *dev);
Vishal Verma5212e112015-06-25 04:20:32 -0400202int nvdimm_namespace_attach_btt(struct nd_namespace_common *ndns);
203int nvdimm_namespace_detach_btt(struct nd_namespace_common *ndns);
204const char *nvdimm_namespace_disk_name(struct nd_namespace_common *ndns,
205 char *name);
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400206int nd_blk_region_init(struct nd_region *nd_region);
Dan Williamsf0dc0892015-05-16 12:28:53 -0400207void __nd_iostat_start(struct bio *bio, unsigned long *start);
208static inline bool nd_iostat_start(struct bio *bio, unsigned long *start)
209{
210 struct gendisk *disk = bio->bi_bdev->bd_disk;
211
212 if (!blk_queue_io_stat(disk->queue))
213 return false;
214
215 __nd_iostat_start(bio, start);
216 return true;
217}
218void nd_iostat_end(struct bio *bio, unsigned long start);
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400219resource_size_t nd_namespace_blk_validate(struct nd_namespace_blk *nsblk);
Dan Williams4d88a972015-05-31 14:41:48 -0400220#endif /* __ND_H__ */