blob: be9639a9a186244fef74318f901172415a7e9343 [file] [log] [blame]
Thomas Gleixner67c5fc52008-01-30 13:30:15 +01001#ifndef _ASM_X86_APIC_H
2#define _ASM_X86_APIC_H
3
4#include <linux/pm.h>
5#include <linux/delay.h>
6#include <asm/fixmap.h>
7#include <asm/apicdef.h>
8#include <asm/processor.h>
9#include <asm/system.h>
10
11#define ARCH_APICTIMER_STOPS_ON_C3 1
12
13#define Dprintk(x...)
14
15/*
16 * Debugging macros
17 */
18#define APIC_QUIET 0
19#define APIC_VERBOSE 1
20#define APIC_DEBUG 2
21
22/*
23 * Define the default level of output to be very little
24 * This can be turned up by using apic=verbose for more
25 * information and apic=debug for _lots_ of information.
26 * apic_verbosity is defined in apic.c
27 */
28#define apic_printk(v, s, a...) do { \
29 if ((v) <= apic_verbosity) \
30 printk(s, ##a); \
31 } while (0)
32
33
34extern void generic_apic_probe(void);
35
36#ifdef CONFIG_X86_LOCAL_APIC
37
38extern int apic_verbosity;
39extern int timer_over_8254;
40extern int local_apic_timer_c2_ok;
41extern int local_apic_timer_disabled;
42
43extern int apic_runs_main_timer;
44extern int ioapic_force;
Thomas Gleixnerae9d9832008-01-30 13:30:36 +010045extern int disable_apic;
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010046extern int disable_apic_timer;
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010047
48/*
49 * Basic functions accessing APICs.
50 */
51#ifdef CONFIG_PARAVIRT
52#include <asm/paravirt.h>
Thomas Gleixner96a388d2007-10-11 11:20:03 +020053#else
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010054#define apic_write native_apic_write
55#define apic_write_atomic native_apic_write_atomic
56#define apic_read native_apic_read
57#define setup_boot_clock setup_boot_APIC_clock
58#define setup_secondary_clock setup_secondary_APIC_clock
Thomas Gleixner96a388d2007-10-11 11:20:03 +020059#endif
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010060
Ravikiran G Thirumalaiaa7d8e25e2008-03-20 00:41:16 -070061extern int is_vsmp_box(void);
62
Harvey Harrison341d8852008-01-30 13:31:17 +010063static inline void native_apic_write(unsigned long reg, u32 v)
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010064{
65 *((volatile u32 *)(APIC_BASE + reg)) = v;
66}
67
Harvey Harrison341d8852008-01-30 13:31:17 +010068static inline void native_apic_write_atomic(unsigned long reg, u32 v)
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010069{
Joe Perches3c311fe2008-03-23 01:01:40 -070070 (void)xchg((u32 *)(APIC_BASE + reg), v);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010071}
72
Harvey Harrison341d8852008-01-30 13:31:17 +010073static inline u32 native_apic_read(unsigned long reg)
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010074{
75 return *((volatile u32 *)(APIC_BASE + reg));
76}
77
78extern void apic_wait_icr_idle(void);
79extern u32 safe_apic_wait_icr_idle(void);
80extern int get_physical_broadcast(void);
81
82#ifdef CONFIG_X86_GOOD_APIC
83# define FORCE_READ_AROUND_WRITE 0
84# define apic_read_around(x)
85# define apic_write_around(x, y) apic_write((x), (y))
86#else
87# define FORCE_READ_AROUND_WRITE 1
88# define apic_read_around(x) apic_read(x)
89# define apic_write_around(x, y) apic_write_atomic((x), (y))
90#endif
91
92static inline void ack_APIC_irq(void)
93{
94 /*
95 * ack_APIC_irq() actually gets compiled as a single instruction:
96 * - a single rmw on Pentium/82489DX
97 * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
98 * ... yummie.
99 */
100
101 /* Docs say use 0 for future compatibility */
102 apic_write_around(APIC_EOI, 0);
103}
104
105extern int lapic_get_maxlvt(void);
106extern void clear_local_APIC(void);
107extern void connect_bsp_APIC(void);
108extern void disconnect_bsp_APIC(int virt_wire_setup);
109extern void disable_local_APIC(void);
110extern void lapic_shutdown(void);
111extern int verify_local_APIC(void);
112extern void cache_APIC_registers(void);
113extern void sync_Arb_IDs(void);
114extern void init_bsp_APIC(void);
115extern void setup_local_APIC(void);
Andi Kleen739f33b2008-01-30 13:30:40 +0100116extern void end_local_APIC_setup(void);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100117extern void init_apic_mappings(void);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100118extern void setup_boot_APIC_clock(void);
119extern void setup_secondary_APIC_clock(void);
120extern int APIC_init_uniprocessor(void);
Jan Beuliche9427102008-01-30 13:31:24 +0100121extern void enable_NMI_through_LVT0(void);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100122
123/*
124 * On 32bit this is mach-xxx local
125 */
126#ifdef CONFIG_X86_64
Yinghai Lu8643f9d2008-02-19 03:21:06 -0800127extern void early_init_lapic_mapping(void);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100128#endif
129
Robert Richter7b83dae2008-01-30 13:30:40 +0100130extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask);
131extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100132
133extern int apic_is_clustered_box(void);
134
135#else /* !CONFIG_X86_LOCAL_APIC */
136static inline void lapic_shutdown(void) { }
137#define local_apic_timer_c2_ok 1
138
139#endif /* !CONFIG_X86_LOCAL_APIC */
140
141#endif /* __ASM_APIC_H */