blob: a5a4e9f75c57f89e88f3047d980cf286f36569af [file] [log] [blame]
Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +030029#include <linux/of.h>
30#include <linux/of_gpio.h>
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010031#include <linux/i2c/twl.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090032#include <linux/slab.h>
Peter Ujfalusi281ecd12012-09-10 13:46:27 +030033#include <linux/gpio.h>
Steve Sakomancc175572008-10-30 21:35:26 -070034#include <sound/core.h>
35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
Steve Sakomancc175572008-10-30 21:35:26 -070038#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020039#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070040
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000041/* Register descriptions are here */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +030042#include <linux/mfd/twl4030-audio.h>
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000043
Peter Ujfalusi5712ded2012-12-31 11:51:46 +010044/* TWL4030 PMBR1 Register */
45#define TWL4030_PMBR1_REG 0x0D
46/* TWL4030 PMBR1 Register GPIO6 mux bits */
47#define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
48
Lars-Peter Clausen052901f42013-10-06 13:43:50 +020049#define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
Steve Sakomancc175572008-10-30 21:35:26 -070050
Peter Ujfalusi73939582009-01-29 14:57:50 +020051/* codec private data */
52struct twl4030_priv {
Peter Ujfalusi73939582009-01-29 14:57:50 +020053 unsigned int codec_powered;
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +030054
55 /* reference counts of AIF/APLL users */
Peter Ujfalusi2845fa12009-10-28 10:57:05 +020056 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +020057
58 struct snd_pcm_substream *master_substream;
59 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +030060
61 unsigned int configured;
62 unsigned int rate;
63 unsigned int sample_bits;
64 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +030065
66 unsigned int sysclk;
67
Peter Ujfalusic96907f2010-03-22 17:46:37 +020068 /* Output (with associated amp) states */
69 u8 hsl_enabled, hsr_enabled;
70 u8 earpiece_enabled;
71 u8 predrivel_enabled, predriver_enabled;
72 u8 carkitl_enabled, carkitr_enabled;
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020073 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +030074
Peter Ujfalusi182f73f2012-09-10 13:46:31 +030075 struct twl4030_codec_data *pdata;
Peter Ujfalusi73939582009-01-29 14:57:50 +020076};
77
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020078static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
79{
80 int i;
81 u8 byte;
82
83 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
84 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
85 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
86 }
87}
88
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020089static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg)
90{
91 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
92 u8 value = 0;
Steve Sakomancc175572008-10-30 21:35:26 -070093
Ian Molton91432e92009-01-17 17:44:23 +000094 if (reg >= TWL4030_CACHEREGNUM)
95 return -EIO;
96
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020097 switch (reg) {
98 case TWL4030_REG_EAR_CTL:
99 case TWL4030_REG_PREDL_CTL:
100 case TWL4030_REG_PREDR_CTL:
101 case TWL4030_REG_PRECKL_CTL:
102 case TWL4030_REG_PRECKR_CTL:
103 case TWL4030_REG_HS_GAIN_SET:
104 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
105 break;
106 default:
107 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
108 break;
109 }
Steve Sakomancc175572008-10-30 21:35:26 -0700110
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200111 return value;
Steve Sakomancc175572008-10-30 21:35:26 -0700112}
113
Peter Ujfalusib703b502014-01-03 15:27:56 +0200114static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030,
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200115 unsigned int reg)
Steve Sakomancc175572008-10-30 21:35:26 -0700116{
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200117 bool write_to_reg = false;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200118
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200119 /* Decide if the given register can be written */
120 switch (reg) {
121 case TWL4030_REG_EAR_CTL:
122 if (twl4030->earpiece_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200123 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200124 break;
125 case TWL4030_REG_PREDL_CTL:
126 if (twl4030->predrivel_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200127 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200128 break;
129 case TWL4030_REG_PREDR_CTL:
130 if (twl4030->predriver_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200131 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200132 break;
133 case TWL4030_REG_PRECKL_CTL:
134 if (twl4030->carkitl_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200135 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200136 break;
137 case TWL4030_REG_PRECKR_CTL:
138 if (twl4030->carkitr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200139 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200140 break;
141 case TWL4030_REG_HS_GAIN_SET:
142 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200143 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200144 break;
145 default:
146 /* All other register can be written */
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200147 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200148 break;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200149 }
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200150
151 return write_to_reg;
152}
153
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200154static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg,
155 unsigned int value)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200156{
Peter Ujfalusia450aa62014-01-03 15:27:55 +0200157 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
158
159 /* Update the ctl cache */
160 switch (reg) {
161 case TWL4030_REG_EAR_CTL:
162 case TWL4030_REG_PREDL_CTL:
163 case TWL4030_REG_PREDR_CTL:
164 case TWL4030_REG_PRECKL_CTL:
165 case TWL4030_REG_PRECKR_CTL:
166 case TWL4030_REG_HS_GAIN_SET:
167 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
168 break;
169 default:
170 break;
171 }
172
Peter Ujfalusib703b502014-01-03 15:27:56 +0200173 if (twl4030_can_write_to_chip(twl4030, reg))
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200174 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200175
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200176 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700177}
178
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300179static inline void twl4030_wait_ms(int time)
180{
181 if (time < 60) {
182 time *= 1000;
183 usleep_range(time, time + 500);
184 } else {
185 msleep(time);
186 }
187}
188
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200189static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700190{
Mark Brownb2c812e2010-04-14 15:35:19 +0900191 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300192 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700193
Peter Ujfalusi73939582009-01-29 14:57:50 +0200194 if (enable == twl4030->codec_powered)
195 return;
196
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200197 if (enable)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300198 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200199 else
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300200 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700201
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200202 if (mode >= 0)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300203 twl4030->codec_powered = enable;
Steve Sakomancc175572008-10-30 21:35:26 -0700204
205 /* REVISIT: this delay is present in TI sample drivers */
206 /* but there seems to be no TRM requirement for it */
207 udelay(10);
208}
209
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300210static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
211 struct device_node *node)
212{
213 int value;
214
215 of_property_read_u32(node, "ti,digimic_delay",
216 &pdata->digimic_delay);
217 of_property_read_u32(node, "ti,ramp_delay_value",
218 &pdata->ramp_delay_value);
219 of_property_read_u32(node, "ti,offset_cncl_path",
220 &pdata->offset_cncl_path);
221 if (!of_property_read_u32(node, "ti,hs_extmute", &value))
222 pdata->hs_extmute = value;
223
224 pdata->hs_extmute_gpio = of_get_named_gpio(node,
225 "ti,hs_extmute_gpio", 0);
226 if (gpio_is_valid(pdata->hs_extmute_gpio))
227 pdata->hs_extmute = 1;
228}
229
230static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -0700231{
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +0300232 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300233 struct device_node *twl4030_codec_node = NULL;
234
235 twl4030_codec_node = of_find_node_by_name(codec->dev->parent->of_node,
236 "codec");
237
238 if (!pdata && twl4030_codec_node) {
239 pdata = devm_kzalloc(codec->dev,
240 sizeof(struct twl4030_codec_data),
241 GFP_KERNEL);
242 if (!pdata) {
243 dev_err(codec->dev, "Can not allocate memory\n");
244 return NULL;
245 }
246 twl4030_setup_pdata_of(pdata, twl4030_codec_node);
247 }
248
249 return pdata;
250}
251
252static void twl4030_init_chip(struct snd_soc_codec *codec)
253{
254 struct twl4030_codec_data *pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300255 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
256 u8 reg, byte;
257 int i = 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700258
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300259 pdata = twl4030_get_pdata(codec);
260
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100261 if (pdata && pdata->hs_extmute) {
262 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
263 int ret;
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300264
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100265 if (!pdata->hs_extmute_gpio)
266 dev_warn(codec->dev,
267 "Extmute GPIO is 0 is this correct?\n");
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300268
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100269 ret = gpio_request_one(pdata->hs_extmute_gpio,
270 GPIOF_OUT_INIT_LOW,
271 "hs_extmute");
272 if (ret) {
273 dev_err(codec->dev,
274 "Failed to get hs_extmute GPIO\n");
275 pdata->hs_extmute_gpio = -1;
276 }
277 } else {
278 u8 pin_mux;
279
280 /* Set TWL4030 GPIO6 as EXTMUTE signal */
281 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
282 TWL4030_PMBR1_REG);
283 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
284 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
285 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
286 TWL4030_PMBR1_REG);
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300287 }
288 }
289
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +0200290 /* Initialize the local ctl register cache */
291 tw4030_init_ctl_cache(twl4030);
292
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300293 /* anti-pop when changing analog gain */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200294 reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300295 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200296 reg | TWL4030_SMOOTH_ANAVOL_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300297
298 twl4030_write(codec, TWL4030_REG_OPTION,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200299 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
300 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300301
Peter Ujfalusi3c36cc62010-05-26 11:38:19 +0300302 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
303 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
304
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300305 /* Machine dependent setup */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000306 if (!pdata)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300307 return;
308
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300309 twl4030->pdata = pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300310
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200311 reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300312 reg &= ~TWL4030_RAMP_DELAY;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000313 reg |= (pdata->ramp_delay_value << 2);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200314 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300315
316 /* initiate offset cancellation */
317 twl4030_codec_enable(codec, 1);
318
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200319 reg = twl4030_read(codec, TWL4030_REG_ANAMICL);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300320 reg &= ~TWL4030_OFFSET_CNCL_SEL;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000321 reg |= pdata->offset_cncl_path;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300322 twl4030_write(codec, TWL4030_REG_ANAMICL,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200323 reg | TWL4030_CNCL_OFFSET_START);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300324
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300325 /*
326 * Wait for offset cancellation to complete.
327 * Since this takes a while, do not slam the i2c.
328 * Start polling the status after ~20ms.
329 */
330 msleep(20);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300331 do {
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300332 usleep_range(1000, 2000);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200333 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300334 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200335 TWL4030_REG_ANAMICL);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200336 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300337 } while ((i++ < 100) &&
338 ((byte & TWL4030_CNCL_OFFSET_START) ==
339 TWL4030_CNCL_OFFSET_START));
340
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200341 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700342}
343
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200344static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200345{
Mark Brownb2c812e2010-04-14 15:35:19 +0900346 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi73939582009-01-29 14:57:50 +0200347
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300348 if (enable) {
349 twl4030->apll_enabled++;
350 if (twl4030->apll_enabled == 1)
Sachin Kamatbb17bc72014-07-01 09:59:31 +0530351 twl4030_audio_enable_resource(
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300352 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300353 } else {
354 twl4030->apll_enabled--;
355 if (!twl4030->apll_enabled)
Sachin Kamatbb17bc72014-07-01 09:59:31 +0530356 twl4030_audio_disable_resource(
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300357 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300358 }
Peter Ujfalusi73939582009-01-29 14:57:50 +0200359}
360
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200361/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900362static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
363 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
364 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
365 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
366 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
367};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200368
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200369/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900370static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
371 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
372 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
373 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
374 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
375};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200376
377/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900378static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
379 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
380 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
381 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
382 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
383};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200384
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200385/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900386static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
387 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
388 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
389 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
390};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200391
392/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900393static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
394 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
395 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
396 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
397};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200398
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200399/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900400static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
401 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
402 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
403 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
404};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200405
406/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900407static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
408 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
409 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
410 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
411};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200412
Peter Ujfalusidf339802008-12-09 12:35:51 +0200413/* Handsfree Left */
414static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900415 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200416
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100417static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum,
418 TWL4030_REG_HFL_CTL, 0,
419 twl4030_handsfreel_texts);
Peter Ujfalusidf339802008-12-09 12:35:51 +0200420
421static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
422SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
423
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300424/* Handsfree Left virtual mute */
425static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200426 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300427
Peter Ujfalusidf339802008-12-09 12:35:51 +0200428/* Handsfree Right */
429static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900430 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200431
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100432static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum,
433 TWL4030_REG_HFR_CTL, 0,
434 twl4030_handsfreer_texts);
Peter Ujfalusidf339802008-12-09 12:35:51 +0200435
436static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
437SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
438
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300439/* Handsfree Right virtual mute */
440static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200441 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300442
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300443/* Vibra */
444/* Vibra audio path selection */
445static const char *twl4030_vibra_texts[] =
446 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
447
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100448static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum,
449 TWL4030_REG_VIBRA_CTL, 2,
450 twl4030_vibra_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300451
452static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
453SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
454
455/* Vibra path selection: local vibrator (PWM) or audio driven */
456static const char *twl4030_vibrapath_texts[] =
457 {"Local vibrator", "Audio"};
458
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100459static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum,
460 TWL4030_REG_VIBRA_CTL, 4,
461 twl4030_vibrapath_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300462
463static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
464SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
465
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200466/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900467static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300468 SOC_DAPM_SINGLE("Main Mic Capture Switch",
469 TWL4030_REG_ANAMICL, 0, 1, 0),
470 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
471 TWL4030_REG_ANAMICL, 1, 1, 0),
472 SOC_DAPM_SINGLE("AUXL Capture Switch",
473 TWL4030_REG_ANAMICL, 2, 1, 0),
474 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
475 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900476};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200477
478/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900479static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300480 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
481 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900482};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200483
484/* TX1 L/R Analog/Digital microphone selection */
485static const char *twl4030_micpathtx1_texts[] =
486 {"Analog", "Digimic0"};
487
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100488static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum,
489 TWL4030_REG_ADCMICSEL, 0,
490 twl4030_micpathtx1_texts);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200491
492static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
493SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
494
495/* TX2 L/R Analog/Digital microphone selection */
496static const char *twl4030_micpathtx2_texts[] =
497 {"Analog", "Digimic1"};
498
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100499static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum,
500 TWL4030_REG_ADCMICSEL, 2,
501 twl4030_micpathtx2_texts);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200502
503static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
504SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
505
Peter Ujfalusi73939582009-01-29 14:57:50 +0200506/* Analog bypass for AudioR1 */
507static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
508 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
509
510/* Analog bypass for AudioL1 */
511static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
512 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
513
514/* Analog bypass for AudioR2 */
515static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
516 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
517
518/* Analog bypass for AudioL2 */
519static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
520 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
521
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500522/* Analog bypass for Voice */
523static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
524 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
525
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300526/* Digital bypass gain, mute instead of -30dB */
Lars-Peter Clausen25249112015-08-02 17:19:56 +0200527static const DECLARE_TLV_DB_RANGE(twl4030_dapm_dbypass_tlv,
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300528 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
529 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
Lars-Peter Clausen25249112015-08-02 17:19:56 +0200530 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0)
531);
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200532
533/* Digital bypass left (TX1L -> RX2L) */
534static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
535 SOC_DAPM_SINGLE_TLV("Volume",
536 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
537 twl4030_dapm_dbypass_tlv);
538
539/* Digital bypass right (TX1R -> RX2R) */
540static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
541 SOC_DAPM_SINGLE_TLV("Volume",
542 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
543 twl4030_dapm_dbypass_tlv);
544
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500545/*
546 * Voice Sidetone GAIN volume control:
547 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
548 */
549static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
550
551/* Digital bypass voice: sidetone (VUL -> VDL)*/
552static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
553 SOC_DAPM_SINGLE_TLV("Volume",
554 TWL4030_REG_VSTPGA, 0, 0x29, 0,
555 twl4030_dapm_dbypassv_tlv);
556
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300557/*
558 * Output PGA builder:
559 * Handle the muting and unmuting of the given output (turning off the
560 * amplifier associated with the output pin)
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200561 * On mute bypass the reg_cache and write 0 to the register
562 * On unmute: restore the register content from the reg_cache
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300563 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
564 */
565#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
566static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200567 struct snd_kcontrol *kcontrol, int event) \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300568{ \
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100569 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); \
570 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300571 \
572 switch (event) { \
573 case SND_SOC_DAPM_POST_PMU: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200574 twl4030->pin_name##_enabled = 1; \
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100575 twl4030_write(codec, reg, twl4030_read(codec, reg)); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300576 break; \
577 case SND_SOC_DAPM_POST_PMD: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200578 twl4030->pin_name##_enabled = 0; \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200579 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300580 break; \
581 } \
582 return 0; \
583}
584
585TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
586TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
587TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
588TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
589TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
590
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300591static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800592{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800593 unsigned char hs_ctl;
594
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200595 hs_ctl = twl4030_read(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800596
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300597 if (ramp) {
598 /* HF ramp-up */
599 hs_ctl |= TWL4030_HF_CTL_REF_EN;
600 twl4030_write(codec, reg, hs_ctl);
601 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800602 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300603 twl4030_write(codec, reg, hs_ctl);
604 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800605 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800606 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300607 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800608 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300609 /* HF ramp-down */
610 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
611 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
612 twl4030_write(codec, reg, hs_ctl);
613 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
614 twl4030_write(codec, reg, hs_ctl);
615 udelay(40);
616 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
617 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800618 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300619}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800620
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300621static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200622 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300623{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100624 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
625
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300626 switch (event) {
627 case SND_SOC_DAPM_POST_PMU:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100628 handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 1);
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300629 break;
630 case SND_SOC_DAPM_POST_PMD:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100631 handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 0);
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300632 break;
633 }
634 return 0;
635}
636
637static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200638 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300639{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100640 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
641
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300642 switch (event) {
643 case SND_SOC_DAPM_POST_PMU:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100644 handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 1);
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300645 break;
646 case SND_SOC_DAPM_POST_PMD:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100647 handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 0);
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300648 break;
649 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800650 return 0;
651}
652
Jari Vanhala86139a12009-10-29 11:58:09 +0200653static int vibramux_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200654 struct snd_kcontrol *kcontrol, int event)
Jari Vanhala86139a12009-10-29 11:58:09 +0200655{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100656 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
657
658 twl4030_write(codec, TWL4030_REG_VIBRA_SET, 0xff);
Jari Vanhala86139a12009-10-29 11:58:09 +0200659 return 0;
660}
661
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200662static int apll_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200663 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200664{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100665 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
666
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200667 switch (event) {
668 case SND_SOC_DAPM_PRE_PMU:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100669 twl4030_apll_enable(codec, 1);
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200670 break;
671 case SND_SOC_DAPM_POST_PMD:
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100672 twl4030_apll_enable(codec, 0);
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200673 break;
674 }
675 return 0;
676}
677
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300678static int aif_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200679 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300680{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100681 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300682 u8 audio_if;
683
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100684 audio_if = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300685 switch (event) {
686 case SND_SOC_DAPM_PRE_PMU:
687 /* Enable AIF */
688 /* enable the PLL before we use it to clock the DAI */
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100689 twl4030_apll_enable(codec, 1);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300690
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100691 twl4030_write(codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200692 audio_if | TWL4030_AIF_EN);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300693 break;
694 case SND_SOC_DAPM_POST_PMD:
695 /* disable the DAI before we stop it's source PLL */
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100696 twl4030_write(codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200697 audio_if & ~TWL4030_AIF_EN);
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100698 twl4030_apll_enable(codec, 0);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300699 break;
700 }
701 return 0;
702}
703
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300704static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200705{
706 unsigned char hs_gain, hs_pop;
Mark Brownb2c812e2010-04-14 15:35:19 +0900707 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300708 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300709 /* Base values for ramp delay calculation: 2^19 - 2^26 */
710 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
711 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300712 unsigned int delay;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200713
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200714 hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET);
715 hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300716 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
717 twl4030->sysclk) + 1;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200718
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500719 /* Enable external mute control, this dramatically reduces
720 * the pop-noise */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000721 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300722 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
723 gpio_set_value(pdata->hs_extmute_gpio, 1);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500724 } else {
725 hs_pop |= TWL4030_EXTMUTE;
726 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
727 }
728 }
729
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300730 if (ramp) {
731 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200732 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300733 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200734 /* Actually write to the register */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200735 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
736 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200737 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300738 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500739 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300740 twl4030_wait_ms(delay);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300741 } else {
742 /* Headset ramp-down _not_ according to
743 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200744 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300745 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
746 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300747 twl4030_wait_ms(delay);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200748 /* Bypass the reg_cache to mute the headset */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200749 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
750 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300751
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200752 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300753 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
754 }
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500755
756 /* Disable external mute */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000757 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300758 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
759 gpio_set_value(pdata->hs_extmute_gpio, 0);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500760 } else {
761 hs_pop &= ~TWL4030_EXTMUTE;
762 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
763 }
764 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300765}
766
767static int headsetlpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200768 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300769{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100770 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
771 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300772
773 switch (event) {
774 case SND_SOC_DAPM_POST_PMU:
775 /* Do the ramp-up only once */
776 if (!twl4030->hsr_enabled)
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100777 headset_ramp(codec, 1);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300778
779 twl4030->hsl_enabled = 1;
780 break;
781 case SND_SOC_DAPM_POST_PMD:
782 /* Do the ramp-down only if both headsetL/R is disabled */
783 if (!twl4030->hsr_enabled)
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100784 headset_ramp(codec, 0);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300785
786 twl4030->hsl_enabled = 0;
787 break;
788 }
789 return 0;
790}
791
792static int headsetrpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200793 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300794{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100795 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
796 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300797
798 switch (event) {
799 case SND_SOC_DAPM_POST_PMU:
800 /* Do the ramp-up only once */
801 if (!twl4030->hsl_enabled)
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100802 headset_ramp(codec, 1);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300803
804 twl4030->hsr_enabled = 1;
805 break;
806 case SND_SOC_DAPM_POST_PMD:
807 /* Do the ramp-down only if both headsetL/R is disabled */
808 if (!twl4030->hsl_enabled)
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100809 headset_ramp(codec, 0);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300810
811 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200812 break;
813 }
814 return 0;
815}
816
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300817static int digimic_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200818 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300819{
Lars-Peter Clausena36ac9b2015-01-15 12:52:06 +0100820 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
821 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300822 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300823
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300824 if (pdata && pdata->digimic_delay)
825 twl4030_wait_ms(pdata->digimic_delay);
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300826 return 0;
827}
828
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200829/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200830 * Some of the gain controls in TWL (mostly those which are associated with
831 * the outputs) are implemented in an interesting way:
832 * 0x0 : Power down (mute)
833 * 0x1 : 6dB
834 * 0x2 : 0 dB
835 * 0x3 : -6 dB
836 * Inverting not going to help with these.
837 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
838 */
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200839static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200840 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200841{
842 struct soc_mixer_control *mc =
843 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100844 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200845 unsigned int reg = mc->reg;
846 unsigned int shift = mc->shift;
847 unsigned int rshift = mc->rshift;
848 int max = mc->max;
849 int mask = (1 << fls(max)) - 1;
850
851 ucontrol->value.integer.value[0] =
852 (snd_soc_read(codec, reg) >> shift) & mask;
853 if (ucontrol->value.integer.value[0])
854 ucontrol->value.integer.value[0] =
855 max + 1 - ucontrol->value.integer.value[0];
856
857 if (shift != rshift) {
858 ucontrol->value.integer.value[1] =
859 (snd_soc_read(codec, reg) >> rshift) & mask;
860 if (ucontrol->value.integer.value[1])
861 ucontrol->value.integer.value[1] =
862 max + 1 - ucontrol->value.integer.value[1];
863 }
864
865 return 0;
866}
867
868static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200869 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200870{
871 struct soc_mixer_control *mc =
872 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100873 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200874 unsigned int reg = mc->reg;
875 unsigned int shift = mc->shift;
876 unsigned int rshift = mc->rshift;
877 int max = mc->max;
878 int mask = (1 << fls(max)) - 1;
879 unsigned short val, val2, val_mask;
880
881 val = (ucontrol->value.integer.value[0] & mask);
882
883 val_mask = mask << shift;
884 if (val)
885 val = max + 1 - val;
886 val = val << shift;
887 if (shift != rshift) {
888 val2 = (ucontrol->value.integer.value[1] & mask);
889 val_mask |= mask << rshift;
890 if (val2)
891 val2 = max + 1 - val2;
892 val |= val2 << rshift;
893 }
894 return snd_soc_update_bits(codec, reg, val_mask, val);
895}
896
897static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200898 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200899{
900 struct soc_mixer_control *mc =
901 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100902 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200903 unsigned int reg = mc->reg;
904 unsigned int reg2 = mc->rreg;
905 unsigned int shift = mc->shift;
906 int max = mc->max;
907 int mask = (1<<fls(max))-1;
908
909 ucontrol->value.integer.value[0] =
910 (snd_soc_read(codec, reg) >> shift) & mask;
911 ucontrol->value.integer.value[1] =
912 (snd_soc_read(codec, reg2) >> shift) & mask;
913
914 if (ucontrol->value.integer.value[0])
915 ucontrol->value.integer.value[0] =
916 max + 1 - ucontrol->value.integer.value[0];
917 if (ucontrol->value.integer.value[1])
918 ucontrol->value.integer.value[1] =
919 max + 1 - ucontrol->value.integer.value[1];
920
921 return 0;
922}
923
924static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200925 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200926{
927 struct soc_mixer_control *mc =
928 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100929 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200930 unsigned int reg = mc->reg;
931 unsigned int reg2 = mc->rreg;
932 unsigned int shift = mc->shift;
933 int max = mc->max;
934 int mask = (1 << fls(max)) - 1;
935 int err;
936 unsigned short val, val2, val_mask;
937
938 val_mask = mask << shift;
939 val = (ucontrol->value.integer.value[0] & mask);
940 val2 = (ucontrol->value.integer.value[1] & mask);
941
942 if (val)
943 val = max + 1 - val;
944 if (val2)
945 val2 = max + 1 - val2;
946
947 val = val << shift;
948 val2 = val2 << shift;
949
950 err = snd_soc_update_bits(codec, reg, val_mask, val);
951 if (err < 0)
952 return err;
953
954 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
955 return err;
956}
957
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500958/* Codec operation modes */
959static const char *twl4030_op_modes_texts[] = {
960 "Option 2 (voice/audio)", "Option 1 (audio)"
961};
962
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100963static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum,
964 TWL4030_REG_CODEC_MODE, 0,
965 twl4030_op_modes_texts);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500966
Mark Brown423c2382009-06-20 13:54:02 +0100967static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500968 struct snd_ctl_elem_value *ucontrol)
969{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100970 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900971 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500972
973 if (twl4030->configured) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +0200974 dev_err(codec->dev,
975 "operation mode cannot be changed on-the-fly\n");
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500976 return -EBUSY;
977 }
978
Takashi Iwai6b207c02014-02-18 08:56:39 +0100979 return snd_soc_put_enum_double(kcontrol, ucontrol);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500980}
981
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200982/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200983 * FGAIN volume control:
984 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
985 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200986static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200987
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200988/*
989 * CGAIN volume control:
990 * 0 dB to 12 dB in 6 dB steps
991 * value 2 and 3 means 12 dB
992 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200993static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
994
995/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900996 * Voice Downlink GAIN volume control:
997 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
998 */
999static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1000
1001/*
Peter Ujfalusid889a722008-12-01 10:03:46 +02001002 * Analog playback gain
1003 * -24 dB to 12 dB in 2 dB steps
1004 */
1005static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001006
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001007/*
Peter Ujfalusi42902392008-12-01 10:03:47 +02001008 * Gain controls tied to outputs
1009 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1010 */
1011static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1012
1013/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001014 * Gain control for earpiece amplifier
1015 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1016 */
1017static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1018
1019/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001020 * Capture gain after the ADCs
1021 * from 0 dB to 31 dB in 1 dB steps
1022 */
1023static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1024
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001025/*
1026 * Gain control for input amplifiers
1027 * 0 dB to 30 dB in 6 dB steps
1028 */
1029static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1030
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001031/* AVADC clock priority */
1032static const char *twl4030_avadc_clk_priority_texts[] = {
1033 "Voice high priority", "HiFi high priority"
1034};
1035
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001036static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum,
1037 TWL4030_REG_AVADC_CTL, 2,
1038 twl4030_avadc_clk_priority_texts);
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001039
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001040static const char *twl4030_rampdelay_texts[] = {
1041 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1042 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1043 "3495/2581/1748 ms"
1044};
1045
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001046static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum,
1047 TWL4030_REG_HS_POPN_SET, 2,
1048 twl4030_rampdelay_texts);
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001049
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001050/* Vibra H-bridge direction mode */
1051static const char *twl4030_vibradirmode_texts[] = {
1052 "Vibra H-bridge direction", "Audio data MSB",
1053};
1054
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001055static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum,
1056 TWL4030_REG_VIBRA_CTL, 5,
1057 twl4030_vibradirmode_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001058
1059/* Vibra H-bridge direction */
1060static const char *twl4030_vibradir_texts[] = {
1061 "Positive polarity", "Negative polarity",
1062};
1063
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001064static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum,
1065 TWL4030_REG_VIBRA_CTL, 1,
1066 twl4030_vibradir_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001067
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001068/* Digimic Left and right swapping */
1069static const char *twl4030_digimicswap_texts[] = {
1070 "Not swapped", "Swapped",
1071};
1072
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001073static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum,
1074 TWL4030_REG_MISC_SET_1, 0,
1075 twl4030_digimicswap_texts);
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001076
Steve Sakomancc175572008-10-30 21:35:26 -07001077static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001078 /* Codec operation mode control */
1079 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1080 snd_soc_get_enum_double,
1081 snd_soc_put_twl4030_opmode_enum_double),
1082
Peter Ujfalusid889a722008-12-01 10:03:46 +02001083 /* Common playback gain controls */
1084 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1085 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1086 0, 0x3f, 0, digital_fine_tlv),
1087 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1088 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1089 0, 0x3f, 0, digital_fine_tlv),
1090
1091 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1092 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1093 6, 0x2, 0, digital_coarse_tlv),
1094 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1095 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1096 6, 0x2, 0, digital_coarse_tlv),
1097
1098 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1099 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1100 3, 0x12, 1, analog_tlv),
1101 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1102 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1103 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001104 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1105 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1106 1, 1, 0),
1107 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1108 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1109 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001110
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001111 /* Common voice downlink gain controls */
1112 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1113 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1114
1115 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1116 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1117
1118 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1119 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1120
Peter Ujfalusi42902392008-12-01 10:03:47 +02001121 /* Separate output gain controls */
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001122 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001123 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001124 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1125 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001126
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001127 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1128 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1129 snd_soc_put_volsw_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001130
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001131 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001132 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001133 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1134 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001135
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001136 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1137 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1138 snd_soc_put_volsw_twl4030, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001139
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001140 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001141 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001142 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1143 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001144 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1145 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1146 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001147
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001148 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001149 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001150
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001151 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1152
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001153 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001154
1155 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1156 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001157
1158 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001159};
1160
Steve Sakomancc175572008-10-30 21:35:26 -07001161static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001162 /* Left channel inputs */
1163 SND_SOC_DAPM_INPUT("MAINMIC"),
1164 SND_SOC_DAPM_INPUT("HSMIC"),
1165 SND_SOC_DAPM_INPUT("AUXL"),
1166 SND_SOC_DAPM_INPUT("CARKITMIC"),
1167 /* Right channel inputs */
1168 SND_SOC_DAPM_INPUT("SUBMIC"),
1169 SND_SOC_DAPM_INPUT("AUXR"),
1170 /* Digital microphones (Stereo) */
1171 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1172 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001173
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001174 /* Outputs */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001175 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001176 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1177 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001178 SND_SOC_DAPM_OUTPUT("HSOL"),
1179 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001180 SND_SOC_DAPM_OUTPUT("CARKITL"),
1181 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001182 SND_SOC_DAPM_OUTPUT("HFL"),
1183 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001184 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001185
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001186 /* AIF and APLL clocks for running DAIs (including loopback) */
1187 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1188 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1189 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1190
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001191 /* DACs */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001192 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
1193 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
1194 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
1195 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
1196 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001197
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001198 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
1199 TWL4030_REG_VOICE_IF, 6, 0),
1200
Peter Ujfalusi73939582009-01-29 14:57:50 +02001201 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001202 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1203 &twl4030_dapm_abypassr1_control),
1204 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1205 &twl4030_dapm_abypassl1_control),
1206 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1207 &twl4030_dapm_abypassr2_control),
1208 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1209 &twl4030_dapm_abypassl2_control),
1210 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1211 &twl4030_dapm_abypassv_control),
1212
1213 /* Master analog loopback switch */
1214 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1215 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001216
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001217 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001218 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1219 &twl4030_dapm_dbypassl_control),
1220 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1221 &twl4030_dapm_dbypassr_control),
1222 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1223 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001224
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001225 /* Digital mixers, power control for the physical DACs */
1226 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1227 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1228 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1229 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1230 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1231 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1232 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1233 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1234 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1235 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1236
1237 /* Analog mixers, power control for the physical PGAs */
1238 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1239 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1240 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1241 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1242 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1243 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1244 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1245 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1246 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1247 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001248
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001249 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1250 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1251
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001252 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1253 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001254
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001255 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001256 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001257 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1258 &twl4030_dapm_earpiece_controls[0],
1259 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001260 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1261 0, 0, NULL, 0, earpiecepga_event,
1262 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001263 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001264 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1265 &twl4030_dapm_predrivel_controls[0],
1266 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001267 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1268 0, 0, NULL, 0, predrivelpga_event,
1269 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001270 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1271 &twl4030_dapm_predriver_controls[0],
1272 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001273 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1274 0, 0, NULL, 0, predriverpga_event,
1275 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001276 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001277 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001278 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001279 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1280 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1281 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001282 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1283 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1284 &twl4030_dapm_hsor_controls[0],
1285 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001286 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1287 0, 0, NULL, 0, headsetrpga_event,
1288 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001289 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001290 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1291 &twl4030_dapm_carkitl_controls[0],
1292 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001293 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1294 0, 0, NULL, 0, carkitlpga_event,
1295 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001296 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1297 &twl4030_dapm_carkitr_controls[0],
1298 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001299 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1300 0, 0, NULL, 0, carkitrpga_event,
1301 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001302
1303 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001304 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001305 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1306 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001307 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001308 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001309 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1310 0, 0, NULL, 0, handsfreelpga_event,
1311 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1312 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1313 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001314 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001315 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001316 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1317 0, 0, NULL, 0, handsfreerpga_event,
1318 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001319 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001320 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1321 &twl4030_dapm_vibra_control, vibramux_event,
1322 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001323 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1324 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001325
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001326 /* Introducing four virtual ADC, since TWL4030 have four channel for
1327 capture */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001328 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
1329 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
1330 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
1331 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001332
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001333 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
1334 TWL4030_REG_VOICE_IF, 5, 0),
1335
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001336 /* Analog/Digital mic path selection.
1337 TX1 Left/Right: either analog Left/Right or Digimic0
1338 TX2 Left/Right: either analog Left/Right or Digimic1 */
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001339 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1340 &twl4030_dapm_micpathtx1_control),
1341 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1342 &twl4030_dapm_micpathtx2_control),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001343
Joonyoung Shim97b80962009-05-11 20:36:08 +09001344 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001345 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001346 TWL4030_REG_ANAMICL, 4, 0,
1347 &twl4030_dapm_analoglmic_controls[0],
1348 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001349 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001350 TWL4030_REG_ANAMICR, 4, 0,
1351 &twl4030_dapm_analogrmic_controls[0],
1352 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001353
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001354 SND_SOC_DAPM_PGA("ADC Physical Left",
1355 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1356 SND_SOC_DAPM_PGA("ADC Physical Right",
1357 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001358
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +03001359 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1360 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1361 digimic_event, SND_SOC_DAPM_POST_PMU),
1362 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1363 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1364 digimic_event, SND_SOC_DAPM_POST_PMU),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001365
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001366 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1367 NULL, 0),
1368 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1369 NULL, 0),
1370
Peter Ujfalusie04d6e52012-12-31 11:51:45 +01001371 /* Microphone bias */
1372 SND_SOC_DAPM_SUPPLY("Mic Bias 1",
1373 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
1374 SND_SOC_DAPM_SUPPLY("Mic Bias 2",
1375 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
1376 SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1377 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001378
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001379 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001380};
1381
1382static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001383 /* Stream -> DAC mapping */
1384 {"DAC Right1", NULL, "HiFi Playback"},
1385 {"DAC Left1", NULL, "HiFi Playback"},
1386 {"DAC Right2", NULL, "HiFi Playback"},
1387 {"DAC Left2", NULL, "HiFi Playback"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001388 {"DAC Voice", NULL, "VAIFIN"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001389
1390 /* ADC -> Stream mapping */
1391 {"HiFi Capture", NULL, "ADC Virtual Left1"},
1392 {"HiFi Capture", NULL, "ADC Virtual Right1"},
1393 {"HiFi Capture", NULL, "ADC Virtual Left2"},
1394 {"HiFi Capture", NULL, "ADC Virtual Right2"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001395 {"VAIFOUT", NULL, "ADC Virtual Left2"},
1396 {"VAIFOUT", NULL, "ADC Virtual Right2"},
1397 {"VAIFOUT", NULL, "VIF Enable"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001398
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001399 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1400 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1401 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1402 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1403 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001404
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001405 /* Supply for the digital part (APLL) */
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001406 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1407
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001408 {"DAC Left1", NULL, "AIF Enable"},
1409 {"DAC Right1", NULL, "AIF Enable"},
1410 {"DAC Left2", NULL, "AIF Enable"},
1411 {"DAC Right1", NULL, "AIF Enable"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001412 {"DAC Voice", NULL, "VIF Enable"},
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001413
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001414 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1415 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1416
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001417 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1418 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1419 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1420 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1421 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001422
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001423 /* Internal playback routings */
1424 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001425 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1426 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1427 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1428 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001429 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001430 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001431 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1432 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1433 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1434 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001435 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001436 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001437 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1438 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1439 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1440 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001441 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001442 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001443 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1444 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1445 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001446 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001447 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001448 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1449 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1450 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001451 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001452 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001453 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1454 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1455 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001456 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001457 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001458 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1459 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1460 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001461 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001462 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001463 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1464 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1465 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1466 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001467 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1468 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001469 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001470 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1471 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1472 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1473 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001474 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1475 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001476 /* Vibra */
1477 {"Vibra Mux", "AudioL1", "DAC Left1"},
1478 {"Vibra Mux", "AudioR1", "DAC Right1"},
1479 {"Vibra Mux", "AudioL2", "DAC Left2"},
1480 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001481
Steve Sakomancc175572008-10-30 21:35:26 -07001482 /* outputs */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001483 /* Must be always connected (for AIF and APLL) */
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001484 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1485 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1486 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1487 {"Virtual HiFi OUT", NULL, "DAC Right2"},
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001488 /* Must be always connected (for APLL) */
1489 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1490 /* Physical outputs */
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001491 {"EARPIECE", NULL, "Earpiece PGA"},
1492 {"PREDRIVEL", NULL, "PredriveL PGA"},
1493 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001494 {"HSOL", NULL, "HeadsetL PGA"},
1495 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001496 {"CARKITL", NULL, "CarkitL PGA"},
1497 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001498 {"HFL", NULL, "HandsfreeL PGA"},
1499 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001500 {"Vibra Route", "Audio", "Vibra Mux"},
1501 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001502
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001503 /* Capture path */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001504 /* Must be always connected (for AIF and APLL) */
1505 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1506 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1507 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1508 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1509 /* Physical inputs */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001510 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1511 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1512 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1513 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001514
Peter Ujfalusi90289352009-08-14 08:44:00 +03001515 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1516 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001517
Peter Ujfalusi90289352009-08-14 08:44:00 +03001518 {"ADC Physical Left", NULL, "Analog Left"},
1519 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001520
1521 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1522 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1523
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001524 {"DIGIMIC0", NULL, "micbias1 select"},
1525 {"DIGIMIC1", NULL, "micbias2 select"},
1526
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001527 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001528 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001529 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1530 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001531 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001532 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1533 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001534 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001535 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1536 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001537 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001538 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1539
1540 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1541 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1542 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1543 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1544
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001545 {"ADC Virtual Left1", NULL, "AIF Enable"},
1546 {"ADC Virtual Right1", NULL, "AIF Enable"},
1547 {"ADC Virtual Left2", NULL, "AIF Enable"},
1548 {"ADC Virtual Right2", NULL, "AIF Enable"},
1549
Peter Ujfalusi73939582009-01-29 14:57:50 +02001550 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001551 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1552 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1553 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1554 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1555 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001556
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001557 /* Supply for the Analog loopbacks */
1558 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1559 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1560 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1561 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1562 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1563
Peter Ujfalusi73939582009-01-29 14:57:50 +02001564 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1565 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1566 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1567 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001568 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001569
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001570 /* Digital bypass routes */
1571 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1572 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001573 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001574
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001575 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1576 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1577 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001578
Steve Sakomancc175572008-10-30 21:35:26 -07001579};
1580
Steve Sakomancc175572008-10-30 21:35:26 -07001581static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1582 enum snd_soc_bias_level level)
1583{
1584 switch (level) {
1585 case SND_SOC_BIAS_ON:
Steve Sakomancc175572008-10-30 21:35:26 -07001586 break;
1587 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001588 break;
1589 case SND_SOC_BIAS_STANDBY:
Lars-Peter Clausen1682c8e2015-05-15 12:32:59 +02001590 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03001591 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001592 break;
1593 case SND_SOC_BIAS_OFF:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03001594 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001595 break;
1596 }
Steve Sakomancc175572008-10-30 21:35:26 -07001597
1598 return 0;
1599}
1600
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001601static void twl4030_constraints(struct twl4030_priv *twl4030,
1602 struct snd_pcm_substream *mst_substream)
1603{
1604 struct snd_pcm_substream *slv_substream;
1605
1606 /* Pick the stream, which need to be constrained */
1607 if (mst_substream == twl4030->master_substream)
1608 slv_substream = twl4030->slave_substream;
1609 else if (mst_substream == twl4030->slave_substream)
1610 slv_substream = twl4030->master_substream;
1611 else /* This should not happen.. */
1612 return;
1613
1614 /* Set the constraints according to the already configured stream */
Lars-Peter Clausene795d832015-10-18 15:39:23 +02001615 snd_pcm_hw_constraint_single(slv_substream->runtime,
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001616 SNDRV_PCM_HW_PARAM_RATE,
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001617 twl4030->rate);
1618
Lars-Peter Clausene795d832015-10-18 15:39:23 +02001619 snd_pcm_hw_constraint_single(slv_substream->runtime,
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001620 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001621 twl4030->sample_bits);
1622
Lars-Peter Clausene795d832015-10-18 15:39:23 +02001623 snd_pcm_hw_constraint_single(slv_substream->runtime,
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001624 SNDRV_PCM_HW_PARAM_CHANNELS,
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001625 twl4030->channels);
1626}
1627
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001628/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1629 * capture has to be enabled/disabled. */
1630static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001631 int enable)
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001632{
1633 u8 reg, mask;
1634
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001635 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001636
1637 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1638 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1639 else
1640 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1641
1642 if (enable)
1643 reg |= mask;
1644 else
1645 reg &= ~mask;
1646
1647 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1648}
1649
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001650static int twl4030_startup(struct snd_pcm_substream *substream,
1651 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001652{
Mark Browne6968a12012-04-04 15:58:16 +01001653 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001654 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001655
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001656 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001657 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001658 /* The DAI has one configuration for playback and capture, so
1659 * if the DAI has been already configured then constrain this
1660 * substream to match it. */
1661 if (twl4030->configured)
1662 twl4030_constraints(twl4030, twl4030->master_substream);
1663 } else {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001664 if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) &
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001665 TWL4030_OPTION_1)) {
1666 /* In option2 4 channel is not supported, set the
1667 * constraint for the first stream for channels, the
1668 * second stream will 'inherit' this cosntraint */
Lars-Peter Clausene795d832015-10-18 15:39:23 +02001669 snd_pcm_hw_constraint_single(substream->runtime,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001670 SNDRV_PCM_HW_PARAM_CHANNELS,
Lars-Peter Clausene795d832015-10-18 15:39:23 +02001671 2);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001672 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001673 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001674 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001675
1676 return 0;
1677}
1678
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001679static void twl4030_shutdown(struct snd_pcm_substream *substream,
1680 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001681{
Mark Browne6968a12012-04-04 15:58:16 +01001682 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001683 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001684
1685 if (twl4030->master_substream == substream)
1686 twl4030->master_substream = twl4030->slave_substream;
1687
1688 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001689
1690 /* If all streams are closed, or the remaining stream has not yet
1691 * been configured than set the DAI as not configured. */
1692 if (!twl4030->master_substream)
1693 twl4030->configured = 0;
1694 else if (!twl4030->master_substream->runtime->channels)
1695 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001696
1697 /* If the closing substream had 4 channel, do the necessary cleanup */
1698 if (substream->runtime->channels == 4)
1699 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001700}
1701
Steve Sakomancc175572008-10-30 21:35:26 -07001702static int twl4030_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001703 struct snd_pcm_hw_params *params,
1704 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001705{
Mark Browne6968a12012-04-04 15:58:16 +01001706 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001707 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001708 u8 mode, old_mode, format, old_format;
1709
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001710 /* If the substream has 4 channel, do the necessary setup */
1711 if (params_channels(params) == 4) {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001712 format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1713 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE);
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001714
1715 /* Safety check: are we in the correct operating mode and
1716 * the interface is in TDM mode? */
1717 if ((mode & TWL4030_OPTION_1) &&
1718 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001719 twl4030_tdm_enable(codec, substream->stream, 1);
1720 else
1721 return -EINVAL;
1722 }
1723
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001724 if (twl4030->configured)
1725 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001726 return 0;
1727
Steve Sakomancc175572008-10-30 21:35:26 -07001728 /* bit rate */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001729 old_mode = twl4030_read(codec,
1730 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Steve Sakomancc175572008-10-30 21:35:26 -07001731 mode = old_mode & ~TWL4030_APLL_RATE;
1732
1733 switch (params_rate(params)) {
1734 case 8000:
1735 mode |= TWL4030_APLL_RATE_8000;
1736 break;
1737 case 11025:
1738 mode |= TWL4030_APLL_RATE_11025;
1739 break;
1740 case 12000:
1741 mode |= TWL4030_APLL_RATE_12000;
1742 break;
1743 case 16000:
1744 mode |= TWL4030_APLL_RATE_16000;
1745 break;
1746 case 22050:
1747 mode |= TWL4030_APLL_RATE_22050;
1748 break;
1749 case 24000:
1750 mode |= TWL4030_APLL_RATE_24000;
1751 break;
1752 case 32000:
1753 mode |= TWL4030_APLL_RATE_32000;
1754 break;
1755 case 44100:
1756 mode |= TWL4030_APLL_RATE_44100;
1757 break;
1758 case 48000:
1759 mode |= TWL4030_APLL_RATE_48000;
1760 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001761 case 96000:
1762 mode |= TWL4030_APLL_RATE_96000;
1763 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001764 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001765 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Steve Sakomancc175572008-10-30 21:35:26 -07001766 params_rate(params));
1767 return -EINVAL;
1768 }
1769
Steve Sakomancc175572008-10-30 21:35:26 -07001770 /* sample size */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001771 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001772 format = old_format;
1773 format &= ~TWL4030_DATA_WIDTH;
Mark Brown04f630d2014-07-31 12:49:12 +01001774 switch (params_width(params)) {
1775 case 16:
Steve Sakomancc175572008-10-30 21:35:26 -07001776 format |= TWL4030_DATA_WIDTH_16S_16W;
1777 break;
Mark Brown04f630d2014-07-31 12:49:12 +01001778 case 32:
Steve Sakomancc175572008-10-30 21:35:26 -07001779 format |= TWL4030_DATA_WIDTH_32S_24W;
1780 break;
1781 default:
Mark Brown04f630d2014-07-31 12:49:12 +01001782 dev_err(codec->dev, "%s: unsupported bits/sample %d\n",
1783 __func__, params_width(params));
Steve Sakomancc175572008-10-30 21:35:26 -07001784 return -EINVAL;
1785 }
1786
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001787 if (format != old_format || mode != old_mode) {
1788 if (twl4030->codec_powered) {
1789 /*
1790 * If the codec is powered, than we need to toggle the
1791 * codec power.
1792 */
1793 twl4030_codec_enable(codec, 0);
1794 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1795 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1796 twl4030_codec_enable(codec, 1);
1797 } else {
1798 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1799 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1800 }
Steve Sakomancc175572008-10-30 21:35:26 -07001801 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001802
1803 /* Store the important parameters for the DAI configuration and set
1804 * the DAI as configured */
1805 twl4030->configured = 1;
1806 twl4030->rate = params_rate(params);
1807 twl4030->sample_bits = hw_param_interval(params,
1808 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1809 twl4030->channels = params_channels(params);
1810
1811 /* If both playback and capture streams are open, and one of them
1812 * is setting the hw parameters right now (since we are here), set
1813 * constraints to the other stream to match the current one. */
1814 if (twl4030->slave_substream)
1815 twl4030_constraints(twl4030, substream);
1816
Steve Sakomancc175572008-10-30 21:35:26 -07001817 return 0;
1818}
1819
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001820static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
1821 unsigned int freq, int dir)
Steve Sakomancc175572008-10-30 21:35:26 -07001822{
1823 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001824 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001825
1826 switch (freq) {
1827 case 19200000:
Steve Sakomancc175572008-10-30 21:35:26 -07001828 case 26000000:
Steve Sakomancc175572008-10-30 21:35:26 -07001829 case 38400000:
Steve Sakomancc175572008-10-30 21:35:26 -07001830 break;
1831 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001832 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
Steve Sakomancc175572008-10-30 21:35:26 -07001833 return -EINVAL;
1834 }
1835
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001836 if ((freq / 1000) != twl4030->sysclk) {
1837 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001838 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001839 freq, twl4030->sysclk * 1000);
1840 return -EINVAL;
1841 }
Steve Sakomancc175572008-10-30 21:35:26 -07001842
1843 return 0;
1844}
1845
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001846static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
Steve Sakomancc175572008-10-30 21:35:26 -07001847{
1848 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001849 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001850 u8 old_format, format;
1851
1852 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001853 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001854 format = old_format;
1855
1856 /* set master/slave audio interface */
1857 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1858 case SND_SOC_DAIFMT_CBM_CFM:
1859 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001860 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001861 break;
1862 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001863 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001864 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001865 break;
1866 default:
1867 return -EINVAL;
1868 }
1869
1870 /* interface format */
1871 format &= ~TWL4030_AIF_FORMAT;
1872 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1873 case SND_SOC_DAIFMT_I2S:
1874 format |= TWL4030_AIF_FORMAT_CODEC;
1875 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001876 case SND_SOC_DAIFMT_DSP_A:
1877 format |= TWL4030_AIF_FORMAT_TDM;
1878 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001879 default:
1880 return -EINVAL;
1881 }
1882
1883 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001884 if (twl4030->codec_powered) {
1885 /*
1886 * If the codec is powered, than we need to toggle the
1887 * codec power.
1888 */
1889 twl4030_codec_enable(codec, 0);
1890 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1891 twl4030_codec_enable(codec, 1);
1892 } else {
1893 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1894 }
Steve Sakomancc175572008-10-30 21:35:26 -07001895 }
1896
1897 return 0;
1898}
1899
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001900static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1901{
1902 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001903 u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001904
1905 if (tristate)
1906 reg |= TWL4030_AIF_TRI_EN;
1907 else
1908 reg &= ~TWL4030_AIF_TRI_EN;
1909
1910 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1911}
1912
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001913/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1914 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1915static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001916 int enable)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001917{
1918 u8 reg, mask;
1919
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001920 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001921
1922 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1923 mask = TWL4030_ARXL1_VRX_EN;
1924 else
1925 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1926
1927 if (enable)
1928 reg |= mask;
1929 else
1930 reg &= ~mask;
1931
1932 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1933}
1934
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001935static int twl4030_voice_startup(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001936 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001937{
Mark Browne6968a12012-04-04 15:58:16 +01001938 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001939 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001940 u8 mode;
1941
1942 /* If the system master clock is not 26MHz, the voice PCM interface is
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001943 * not available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001944 */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001945 if (twl4030->sysclk != 26000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001946 dev_err(codec->dev,
1947 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1948 __func__, twl4030->sysclk);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001949 return -EINVAL;
1950 }
1951
1952 /* If the codec mode is not option2, the voice PCM interface is not
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001953 * available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001954 */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001955 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001956 & TWL4030_OPT_MODE;
1957
1958 if (mode != TWL4030_OPTION_2) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001959 dev_err(codec->dev, "%s: the codec mode is not option2\n",
1960 __func__);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001961 return -EINVAL;
1962 }
1963
1964 return 0;
1965}
1966
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001967static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001968 struct snd_soc_dai *dai)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001969{
Mark Browne6968a12012-04-04 15:58:16 +01001970 struct snd_soc_codec *codec = dai->codec;
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001971
1972 /* Enable voice digital filters */
1973 twl4030_voice_enable(codec, substream->stream, 0);
1974}
1975
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001976static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001977 struct snd_pcm_hw_params *params,
1978 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001979{
Mark Browne6968a12012-04-04 15:58:16 +01001980 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001981 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001982 u8 old_mode, mode;
1983
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001984 /* Enable voice digital filters */
1985 twl4030_voice_enable(codec, substream->stream, 1);
1986
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001987 /* bit rate */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001988 old_mode = twl4030_read(codec,
1989 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001990 mode = old_mode;
1991
1992 switch (params_rate(params)) {
1993 case 8000:
1994 mode &= ~(TWL4030_SEL_16K);
1995 break;
1996 case 16000:
1997 mode |= TWL4030_SEL_16K;
1998 break;
1999 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002000 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002001 params_rate(params));
2002 return -EINVAL;
2003 }
2004
2005 if (mode != old_mode) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002006 if (twl4030->codec_powered) {
2007 /*
2008 * If the codec is powered, than we need to toggle the
2009 * codec power.
2010 */
2011 twl4030_codec_enable(codec, 0);
2012 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2013 twl4030_codec_enable(codec, 1);
2014 } else {
2015 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2016 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002017 }
2018
2019 return 0;
2020}
2021
2022static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002023 int clk_id, unsigned int freq, int dir)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002024{
2025 struct snd_soc_codec *codec = codec_dai->codec;
Takashi Iwaid4a8ca22010-04-20 08:20:31 +02002026 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002027
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002028 if (freq != 26000000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002029 dev_err(codec->dev,
2030 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2031 __func__, freq / 1000);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002032 return -EINVAL;
2033 }
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002034 if ((freq / 1000) != twl4030->sysclk) {
2035 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002036 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002037 freq, twl4030->sysclk * 1000);
2038 return -EINVAL;
2039 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002040 return 0;
2041}
2042
2043static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002044 unsigned int fmt)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002045{
2046 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002047 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002048 u8 old_format, format;
2049
2050 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002051 old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002052 format = old_format;
2053
2054 /* set master/slave audio interface */
2055 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05002056 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002057 format &= ~(TWL4030_VIF_SLAVE_EN);
2058 break;
2059 case SND_SOC_DAIFMT_CBS_CFS:
2060 format |= TWL4030_VIF_SLAVE_EN;
2061 break;
2062 default:
2063 return -EINVAL;
2064 }
2065
2066 /* clock inversion */
2067 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2068 case SND_SOC_DAIFMT_IB_NF:
2069 format &= ~(TWL4030_VIF_FORMAT);
2070 break;
2071 case SND_SOC_DAIFMT_NB_IF:
2072 format |= TWL4030_VIF_FORMAT;
2073 break;
2074 default:
2075 return -EINVAL;
2076 }
2077
2078 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002079 if (twl4030->codec_powered) {
2080 /*
2081 * If the codec is powered, than we need to toggle the
2082 * codec power.
2083 */
2084 twl4030_codec_enable(codec, 0);
2085 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2086 twl4030_codec_enable(codec, 1);
2087 } else {
2088 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2089 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002090 }
2091
2092 return 0;
2093}
2094
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002095static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2096{
2097 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002098 u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002099
2100 if (tristate)
2101 reg |= TWL4030_VIF_TRI_EN;
2102 else
2103 reg &= ~TWL4030_VIF_TRI_EN;
2104
2105 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2106}
2107
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002108#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Peter Ujfalusidcdeda42010-12-14 13:45:29 +02002109#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
Steve Sakomancc175572008-10-30 21:35:26 -07002110
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002111static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002112 .startup = twl4030_startup,
2113 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002114 .hw_params = twl4030_hw_params,
2115 .set_sysclk = twl4030_set_dai_sysclk,
2116 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002117 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002118};
2119
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002120static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002121 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002122 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002123 .hw_params = twl4030_voice_hw_params,
2124 .set_sysclk = twl4030_voice_set_dai_sysclk,
2125 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002126 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002127};
2128
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002129static struct snd_soc_dai_driver twl4030_dai[] = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002130{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002131 .name = "twl4030-hifi",
Steve Sakomancc175572008-10-30 21:35:26 -07002132 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002133 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002134 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002135 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002136 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002137 .formats = TWL4030_FORMATS,
2138 .sig_bits = 24,},
Steve Sakomancc175572008-10-30 21:35:26 -07002139 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002140 .stream_name = "HiFi Capture",
Steve Sakomancc175572008-10-30 21:35:26 -07002141 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002142 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002143 .rates = TWL4030_RATES,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002144 .formats = TWL4030_FORMATS,
2145 .sig_bits = 24,},
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002146 .ops = &twl4030_dai_hifi_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002147},
2148{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002149 .name = "twl4030-voice",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002150 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002151 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002152 .channels_min = 1,
2153 .channels_max = 1,
2154 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2155 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2156 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002157 .stream_name = "Voice Capture",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002158 .channels_min = 1,
2159 .channels_max = 2,
2160 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2161 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2162 .ops = &twl4030_dai_voice_ops,
2163},
Steve Sakomancc175572008-10-30 21:35:26 -07002164};
Steve Sakomancc175572008-10-30 21:35:26 -07002165
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002166static int twl4030_soc_probe(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002167{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002168 struct twl4030_priv *twl4030;
Steve Sakomancc175572008-10-30 21:35:26 -07002169
Peter Ujfalusif2b1ce42012-09-10 13:46:30 +03002170 twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv),
2171 GFP_KERNEL);
Sachin Kamat04cc41a2014-06-20 15:29:03 +05302172 if (!twl4030)
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002173 return -ENOMEM;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002174 snd_soc_codec_set_drvdata(codec, twl4030);
2175 /* Set the defaults, and power up the codec */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +03002176 twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002177
2178 twl4030_init_chip(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002179
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002180 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002181}
2182
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002183static int twl4030_soc_remove(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002184{
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002185 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +03002186 struct twl4030_codec_data *pdata = twl4030->pdata;
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002187
Peter Ujfalusi281ecd12012-09-10 13:46:27 +03002188 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
2189 gpio_free(pdata->hs_extmute_gpio);
2190
Steve Sakomancc175572008-10-30 21:35:26 -07002191 return 0;
2192}
2193
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002194static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2195 .probe = twl4030_soc_probe,
2196 .remove = twl4030_soc_remove,
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002197 .read = twl4030_read,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002198 .write = twl4030_write,
2199 .set_bias_level = twl4030_set_bias_level,
Axel Lineb3032f2012-01-27 18:02:09 +08002200 .idle_bias_off = true,
Peter Ujfalusif7c93f02011-10-11 13:11:32 +03002201
2202 .controls = twl4030_snd_controls,
2203 .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2204 .dapm_widgets = twl4030_dapm_widgets,
2205 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2206 .dapm_routes = intercon,
2207 .num_dapm_routes = ARRAY_SIZE(intercon),
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002208};
2209
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002210static int twl4030_codec_probe(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002211{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002212 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002213 twl4030_dai, ARRAY_SIZE(twl4030_dai));
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002214}
2215
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002216static int twl4030_codec_remove(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002217{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002218 snd_soc_unregister_codec(&pdev->dev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002219 return 0;
2220}
2221
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002222MODULE_ALIAS("platform:twl4030-codec");
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002223
2224static struct platform_driver twl4030_codec_driver = {
2225 .probe = twl4030_codec_probe,
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002226 .remove = twl4030_codec_remove,
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002227 .driver = {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002228 .name = "twl4030-codec",
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002229 },
Steve Sakomancc175572008-10-30 21:35:26 -07002230};
Steve Sakomancc175572008-10-30 21:35:26 -07002231
Mark Brown5bbcc3c2011-11-23 22:52:08 +00002232module_platform_driver(twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002233
Steve Sakomancc175572008-10-30 21:35:26 -07002234MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2235MODULE_AUTHOR("Steve Sakoman");
2236MODULE_LICENSE("GPL");