Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* sunsab.c: ASYNC Driver for the SIEMENS SAB82532 DUSCC. |
| 2 | * |
| 3 | * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 4 | * Copyright (C) 2002, 2006 David S. Miller (davem@davemloft.net) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * Rewrote buffer handling to use CIRC(Circular Buffer) macros. |
| 7 | * Maxim Krasnyanskiy <maxk@qualcomm.com> |
| 8 | * |
| 9 | * Fixed to use tty_get_baud_rate, and to allow for arbitrary baud |
| 10 | * rates to be programmed into the UART. Also eliminated a lot of |
| 11 | * duplicated code in the console setup. |
| 12 | * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12 |
| 13 | * |
| 14 | * Ported to new 2.5.x UART layer. |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 15 | * David S. Miller <davem@davemloft.net> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | */ |
| 17 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | #include <linux/module.h> |
| 19 | #include <linux/kernel.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | #include <linux/errno.h> |
| 21 | #include <linux/tty.h> |
| 22 | #include <linux/tty_flip.h> |
| 23 | #include <linux/major.h> |
| 24 | #include <linux/string.h> |
| 25 | #include <linux/ptrace.h> |
| 26 | #include <linux/ioport.h> |
| 27 | #include <linux/circ_buf.h> |
| 28 | #include <linux/serial.h> |
| 29 | #include <linux/sysrq.h> |
| 30 | #include <linux/console.h> |
| 31 | #include <linux/spinlock.h> |
| 32 | #include <linux/slab.h> |
| 33 | #include <linux/delay.h> |
| 34 | #include <linux/init.h> |
Stephen Rothwell | c6ed413 | 2008-08-11 14:30:53 -0700 | [diff] [blame] | 35 | #include <linux/of_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
| 37 | #include <asm/io.h> |
| 38 | #include <asm/irq.h> |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 39 | #include <asm/prom.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | |
Thomas Bogendoerfer | 744551c | 2007-09-25 22:49:37 -0700 | [diff] [blame] | 41 | #if defined(CONFIG_SERIAL_SUNSAB_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 42 | #define SUPPORT_SYSRQ |
| 43 | #endif |
| 44 | |
| 45 | #include <linux/serial_core.h> |
| 46 | |
| 47 | #include "suncore.h" |
| 48 | #include "sunsab.h" |
| 49 | |
| 50 | struct uart_sunsab_port { |
| 51 | struct uart_port port; /* Generic UART port */ |
| 52 | union sab82532_async_regs __iomem *regs; /* Chip registers */ |
| 53 | unsigned long irqflags; /* IRQ state flags */ |
| 54 | int dsr; /* Current DSR state */ |
| 55 | unsigned int cec_timeout; /* Chip poll timeout... */ |
| 56 | unsigned int tec_timeout; /* likewise */ |
| 57 | unsigned char interrupt_mask0;/* ISR0 masking */ |
| 58 | unsigned char interrupt_mask1;/* ISR1 masking */ |
| 59 | unsigned char pvr_dtr_bit; /* Which PVR bit is DTR */ |
| 60 | unsigned char pvr_dsr_bit; /* Which PVR bit is DSR */ |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 61 | unsigned int gis_shift; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | int type; /* SAB82532 version */ |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 63 | |
| 64 | /* Setting configuration bits while the transmitter is active |
| 65 | * can cause garbage characters to get emitted by the chip. |
| 66 | * Therefore, we cache such writes here and do the real register |
| 67 | * write the next time the transmitter becomes idle. |
| 68 | */ |
| 69 | unsigned int cached_ebrg; |
| 70 | unsigned char cached_mode; |
| 71 | unsigned char cached_pvr; |
| 72 | unsigned char cached_dafo; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | }; |
| 74 | |
| 75 | /* |
| 76 | * This assumes you have a 29.4912 MHz clock for your UART. |
| 77 | */ |
| 78 | #define SAB_BASE_BAUD ( 29491200 / 16 ) |
| 79 | |
| 80 | static char *sab82532_version[16] = { |
| 81 | "V1.0", "V2.0", "V3.2", "V(0x03)", |
| 82 | "V(0x04)", "V(0x05)", "V(0x06)", "V(0x07)", |
| 83 | "V(0x08)", "V(0x09)", "V(0x0a)", "V(0x0b)", |
| 84 | "V(0x0c)", "V(0x0d)", "V(0x0e)", "V(0x0f)" |
| 85 | }; |
| 86 | |
| 87 | #define SAB82532_MAX_TEC_TIMEOUT 200000 /* 1 character time (at 50 baud) */ |
| 88 | #define SAB82532_MAX_CEC_TIMEOUT 50000 /* 2.5 TX CLKs (at 50 baud) */ |
| 89 | |
| 90 | #define SAB82532_RECV_FIFO_SIZE 32 /* Standard async fifo sizes */ |
| 91 | #define SAB82532_XMIT_FIFO_SIZE 32 |
| 92 | |
| 93 | static __inline__ void sunsab_tec_wait(struct uart_sunsab_port *up) |
| 94 | { |
| 95 | int timeout = up->tec_timeout; |
| 96 | |
| 97 | while ((readb(&up->regs->r.star) & SAB82532_STAR_TEC) && --timeout) |
| 98 | udelay(1); |
| 99 | } |
| 100 | |
| 101 | static __inline__ void sunsab_cec_wait(struct uart_sunsab_port *up) |
| 102 | { |
| 103 | int timeout = up->cec_timeout; |
| 104 | |
| 105 | while ((readb(&up->regs->r.star) & SAB82532_STAR_CEC) && --timeout) |
| 106 | udelay(1); |
| 107 | } |
| 108 | |
| 109 | static struct tty_struct * |
| 110 | receive_chars(struct uart_sunsab_port *up, |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 111 | union sab82532_irq_status *stat) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | { |
| 113 | struct tty_struct *tty = NULL; |
| 114 | unsigned char buf[32]; |
| 115 | int saw_console_brk = 0; |
| 116 | int free_fifo = 0; |
| 117 | int count = 0; |
| 118 | int i; |
| 119 | |
Alan Cox | ebd2c8f | 2009-09-19 13:13:28 -0700 | [diff] [blame] | 120 | if (up->port.state != NULL) /* Unopened serial console */ |
| 121 | tty = up->port.state->port.tty; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | |
| 123 | /* Read number of BYTES (Character + Status) available. */ |
| 124 | if (stat->sreg.isr0 & SAB82532_ISR0_RPF) { |
| 125 | count = SAB82532_RECV_FIFO_SIZE; |
| 126 | free_fifo++; |
| 127 | } |
| 128 | |
| 129 | if (stat->sreg.isr0 & SAB82532_ISR0_TCD) { |
| 130 | count = readb(&up->regs->r.rbcl) & (SAB82532_RECV_FIFO_SIZE - 1); |
| 131 | free_fifo++; |
| 132 | } |
| 133 | |
| 134 | /* Issue a FIFO read command in case we where idle. */ |
| 135 | if (stat->sreg.isr0 & SAB82532_ISR0_TIME) { |
| 136 | sunsab_cec_wait(up); |
| 137 | writeb(SAB82532_CMDR_RFRD, &up->regs->w.cmdr); |
| 138 | return tty; |
| 139 | } |
| 140 | |
| 141 | if (stat->sreg.isr0 & SAB82532_ISR0_RFO) |
| 142 | free_fifo++; |
| 143 | |
| 144 | /* Read the FIFO. */ |
| 145 | for (i = 0; i < count; i++) |
| 146 | buf[i] = readb(&up->regs->r.rfifo[i]); |
| 147 | |
| 148 | /* Issue Receive Message Complete command. */ |
| 149 | if (free_fifo) { |
| 150 | sunsab_cec_wait(up); |
| 151 | writeb(SAB82532_CMDR_RMC, &up->regs->w.cmdr); |
| 152 | } |
| 153 | |
| 154 | /* Count may be zero for BRK, so we check for it here */ |
| 155 | if ((stat->sreg.isr1 & SAB82532_ISR1_BRK) && |
| 156 | (up->port.line == up->port.cons->index)) |
| 157 | saw_console_brk = 1; |
| 158 | |
| 159 | for (i = 0; i < count; i++) { |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 160 | unsigned char ch = buf[i], flag; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | |
| 162 | if (tty == NULL) { |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 163 | uart_handle_sysrq_char(&up->port, ch); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | continue; |
| 165 | } |
| 166 | |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 167 | flag = TTY_NORMAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 168 | up->port.icount.rx++; |
| 169 | |
| 170 | if (unlikely(stat->sreg.isr0 & (SAB82532_ISR0_PERR | |
| 171 | SAB82532_ISR0_FERR | |
| 172 | SAB82532_ISR0_RFO)) || |
| 173 | unlikely(stat->sreg.isr1 & SAB82532_ISR1_BRK)) { |
| 174 | /* |
| 175 | * For statistics only |
| 176 | */ |
| 177 | if (stat->sreg.isr1 & SAB82532_ISR1_BRK) { |
| 178 | stat->sreg.isr0 &= ~(SAB82532_ISR0_PERR | |
| 179 | SAB82532_ISR0_FERR); |
| 180 | up->port.icount.brk++; |
| 181 | /* |
| 182 | * We do the SysRQ and SAK checking |
| 183 | * here because otherwise the break |
| 184 | * may get masked by ignore_status_mask |
| 185 | * or read_status_mask. |
| 186 | */ |
| 187 | if (uart_handle_break(&up->port)) |
| 188 | continue; |
| 189 | } else if (stat->sreg.isr0 & SAB82532_ISR0_PERR) |
| 190 | up->port.icount.parity++; |
| 191 | else if (stat->sreg.isr0 & SAB82532_ISR0_FERR) |
| 192 | up->port.icount.frame++; |
| 193 | if (stat->sreg.isr0 & SAB82532_ISR0_RFO) |
| 194 | up->port.icount.overrun++; |
| 195 | |
| 196 | /* |
| 197 | * Mask off conditions which should be ingored. |
| 198 | */ |
| 199 | stat->sreg.isr0 &= (up->port.read_status_mask & 0xff); |
| 200 | stat->sreg.isr1 &= ((up->port.read_status_mask >> 8) & 0xff); |
| 201 | |
| 202 | if (stat->sreg.isr1 & SAB82532_ISR1_BRK) { |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 203 | flag = TTY_BREAK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | } else if (stat->sreg.isr0 & SAB82532_ISR0_PERR) |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 205 | flag = TTY_PARITY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | else if (stat->sreg.isr0 & SAB82532_ISR0_FERR) |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 207 | flag = TTY_FRAME; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | } |
| 209 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 210 | if (uart_handle_sysrq_char(&up->port, ch)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | continue; |
| 212 | |
| 213 | if ((stat->sreg.isr0 & (up->port.ignore_status_mask & 0xff)) == 0 && |
Alan Cox | 33f0f88 | 2006-01-09 20:54:13 -0800 | [diff] [blame] | 214 | (stat->sreg.isr1 & ((up->port.ignore_status_mask >> 8) & 0xff)) == 0) |
| 215 | tty_insert_flip_char(tty, ch, flag); |
| 216 | if (stat->sreg.isr0 & SAB82532_ISR0_RFO) |
| 217 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 218 | } |
| 219 | |
| 220 | if (saw_console_brk) |
| 221 | sun_do_break(); |
| 222 | |
| 223 | return tty; |
| 224 | } |
| 225 | |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 226 | static void sunsab_stop_tx(struct uart_port *); |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 227 | static void sunsab_tx_idle(struct uart_sunsab_port *); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 228 | |
| 229 | static void transmit_chars(struct uart_sunsab_port *up, |
| 230 | union sab82532_irq_status *stat) |
| 231 | { |
Alan Cox | ebd2c8f | 2009-09-19 13:13:28 -0700 | [diff] [blame] | 232 | struct circ_buf *xmit = &up->port.state->xmit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | int i; |
| 234 | |
| 235 | if (stat->sreg.isr1 & SAB82532_ISR1_ALLS) { |
| 236 | up->interrupt_mask1 |= SAB82532_IMR1_ALLS; |
| 237 | writeb(up->interrupt_mask1, &up->regs->w.imr1); |
| 238 | set_bit(SAB82532_ALLS, &up->irqflags); |
| 239 | } |
| 240 | |
| 241 | #if 0 /* bde@nwlink.com says this check causes problems */ |
| 242 | if (!(stat->sreg.isr1 & SAB82532_ISR1_XPR)) |
| 243 | return; |
| 244 | #endif |
| 245 | |
| 246 | if (!(readb(&up->regs->r.star) & SAB82532_STAR_XFW)) |
| 247 | return; |
| 248 | |
| 249 | set_bit(SAB82532_XPR, &up->irqflags); |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 250 | sunsab_tx_idle(up); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | |
| 252 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { |
| 253 | up->interrupt_mask1 |= SAB82532_IMR1_XPR; |
| 254 | writeb(up->interrupt_mask1, &up->regs->w.imr1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 255 | return; |
| 256 | } |
| 257 | |
| 258 | up->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS|SAB82532_IMR1_XPR); |
| 259 | writeb(up->interrupt_mask1, &up->regs->w.imr1); |
| 260 | clear_bit(SAB82532_ALLS, &up->irqflags); |
| 261 | |
| 262 | /* Stuff 32 bytes into Transmit FIFO. */ |
| 263 | clear_bit(SAB82532_XPR, &up->irqflags); |
| 264 | for (i = 0; i < up->port.fifosize; i++) { |
| 265 | writeb(xmit->buf[xmit->tail], |
| 266 | &up->regs->w.xfifo[i]); |
| 267 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
| 268 | up->port.icount.tx++; |
| 269 | if (uart_circ_empty(xmit)) |
| 270 | break; |
| 271 | } |
| 272 | |
| 273 | /* Issue a Transmit Frame command. */ |
| 274 | sunsab_cec_wait(up); |
| 275 | writeb(SAB82532_CMDR_XF, &up->regs->w.cmdr); |
| 276 | |
| 277 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 278 | uart_write_wakeup(&up->port); |
| 279 | |
| 280 | if (uart_circ_empty(xmit)) |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 281 | sunsab_stop_tx(&up->port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | } |
| 283 | |
| 284 | static void check_status(struct uart_sunsab_port *up, |
| 285 | union sab82532_irq_status *stat) |
| 286 | { |
| 287 | if (stat->sreg.isr0 & SAB82532_ISR0_CDSC) |
| 288 | uart_handle_dcd_change(&up->port, |
| 289 | !(readb(&up->regs->r.vstr) & SAB82532_VSTR_CD)); |
| 290 | |
| 291 | if (stat->sreg.isr1 & SAB82532_ISR1_CSC) |
| 292 | uart_handle_cts_change(&up->port, |
| 293 | (readb(&up->regs->r.star) & SAB82532_STAR_CTS)); |
| 294 | |
| 295 | if ((readb(&up->regs->r.pvr) & up->pvr_dsr_bit) ^ up->dsr) { |
| 296 | up->dsr = (readb(&up->regs->r.pvr) & up->pvr_dsr_bit) ? 0 : 1; |
| 297 | up->port.icount.dsr++; |
| 298 | } |
| 299 | |
Alan Cox | bdc04e3 | 2009-09-19 13:13:31 -0700 | [diff] [blame] | 300 | wake_up_interruptible(&up->port.state->port.delta_msr_wait); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 301 | } |
| 302 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 303 | static irqreturn_t sunsab_interrupt(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | { |
| 305 | struct uart_sunsab_port *up = dev_id; |
| 306 | struct tty_struct *tty; |
| 307 | union sab82532_irq_status status; |
| 308 | unsigned long flags; |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 309 | unsigned char gis; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | |
| 311 | spin_lock_irqsave(&up->port.lock, flags); |
| 312 | |
| 313 | status.stat = 0; |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 314 | gis = readb(&up->regs->r.gis) >> up->gis_shift; |
| 315 | if (gis & 1) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | status.sreg.isr0 = readb(&up->regs->r.isr0); |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 317 | if (gis & 2) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 318 | status.sreg.isr1 = readb(&up->regs->r.isr1); |
| 319 | |
| 320 | tty = NULL; |
| 321 | if (status.stat) { |
| 322 | if ((status.sreg.isr0 & (SAB82532_ISR0_TCD | SAB82532_ISR0_TIME | |
| 323 | SAB82532_ISR0_RFO | SAB82532_ISR0_RPF)) || |
| 324 | (status.sreg.isr1 & SAB82532_ISR1_BRK)) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 325 | tty = receive_chars(up, &status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 326 | if ((status.sreg.isr0 & SAB82532_ISR0_CDSC) || |
| 327 | (status.sreg.isr1 & SAB82532_ISR1_CSC)) |
| 328 | check_status(up, &status); |
| 329 | if (status.sreg.isr1 & (SAB82532_ISR1_ALLS | SAB82532_ISR1_XPR)) |
| 330 | transmit_chars(up, &status); |
| 331 | } |
| 332 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | spin_unlock_irqrestore(&up->port.lock, flags); |
| 334 | |
| 335 | if (tty) |
| 336 | tty_flip_buffer_push(tty); |
| 337 | |
| 338 | return IRQ_HANDLED; |
| 339 | } |
| 340 | |
| 341 | /* port->lock is not held. */ |
| 342 | static unsigned int sunsab_tx_empty(struct uart_port *port) |
| 343 | { |
| 344 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
| 345 | int ret; |
| 346 | |
| 347 | /* Do not need a lock for a state test like this. */ |
| 348 | if (test_bit(SAB82532_ALLS, &up->irqflags)) |
| 349 | ret = TIOCSER_TEMT; |
| 350 | else |
| 351 | ret = 0; |
| 352 | |
| 353 | return ret; |
| 354 | } |
| 355 | |
| 356 | /* port->lock held by caller. */ |
| 357 | static void sunsab_set_mctrl(struct uart_port *port, unsigned int mctrl) |
| 358 | { |
| 359 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
| 360 | |
| 361 | if (mctrl & TIOCM_RTS) { |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 362 | up->cached_mode &= ~SAB82532_MODE_FRTS; |
| 363 | up->cached_mode |= SAB82532_MODE_RTS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 364 | } else { |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 365 | up->cached_mode |= (SAB82532_MODE_FRTS | |
| 366 | SAB82532_MODE_RTS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | } |
| 368 | if (mctrl & TIOCM_DTR) { |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 369 | up->cached_pvr &= ~(up->pvr_dtr_bit); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | } else { |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 371 | up->cached_pvr |= up->pvr_dtr_bit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 372 | } |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 373 | |
| 374 | set_bit(SAB82532_REGS_PENDING, &up->irqflags); |
| 375 | if (test_bit(SAB82532_XPR, &up->irqflags)) |
| 376 | sunsab_tx_idle(up); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 377 | } |
| 378 | |
Russell King | c5f4644 | 2005-06-29 09:42:38 +0100 | [diff] [blame] | 379 | /* port->lock is held by caller and interrupts are disabled. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 380 | static unsigned int sunsab_get_mctrl(struct uart_port *port) |
| 381 | { |
| 382 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | unsigned char val; |
| 384 | unsigned int result; |
| 385 | |
| 386 | result = 0; |
| 387 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 388 | val = readb(&up->regs->r.pvr); |
| 389 | result |= (val & up->pvr_dsr_bit) ? 0 : TIOCM_DSR; |
| 390 | |
| 391 | val = readb(&up->regs->r.vstr); |
| 392 | result |= (val & SAB82532_VSTR_CD) ? 0 : TIOCM_CAR; |
| 393 | |
| 394 | val = readb(&up->regs->r.star); |
| 395 | result |= (val & SAB82532_STAR_CTS) ? TIOCM_CTS : 0; |
| 396 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 397 | return result; |
| 398 | } |
| 399 | |
| 400 | /* port->lock held by caller. */ |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 401 | static void sunsab_stop_tx(struct uart_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 402 | { |
| 403 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
| 404 | |
| 405 | up->interrupt_mask1 |= SAB82532_IMR1_XPR; |
| 406 | writeb(up->interrupt_mask1, &up->regs->w.imr1); |
| 407 | } |
| 408 | |
| 409 | /* port->lock held by caller. */ |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 410 | static void sunsab_tx_idle(struct uart_sunsab_port *up) |
| 411 | { |
| 412 | if (test_bit(SAB82532_REGS_PENDING, &up->irqflags)) { |
| 413 | u8 tmp; |
| 414 | |
| 415 | clear_bit(SAB82532_REGS_PENDING, &up->irqflags); |
| 416 | writeb(up->cached_mode, &up->regs->rw.mode); |
| 417 | writeb(up->cached_pvr, &up->regs->rw.pvr); |
| 418 | writeb(up->cached_dafo, &up->regs->w.dafo); |
| 419 | |
| 420 | writeb(up->cached_ebrg & 0xff, &up->regs->w.bgr); |
| 421 | tmp = readb(&up->regs->rw.ccr2); |
| 422 | tmp &= ~0xc0; |
| 423 | tmp |= (up->cached_ebrg >> 2) & 0xc0; |
| 424 | writeb(tmp, &up->regs->rw.ccr2); |
| 425 | } |
| 426 | } |
| 427 | |
| 428 | /* port->lock held by caller. */ |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 429 | static void sunsab_start_tx(struct uart_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 430 | { |
| 431 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
Alan Cox | ebd2c8f | 2009-09-19 13:13:28 -0700 | [diff] [blame] | 432 | struct circ_buf *xmit = &up->port.state->xmit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | int i; |
| 434 | |
| 435 | up->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS|SAB82532_IMR1_XPR); |
| 436 | writeb(up->interrupt_mask1, &up->regs->w.imr1); |
| 437 | |
| 438 | if (!test_bit(SAB82532_XPR, &up->irqflags)) |
| 439 | return; |
| 440 | |
| 441 | clear_bit(SAB82532_ALLS, &up->irqflags); |
| 442 | clear_bit(SAB82532_XPR, &up->irqflags); |
| 443 | |
| 444 | for (i = 0; i < up->port.fifosize; i++) { |
| 445 | writeb(xmit->buf[xmit->tail], |
| 446 | &up->regs->w.xfifo[i]); |
| 447 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
| 448 | up->port.icount.tx++; |
| 449 | if (uart_circ_empty(xmit)) |
| 450 | break; |
| 451 | } |
| 452 | |
| 453 | /* Issue a Transmit Frame command. */ |
| 454 | sunsab_cec_wait(up); |
| 455 | writeb(SAB82532_CMDR_XF, &up->regs->w.cmdr); |
| 456 | } |
| 457 | |
| 458 | /* port->lock is not held. */ |
| 459 | static void sunsab_send_xchar(struct uart_port *port, char ch) |
| 460 | { |
| 461 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
| 462 | unsigned long flags; |
| 463 | |
| 464 | spin_lock_irqsave(&up->port.lock, flags); |
| 465 | |
| 466 | sunsab_tec_wait(up); |
| 467 | writeb(ch, &up->regs->w.tic); |
| 468 | |
| 469 | spin_unlock_irqrestore(&up->port.lock, flags); |
| 470 | } |
| 471 | |
| 472 | /* port->lock held by caller. */ |
| 473 | static void sunsab_stop_rx(struct uart_port *port) |
| 474 | { |
| 475 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
| 476 | |
| 477 | up->interrupt_mask0 |= SAB82532_ISR0_TCD; |
| 478 | writeb(up->interrupt_mask1, &up->regs->w.imr0); |
| 479 | } |
| 480 | |
| 481 | /* port->lock held by caller. */ |
| 482 | static void sunsab_enable_ms(struct uart_port *port) |
| 483 | { |
| 484 | /* For now we always receive these interrupts. */ |
| 485 | } |
| 486 | |
| 487 | /* port->lock is not held. */ |
| 488 | static void sunsab_break_ctl(struct uart_port *port, int break_state) |
| 489 | { |
| 490 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
| 491 | unsigned long flags; |
| 492 | unsigned char val; |
| 493 | |
| 494 | spin_lock_irqsave(&up->port.lock, flags); |
| 495 | |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 496 | val = up->cached_dafo; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 497 | if (break_state) |
| 498 | val |= SAB82532_DAFO_XBRK; |
| 499 | else |
| 500 | val &= ~SAB82532_DAFO_XBRK; |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 501 | up->cached_dafo = val; |
| 502 | |
| 503 | set_bit(SAB82532_REGS_PENDING, &up->irqflags); |
| 504 | if (test_bit(SAB82532_XPR, &up->irqflags)) |
| 505 | sunsab_tx_idle(up); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 506 | |
| 507 | spin_unlock_irqrestore(&up->port.lock, flags); |
| 508 | } |
| 509 | |
| 510 | /* port->lock is not held. */ |
| 511 | static int sunsab_startup(struct uart_port *port) |
| 512 | { |
| 513 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
| 514 | unsigned long flags; |
| 515 | unsigned char tmp; |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 516 | int err = request_irq(up->port.irq, sunsab_interrupt, |
| 517 | IRQF_SHARED, "sab", up); |
| 518 | if (err) |
| 519 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | |
| 521 | spin_lock_irqsave(&up->port.lock, flags); |
| 522 | |
| 523 | /* |
| 524 | * Wait for any commands or immediate characters |
| 525 | */ |
| 526 | sunsab_cec_wait(up); |
| 527 | sunsab_tec_wait(up); |
| 528 | |
| 529 | /* |
| 530 | * Clear the FIFO buffers. |
| 531 | */ |
| 532 | writeb(SAB82532_CMDR_RRES, &up->regs->w.cmdr); |
| 533 | sunsab_cec_wait(up); |
| 534 | writeb(SAB82532_CMDR_XRES, &up->regs->w.cmdr); |
| 535 | |
| 536 | /* |
| 537 | * Clear the interrupt registers. |
| 538 | */ |
| 539 | (void) readb(&up->regs->r.isr0); |
| 540 | (void) readb(&up->regs->r.isr1); |
| 541 | |
| 542 | /* |
| 543 | * Now, initialize the UART |
| 544 | */ |
| 545 | writeb(0, &up->regs->w.ccr0); /* power-down */ |
| 546 | writeb(SAB82532_CCR0_MCE | SAB82532_CCR0_SC_NRZ | |
| 547 | SAB82532_CCR0_SM_ASYNC, &up->regs->w.ccr0); |
| 548 | writeb(SAB82532_CCR1_ODS | SAB82532_CCR1_BCR | 7, &up->regs->w.ccr1); |
| 549 | writeb(SAB82532_CCR2_BDF | SAB82532_CCR2_SSEL | |
| 550 | SAB82532_CCR2_TOE, &up->regs->w.ccr2); |
| 551 | writeb(0, &up->regs->w.ccr3); |
| 552 | writeb(SAB82532_CCR4_MCK4 | SAB82532_CCR4_EBRG, &up->regs->w.ccr4); |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 553 | up->cached_mode = (SAB82532_MODE_RTS | SAB82532_MODE_FCTS | |
| 554 | SAB82532_MODE_RAC); |
| 555 | writeb(up->cached_mode, &up->regs->w.mode); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 556 | writeb(SAB82532_RFC_DPS|SAB82532_RFC_RFTH_32, &up->regs->w.rfc); |
| 557 | |
| 558 | tmp = readb(&up->regs->rw.ccr0); |
| 559 | tmp |= SAB82532_CCR0_PU; /* power-up */ |
| 560 | writeb(tmp, &up->regs->rw.ccr0); |
| 561 | |
| 562 | /* |
| 563 | * Finally, enable interrupts |
| 564 | */ |
| 565 | up->interrupt_mask0 = (SAB82532_IMR0_PERR | SAB82532_IMR0_FERR | |
| 566 | SAB82532_IMR0_PLLA); |
| 567 | writeb(up->interrupt_mask0, &up->regs->w.imr0); |
| 568 | up->interrupt_mask1 = (SAB82532_IMR1_BRKT | SAB82532_IMR1_ALLS | |
| 569 | SAB82532_IMR1_XOFF | SAB82532_IMR1_TIN | |
| 570 | SAB82532_IMR1_CSC | SAB82532_IMR1_XON | |
| 571 | SAB82532_IMR1_XPR); |
| 572 | writeb(up->interrupt_mask1, &up->regs->w.imr1); |
| 573 | set_bit(SAB82532_ALLS, &up->irqflags); |
| 574 | set_bit(SAB82532_XPR, &up->irqflags); |
| 575 | |
| 576 | spin_unlock_irqrestore(&up->port.lock, flags); |
| 577 | |
| 578 | return 0; |
| 579 | } |
| 580 | |
| 581 | /* port->lock is not held. */ |
| 582 | static void sunsab_shutdown(struct uart_port *port) |
| 583 | { |
| 584 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
| 585 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | |
| 587 | spin_lock_irqsave(&up->port.lock, flags); |
| 588 | |
| 589 | /* Disable Interrupts */ |
| 590 | up->interrupt_mask0 = 0xff; |
| 591 | writeb(up->interrupt_mask0, &up->regs->w.imr0); |
| 592 | up->interrupt_mask1 = 0xff; |
| 593 | writeb(up->interrupt_mask1, &up->regs->w.imr1); |
| 594 | |
| 595 | /* Disable break condition */ |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 596 | up->cached_dafo = readb(&up->regs->rw.dafo); |
| 597 | up->cached_dafo &= ~SAB82532_DAFO_XBRK; |
| 598 | writeb(up->cached_dafo, &up->regs->rw.dafo); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 599 | |
| 600 | /* Disable Receiver */ |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 601 | up->cached_mode &= ~SAB82532_MODE_RAC; |
| 602 | writeb(up->cached_mode, &up->regs->rw.mode); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 603 | |
| 604 | /* |
| 605 | * XXX FIXME |
| 606 | * |
| 607 | * If the chip is powered down here the system hangs/crashes during |
| 608 | * reboot or shutdown. This needs to be investigated further, |
| 609 | * similar behaviour occurs in 2.4 when the driver is configured |
| 610 | * as a module only. One hint may be that data is sometimes |
| 611 | * transmitted at 9600 baud during shutdown (regardless of the |
| 612 | * speed the chip was configured for when the port was open). |
| 613 | */ |
| 614 | #if 0 |
| 615 | /* Power Down */ |
| 616 | tmp = readb(&up->regs->rw.ccr0); |
| 617 | tmp &= ~SAB82532_CCR0_PU; |
| 618 | writeb(tmp, &up->regs->rw.ccr0); |
| 619 | #endif |
| 620 | |
| 621 | spin_unlock_irqrestore(&up->port.lock, flags); |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 622 | free_irq(up->port.irq, up); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 623 | } |
| 624 | |
| 625 | /* |
| 626 | * This is used to figure out the divisor speeds. |
| 627 | * |
| 628 | * The formula is: Baud = SAB_BASE_BAUD / ((N + 1) * (1 << M)), |
| 629 | * |
| 630 | * with 0 <= N < 64 and 0 <= M < 16 |
| 631 | */ |
| 632 | |
| 633 | static void calc_ebrg(int baud, int *n_ret, int *m_ret) |
| 634 | { |
| 635 | int n, m; |
| 636 | |
| 637 | if (baud == 0) { |
| 638 | *n_ret = 0; |
| 639 | *m_ret = 0; |
| 640 | return; |
| 641 | } |
| 642 | |
| 643 | /* |
| 644 | * We scale numbers by 10 so that we get better accuracy |
| 645 | * without having to use floating point. Here we increment m |
| 646 | * until n is within the valid range. |
| 647 | */ |
| 648 | n = (SAB_BASE_BAUD * 10) / baud; |
| 649 | m = 0; |
| 650 | while (n >= 640) { |
| 651 | n = n / 2; |
| 652 | m++; |
| 653 | } |
| 654 | n = (n+5) / 10; |
| 655 | /* |
| 656 | * We try very hard to avoid speeds with M == 0 since they may |
| 657 | * not work correctly for XTAL frequences above 10 MHz. |
| 658 | */ |
| 659 | if ((m == 0) && ((n & 1) == 0)) { |
| 660 | n = n / 2; |
| 661 | m++; |
| 662 | } |
| 663 | *n_ret = n - 1; |
| 664 | *m_ret = m; |
| 665 | } |
| 666 | |
| 667 | /* Internal routine, port->lock is held and local interrupts are disabled. */ |
| 668 | static void sunsab_convert_to_sab(struct uart_sunsab_port *up, unsigned int cflag, |
David S. Miller | b179fb8 | 2005-04-21 22:18:03 -0700 | [diff] [blame] | 669 | unsigned int iflag, unsigned int baud, |
| 670 | unsigned int quot) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 671 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | unsigned char dafo; |
| 673 | int bits, n, m; |
| 674 | |
| 675 | /* Byte size and parity */ |
| 676 | switch (cflag & CSIZE) { |
| 677 | case CS5: dafo = SAB82532_DAFO_CHL5; bits = 7; break; |
| 678 | case CS6: dafo = SAB82532_DAFO_CHL6; bits = 8; break; |
| 679 | case CS7: dafo = SAB82532_DAFO_CHL7; bits = 9; break; |
| 680 | case CS8: dafo = SAB82532_DAFO_CHL8; bits = 10; break; |
| 681 | /* Never happens, but GCC is too dumb to figure it out */ |
| 682 | default: dafo = SAB82532_DAFO_CHL5; bits = 7; break; |
| 683 | } |
| 684 | |
| 685 | if (cflag & CSTOPB) { |
| 686 | dafo |= SAB82532_DAFO_STOP; |
| 687 | bits++; |
| 688 | } |
| 689 | |
| 690 | if (cflag & PARENB) { |
| 691 | dafo |= SAB82532_DAFO_PARE; |
| 692 | bits++; |
| 693 | } |
| 694 | |
| 695 | if (cflag & PARODD) { |
| 696 | dafo |= SAB82532_DAFO_PAR_ODD; |
| 697 | } else { |
| 698 | dafo |= SAB82532_DAFO_PAR_EVEN; |
| 699 | } |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 700 | up->cached_dafo = dafo; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 701 | |
| 702 | calc_ebrg(baud, &n, &m); |
| 703 | |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 704 | up->cached_ebrg = n | (m << 6); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 705 | |
| 706 | up->tec_timeout = (10 * 1000000) / baud; |
| 707 | up->cec_timeout = up->tec_timeout >> 2; |
| 708 | |
| 709 | /* CTS flow control flags */ |
| 710 | /* We encode read_status_mask and ignore_status_mask like so: |
| 711 | * |
| 712 | * --------------------- |
| 713 | * | ... | ISR1 | ISR0 | |
| 714 | * --------------------- |
| 715 | * .. 15 8 7 0 |
| 716 | */ |
| 717 | |
| 718 | up->port.read_status_mask = (SAB82532_ISR0_TCD | SAB82532_ISR0_TIME | |
| 719 | SAB82532_ISR0_RFO | SAB82532_ISR0_RPF | |
| 720 | SAB82532_ISR0_CDSC); |
| 721 | up->port.read_status_mask |= (SAB82532_ISR1_CSC | |
| 722 | SAB82532_ISR1_ALLS | |
| 723 | SAB82532_ISR1_XPR) << 8; |
| 724 | if (iflag & INPCK) |
| 725 | up->port.read_status_mask |= (SAB82532_ISR0_PERR | |
| 726 | SAB82532_ISR0_FERR); |
| 727 | if (iflag & (BRKINT | PARMRK)) |
| 728 | up->port.read_status_mask |= (SAB82532_ISR1_BRK << 8); |
| 729 | |
| 730 | /* |
| 731 | * Characteres to ignore |
| 732 | */ |
| 733 | up->port.ignore_status_mask = 0; |
| 734 | if (iflag & IGNPAR) |
| 735 | up->port.ignore_status_mask |= (SAB82532_ISR0_PERR | |
| 736 | SAB82532_ISR0_FERR); |
| 737 | if (iflag & IGNBRK) { |
| 738 | up->port.ignore_status_mask |= (SAB82532_ISR1_BRK << 8); |
| 739 | /* |
| 740 | * If we're ignoring parity and break indicators, |
| 741 | * ignore overruns too (for real raw support). |
| 742 | */ |
| 743 | if (iflag & IGNPAR) |
| 744 | up->port.ignore_status_mask |= SAB82532_ISR0_RFO; |
| 745 | } |
| 746 | |
| 747 | /* |
| 748 | * ignore all characters if CREAD is not set |
| 749 | */ |
| 750 | if ((cflag & CREAD) == 0) |
| 751 | up->port.ignore_status_mask |= (SAB82532_ISR0_RPF | |
| 752 | SAB82532_ISR0_TCD); |
| 753 | |
David S. Miller | b179fb8 | 2005-04-21 22:18:03 -0700 | [diff] [blame] | 754 | uart_update_timeout(&up->port, cflag, |
| 755 | (up->port.uartclk / (16 * quot))); |
| 756 | |
David S. Miller | e4fdee8 | 2005-05-11 11:34:32 -0700 | [diff] [blame] | 757 | /* Now schedule a register update when the chip's |
| 758 | * transmitter is idle. |
| 759 | */ |
| 760 | up->cached_mode |= SAB82532_MODE_RAC; |
| 761 | set_bit(SAB82532_REGS_PENDING, &up->irqflags); |
| 762 | if (test_bit(SAB82532_XPR, &up->irqflags)) |
| 763 | sunsab_tx_idle(up); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | } |
| 765 | |
| 766 | /* port->lock is not held. */ |
Alan Cox | 606d099 | 2006-12-08 02:38:45 -0800 | [diff] [blame] | 767 | static void sunsab_set_termios(struct uart_port *port, struct ktermios *termios, |
| 768 | struct ktermios *old) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 769 | { |
| 770 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
| 771 | unsigned long flags; |
David S. Miller | b179fb8 | 2005-04-21 22:18:03 -0700 | [diff] [blame] | 772 | unsigned int baud = uart_get_baud_rate(port, termios, old, 0, 4000000); |
| 773 | unsigned int quot = uart_get_divisor(port, baud); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 774 | |
| 775 | spin_lock_irqsave(&up->port.lock, flags); |
David S. Miller | b179fb8 | 2005-04-21 22:18:03 -0700 | [diff] [blame] | 776 | sunsab_convert_to_sab(up, termios->c_cflag, termios->c_iflag, baud, quot); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 777 | spin_unlock_irqrestore(&up->port.lock, flags); |
| 778 | } |
| 779 | |
| 780 | static const char *sunsab_type(struct uart_port *port) |
| 781 | { |
| 782 | struct uart_sunsab_port *up = (void *)port; |
| 783 | static char buf[36]; |
| 784 | |
| 785 | sprintf(buf, "SAB82532 %s", sab82532_version[up->type]); |
| 786 | return buf; |
| 787 | } |
| 788 | |
| 789 | static void sunsab_release_port(struct uart_port *port) |
| 790 | { |
| 791 | } |
| 792 | |
| 793 | static int sunsab_request_port(struct uart_port *port) |
| 794 | { |
| 795 | return 0; |
| 796 | } |
| 797 | |
| 798 | static void sunsab_config_port(struct uart_port *port, int flags) |
| 799 | { |
| 800 | } |
| 801 | |
| 802 | static int sunsab_verify_port(struct uart_port *port, struct serial_struct *ser) |
| 803 | { |
| 804 | return -EINVAL; |
| 805 | } |
| 806 | |
| 807 | static struct uart_ops sunsab_pops = { |
| 808 | .tx_empty = sunsab_tx_empty, |
| 809 | .set_mctrl = sunsab_set_mctrl, |
| 810 | .get_mctrl = sunsab_get_mctrl, |
| 811 | .stop_tx = sunsab_stop_tx, |
| 812 | .start_tx = sunsab_start_tx, |
| 813 | .send_xchar = sunsab_send_xchar, |
| 814 | .stop_rx = sunsab_stop_rx, |
| 815 | .enable_ms = sunsab_enable_ms, |
| 816 | .break_ctl = sunsab_break_ctl, |
| 817 | .startup = sunsab_startup, |
| 818 | .shutdown = sunsab_shutdown, |
| 819 | .set_termios = sunsab_set_termios, |
| 820 | .type = sunsab_type, |
| 821 | .release_port = sunsab_release_port, |
| 822 | .request_port = sunsab_request_port, |
| 823 | .config_port = sunsab_config_port, |
| 824 | .verify_port = sunsab_verify_port, |
| 825 | }; |
| 826 | |
| 827 | static struct uart_driver sunsab_reg = { |
| 828 | .owner = THIS_MODULE, |
David S. Miller | 32039f4 | 2008-05-01 01:14:27 -0700 | [diff] [blame] | 829 | .driver_name = "sunsab", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 830 | .dev_name = "ttyS", |
| 831 | .major = TTY_MAJOR, |
| 832 | }; |
| 833 | |
| 834 | static struct uart_sunsab_port *sunsab_ports; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 835 | |
| 836 | #ifdef CONFIG_SERIAL_SUNSAB_CONSOLE |
| 837 | |
Russell King | d358788 | 2006-03-20 20:00:09 +0000 | [diff] [blame] | 838 | static void sunsab_console_putchar(struct uart_port *port, int c) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | { |
Russell King | d358788 | 2006-03-20 20:00:09 +0000 | [diff] [blame] | 840 | struct uart_sunsab_port *up = (struct uart_sunsab_port *)port; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 841 | |
| 842 | sunsab_tec_wait(up); |
| 843 | writeb(c, &up->regs->w.tic); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 844 | } |
| 845 | |
| 846 | static void sunsab_console_write(struct console *con, const char *s, unsigned n) |
| 847 | { |
| 848 | struct uart_sunsab_port *up = &sunsab_ports[con->index]; |
David S. Miller | f3c681c | 2007-07-15 23:53:32 -0700 | [diff] [blame] | 849 | unsigned long flags; |
| 850 | int locked = 1; |
| 851 | |
| 852 | local_irq_save(flags); |
| 853 | if (up->port.sysrq) { |
| 854 | locked = 0; |
| 855 | } else if (oops_in_progress) { |
| 856 | locked = spin_trylock(&up->port.lock); |
| 857 | } else |
| 858 | spin_lock(&up->port.lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 859 | |
Russell King | d358788 | 2006-03-20 20:00:09 +0000 | [diff] [blame] | 860 | uart_console_write(&up->port, s, n, sunsab_console_putchar); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 861 | sunsab_tec_wait(up); |
David S. Miller | f3c681c | 2007-07-15 23:53:32 -0700 | [diff] [blame] | 862 | |
| 863 | if (locked) |
| 864 | spin_unlock(&up->port.lock); |
| 865 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 866 | } |
| 867 | |
| 868 | static int sunsab_console_setup(struct console *con, char *options) |
| 869 | { |
| 870 | struct uart_sunsab_port *up = &sunsab_ports[con->index]; |
| 871 | unsigned long flags; |
David S. Miller | b179fb8 | 2005-04-21 22:18:03 -0700 | [diff] [blame] | 872 | unsigned int baud, quot; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 873 | |
Marc Zyngier | 0f4184f | 2006-08-23 15:50:57 -0700 | [diff] [blame] | 874 | /* |
| 875 | * The console framework calls us for each and every port |
| 876 | * registered. Defer the console setup until the requested |
| 877 | * port has been properly discovered. A bit of a hack, |
| 878 | * though... |
| 879 | */ |
| 880 | if (up->port.type != PORT_SUNSAB) |
| 881 | return -1; |
| 882 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 883 | printk("Console: ttyS%d (SAB82532)\n", |
| 884 | (sunsab_reg.minor - 64) + con->index); |
| 885 | |
David S. Miller | 457931d | 2009-11-24 14:09:56 -0800 | [diff] [blame^] | 886 | sunserial_console_termios(con, to_of_device(up->port.dev)->node); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 887 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 888 | switch (con->cflag & CBAUD) { |
| 889 | case B150: baud = 150; break; |
| 890 | case B300: baud = 300; break; |
| 891 | case B600: baud = 600; break; |
| 892 | case B1200: baud = 1200; break; |
| 893 | case B2400: baud = 2400; break; |
| 894 | case B4800: baud = 4800; break; |
| 895 | default: case B9600: baud = 9600; break; |
| 896 | case B19200: baud = 19200; break; |
| 897 | case B38400: baud = 38400; break; |
Eddie C. Dost | c126cf8 | 2006-01-18 14:54:31 -0800 | [diff] [blame] | 898 | case B57600: baud = 57600; break; |
| 899 | case B115200: baud = 115200; break; |
| 900 | case B230400: baud = 230400; break; |
| 901 | case B460800: baud = 460800; break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 902 | }; |
| 903 | |
| 904 | /* |
| 905 | * Temporary fix. |
| 906 | */ |
| 907 | spin_lock_init(&up->port.lock); |
| 908 | |
| 909 | /* |
| 910 | * Initialize the hardware |
| 911 | */ |
| 912 | sunsab_startup(&up->port); |
| 913 | |
| 914 | spin_lock_irqsave(&up->port.lock, flags); |
| 915 | |
| 916 | /* |
| 917 | * Finally, enable interrupts |
| 918 | */ |
| 919 | up->interrupt_mask0 = SAB82532_IMR0_PERR | SAB82532_IMR0_FERR | |
| 920 | SAB82532_IMR0_PLLA | SAB82532_IMR0_CDSC; |
| 921 | writeb(up->interrupt_mask0, &up->regs->w.imr0); |
| 922 | up->interrupt_mask1 = SAB82532_IMR1_BRKT | SAB82532_IMR1_ALLS | |
| 923 | SAB82532_IMR1_XOFF | SAB82532_IMR1_TIN | |
| 924 | SAB82532_IMR1_CSC | SAB82532_IMR1_XON | |
| 925 | SAB82532_IMR1_XPR; |
| 926 | writeb(up->interrupt_mask1, &up->regs->w.imr1); |
| 927 | |
David S. Miller | b179fb8 | 2005-04-21 22:18:03 -0700 | [diff] [blame] | 928 | quot = uart_get_divisor(&up->port, baud); |
| 929 | sunsab_convert_to_sab(up, con->cflag, 0, baud, quot); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 930 | sunsab_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); |
| 931 | |
| 932 | spin_unlock_irqrestore(&up->port.lock, flags); |
| 933 | |
| 934 | return 0; |
| 935 | } |
| 936 | |
| 937 | static struct console sunsab_console = { |
| 938 | .name = "ttyS", |
| 939 | .write = sunsab_console_write, |
| 940 | .device = uart_console_device, |
| 941 | .setup = sunsab_console_setup, |
| 942 | .flags = CON_PRINTBUFFER, |
| 943 | .index = -1, |
| 944 | .data = &sunsab_reg, |
| 945 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 946 | |
David S. Miller | 1ddb7c9 | 2006-02-13 20:09:10 -0800 | [diff] [blame] | 947 | static inline struct console *SUNSAB_CONSOLE(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 948 | { |
David S. Miller | 1ddb7c9 | 2006-02-13 20:09:10 -0800 | [diff] [blame] | 949 | return &sunsab_console; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 950 | } |
| 951 | #else |
David S. Miller | 1ddb7c9 | 2006-02-13 20:09:10 -0800 | [diff] [blame] | 952 | #define SUNSAB_CONSOLE() (NULL) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 953 | #define sunsab_console_init() do { } while (0) |
| 954 | #endif |
| 955 | |
David S. Miller | 89d1d0a | 2006-06-29 15:18:50 -0700 | [diff] [blame] | 956 | static int __devinit sunsab_init_one(struct uart_sunsab_port *up, |
| 957 | struct of_device *op, |
| 958 | unsigned long offset, |
| 959 | int line) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 960 | { |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 961 | up->port.line = line; |
| 962 | up->port.dev = &op->dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 963 | |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 964 | up->port.mapbase = op->resource[0].start + offset; |
| 965 | up->port.membase = of_ioremap(&op->resource[0], offset, |
| 966 | sizeof(union sab82532_async_regs), |
| 967 | "sab"); |
| 968 | if (!up->port.membase) |
| 969 | return -ENOMEM; |
| 970 | up->regs = (union sab82532_async_regs __iomem *) up->port.membase; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 971 | |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 972 | up->port.irq = op->irqs[0]; |
| 973 | |
| 974 | up->port.fifosize = SAB82532_XMIT_FIFO_SIZE; |
| 975 | up->port.iotype = UPIO_MEM; |
| 976 | |
| 977 | writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc); |
| 978 | |
| 979 | up->port.ops = &sunsab_pops; |
| 980 | up->port.type = PORT_SUNSAB; |
| 981 | up->port.uartclk = SAB_BASE_BAUD; |
| 982 | |
| 983 | up->type = readb(&up->regs->r.vstr) & 0x0f; |
| 984 | writeb(~((1 << 1) | (1 << 2) | (1 << 4)), &up->regs->w.pcr); |
| 985 | writeb(0xff, &up->regs->w.pim); |
| 986 | if ((up->port.line & 0x1) == 0) { |
| 987 | up->pvr_dsr_bit = (1 << 0); |
| 988 | up->pvr_dtr_bit = (1 << 1); |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 989 | up->gis_shift = 2; |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 990 | } else { |
| 991 | up->pvr_dsr_bit = (1 << 3); |
| 992 | up->pvr_dtr_bit = (1 << 2); |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 993 | up->gis_shift = 0; |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 994 | } |
| 995 | up->cached_pvr = (1 << 1) | (1 << 2) | (1 << 4); |
| 996 | writeb(up->cached_pvr, &up->regs->w.pvr); |
| 997 | up->cached_mode = readb(&up->regs->rw.mode); |
| 998 | up->cached_mode |= SAB82532_MODE_FRTS; |
| 999 | writeb(up->cached_mode, &up->regs->rw.mode); |
| 1000 | up->cached_mode |= SAB82532_MODE_RTS; |
| 1001 | writeb(up->cached_mode, &up->regs->rw.mode); |
| 1002 | |
| 1003 | up->tec_timeout = SAB82532_MAX_TEC_TIMEOUT; |
| 1004 | up->cec_timeout = SAB82532_MAX_CEC_TIMEOUT; |
| 1005 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1006 | return 0; |
| 1007 | } |
| 1008 | |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1009 | static int __devinit sab_probe(struct of_device *op, const struct of_device_id *match) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1010 | { |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1011 | static int inst; |
| 1012 | struct uart_sunsab_port *up; |
| 1013 | int err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1014 | |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1015 | up = &sunsab_ports[inst * 2]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1016 | |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1017 | err = sunsab_init_one(&up[0], op, |
David S. Miller | bda2f7b | 2006-07-17 16:40:26 -0700 | [diff] [blame] | 1018 | 0, |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1019 | (inst * 2) + 0); |
| 1020 | if (err) |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 1021 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1022 | |
David S. Miller | bda2f7b | 2006-07-17 16:40:26 -0700 | [diff] [blame] | 1023 | err = sunsab_init_one(&up[1], op, |
| 1024 | sizeof(union sab82532_async_regs), |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1025 | (inst * 2) + 1); |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 1026 | if (err) |
| 1027 | goto out1; |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1028 | |
David S. Miller | c73fcc8 | 2007-07-20 16:59:26 -0700 | [diff] [blame] | 1029 | sunserial_console_match(SUNSAB_CONSOLE(), op->node, |
David S. Miller | 4e3533d | 2009-11-24 14:03:34 -0800 | [diff] [blame] | 1030 | &sunsab_reg, up[0].port.line, |
| 1031 | false); |
David S. Miller | c73fcc8 | 2007-07-20 16:59:26 -0700 | [diff] [blame] | 1032 | |
| 1033 | sunserial_console_match(SUNSAB_CONSOLE(), op->node, |
David S. Miller | 4e3533d | 2009-11-24 14:03:34 -0800 | [diff] [blame] | 1034 | &sunsab_reg, up[1].port.line, |
| 1035 | false); |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 1036 | |
| 1037 | err = uart_add_one_port(&sunsab_reg, &up[0].port); |
| 1038 | if (err) |
| 1039 | goto out2; |
| 1040 | |
| 1041 | err = uart_add_one_port(&sunsab_reg, &up[1].port); |
| 1042 | if (err) |
| 1043 | goto out3; |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1044 | |
| 1045 | dev_set_drvdata(&op->dev, &up[0]); |
| 1046 | |
| 1047 | inst++; |
| 1048 | |
| 1049 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1050 | |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 1051 | out3: |
| 1052 | uart_remove_one_port(&sunsab_reg, &up[0].port); |
| 1053 | out2: |
David S. Miller | e3a411a3 | 2006-12-28 21:01:32 -0800 | [diff] [blame] | 1054 | of_iounmap(&op->resource[0], |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 1055 | up[1].port.membase, |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1056 | sizeof(union sab82532_async_regs)); |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 1057 | out1: |
| 1058 | of_iounmap(&op->resource[0], |
| 1059 | up[0].port.membase, |
| 1060 | sizeof(union sab82532_async_regs)); |
| 1061 | out: |
| 1062 | return err; |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1063 | } |
| 1064 | |
| 1065 | static int __devexit sab_remove(struct of_device *op) |
| 1066 | { |
| 1067 | struct uart_sunsab_port *up = dev_get_drvdata(&op->dev); |
| 1068 | |
Al Viro | 9c5b348 | 2007-09-17 16:47:07 -0700 | [diff] [blame] | 1069 | uart_remove_one_port(&sunsab_reg, &up[1].port); |
| 1070 | uart_remove_one_port(&sunsab_reg, &up[0].port); |
| 1071 | of_iounmap(&op->resource[0], |
| 1072 | up[1].port.membase, |
| 1073 | sizeof(union sab82532_async_regs)); |
| 1074 | of_iounmap(&op->resource[0], |
| 1075 | up[0].port.membase, |
| 1076 | sizeof(union sab82532_async_regs)); |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1077 | |
| 1078 | dev_set_drvdata(&op->dev, NULL); |
| 1079 | |
| 1080 | return 0; |
| 1081 | } |
| 1082 | |
David S. Miller | fd09831 | 2008-08-31 01:23:17 -0700 | [diff] [blame] | 1083 | static const struct of_device_id sab_match[] = { |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1084 | { |
| 1085 | .name = "se", |
| 1086 | }, |
| 1087 | { |
| 1088 | .name = "serial", |
| 1089 | .compatible = "sab82532", |
| 1090 | }, |
| 1091 | {}, |
| 1092 | }; |
| 1093 | MODULE_DEVICE_TABLE(of, sab_match); |
| 1094 | |
| 1095 | static struct of_platform_driver sab_driver = { |
| 1096 | .name = "sab", |
| 1097 | .match_table = sab_match, |
| 1098 | .probe = sab_probe, |
| 1099 | .remove = __devexit_p(sab_remove), |
| 1100 | }; |
| 1101 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1102 | static int __init sunsab_init(void) |
| 1103 | { |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1104 | struct device_node *dp; |
| 1105 | int err; |
Martin Habets | 58d784a | 2007-12-11 03:37:04 -0800 | [diff] [blame] | 1106 | int num_channels = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1107 | |
David S. Miller | bda2f7b | 2006-07-17 16:40:26 -0700 | [diff] [blame] | 1108 | for_each_node_by_name(dp, "se") |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1109 | num_channels += 2; |
| 1110 | for_each_node_by_name(dp, "serial") { |
| 1111 | if (of_device_is_compatible(dp, "sab82532")) |
| 1112 | num_channels += 2; |
| 1113 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1114 | |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1115 | if (num_channels) { |
| 1116 | sunsab_ports = kzalloc(sizeof(struct uart_sunsab_port) * |
| 1117 | num_channels, GFP_KERNEL); |
| 1118 | if (!sunsab_ports) |
| 1119 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1120 | |
Martin Habets | 58d784a | 2007-12-11 03:37:04 -0800 | [diff] [blame] | 1121 | err = sunserial_register_minors(&sunsab_reg, num_channels); |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1122 | if (err) { |
| 1123 | kfree(sunsab_ports); |
| 1124 | sunsab_ports = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1125 | |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1126 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1127 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1128 | } |
| 1129 | |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1130 | return of_register_driver(&sab_driver, &of_bus_type); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1131 | } |
| 1132 | |
| 1133 | static void __exit sunsab_exit(void) |
| 1134 | { |
David S. Miller | c4d3721 | 2006-06-29 15:17:47 -0700 | [diff] [blame] | 1135 | of_unregister_driver(&sab_driver); |
Martin Habets | 58d784a | 2007-12-11 03:37:04 -0800 | [diff] [blame] | 1136 | if (sunsab_reg.nr) { |
| 1137 | sunserial_unregister_minors(&sunsab_reg, sunsab_reg.nr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1138 | } |
| 1139 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1140 | kfree(sunsab_ports); |
| 1141 | sunsab_ports = NULL; |
| 1142 | } |
| 1143 | |
| 1144 | module_init(sunsab_init); |
| 1145 | module_exit(sunsab_exit); |
| 1146 | |
| 1147 | MODULE_AUTHOR("Eddie C. Dost and David S. Miller"); |
| 1148 | MODULE_DESCRIPTION("Sun SAB82532 serial port driver"); |
| 1149 | MODULE_LICENSE("GPL"); |