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gerrit-public.fairphone.software / kernel / msm-4.9 / 4642610c77b345130d6b5a08c75d23ad98601fd5 / . / drivers / net / sfc / efx.h
blob: e783c0fedfd8c7f045b264c62783694b99492d3b [file] [log] [blame]
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
Ben Hutchings906bb262009-11-29 15:16:19 +0000[diff] [blame]4 * Copyright 2006-2009 Solarflare Communications Inc.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#ifndef EFX_EFX_H
12#define EFX_EFX_H
13
14#include "net_driver.h"
15
16/* PCI IDs */
17#define EFX_VENDID_SFC 0x1924
18#define FALCON_A_P_DEVID 0x0703
19#define FALCON_A_S_DEVID 0x6703
20#define FALCON_B_P_DEVID 0x0710
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000[diff] [blame]21#define BETHPAGE_A_P_DEVID 0x0803
22#define SIENA_A_P_DEVID 0x0813
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]23
Ben Hutchingsdc803df2009-10-23 08:32:33 +0000[diff] [blame]24/* Solarstorm controllers use BAR 0 for I/O space and BAR 2(&3) for memory */
25#define EFX_MEM_BAR 2
26
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]27/* TX */
Ben Hutchingsf5e7adc2009-11-23 16:07:30 +0000[diff] [blame]28extern int efx_probe_tx_queue(struct efx_tx_queue *tx_queue);
29extern void efx_remove_tx_queue(struct efx_tx_queue *tx_queue);
30extern void efx_init_tx_queue(struct efx_tx_queue *tx_queue);
31extern void efx_fini_tx_queue(struct efx_tx_queue *tx_queue);
32extern void efx_release_tx_buffers(struct efx_tx_queue *tx_queue);
33extern netdev_tx_t
34efx_hard_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
35extern netdev_tx_t
36efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb);
Ben Hutchings59cf09c2009-10-23 08:31:54 +0000[diff] [blame]37extern void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index);
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000[diff] [blame]38extern void efx_stop_queue(struct efx_channel *channel);
39extern void efx_wake_queue(struct efx_channel *channel);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]40
41/* RX */
Ben Hutchingsf5e7adc2009-11-23 16:07:30 +0000[diff] [blame]42extern int efx_probe_rx_queue(struct efx_rx_queue *rx_queue);
43extern void efx_remove_rx_queue(struct efx_rx_queue *rx_queue);
44extern void efx_init_rx_queue(struct efx_rx_queue *rx_queue);
45extern void efx_fini_rx_queue(struct efx_rx_queue *rx_queue);
46extern void efx_rx_strategy(struct efx_channel *channel);
47extern void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue);
Steve Hodgson90d683a2010-06-01 11:19:39 +0000[diff] [blame]48extern void efx_rx_slow_fill(unsigned long context);
Ben Hutchingsf5e7adc2009-11-23 16:07:30 +0000[diff] [blame]49extern void __efx_rx_packet(struct efx_channel *channel,
50 struct efx_rx_buffer *rx_buf, bool checksummed);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]51extern void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100[diff] [blame]52 unsigned int len, bool checksummed, bool discard);
Steve Hodgson90d683a2010-06-01 11:19:39 +0000[diff] [blame]53extern void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue);
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000[diff] [blame]54
55#define EFX_MAX_DMAQ_SIZE 4096UL
56#define EFX_DEFAULT_DMAQ_SIZE 1024UL
57#define EFX_MIN_DMAQ_SIZE 512UL
58
59#define EFX_MAX_EVQ_SIZE 16384UL
60#define EFX_MIN_EVQ_SIZE 512UL
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]61
Ben Hutchings46426102010-09-10 06:42:33 +0000[diff] [blame^]62/* The smallest [rt]xq_entries that the driver supports. Callers of
63 * efx_wake_queue() assume that they can subsequently send at least one
64 * skb. Falcon/A1 may require up to three descriptors per skb_frag. */
65#define EFX_MIN_RING_SIZE (roundup_pow_of_two(2 * 3 * MAX_SKB_FRAGS))
66
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]67/* Channels */
68extern void efx_process_channel_now(struct efx_channel *channel);
Ben Hutchings46426102010-09-10 06:42:33 +0000[diff] [blame^]69extern int
70efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]71
72/* Ports */
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000[diff] [blame]73extern int efx_reconfigure_port(struct efx_nic *efx);
74extern int __efx_reconfigure_port(struct efx_nic *efx);
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100[diff] [blame]75
Ben Hutchingsf5e7adc2009-11-23 16:07:30 +0000[diff] [blame]76/* Ethtool support */
77extern int efx_ethtool_get_settings(struct net_device *net_dev,
78 struct ethtool_cmd *ecmd);
79extern int efx_ethtool_set_settings(struct net_device *net_dev,
80 struct ethtool_cmd *ecmd);
81extern const struct ethtool_ops efx_ethtool_ops;
82
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100[diff] [blame]83/* Reset handling */
Ben Hutchingseb9f6742009-11-29 03:43:15 +0000[diff] [blame]84extern int efx_reset(struct efx_nic *efx, enum reset_type method);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000[diff] [blame]85extern void efx_reset_down(struct efx_nic *efx, enum reset_type method);
86extern int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]87
88/* Global */
89extern void efx_schedule_reset(struct efx_nic *efx, enum reset_type type);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]90extern void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs,
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000[diff] [blame]91 int rx_usecs, bool rx_adaptive);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]92
93/* Dummy PHY ops for PHY drivers */
94extern int efx_port_dummy_op_int(struct efx_nic *efx);
95extern void efx_port_dummy_op_void(struct efx_nic *efx);
Ben Hutchings398468e2009-11-23 16:03:45 +0000[diff] [blame]96extern void
97efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode);
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000[diff] [blame]98extern bool efx_port_dummy_op_poll(struct efx_nic *efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]99
Ben Hutchingsf4150722008-11-04 20:34:28 +0000[diff] [blame]100/* MTD */
101#ifdef CONFIG_SFC_MTD
102extern int efx_mtd_probe(struct efx_nic *efx);
103extern void efx_mtd_rename(struct efx_nic *efx);
104extern void efx_mtd_remove(struct efx_nic *efx);
105#else
106static inline int efx_mtd_probe(struct efx_nic *efx) { return 0; }
107static inline void efx_mtd_rename(struct efx_nic *efx) {}
108static inline void efx_mtd_remove(struct efx_nic *efx) {}
109#endif
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]110
111extern unsigned int efx_monitor_interval;
112
113static inline void efx_schedule_channel(struct efx_channel *channel)
114{
Ben Hutchings62776d02010-06-23 11:30:07 +0000[diff] [blame]115 netif_vdbg(channel->efx, intr, channel->efx->net_dev,
116 "channel %d scheduling NAPI poll on CPU%d\n",
117 channel->channel, raw_smp_processor_id());
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100[diff] [blame]118 channel->work_pending = true;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]119
Ben Hutchings288379f2009-01-19 16:43:59 -0800[diff] [blame]120 napi_schedule(&channel->napi_str);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]121}
122
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000[diff] [blame]123extern void efx_link_status_changed(struct efx_nic *efx);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000[diff] [blame]124extern void efx_link_set_advertising(struct efx_nic *efx, u32);
125extern void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type);
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000[diff] [blame]126
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]127#endif /* EFX_EFX_H */