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Peter Ujfalusi3f187f82012-07-26 17:01:32 +03001/*
2 * Device Tree Source for OMAP243x SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
Florian Vaussard98ef79572013-05-31 14:32:55 +020011#include "omap2.dtsi"
Peter Ujfalusi3f187f82012-07-26 17:01:32 +030012
13/ {
14 compatible = "ti,omap2430", "ti,omap2";
15
16 ocp {
Tero Kristo72b10ac2015-02-12 10:38:16 +020017 l4_wkup: l4_wkup@49000000 {
18 compatible = "ti,omap2-l4-wkup", "simple-bus";
Tony Lindgren679e3312012-09-10 10:34:51 -070019 #address-cells = <1>;
Tero Kristo72b10ac2015-02-12 10:38:16 +020020 #size-cells = <1>;
21 ranges = <0 0x49000000 0x31000>;
Tony Lindgren679e3312012-09-10 10:34:51 -070022
Tero Kristo72b10ac2015-02-12 10:38:16 +020023 prcm: prcm@6000 {
24 compatible = "ti,omap2-prcm";
25 reg = <0x6000 0x1000>;
Balaji T Kcd042fe2014-02-19 20:26:40 +053026
Tero Kristo72b10ac2015-02-12 10:38:16 +020027 prcm_clocks: clocks {
28 #address-cells = <1>;
29 #size-cells = <0>;
30 };
31
32 prcm_clockdomains: clockdomains {
33 };
34 };
35
36 scm: scm@2000 {
37 compatible = "ti,omap2-scm", "simple-bus";
38 reg = <0x2000 0x1000>;
39 #address-cells = <1>;
40 #size-cells = <1>;
41 ranges = <0 0x2000 0x1000>;
42
43 omap2430_pmx: pinmux@30 {
44 compatible = "ti,omap2430-padconf",
45 "pinctrl-single";
46 reg = <0x30 0x0154>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 pinctrl-single,register-width = <8>;
50 pinctrl-single,function-mask = <0x3f>;
51 };
52
53 scm_conf: scm_conf@270 {
Kishon Vijay Abraham I4317c8c2015-07-27 17:46:38 +053054 compatible = "syscon",
55 "simple-bus";
Tero Kristo72b10ac2015-02-12 10:38:16 +020056 reg = <0x270 0x240>;
57 #address-cells = <1>;
58 #size-cells = <1>;
Kishon Vijay Abraham I9a5e3f22015-09-04 17:38:24 +053059 ranges = <0 0x270 0x240>;
Tero Kristo72b10ac2015-02-12 10:38:16 +020060
61 scm_clocks: clocks {
62 #address-cells = <1>;
63 #size-cells = <0>;
64 };
65
Javier Martinez Canillas308cfda2016-04-01 16:20:18 -040066 pbias_regulator: pbias_regulator@230 {
Kishon Vijay Abraham I737f1462015-09-04 17:30:25 +053067 compatible = "ti,pbias-omap2", "ti,pbias-omap";
Tero Kristo72b10ac2015-02-12 10:38:16 +020068 reg = <0x230 0x4>;
69 syscon = <&scm_conf>;
70 pbias_mmc_reg: pbias_mmc_omap2430 {
71 regulator-name = "pbias_mmc_omap2430";
72 regulator-min-microvolt = <1800000>;
73 regulator-max-microvolt = <3000000>;
74 };
75 };
76 };
77
78 scm_clockdomains: clockdomains {
79 };
80 };
81
82 counter32k: counter@20000 {
83 compatible = "ti,omap-counter32k";
84 reg = <0x20000 0x20>;
85 ti,hwmods = "counter_32k";
Balaji T Kcd042fe2014-02-19 20:26:40 +053086 };
87 };
88
Jon Hunter423182e2013-02-28 15:32:00 -060089 gpio1: gpio@4900c000 {
90 compatible = "ti,omap2-gpio";
91 reg = <0x4900c000 0x200>;
92 interrupts = <29>;
93 ti,hwmods = "gpio1";
Jon Huntere4b9b9f2013-04-04 15:16:16 -050094 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -060095 #gpio-cells = <2>;
96 gpio-controller;
97 #interrupt-cells = <2>;
98 interrupt-controller;
99 };
100
101 gpio2: gpio@4900e000 {
102 compatible = "ti,omap2-gpio";
103 reg = <0x4900e000 0x200>;
104 interrupts = <30>;
105 ti,hwmods = "gpio2";
Jon Huntere4b9b9f2013-04-04 15:16:16 -0500106 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -0600107 #gpio-cells = <2>;
108 gpio-controller;
109 #interrupt-cells = <2>;
110 interrupt-controller;
111 };
112
113 gpio3: gpio@49010000 {
114 compatible = "ti,omap2-gpio";
115 reg = <0x49010000 0x200>;
116 interrupts = <31>;
117 ti,hwmods = "gpio3";
Jon Huntere4b9b9f2013-04-04 15:16:16 -0500118 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -0600119 #gpio-cells = <2>;
120 gpio-controller;
121 #interrupt-cells = <2>;
122 interrupt-controller;
123 };
124
125 gpio4: gpio@49012000 {
126 compatible = "ti,omap2-gpio";
127 reg = <0x49012000 0x200>;
128 interrupts = <32>;
129 ti,hwmods = "gpio4";
Jon Huntere4b9b9f2013-04-04 15:16:16 -0500130 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -0600131 #gpio-cells = <2>;
132 gpio-controller;
133 #interrupt-cells = <2>;
134 interrupt-controller;
135 };
136
137 gpio5: gpio@480b6000 {
138 compatible = "ti,omap2-gpio";
139 reg = <0x480b6000 0x200>;
140 interrupts = <33>;
141 ti,hwmods = "gpio5";
142 #gpio-cells = <2>;
143 gpio-controller;
144 #interrupt-cells = <2>;
145 interrupt-controller;
146 };
147
Jon Hunter1c7dbb52013-02-22 15:33:31 -0600148 gpmc: gpmc@6e000000 {
149 compatible = "ti,omap2430-gpmc";
150 reg = <0x6e000000 0x1000>;
151 #address-cells = <2>;
152 #size-cells = <1>;
153 interrupts = <20>;
154 gpmc,num-cs = <8>;
155 gpmc,num-waitpins = <4>;
156 ti,hwmods = "gpmc";
Roger Quadrosffee5bf2016-04-07 13:25:28 +0300157 interrupt-controller;
158 #interrupt-cells = <2>;
159 gpio-controller;
160 #gpio-cells = <2>;
Jon Hunter1c7dbb52013-02-22 15:33:31 -0600161 };
162
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300163 mcbsp1: mcbsp@48074000 {
164 compatible = "ti,omap2430-mcbsp";
165 reg = <0x48074000 0xff>;
166 reg-names = "mpu";
167 interrupts = <64>, /* OCP compliant interrupt */
168 <59>, /* TX interrupt */
169 <60>, /* RX interrupt */
170 <61>; /* RX overflow interrupt */
171 interrupt-names = "common", "tx", "rx", "rx_overflow";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300172 ti,buffer-size = <128>;
173 ti,hwmods = "mcbsp1";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100174 dmas = <&sdma 31>,
175 <&sdma 32>;
176 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200177 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300178 };
179
180 mcbsp2: mcbsp@48076000 {
181 compatible = "ti,omap2430-mcbsp";
182 reg = <0x48076000 0xff>;
183 reg-names = "mpu";
184 interrupts = <16>, /* OCP compliant interrupt */
185 <62>, /* TX interrupt */
186 <63>; /* RX interrupt */
187 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300188 ti,buffer-size = <128>;
189 ti,hwmods = "mcbsp2";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100190 dmas = <&sdma 33>,
191 <&sdma 34>;
192 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200193 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300194 };
195
196 mcbsp3: mcbsp@4808c000 {
197 compatible = "ti,omap2430-mcbsp";
198 reg = <0x4808c000 0xff>;
199 reg-names = "mpu";
200 interrupts = <17>, /* OCP compliant interrupt */
201 <89>, /* TX interrupt */
202 <90>; /* RX interrupt */
203 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300204 ti,buffer-size = <128>;
205 ti,hwmods = "mcbsp3";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100206 dmas = <&sdma 17>,
207 <&sdma 18>;
208 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200209 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300210 };
211
212 mcbsp4: mcbsp@4808e000 {
213 compatible = "ti,omap2430-mcbsp";
214 reg = <0x4808e000 0xff>;
215 reg-names = "mpu";
216 interrupts = <18>, /* OCP compliant interrupt */
217 <54>, /* TX interrupt */
218 <55>; /* RX interrupt */
219 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300220 ti,buffer-size = <128>;
221 ti,hwmods = "mcbsp4";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100222 dmas = <&sdma 19>,
223 <&sdma 20>;
224 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200225 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300226 };
227
228 mcbsp5: mcbsp@48096000 {
229 compatible = "ti,omap2430-mcbsp";
230 reg = <0x48096000 0xff>;
231 reg-names = "mpu";
232 interrupts = <19>, /* OCP compliant interrupt */
233 <81>, /* TX interrupt */
234 <82>; /* RX interrupt */
235 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300236 ti,buffer-size = <128>;
237 ti,hwmods = "mcbsp5";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100238 dmas = <&sdma 21>,
239 <&sdma 22>;
240 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200241 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300242 };
Jon Hunterfab8ad02012-10-19 09:59:00 -0500243
Tony Lindgren467f4bd2013-11-14 15:25:09 -0800244 mmc1: mmc@4809c000 {
245 compatible = "ti,omap2-hsmmc";
246 reg = <0x4809c000 0x200>;
247 interrupts = <83>;
248 ti,hwmods = "mmc1";
249 ti,dual-volt;
250 dmas = <&sdma 61>, <&sdma 62>;
251 dma-names = "tx", "rx";
Balaji T Kcd042fe2014-02-19 20:26:40 +0530252 pbias-supply = <&pbias_mmc_reg>;
Tony Lindgren467f4bd2013-11-14 15:25:09 -0800253 };
254
255 mmc2: mmc@480b4000 {
256 compatible = "ti,omap2-hsmmc";
257 reg = <0x480b4000 0x200>;
258 interrupts = <86>;
259 ti,hwmods = "mmc2";
260 dmas = <&sdma 47>, <&sdma 48>;
261 dma-names = "tx", "rx";
262 };
263
Suman Anna4fe5bd52014-04-22 17:23:36 -0500264 mailbox: mailbox@48094000 {
265 compatible = "ti,omap2-mailbox";
266 reg = <0x48094000 0x200>;
267 interrupts = <26>;
268 ti,hwmods = "mailbox";
Suman Anna24df0452014-11-03 17:07:35 -0600269 #mbox-cells = <1>;
Suman Anna41ffada2014-07-11 16:44:34 -0500270 ti,mbox-num-users = <4>;
271 ti,mbox-num-fifos = <6>;
Suman Annad27704d2014-09-10 14:27:23 -0500272 mbox_dsp: dsp {
273 ti,mbox-tx = <0 0 0>;
274 ti,mbox-rx = <1 0 0>;
275 };
Suman Anna4fe5bd52014-04-22 17:23:36 -0500276 };
277
Jon Hunterfab8ad02012-10-19 09:59:00 -0500278 timer1: timer@49018000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500279 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500280 reg = <0x49018000 0x400>;
281 interrupts = <37>;
282 ti,hwmods = "timer1";
283 ti,timer-alwon;
284 };
Tony Lindgren467f4bd2013-11-14 15:25:09 -0800285
286 mcspi3: mcspi@480b8000 {
287 compatible = "ti,omap2-mcspi";
288 ti,hwmods = "mcspi3";
289 reg = <0x480b8000 0x100>;
290 interrupts = <91>;
291 dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>;
292 dma-names = "tx0", "rx0", "tx1", "rx1";
293 };
294
295 usb_otg_hs: usb_otg_hs@480ac000 {
296 compatible = "ti,omap2-musb";
297 ti,hwmods = "usb_otg_hs";
298 reg = <0x480ac000 0x1000>;
299 interrupts = <93>;
300 };
301
302 wd_timer2: wdt@49016000 {
303 compatible = "ti,omap2-wdt";
304 ti,hwmods = "wd_timer2";
305 reg = <0x49016000 0x80>;
306 };
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300307 };
308};
Tony Lindgren467f4bd2013-11-14 15:25:09 -0800309
310&i2c1 {
311 compatible = "ti,omap2430-i2c";
312};
313
314&i2c2 {
315 compatible = "ti,omap2430-i2c";
316};
Tero Kristo69a1e7a2014-02-24 18:51:05 +0200317
318/include/ "omap24xx-clocks.dtsi"
319/include/ "omap2430-clocks.dtsi"