Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * descriptions + helper functions for simple dvb plls. |
| 3 | * |
| 4 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 19 | */ |
| 20 | |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/dvb/frontend.h> |
| 23 | #include <asm/types.h> |
| 24 | |
| 25 | #include "dvb-pll.h" |
| 26 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 27 | struct dvb_pll_desc { |
| 28 | char *name; |
| 29 | u32 min; |
| 30 | u32 max; |
| 31 | u32 iffreq; |
| 32 | void (*set)(u8 *buf, const struct dvb_frontend_parameters *params); |
| 33 | u8 *initdata; |
| 34 | u8 *sleepdata; |
| 35 | int count; |
| 36 | struct { |
| 37 | u32 limit; |
| 38 | u32 stepsize; |
| 39 | u8 config; |
| 40 | u8 cb; |
| 41 | } entries[12]; |
| 42 | }; |
| 43 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | /* ----------------------------------------------------------- */ |
| 45 | /* descriptions */ |
| 46 | |
Trent Piepho | 26aed92 | 2007-04-27 12:31:29 -0300 | [diff] [blame] | 47 | /* Set AGC TOP value to 103 dBuV: |
| 48 | 0x80 = Control Byte |
| 49 | 0x40 = 250 uA charge pump (irrelevant) |
| 50 | 0x18 = Aux Byte to follow |
| 51 | 0x06 = 64.5 kHz divider (irrelevant) |
| 52 | 0x01 = Disable Vt (aka sleep) |
| 53 | |
| 54 | 0x00 = AGC Time constant 2s Iagc = 300 nA (vs 0x80 = 9 nA) |
| 55 | 0x50 = AGC Take over point = 103 dBuV */ |
| 56 | static u8 tua603x_agc103[] = { 2, 0x80|0x40|0x18|0x06|0x01, 0x00|0x50 }; |
| 57 | |
Trent Piepho | b7754d7 | 2007-05-08 18:05:16 -0300 | [diff] [blame] | 58 | /* 0x04 = 166.67 kHz divider |
| 59 | |
| 60 | 0x80 = AGC Time constant 50ms Iagc = 9 uA |
| 61 | 0x20 = AGC Take over point = 112 dBuV */ |
| 62 | static u8 tua603x_agc112[] = { 2, 0x80|0x40|0x18|0x04|0x01, 0x80|0x20 }; |
| 63 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 64 | static struct dvb_pll_desc dvb_pll_thomson_dtt7579 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | .name = "Thomson dtt7579", |
| 66 | .min = 177000000, |
| 67 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 68 | .iffreq= 36166667, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 69 | .sleepdata = (u8[]){ 2, 0xb4, 0x03 }, |
| 70 | .count = 4, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 72 | { 443250000, 166667, 0xb4, 0x02 }, |
| 73 | { 542000000, 166667, 0xb4, 0x08 }, |
| 74 | { 771000000, 166667, 0xbc, 0x08 }, |
| 75 | { 999999999, 166667, 0xf4, 0x08 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | }, |
| 77 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 79 | static struct dvb_pll_desc dvb_pll_thomson_dtt7610 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | .name = "Thomson dtt7610", |
| 81 | .min = 44000000, |
| 82 | .max = 958000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 83 | .iffreq= 44000000, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | .count = 3, |
| 85 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 86 | { 157250000, 62500, 0x8e, 0x39 }, |
| 87 | { 454000000, 62500, 0x8e, 0x3a }, |
| 88 | { 999999999, 62500, 0x8e, 0x3c }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | }, |
| 90 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 92 | static void thomson_dtt759x_bw(u8 *buf, |
| 93 | const struct dvb_frontend_parameters *params) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | { |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 95 | if (BANDWIDTH_7_MHZ == params->u.ofdm.bandwidth) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | buf[3] |= 0x10; |
| 97 | } |
| 98 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 99 | static struct dvb_pll_desc dvb_pll_thomson_dtt759x = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 100 | .name = "Thomson dtt759x", |
| 101 | .min = 177000000, |
| 102 | .max = 896000000, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 103 | .set = thomson_dtt759x_bw, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 104 | .iffreq= 36166667, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 105 | .sleepdata = (u8[]){ 2, 0x84, 0x03 }, |
| 106 | .count = 5, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 107 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 108 | { 264000000, 166667, 0xb4, 0x02 }, |
| 109 | { 470000000, 166667, 0xbc, 0x02 }, |
| 110 | { 735000000, 166667, 0xbc, 0x08 }, |
| 111 | { 835000000, 166667, 0xf4, 0x08 }, |
| 112 | { 999999999, 166667, 0xfc, 0x08 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 113 | }, |
| 114 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 116 | static struct dvb_pll_desc dvb_pll_lg_z201 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | .name = "LG z201", |
| 118 | .min = 174000000, |
| 119 | .max = 862000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 120 | .iffreq= 36166667, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 121 | .sleepdata = (u8[]){ 2, 0xbc, 0x03 }, |
| 122 | .count = 5, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 123 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 124 | { 157500000, 166667, 0xbc, 0x01 }, |
| 125 | { 443250000, 166667, 0xbc, 0x02 }, |
| 126 | { 542000000, 166667, 0xbc, 0x04 }, |
| 127 | { 830000000, 166667, 0xf4, 0x04 }, |
| 128 | { 999999999, 166667, 0xfc, 0x04 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 129 | }, |
| 130 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 132 | static struct dvb_pll_desc dvb_pll_microtune_4042 = { |
Mac Michaels | d8667cb | 2005-07-07 17:58:29 -0700 | [diff] [blame] | 133 | .name = "Microtune 4042 FI5", |
| 134 | .min = 57000000, |
| 135 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 136 | .iffreq= 44000000, |
Mac Michaels | d8667cb | 2005-07-07 17:58:29 -0700 | [diff] [blame] | 137 | .count = 3, |
| 138 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 139 | { 162000000, 62500, 0x8e, 0xa1 }, |
| 140 | { 457000000, 62500, 0x8e, 0x91 }, |
| 141 | { 999999999, 62500, 0x8e, 0x31 }, |
Mac Michaels | d8667cb | 2005-07-07 17:58:29 -0700 | [diff] [blame] | 142 | }, |
| 143 | }; |
Mac Michaels | d8667cb | 2005-07-07 17:58:29 -0700 | [diff] [blame] | 144 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 145 | static struct dvb_pll_desc dvb_pll_thomson_dtt761x = { |
Michael Krufky | 83ac8722 | 2006-01-09 15:25:29 -0200 | [diff] [blame] | 146 | /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */ |
| 147 | .name = "Thomson dtt761x", |
| 148 | .min = 57000000, |
| 149 | .max = 863000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 150 | .iffreq= 44000000, |
Michael Krufky | 0d723c0 | 2005-07-07 17:58:42 -0700 | [diff] [blame] | 151 | .count = 3, |
Trent Piepho | 26aed92 | 2007-04-27 12:31:29 -0300 | [diff] [blame] | 152 | .initdata = tua603x_agc103, |
Michael Krufky | 0d723c0 | 2005-07-07 17:58:42 -0700 | [diff] [blame] | 153 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 154 | { 147000000, 62500, 0x8e, 0x39 }, |
| 155 | { 417000000, 62500, 0x8e, 0x3a }, |
| 156 | { 999999999, 62500, 0x8e, 0x3c }, |
Michael Krufky | 0d723c0 | 2005-07-07 17:58:42 -0700 | [diff] [blame] | 157 | }, |
| 158 | }; |
Michael Krufky | 0d723c0 | 2005-07-07 17:58:42 -0700 | [diff] [blame] | 159 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 160 | static struct dvb_pll_desc dvb_pll_unknown_1 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | .name = "unknown 1", /* used by dntv live dvb-t */ |
| 162 | .min = 174000000, |
| 163 | .max = 862000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 164 | .iffreq= 36166667, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | .count = 9, |
| 166 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 167 | { 150000000, 166667, 0xb4, 0x01 }, |
| 168 | { 173000000, 166667, 0xbc, 0x01 }, |
| 169 | { 250000000, 166667, 0xb4, 0x02 }, |
| 170 | { 400000000, 166667, 0xbc, 0x02 }, |
| 171 | { 420000000, 166667, 0xf4, 0x02 }, |
| 172 | { 470000000, 166667, 0xfc, 0x02 }, |
| 173 | { 600000000, 166667, 0xbc, 0x08 }, |
| 174 | { 730000000, 166667, 0xf4, 0x08 }, |
| 175 | { 999999999, 166667, 0xfc, 0x08 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 176 | }, |
| 177 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 179 | /* Infineon TUA6010XS |
| 180 | * used in Thomson Cable Tuner |
| 181 | */ |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 182 | static struct dvb_pll_desc dvb_pll_tua6010xs = { |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 183 | .name = "Infineon TUA6010XS", |
| 184 | .min = 44250000, |
| 185 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 186 | .iffreq= 36125000, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 187 | .count = 3, |
| 188 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 189 | { 115750000, 62500, 0x8e, 0x03 }, |
| 190 | { 403250000, 62500, 0x8e, 0x06 }, |
| 191 | { 999999999, 62500, 0x8e, 0x85 }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 192 | }, |
| 193 | }; |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 194 | |
| 195 | /* Panasonic env57h1xd5 (some Philips PLL ?) */ |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 196 | static struct dvb_pll_desc dvb_pll_env57h1xd5 = { |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 197 | .name = "Panasonic ENV57H1XD5", |
| 198 | .min = 44250000, |
| 199 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 200 | .iffreq= 36125000, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 201 | .count = 4, |
| 202 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 203 | { 153000000, 166667, 0xc2, 0x41 }, |
| 204 | { 470000000, 166667, 0xc2, 0x42 }, |
| 205 | { 526000000, 166667, 0xc2, 0x84 }, |
| 206 | { 999999999, 166667, 0xc2, 0xa4 }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 207 | }, |
| 208 | }; |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 209 | |
| 210 | /* Philips TDA6650/TDA6651 |
| 211 | * used in Panasonic ENV77H11D5 |
| 212 | */ |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 213 | static void tda665x_bw(u8 *buf, const struct dvb_frontend_parameters *params) |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 214 | { |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 215 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 216 | buf[3] |= 0x08; |
| 217 | } |
| 218 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 219 | static struct dvb_pll_desc dvb_pll_tda665x = { |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 220 | .name = "Philips TDA6650/TDA6651", |
| 221 | .min = 44250000, |
| 222 | .max = 858000000, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 223 | .set = tda665x_bw, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 224 | .iffreq= 36166667, |
Michael Krufky | fbfee86 | 2007-05-09 15:58:17 -0300 | [diff] [blame] | 225 | .initdata = (u8[]){ 4, 0x0b, 0xf5, 0x85, 0xab }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 226 | .count = 12, |
| 227 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 228 | { 93834000, 166667, 0xca, 0x61 /* 011 0 0 0 01 */ }, |
| 229 | { 123834000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ }, |
| 230 | { 161000000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ }, |
| 231 | { 163834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ }, |
| 232 | { 253834000, 166667, 0xca, 0x62 /* 011 0 0 0 10 */ }, |
| 233 | { 383834000, 166667, 0xca, 0xa2 /* 101 0 0 0 10 */ }, |
| 234 | { 443834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ }, |
| 235 | { 444000000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ }, |
| 236 | { 583834000, 166667, 0xca, 0x64 /* 011 0 0 1 00 */ }, |
| 237 | { 793834000, 166667, 0xca, 0xa4 /* 101 0 0 1 00 */ }, |
| 238 | { 444834000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ }, |
| 239 | { 861000000, 166667, 0xca, 0xe4 /* 111 0 0 1 00 */ }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 240 | } |
| 241 | }; |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 242 | |
| 243 | /* Infineon TUA6034 |
| 244 | * used in LG TDTP E102P |
| 245 | */ |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 246 | static void tua6034_bw(u8 *buf, const struct dvb_frontend_parameters *params) |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 247 | { |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 248 | if (BANDWIDTH_7_MHZ != params->u.ofdm.bandwidth) |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 249 | buf[3] |= 0x08; |
| 250 | } |
| 251 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 252 | static struct dvb_pll_desc dvb_pll_tua6034 = { |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 253 | .name = "Infineon TUA6034", |
| 254 | .min = 44250000, |
| 255 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 256 | .iffreq= 36166667, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 257 | .count = 3, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 258 | .set = tua6034_bw, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 259 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 260 | { 174500000, 62500, 0xce, 0x01 }, |
| 261 | { 230000000, 62500, 0xce, 0x02 }, |
| 262 | { 999999999, 62500, 0xce, 0x04 }, |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 263 | }, |
| 264 | }; |
Johannes Stezenbach | 776338e | 2005-06-23 22:02:35 -0700 | [diff] [blame] | 265 | |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 266 | /* Infineon TUA6034 |
Michael Krufky | d9e12f2 | 2006-04-22 16:15:11 -0300 | [diff] [blame] | 267 | * used in LG TDVS-H061F, LG TDVS-H062F and LG TDVS-H064F |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 268 | */ |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 269 | static struct dvb_pll_desc dvb_pll_lg_tdvs_h06xf = { |
Michael Krufky | d9e12f2 | 2006-04-22 16:15:11 -0300 | [diff] [blame] | 270 | .name = "LG TDVS-H06xF", |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 271 | .min = 54000000, |
| 272 | .max = 863000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 273 | .iffreq= 44000000, |
Trent Piepho | 6bdcc6e | 2007-04-27 12:31:30 -0300 | [diff] [blame] | 274 | .initdata = tua603x_agc103, |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 275 | .count = 3, |
| 276 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 277 | { 165000000, 62500, 0xce, 0x01 }, |
| 278 | { 450000000, 62500, 0xce, 0x02 }, |
| 279 | { 999999999, 62500, 0xce, 0x04 }, |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 280 | }, |
| 281 | }; |
Michael Krufky | 1963c90 | 2005-08-08 09:22:43 -0700 | [diff] [blame] | 282 | |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 283 | /* Philips FMD1216ME |
| 284 | * used in Medion Hybrid PCMCIA card and USB Box |
| 285 | */ |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 286 | static void fmd1216me_bw(u8 *buf, const struct dvb_frontend_parameters *params) |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 287 | { |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 288 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ && |
| 289 | params->frequency >= 158870000) |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 290 | buf[3] |= 0x08; |
| 291 | } |
| 292 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 293 | static struct dvb_pll_desc dvb_pll_fmd1216me = { |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 294 | .name = "Philips FMD1216ME", |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 295 | .min = 50870000, |
| 296 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 297 | .iffreq= 36125000, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 298 | .set = fmd1216me_bw, |
Trent Piepho | b7754d7 | 2007-05-08 18:05:16 -0300 | [diff] [blame] | 299 | .initdata = tua603x_agc112, |
| 300 | .sleepdata = (u8[]){ 4, 0x9c, 0x60, 0x85, 0x54 }, |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 301 | .count = 7, |
| 302 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 303 | { 143870000, 166667, 0xbc, 0x41 }, |
| 304 | { 158870000, 166667, 0xf4, 0x41 }, |
| 305 | { 329870000, 166667, 0xbc, 0x42 }, |
| 306 | { 441870000, 166667, 0xf4, 0x42 }, |
| 307 | { 625870000, 166667, 0xbc, 0x44 }, |
| 308 | { 803870000, 166667, 0xf4, 0x44 }, |
| 309 | { 999999999, 166667, 0xfc, 0x44 }, |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 310 | } |
| 311 | }; |
Patrick Boettcher | 49dc82f | 2005-07-07 17:58:09 -0700 | [diff] [blame] | 312 | |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 313 | /* ALPS TDED4 |
| 314 | * used in Nebula-Cards and USB boxes |
| 315 | */ |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 316 | static void tded4_bw(u8 *buf, const struct dvb_frontend_parameters *params) |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 317 | { |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 318 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 319 | buf[3] |= 0x04; |
| 320 | } |
| 321 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 322 | static struct dvb_pll_desc dvb_pll_tded4 = { |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 323 | .name = "ALPS TDED4", |
| 324 | .min = 47000000, |
| 325 | .max = 863000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 326 | .iffreq= 36166667, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 327 | .set = tded4_bw, |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 328 | .count = 4, |
| 329 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 330 | { 153000000, 166667, 0x85, 0x01 }, |
| 331 | { 470000000, 166667, 0x85, 0x02 }, |
| 332 | { 823000000, 166667, 0x85, 0x08 }, |
| 333 | { 999999999, 166667, 0x85, 0x88 }, |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 334 | } |
| 335 | }; |
Patrick Boettcher | 0589b8e | 2005-07-07 17:58:12 -0700 | [diff] [blame] | 336 | |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 337 | /* ALPS TDHU2 |
| 338 | * used in AverTVHD MCE A180 |
| 339 | */ |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 340 | static struct dvb_pll_desc dvb_pll_tdhu2 = { |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 341 | .name = "ALPS TDHU2", |
| 342 | .min = 54000000, |
| 343 | .max = 864000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 344 | .iffreq= 44000000, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 345 | .count = 4, |
| 346 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 347 | { 162000000, 62500, 0x85, 0x01 }, |
| 348 | { 426000000, 62500, 0x85, 0x02 }, |
| 349 | { 782000000, 62500, 0x85, 0x08 }, |
| 350 | { 999999999, 62500, 0x85, 0x88 }, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 351 | } |
| 352 | }; |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 353 | |
| 354 | /* Philips TUV1236D |
| 355 | * used in ATI HDTV Wonder |
| 356 | */ |
Michael Krufky | 4abe9f9 | 2007-05-05 12:15:57 -0300 | [diff] [blame] | 357 | static void tuv1236d_rf(u8 *buf, const struct dvb_frontend_parameters *params) |
| 358 | { |
| 359 | switch (params->u.vsb.modulation) { |
| 360 | case QAM_64: |
| 361 | case QAM_256: |
| 362 | buf[3] |= 0x08; |
| 363 | break; |
| 364 | case VSB_8: |
| 365 | default: |
| 366 | buf[3] &= ~0x08; |
| 367 | } |
| 368 | } |
| 369 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 370 | static struct dvb_pll_desc dvb_pll_tuv1236d = { |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 371 | .name = "Philips TUV1236D", |
Kirk Lapray | 04a4592 | 2005-11-08 21:35:46 -0800 | [diff] [blame] | 372 | .min = 54000000, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 373 | .max = 864000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 374 | .iffreq= 44000000, |
Michael Krufky | 4abe9f9 | 2007-05-05 12:15:57 -0300 | [diff] [blame] | 375 | .set = tuv1236d_rf, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 376 | .count = 3, |
| 377 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 378 | { 157250000, 62500, 0xc6, 0x41 }, |
| 379 | { 454000000, 62500, 0xc6, 0x42 }, |
| 380 | { 999999999, 62500, 0xc6, 0x44 }, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 381 | }, |
| 382 | }; |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 383 | |
Michael Krufky | d76a617 | 2006-01-23 17:11:06 -0200 | [diff] [blame] | 384 | /* Samsung TBMV30111IN / TBMV30712IN1 |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 385 | * used in Air2PC ATSC - 2nd generation (nxt2002) |
| 386 | */ |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 387 | static struct dvb_pll_desc dvb_pll_samsung_tbmv = { |
Michael Krufky | 28f3d4b | 2006-01-23 17:11:07 -0200 | [diff] [blame] | 388 | .name = "Samsung TBMV30111IN / TBMV30712IN1", |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 389 | .min = 54000000, |
| 390 | .max = 860000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 391 | .iffreq= 44000000, |
Michael Krufky | 17c37ef | 2006-01-15 19:04:04 -0200 | [diff] [blame] | 392 | .count = 6, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 393 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 394 | { 172000000, 166667, 0xb4, 0x01 }, |
| 395 | { 214000000, 166667, 0xb4, 0x02 }, |
| 396 | { 467000000, 166667, 0xbc, 0x02 }, |
| 397 | { 721000000, 166667, 0xbc, 0x08 }, |
| 398 | { 841000000, 166667, 0xf4, 0x08 }, |
| 399 | { 999999999, 166667, 0xfc, 0x02 }, |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 400 | } |
| 401 | }; |
Kirk Lapray | 147418c | 2005-11-08 21:35:39 -0800 | [diff] [blame] | 402 | |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 403 | /* |
| 404 | * Philips SD1878 Tuner. |
| 405 | */ |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 406 | static struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = { |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 407 | .name = "Philips SD1878", |
| 408 | .min = 950000, |
| 409 | .max = 2150000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 410 | .iffreq= 249, /* zero-IF, offset 249 is to round up */ |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 411 | .count = 4, |
| 412 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 413 | { 1250000, 500, 0xc4, 0x00}, |
| 414 | { 1550000, 500, 0xc4, 0x40}, |
| 415 | { 2050000, 500, 0xc4, 0x80}, |
| 416 | { 2150000, 500, 0xc4, 0xc0}, |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 417 | }, |
| 418 | }; |
Regis Prevot | f8bf134 | 2006-01-11 23:31:53 -0200 | [diff] [blame] | 419 | |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 420 | /* |
| 421 | * Philips TD1316 Tuner. |
| 422 | */ |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 423 | static void td1316_bw(u8 *buf, const struct dvb_frontend_parameters *params) |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 424 | { |
| 425 | u8 band; |
| 426 | |
| 427 | /* determine band */ |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 428 | if (params->frequency < 161000000) |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 429 | band = 1; |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 430 | else if (params->frequency < 444000000) |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 431 | band = 2; |
| 432 | else |
| 433 | band = 4; |
| 434 | |
| 435 | buf[3] |= band; |
| 436 | |
| 437 | /* setup PLL filter */ |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 438 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 439 | buf[3] |= 1 << 3; |
| 440 | } |
| 441 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 442 | static struct dvb_pll_desc dvb_pll_philips_td1316 = { |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 443 | .name = "Philips TD1316", |
| 444 | .min = 87000000, |
| 445 | .max = 895000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 446 | .iffreq= 36166667, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 447 | .set = td1316_bw, |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 448 | .count = 9, |
| 449 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 450 | { 93834000, 166667, 0xca, 0x60}, |
| 451 | { 123834000, 166667, 0xca, 0xa0}, |
| 452 | { 163834000, 166667, 0xca, 0xc0}, |
| 453 | { 253834000, 166667, 0xca, 0x60}, |
| 454 | { 383834000, 166667, 0xca, 0xa0}, |
| 455 | { 443834000, 166667, 0xca, 0xc0}, |
| 456 | { 583834000, 166667, 0xca, 0x60}, |
| 457 | { 793834000, 166667, 0xca, 0xa0}, |
| 458 | { 858834000, 166667, 0xca, 0xe0}, |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 459 | }, |
| 460 | }; |
Jose Alberto Reguero | a78d0bf | 2006-02-07 06:25:14 -0200 | [diff] [blame] | 461 | |
Chris Pascoe | 780dfef | 2006-02-28 08:34:59 -0300 | [diff] [blame] | 462 | /* FE6600 used on DViCO Hybrid */ |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 463 | static struct dvb_pll_desc dvb_pll_thomson_fe6600 = { |
Michael Krufky | 91ae329 | 2006-03-01 00:04:42 -0300 | [diff] [blame] | 464 | .name = "Thomson FE6600", |
Chris Pascoe | 780dfef | 2006-02-28 08:34:59 -0300 | [diff] [blame] | 465 | .min = 44250000, |
| 466 | .max = 858000000, |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 467 | .iffreq= 36125000, |
Chris Pascoe | 780dfef | 2006-02-28 08:34:59 -0300 | [diff] [blame] | 468 | .count = 4, |
| 469 | .entries = { |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 470 | { 250000000, 166667, 0xb4, 0x12 }, |
| 471 | { 455000000, 166667, 0xfe, 0x11 }, |
| 472 | { 775500000, 166667, 0xbc, 0x18 }, |
| 473 | { 999999999, 166667, 0xf4, 0x18 }, |
Chris Pascoe | 780dfef | 2006-02-28 08:34:59 -0300 | [diff] [blame] | 474 | } |
| 475 | }; |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 476 | |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 477 | static void opera1_bw(u8 *buf, const struct dvb_frontend_parameters *params) |
Marco Gittler | 941491f | 2007-04-19 11:26:47 -0300 | [diff] [blame] | 478 | { |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 479 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) |
Marco Gittler | 941491f | 2007-04-19 11:26:47 -0300 | [diff] [blame] | 480 | buf[2] |= 0x08; |
| 481 | } |
| 482 | |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 483 | static struct dvb_pll_desc dvb_pll_opera1 = { |
Marco Gittler | 941491f | 2007-04-19 11:26:47 -0300 | [diff] [blame] | 484 | .name = "Opera Tuner", |
| 485 | .min = 900000, |
| 486 | .max = 2250000, |
| 487 | .iffreq= 0, |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 488 | .set = opera1_bw, |
Marco Gittler | 941491f | 2007-04-19 11:26:47 -0300 | [diff] [blame] | 489 | .count = 8, |
| 490 | .entries = { |
| 491 | { 1064000, 500, 0xe5, 0xc6 }, |
| 492 | { 1169000, 500, 0xe5, 0xe6 }, |
| 493 | { 1299000, 500, 0xe5, 0x24 }, |
| 494 | { 1444000, 500, 0xe5, 0x44 }, |
| 495 | { 1606000, 500, 0xe5, 0x64 }, |
| 496 | { 1777000, 500, 0xe5, 0x84 }, |
| 497 | { 1941000, 500, 0xe5, 0xa4 }, |
| 498 | { 2250000, 500, 0xe5, 0xc4 }, |
| 499 | } |
| 500 | }; |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 501 | |
| 502 | /* ----------------------------------------------------------- */ |
| 503 | |
| 504 | static struct dvb_pll_desc *pll_list[] = { |
| 505 | [DVB_PLL_UNDEFINED] = NULL, |
| 506 | [DVB_PLL_THOMSON_DTT7579] = &dvb_pll_thomson_dtt7579, |
| 507 | [DVB_PLL_THOMSON_DTT759X] = &dvb_pll_thomson_dtt759x, |
| 508 | [DVB_PLL_THOMSON_DTT7610] = &dvb_pll_thomson_dtt7610, |
| 509 | [DVB_PLL_LG_Z201] = &dvb_pll_lg_z201, |
| 510 | [DVB_PLL_MICROTUNE_4042] = &dvb_pll_microtune_4042, |
| 511 | [DVB_PLL_THOMSON_DTT761X] = &dvb_pll_thomson_dtt761x, |
| 512 | [DVB_PLL_UNKNOWN_1] = &dvb_pll_unknown_1, |
| 513 | [DVB_PLL_TUA6010XS] = &dvb_pll_tua6010xs, |
| 514 | [DVB_PLL_ENV57H1XD5] = &dvb_pll_env57h1xd5, |
| 515 | [DVB_PLL_TUA6034] = &dvb_pll_tua6034, |
| 516 | [DVB_PLL_LG_TDVS_H06XF] = &dvb_pll_lg_tdvs_h06xf, |
| 517 | [DVB_PLL_TDA665X] = &dvb_pll_tda665x, |
| 518 | [DVB_PLL_FMD1216ME] = &dvb_pll_fmd1216me, |
| 519 | [DVB_PLL_TDED4] = &dvb_pll_tded4, |
| 520 | [DVB_PLL_TUV1236D] = &dvb_pll_tuv1236d, |
| 521 | [DVB_PLL_TDHU2] = &dvb_pll_tdhu2, |
| 522 | [DVB_PLL_SAMSUNG_TBMV] = &dvb_pll_samsung_tbmv, |
| 523 | [DVB_PLL_PHILIPS_SD1878_TDA8261] = &dvb_pll_philips_sd1878_tda8261, |
| 524 | [DVB_PLL_PHILIPS_TD1316] = &dvb_pll_philips_td1316, |
| 525 | [DVB_PLL_THOMSON_FE6600] = &dvb_pll_thomson_fe6600, |
| 526 | [DVB_PLL_OPERA1] = &dvb_pll_opera1, |
| 527 | }; |
| 528 | |
| 529 | /* ----------------------------------------------------------- */ |
Chris Pascoe | 780dfef | 2006-02-28 08:34:59 -0300 | [diff] [blame] | 530 | |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 531 | struct dvb_pll_priv { |
| 532 | /* i2c details */ |
| 533 | int pll_i2c_address; |
| 534 | struct i2c_adapter *i2c; |
| 535 | |
| 536 | /* the PLL descriptor */ |
| 537 | struct dvb_pll_desc *pll_desc; |
| 538 | |
| 539 | /* cached frequency/bandwidth */ |
| 540 | u32 frequency; |
| 541 | u32 bandwidth; |
| 542 | }; |
| 543 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 544 | /* ----------------------------------------------------------- */ |
| 545 | /* code */ |
| 546 | |
| 547 | static int debug = 0; |
| 548 | module_param(debug, int, 0644); |
| 549 | MODULE_PARM_DESC(debug, "enable verbose debug messages"); |
| 550 | |
Trent Piepho | 4ce1567 | 2007-06-02 16:30:46 -0300 | [diff] [blame] | 551 | static int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf, |
| 552 | const struct dvb_frontend_parameters *params) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 553 | { |
| 554 | u32 div; |
| 555 | int i; |
| 556 | |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 557 | if (params->frequency != 0 && (params->frequency < desc->min || |
| 558 | params->frequency > desc->max)) |
| 559 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 560 | |
| 561 | for (i = 0; i < desc->count; i++) { |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 562 | if (params->frequency > desc->entries[i].limit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 563 | continue; |
| 564 | break; |
| 565 | } |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 566 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 567 | if (debug) |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 568 | printk("pll: %s: freq=%d | i=%d/%d\n", desc->name, |
| 569 | params->frequency, i, desc->count); |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 570 | if (i == desc->count) |
| 571 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 572 | |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 573 | div = (params->frequency + desc->iffreq + |
| 574 | desc->entries[i].stepsize/2) / desc->entries[i].stepsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 575 | buf[0] = div >> 8; |
| 576 | buf[1] = div & 0xff; |
Michael Krufky | ab66b22 | 2006-01-23 17:11:11 -0200 | [diff] [blame] | 577 | buf[2] = desc->entries[i].config; |
| 578 | buf[3] = desc->entries[i].cb; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 580 | if (desc->set) |
| 581 | desc->set(buf, params); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | |
| 583 | if (debug) |
| 584 | printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n", |
| 585 | desc->name, div, buf[0], buf[1], buf[2], buf[3]); |
| 586 | |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 587 | // calculate the frequency we set it to |
Trent Piepho | df78cb0 | 2007-03-19 02:24:04 -0300 | [diff] [blame] | 588 | return (div * desc->entries[i].stepsize) - desc->iffreq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | } |
| 590 | EXPORT_SYMBOL(dvb_pll_configure); |
| 591 | |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 592 | static int dvb_pll_release(struct dvb_frontend *fe) |
| 593 | { |
Michael Krufky | 2213918 | 2006-11-19 19:49:11 -0300 | [diff] [blame] | 594 | kfree(fe->tuner_priv); |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 595 | fe->tuner_priv = NULL; |
| 596 | return 0; |
| 597 | } |
| 598 | |
| 599 | static int dvb_pll_sleep(struct dvb_frontend *fe) |
| 600 | { |
| 601 | struct dvb_pll_priv *priv = fe->tuner_priv; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 602 | |
Chris Pascoe | c162dff | 2006-08-08 15:48:08 -0300 | [diff] [blame] | 603 | if (priv->i2c == NULL) |
| 604 | return -EINVAL; |
| 605 | |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 606 | if (priv->pll_desc->sleepdata) { |
| 607 | struct i2c_msg msg = { .flags = 0, |
| 608 | .addr = priv->pll_i2c_address, |
| 609 | .buf = priv->pll_desc->sleepdata + 1, |
| 610 | .len = priv->pll_desc->sleepdata[0] }; |
| 611 | |
| 612 | int result; |
| 613 | |
| 614 | if (fe->ops.i2c_gate_ctrl) |
| 615 | fe->ops.i2c_gate_ctrl(fe, 1); |
| 616 | if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) { |
| 617 | return result; |
| 618 | } |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 619 | return 0; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 620 | } |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 621 | /* Shouldn't be called when initdata is NULL, maybe BUG()? */ |
| 622 | return -EINVAL; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 623 | } |
| 624 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 625 | static int dvb_pll_set_params(struct dvb_frontend *fe, |
| 626 | struct dvb_frontend_parameters *params) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 627 | { |
| 628 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 629 | u8 buf[4]; |
| 630 | struct i2c_msg msg = |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 631 | { .addr = priv->pll_i2c_address, .flags = 0, |
| 632 | .buf = buf, .len = sizeof(buf) }; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 633 | int result; |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 634 | u32 frequency = 0; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 635 | |
| 636 | if (priv->i2c == NULL) |
| 637 | return -EINVAL; |
| 638 | |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 639 | if ((result = dvb_pll_configure(priv->pll_desc, buf, params)) < 0) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 640 | return result; |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 641 | else |
| 642 | frequency = result; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 643 | |
Patrick Boettcher | dea7486 | 2006-05-14 05:01:31 -0300 | [diff] [blame] | 644 | if (fe->ops.i2c_gate_ctrl) |
| 645 | fe->ops.i2c_gate_ctrl(fe, 1); |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 646 | if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) { |
| 647 | return result; |
| 648 | } |
| 649 | |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 650 | priv->frequency = frequency; |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 651 | priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 652 | |
| 653 | return 0; |
| 654 | } |
| 655 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 656 | static int dvb_pll_calc_regs(struct dvb_frontend *fe, |
| 657 | struct dvb_frontend_parameters *params, |
| 658 | u8 *buf, int buf_len) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 659 | { |
| 660 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 661 | int result; |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 662 | u32 frequency = 0; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 663 | |
| 664 | if (buf_len < 5) |
| 665 | return -EINVAL; |
| 666 | |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 667 | if ((result = dvb_pll_configure(priv->pll_desc, buf+1, params)) < 0) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 668 | return result; |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 669 | else |
| 670 | frequency = result; |
| 671 | |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 672 | buf[0] = priv->pll_i2c_address; |
| 673 | |
Michael Krufky | 89faeef | 2006-11-20 16:45:29 -0300 | [diff] [blame] | 674 | priv->frequency = frequency; |
Michael Krufky | 77d6750 | 2007-05-05 12:05:39 -0300 | [diff] [blame] | 675 | priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 676 | |
| 677 | return 5; |
| 678 | } |
| 679 | |
| 680 | static int dvb_pll_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
| 681 | { |
| 682 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 683 | *frequency = priv->frequency; |
| 684 | return 0; |
| 685 | } |
| 686 | |
| 687 | static int dvb_pll_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) |
| 688 | { |
| 689 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 690 | *bandwidth = priv->bandwidth; |
| 691 | return 0; |
| 692 | } |
| 693 | |
Trent Piepho | 26aed92 | 2007-04-27 12:31:29 -0300 | [diff] [blame] | 694 | static int dvb_pll_init(struct dvb_frontend *fe) |
| 695 | { |
| 696 | struct dvb_pll_priv *priv = fe->tuner_priv; |
| 697 | |
| 698 | if (priv->i2c == NULL) |
| 699 | return -EINVAL; |
| 700 | |
| 701 | if (priv->pll_desc->initdata) { |
| 702 | struct i2c_msg msg = { .flags = 0, |
| 703 | .addr = priv->pll_i2c_address, |
| 704 | .buf = priv->pll_desc->initdata + 1, |
| 705 | .len = priv->pll_desc->initdata[0] }; |
| 706 | |
| 707 | int result; |
| 708 | if (fe->ops.i2c_gate_ctrl) |
| 709 | fe->ops.i2c_gate_ctrl(fe, 1); |
| 710 | if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) { |
| 711 | return result; |
| 712 | } |
| 713 | return 0; |
| 714 | } |
| 715 | /* Shouldn't be called when initdata is NULL, maybe BUG()? */ |
| 716 | return -EINVAL; |
| 717 | } |
| 718 | |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 719 | static struct dvb_tuner_ops dvb_pll_tuner_ops = { |
| 720 | .release = dvb_pll_release, |
| 721 | .sleep = dvb_pll_sleep, |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 722 | .init = dvb_pll_init, |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 723 | .set_params = dvb_pll_set_params, |
Andrew de Quincey | bd4956b | 2006-04-18 21:38:49 -0300 | [diff] [blame] | 724 | .calc_regs = dvb_pll_calc_regs, |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 725 | .get_frequency = dvb_pll_get_frequency, |
| 726 | .get_bandwidth = dvb_pll_get_bandwidth, |
| 727 | }; |
| 728 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 729 | struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr, |
| 730 | struct i2c_adapter *i2c, |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 731 | unsigned int pll_desc_id) |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 732 | { |
Andrew de Quincey | 061b623 | 2006-07-10 03:34:14 -0300 | [diff] [blame] | 733 | u8 b1 [] = { 0 }; |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 734 | struct i2c_msg msg = { .addr = pll_addr, .flags = I2C_M_RD, |
| 735 | .buf = b1, .len = 1 }; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 736 | struct dvb_pll_priv *priv = NULL; |
Andrew de Quincey | 061b623 | 2006-07-10 03:34:14 -0300 | [diff] [blame] | 737 | int ret; |
Michael Krufky | 47a9991 | 2007-06-12 16:10:51 -0300 | [diff] [blame^] | 738 | struct dvb_pll_desc *desc; |
| 739 | |
| 740 | BUG_ON(pll_desc_id < 1 || pll_desc_id >= ARRAY_SIZE(pll_list)); |
| 741 | |
| 742 | desc = pll_list[pll_desc_id]; |
Andrew de Quincey | 061b623 | 2006-07-10 03:34:14 -0300 | [diff] [blame] | 743 | |
Andrew de Quincey | 55c05b6 | 2006-07-16 19:41:41 -0300 | [diff] [blame] | 744 | if (i2c != NULL) { |
| 745 | if (fe->ops.i2c_gate_ctrl) |
| 746 | fe->ops.i2c_gate_ctrl(fe, 1); |
Andrew de Quincey | 061b623 | 2006-07-10 03:34:14 -0300 | [diff] [blame] | 747 | |
Andrew de Quincey | 95faba2 | 2006-07-18 16:37:13 -0300 | [diff] [blame] | 748 | ret = i2c_transfer (i2c, &msg, 1); |
| 749 | if (ret != 1) |
Andrew de Quincey | 2bfe031 | 2006-08-08 09:10:08 -0300 | [diff] [blame] | 750 | return NULL; |
Andrew de Quincey | 55c05b6 | 2006-07-16 19:41:41 -0300 | [diff] [blame] | 751 | if (fe->ops.i2c_gate_ctrl) |
| 752 | fe->ops.i2c_gate_ctrl(fe, 0); |
| 753 | } |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 754 | |
| 755 | priv = kzalloc(sizeof(struct dvb_pll_priv), GFP_KERNEL); |
| 756 | if (priv == NULL) |
Andrew de Quincey | 2bfe031 | 2006-08-08 09:10:08 -0300 | [diff] [blame] | 757 | return NULL; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 758 | |
| 759 | priv->pll_i2c_address = pll_addr; |
| 760 | priv->i2c = i2c; |
| 761 | priv->pll_desc = desc; |
| 762 | |
Michael Krufky | 47ae9ae | 2006-11-20 16:38:42 -0300 | [diff] [blame] | 763 | memcpy(&fe->ops.tuner_ops, &dvb_pll_tuner_ops, |
| 764 | sizeof(struct dvb_tuner_ops)); |
| 765 | |
Trent Piepho | 982dd1b | 2007-04-27 12:31:27 -0300 | [diff] [blame] | 766 | strncpy(fe->ops.tuner_ops.info.name, desc->name, |
| 767 | sizeof(fe->ops.tuner_ops.info.name)); |
Patrick Boettcher | dea7486 | 2006-05-14 05:01:31 -0300 | [diff] [blame] | 768 | fe->ops.tuner_ops.info.frequency_min = desc->min; |
| 769 | fe->ops.tuner_ops.info.frequency_min = desc->max; |
Trent Piepho | d519dcf | 2007-03-19 02:24:09 -0300 | [diff] [blame] | 770 | if (!desc->initdata) |
| 771 | fe->ops.tuner_ops.init = NULL; |
| 772 | if (!desc->sleepdata) |
| 773 | fe->ops.tuner_ops.sleep = NULL; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 774 | |
| 775 | fe->tuner_priv = priv; |
Andrew de Quincey | 2bfe031 | 2006-08-08 09:10:08 -0300 | [diff] [blame] | 776 | return fe; |
Andrew de Quincey | 272bc4d | 2006-04-18 17:47:12 -0300 | [diff] [blame] | 777 | } |
| 778 | EXPORT_SYMBOL(dvb_pll_attach); |
| 779 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 780 | MODULE_DESCRIPTION("dvb pll library"); |
| 781 | MODULE_AUTHOR("Gerd Knorr"); |
| 782 | MODULE_LICENSE("GPL"); |