blob: 6395ca2641cbe9eeb75b5161f13436ce4829e9ad [file] [log] [blame]
Jack Phamf4baeb12017-02-03 19:01:48 -08001/* Copyright (c) 2016-2017, Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/slab.h>
16#include <linux/regmap.h>
17#include <linux/regulator/consumer.h>
18#include <linux/interrupt.h>
19#include <linux/platform_device.h>
20#include <linux/delay.h>
21#include <linux/of.h>
22#include <linux/irq.h>
23#include <linux/of_irq.h>
24#include <linux/debugfs.h>
25#include <linux/seq_file.h>
26#include <linux/sched.h>
27#include <linux/wait.h>
28#include "usbpd.h"
29
30#define USB_PDPHY_MAX_DATA_OBJ_LEN 28
31#define USB_PDPHY_MSG_HDR_LEN 2
32
33/* PD PHY register offsets and bit fields */
34#define USB_PDPHY_MSG_CONFIG 0x40
35#define MSG_CONFIG_PORT_DATA_ROLE BIT(3)
36#define MSG_CONFIG_PORT_POWER_ROLE BIT(2)
37#define MSG_CONFIG_SPEC_REV_MASK (BIT(1) | BIT(0))
38
39#define USB_PDPHY_EN_CONTROL 0x46
40#define CONTROL_ENABLE BIT(0)
41
42#define USB_PDPHY_RX_STATUS 0x4A
43#define RX_FRAME_TYPE (BIT(0) | BIT(1) | BIT(2))
44
45#define USB_PDPHY_FRAME_FILTER 0x4C
46#define FRAME_FILTER_EN_HARD_RESET BIT(5)
47#define FRAME_FILTER_EN_SOP BIT(0)
48
49#define USB_PDPHY_TX_SIZE 0x42
50#define TX_SIZE_MASK 0xF
51
52#define USB_PDPHY_TX_CONTROL 0x44
53#define TX_CONTROL_RETRY_COUNT (BIT(6) | BIT(5))
54#define TX_CONTROL_FRAME_TYPE (BIT(4) | BIT(3) | BIT(2))
55#define TX_CONTROL_FRAME_TYPE_CABLE_RESET (0x1 << 2)
56#define TX_CONTROL_SEND_SIGNAL BIT(1)
57#define TX_CONTROL_SEND_MSG BIT(0)
58
59#define USB_PDPHY_RX_SIZE 0x48
60
61#define USB_PDPHY_RX_ACKNOWLEDGE 0x4B
62#define RX_BUFFER_TOKEN BIT(0)
63
64#define USB_PDPHY_BIST_MODE 0x4E
65#define BIST_MODE_MASK 0xF
66#define BIST_ENABLE BIT(7)
67#define PD_MSG_BIST 0x3
68#define PD_BIST_TEST_DATA_MODE 0x8
69
70#define USB_PDPHY_TX_BUFFER_HDR 0x60
71#define USB_PDPHY_TX_BUFFER_DATA 0x62
72
73#define USB_PDPHY_RX_BUFFER 0x80
74
75#define USB_PDPHY_SEC_ACCESS 0xD0
76#define USB_PDPHY_TRIM_3 0xF3
77
78/* VDD regulator */
79#define VDD_PDPHY_VOL_MIN 3088000 /* uV */
80#define VDD_PDPHY_VOL_MAX 3088000 /* uV */
81#define VDD_PDPHY_HPM_LOAD 3000 /* uA */
82
Jack Pham7dfd7612017-08-01 18:04:13 -070083/* timers */
84#define RECEIVER_RESPONSE_TIME 15 /* tReceiverResponse */
85#define HARD_RESET_COMPLETE_TIME 5 /* tHardResetComplete */
86
Jack Phamf4baeb12017-02-03 19:01:48 -080087struct usb_pdphy {
88 struct device *dev;
89 struct regmap *regmap;
90
91 u16 base;
92 struct regulator *vdd_pdphy;
93
94 /* irqs */
95 int sig_tx_irq;
96 int sig_rx_irq;
97 int msg_tx_irq;
98 int msg_rx_irq;
99 int msg_tx_failed_irq;
100 int msg_tx_discarded_irq;
101 int msg_rx_discarded_irq;
102
Jack Phame95cfc72017-08-01 17:36:50 -0700103 void (*signal_cb)(struct usbpd *pd, enum pd_sig_type sig);
104 void (*msg_rx_cb)(struct usbpd *pd, enum pd_sop_type sop,
Jack Phamf4baeb12017-02-03 19:01:48 -0800105 u8 *buf, size_t len);
106 void (*shutdown_cb)(struct usbpd *pd);
107
108 /* write waitq */
109 wait_queue_head_t tx_waitq;
110
111 bool is_opened;
112 int tx_status;
113 u8 frame_filter_val;
114 bool in_test_data_mode;
115
116 enum data_role data_role;
117 enum power_role power_role;
118
119 struct usbpd *usbpd;
120
121 /* debug */
122 struct dentry *debug_root;
123 unsigned int tx_bytes; /* hdr + data */
124 unsigned int rx_bytes; /* hdr + data */
125 unsigned int sig_tx_cnt;
126 unsigned int sig_rx_cnt;
127 unsigned int msg_tx_cnt;
128 unsigned int msg_rx_cnt;
129 unsigned int msg_tx_failed_cnt;
130 unsigned int msg_tx_discarded_cnt;
131 unsigned int msg_rx_discarded_cnt;
132};
133
134static struct usb_pdphy *__pdphy;
135
136static int pdphy_dbg_status(struct seq_file *s, void *p)
137{
138 struct usb_pdphy *pdphy = s->private;
139
140 seq_printf(s,
141 "PD Phy driver status\n"
142 "==================================================\n");
143 seq_printf(s, "opened: %10d\n", pdphy->is_opened);
144 seq_printf(s, "tx status: %10d\n", pdphy->tx_status);
145 seq_printf(s, "tx bytes: %10u\n", pdphy->tx_bytes);
146 seq_printf(s, "rx bytes: %10u\n", pdphy->rx_bytes);
147 seq_printf(s, "data role: %10u\n", pdphy->data_role);
148 seq_printf(s, "power role: %10u\n", pdphy->power_role);
149 seq_printf(s, "frame filter: %10u\n", pdphy->frame_filter_val);
150 seq_printf(s, "sig tx cnt: %10u\n", pdphy->sig_tx_cnt);
151 seq_printf(s, "sig rx cnt: %10u\n", pdphy->sig_rx_cnt);
152 seq_printf(s, "msg tx cnt: %10u\n", pdphy->msg_tx_cnt);
153 seq_printf(s, "msg rx cnt: %10u\n", pdphy->msg_rx_cnt);
154 seq_printf(s, "msg tx failed cnt: %10u\n",
155 pdphy->msg_tx_failed_cnt);
156 seq_printf(s, "msg tx discarded cnt: %10u\n",
157 pdphy->msg_tx_discarded_cnt);
158 seq_printf(s, "msg rx discarded cnt: %10u\n",
159 pdphy->msg_rx_discarded_cnt);
160
161 return 0;
162}
163
164static int pdphy_dbg_status_open(struct inode *inode, struct file *file)
165{
166 return single_open(file, pdphy_dbg_status, inode->i_private);
167}
168
169static const struct file_operations status_ops = {
170 .owner = THIS_MODULE,
171 .open = pdphy_dbg_status_open,
172 .llseek = seq_lseek,
173 .read = seq_read,
174 .release = single_release,
175};
176
177static void pdphy_create_debugfs_entries(struct usb_pdphy *pdphy)
178{
179 struct dentry *ent;
180
181 pdphy->debug_root = debugfs_create_dir("usb-pdphy", NULL);
182 if (!pdphy->debug_root) {
183 dev_warn(pdphy->dev, "Couldn't create debug dir\n");
184 return;
185 }
186
187 ent = debugfs_create_file("status", 0400, pdphy->debug_root, pdphy,
188 &status_ops);
189 if (!ent) {
190 dev_warn(pdphy->dev, "Couldn't create status file\n");
191 debugfs_remove(pdphy->debug_root);
192 }
193}
194
195static int pdphy_enable_power(struct usb_pdphy *pdphy, bool on)
196{
197 int ret = 0;
198
199 dev_dbg(pdphy->dev, "%s turn %s regulator.\n", __func__,
200 on ? "on" : "off");
201
202 if (!on)
203 goto disable_pdphy_vdd;
204
205 ret = regulator_set_load(pdphy->vdd_pdphy, VDD_PDPHY_HPM_LOAD);
206 if (ret < 0) {
207 dev_err(pdphy->dev, "Unable to set HPM of vdd_pdphy:%d\n", ret);
208 return ret;
209 }
210
211 ret = regulator_set_voltage(pdphy->vdd_pdphy, VDD_PDPHY_VOL_MIN,
212 VDD_PDPHY_VOL_MAX);
213 if (ret) {
214 dev_err(pdphy->dev,
215 "set voltage failed for vdd_pdphy:%d\n", ret);
216 goto put_pdphy_vdd_lpm;
217 }
218
219 ret = regulator_enable(pdphy->vdd_pdphy);
220 if (ret) {
221 dev_err(pdphy->dev, "Unable to enable vdd_pdphy:%d\n", ret);
222 goto unset_pdphy_vdd;
223 }
224
225 dev_dbg(pdphy->dev, "%s: PD PHY regulator turned ON.\n", __func__);
226 return ret;
227
228disable_pdphy_vdd:
229 ret = regulator_disable(pdphy->vdd_pdphy);
230 if (ret)
231 dev_err(pdphy->dev, "Unable to disable vdd_pdphy:%d\n", ret);
232
233unset_pdphy_vdd:
234 ret = regulator_set_voltage(pdphy->vdd_pdphy, 0, VDD_PDPHY_VOL_MAX);
235 if (ret)
236 dev_err(pdphy->dev,
237 "Unable to set (0) voltage for vdd_pdphy:%d\n", ret);
238
239put_pdphy_vdd_lpm:
240 ret = regulator_set_load(pdphy->vdd_pdphy, 0);
241 if (ret < 0)
242 dev_err(pdphy->dev, "Unable to set (0) HPM of vdd_pdphy\n");
243
244 return ret;
245}
246
247void pdphy_enable_irq(struct usb_pdphy *pdphy, bool enable)
248{
249 if (enable) {
250 enable_irq(pdphy->sig_tx_irq);
251 enable_irq(pdphy->sig_rx_irq);
252 enable_irq_wake(pdphy->sig_rx_irq);
253 enable_irq(pdphy->msg_tx_irq);
254 if (!pdphy->in_test_data_mode) {
255 enable_irq(pdphy->msg_rx_irq);
256 enable_irq_wake(pdphy->msg_rx_irq);
257 }
258 enable_irq(pdphy->msg_tx_failed_irq);
259 enable_irq(pdphy->msg_tx_discarded_irq);
260 enable_irq(pdphy->msg_rx_discarded_irq);
261 return;
262 }
263
264 disable_irq(pdphy->sig_tx_irq);
265 disable_irq(pdphy->sig_rx_irq);
266 disable_irq_wake(pdphy->sig_rx_irq);
267 disable_irq(pdphy->msg_tx_irq);
268 if (!pdphy->in_test_data_mode) {
269 disable_irq(pdphy->msg_rx_irq);
270 disable_irq_wake(pdphy->msg_rx_irq);
271 }
272 disable_irq(pdphy->msg_tx_failed_irq);
273 disable_irq(pdphy->msg_tx_discarded_irq);
274 disable_irq(pdphy->msg_rx_discarded_irq);
275}
276
277static int pdphy_reg_read(struct usb_pdphy *pdphy, u8 *val, u16 addr, int count)
278{
279 int ret;
280
281 ret = regmap_bulk_read(pdphy->regmap, pdphy->base + addr, val, count);
282 if (ret) {
283 dev_err(pdphy->dev, "read failed: addr=0x%04x, ret=%d\n",
284 pdphy->base + addr, ret);
285 return ret;
286 }
287
288 return 0;
289}
290
291/* Write multiple registers to device with block of data */
292static int pdphy_bulk_reg_write(struct usb_pdphy *pdphy, u16 addr,
293 const void *val, u8 val_cnt)
294{
295 int ret;
296
297 ret = regmap_bulk_write(pdphy->regmap, pdphy->base + addr,
298 val, val_cnt);
299 if (ret) {
300 dev_err(pdphy->dev, "bulk write failed: addr=0x%04x, ret=%d\n",
301 pdphy->base + addr, ret);
302 return ret;
303 }
304
305 return 0;
306}
307
308/* Writes a single byte to the specified register */
309static inline int pdphy_reg_write(struct usb_pdphy *pdphy, u16 addr, u8 val)
310{
311 return pdphy_bulk_reg_write(pdphy, addr, &val, 1);
312}
313
314/* Writes to the specified register limited by the bit mask */
315static int pdphy_masked_write(struct usb_pdphy *pdphy, u16 addr,
316 u8 mask, u8 val)
317{
318 int ret;
319
320 ret = regmap_update_bits(pdphy->regmap, pdphy->base + addr, mask, val);
321 if (ret) {
322 dev_err(pdphy->dev, "write failed: addr=0x%04x, ret=%d\n",
323 pdphy->base + addr, ret);
324 return ret;
325 }
326
327 return 0;
328}
329
330int pd_phy_update_roles(enum data_role dr, enum power_role pr)
331{
332 struct usb_pdphy *pdphy = __pdphy;
333
334 return pdphy_masked_write(pdphy, USB_PDPHY_MSG_CONFIG,
335 (MSG_CONFIG_PORT_DATA_ROLE | MSG_CONFIG_PORT_POWER_ROLE),
336 ((dr == DR_DFP ? MSG_CONFIG_PORT_DATA_ROLE : 0) |
337 (pr == PR_SRC ? MSG_CONFIG_PORT_POWER_ROLE : 0)));
338}
339EXPORT_SYMBOL(pd_phy_update_roles);
340
Jack Phamf4baeb12017-02-03 19:01:48 -0800341int pd_phy_open(struct pd_phy_params *params)
342{
343 int ret;
344 struct usb_pdphy *pdphy = __pdphy;
345
346 if (!pdphy) {
347 pr_err("%s: pdphy not found\n", __func__);
348 return -ENODEV;
349 }
350
351 if (pdphy->is_opened) {
352 dev_err(pdphy->dev, "%s: already opened\n", __func__);
353 return -EBUSY;
354 }
355
356 pdphy->signal_cb = params->signal_cb;
357 pdphy->msg_rx_cb = params->msg_rx_cb;
358 pdphy->shutdown_cb = params->shutdown_cb;
359 pdphy->data_role = params->data_role;
360 pdphy->power_role = params->power_role;
361 pdphy->frame_filter_val = params->frame_filter_val;
362
363 dev_dbg(pdphy->dev, "%s: DR %x PR %x frame filter val %x\n", __func__,
364 pdphy->data_role, pdphy->power_role, pdphy->frame_filter_val);
365
366 ret = pdphy_enable_power(pdphy, true);
367 if (ret)
368 return ret;
369
370 /* update data and power role to be used in GoodCRC generation */
371 ret = pd_phy_update_roles(pdphy->data_role, pdphy->power_role);
372 if (ret)
373 return ret;
374
Hemant Kumar796534e2017-05-30 15:54:55 -0700375 /* PD 2.0 phy */
376 ret = pdphy_masked_write(pdphy, USB_PDPHY_MSG_CONFIG,
377 MSG_CONFIG_SPEC_REV_MASK, USBPD_REV_20);
Jack Phamf4baeb12017-02-03 19:01:48 -0800378 if (ret)
379 return ret;
380
381 ret = pdphy_reg_write(pdphy, USB_PDPHY_EN_CONTROL, 0);
382 if (ret)
383 return ret;
384
385 ret = pdphy_reg_write(pdphy, USB_PDPHY_EN_CONTROL, CONTROL_ENABLE);
386 if (ret)
387 return ret;
388
389 /* update frame filter */
390 ret = pdphy_reg_write(pdphy, USB_PDPHY_FRAME_FILTER,
391 pdphy->frame_filter_val);
392 if (ret)
393 return ret;
394
395 /* initialize Rx buffer ownership to PDPHY HW */
396 ret = pdphy_reg_write(pdphy, USB_PDPHY_RX_ACKNOWLEDGE, 0);
397 if (ret)
398 return ret;
399
400 pdphy->is_opened = true;
401 pdphy_enable_irq(pdphy, true);
402
403 return ret;
404}
405EXPORT_SYMBOL(pd_phy_open);
406
Jack Pham7dfd7612017-08-01 18:04:13 -0700407int pd_phy_signal(enum pd_sig_type sig)
Jack Phamf4baeb12017-02-03 19:01:48 -0800408{
409 u8 val;
410 int ret;
411 struct usb_pdphy *pdphy = __pdphy;
412
Jack Pham7dfd7612017-08-01 18:04:13 -0700413 dev_dbg(pdphy->dev, "%s: type %d\n", __func__, sig);
Jack Phamf4baeb12017-02-03 19:01:48 -0800414
415 if (!pdphy) {
416 pr_err("%s: pdphy not found\n", __func__);
417 return -ENODEV;
418 }
419
420 if (!pdphy->is_opened) {
421 dev_dbg(pdphy->dev, "%s: pdphy disabled\n", __func__);
422 return -ENODEV;
423 }
424
425 pdphy->tx_status = -EINPROGRESS;
426
427 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, 0);
428 if (ret)
429 return ret;
430
431 usleep_range(2, 3);
432
Jack Phame95cfc72017-08-01 17:36:50 -0700433 val = (sig == CABLE_RESET_SIG ? TX_CONTROL_FRAME_TYPE_CABLE_RESET : 0)
Jack Phamf4baeb12017-02-03 19:01:48 -0800434 | TX_CONTROL_SEND_SIGNAL;
435
436 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, val);
437 if (ret)
438 return ret;
439
440 ret = wait_event_interruptible_timeout(pdphy->tx_waitq,
Jack Pham7dfd7612017-08-01 18:04:13 -0700441 pdphy->tx_status != -EINPROGRESS,
442 msecs_to_jiffies(HARD_RESET_COMPLETE_TIME));
Jack Phamf4baeb12017-02-03 19:01:48 -0800443 if (ret <= 0) {
444 dev_err(pdphy->dev, "%s: failed ret %d", __func__, ret);
445 return ret ? ret : -ETIMEDOUT;
446 }
447
448 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, 0);
449
450 if (pdphy->tx_status)
451 return pdphy->tx_status;
452
Jack Phame95cfc72017-08-01 17:36:50 -0700453 if (sig == HARD_RESET_SIG)
Jack Phamf4baeb12017-02-03 19:01:48 -0800454 /* Frame filter is reconfigured in pd_phy_open() */
455 return pdphy_reg_write(pdphy, USB_PDPHY_FRAME_FILTER, 0);
456
457 return 0;
458}
459EXPORT_SYMBOL(pd_phy_signal);
460
Jack Pham7dfd7612017-08-01 18:04:13 -0700461int pd_phy_write(u16 hdr, const u8 *data, size_t data_len, enum pd_sop_type sop)
Jack Phamf4baeb12017-02-03 19:01:48 -0800462{
463 u8 val;
464 int ret;
465 size_t total_len = data_len + USB_PDPHY_MSG_HDR_LEN;
466 struct usb_pdphy *pdphy = __pdphy;
467
Jack Pham7dfd7612017-08-01 18:04:13 -0700468 dev_dbg(pdphy->dev, "%s: hdr %x frame sop_type %d\n",
469 __func__, hdr, sop);
Jack Phamf4baeb12017-02-03 19:01:48 -0800470
471 if (data && data_len)
472 print_hex_dump_debug("tx data obj:", DUMP_PREFIX_NONE, 32, 4,
473 data, data_len, false);
474
475 if (!pdphy) {
476 pr_err("%s: pdphy not found\n", __func__);
477 return -ENODEV;
478 }
479
480 if (!pdphy->is_opened) {
481 dev_dbg(pdphy->dev, "%s: pdphy disabled\n", __func__);
482 return -ENODEV;
483 }
484
485 if (data_len > USB_PDPHY_MAX_DATA_OBJ_LEN) {
486 dev_err(pdphy->dev, "%s: invalid data object len %zu\n",
487 __func__, data_len);
488 return -EINVAL;
489 }
490
Jack Phame24693c2017-06-06 22:30:47 -0700491 ret = pdphy_reg_read(pdphy, &val, USB_PDPHY_RX_ACKNOWLEDGE, 1);
Jack Phamf0c23392017-10-12 09:41:51 -0700492 if (ret || val) {
Jack Phame24693c2017-06-06 22:30:47 -0700493 dev_err(pdphy->dev, "%s: RX message pending\n", __func__);
494 return -EBUSY;
495 }
496
Jack Phamf4baeb12017-02-03 19:01:48 -0800497 pdphy->tx_status = -EINPROGRESS;
498
499 /* write 2 byte SOP message header */
500 ret = pdphy_bulk_reg_write(pdphy, USB_PDPHY_TX_BUFFER_HDR, (u8 *)&hdr,
501 USB_PDPHY_MSG_HDR_LEN);
502 if (ret)
503 return ret;
504
505 if (data && data_len) {
506 /* write data objects of SOP message */
507 ret = pdphy_bulk_reg_write(pdphy, USB_PDPHY_TX_BUFFER_DATA,
508 data, data_len);
509 if (ret)
510 return ret;
511 }
512
513 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_SIZE, total_len - 1);
514 if (ret)
515 return ret;
516
517 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, 0);
518 if (ret)
519 return ret;
520
521 usleep_range(2, 3);
522
Jack Phame95cfc72017-08-01 17:36:50 -0700523 val = TX_CONTROL_RETRY_COUNT | (sop << 2) | TX_CONTROL_SEND_MSG;
Jack Phamf4baeb12017-02-03 19:01:48 -0800524
525 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, val);
526 if (ret)
527 return ret;
528
529 ret = wait_event_interruptible_timeout(pdphy->tx_waitq,
Jack Pham7dfd7612017-08-01 18:04:13 -0700530 pdphy->tx_status != -EINPROGRESS,
531 msecs_to_jiffies(RECEIVER_RESPONSE_TIME));
Jack Phamf4baeb12017-02-03 19:01:48 -0800532 if (ret <= 0) {
533 dev_err(pdphy->dev, "%s: failed ret %d", __func__, ret);
534 return ret ? ret : -ETIMEDOUT;
535 }
536
537 if (hdr && !pdphy->tx_status)
538 pdphy->tx_bytes += data_len + USB_PDPHY_MSG_HDR_LEN;
539
Jack Pham7dfd7612017-08-01 18:04:13 -0700540 return pdphy->tx_status ? pdphy->tx_status : 0;
Jack Phamf4baeb12017-02-03 19:01:48 -0800541}
542EXPORT_SYMBOL(pd_phy_write);
543
544void pd_phy_close(void)
545{
546 int ret;
547 struct usb_pdphy *pdphy = __pdphy;
548
549 if (!pdphy) {
550 pr_err("%s: pdphy not found\n", __func__);
551 return;
552 }
553
554 if (!pdphy->is_opened) {
555 dev_err(pdphy->dev, "%s: not opened\n", __func__);
556 return;
557 }
558
559 pdphy->is_opened = false;
560 pdphy_enable_irq(pdphy, false);
561
562 pdphy->tx_status = -ESHUTDOWN;
563
564 wake_up_all(&pdphy->tx_waitq);
565
566 pdphy_reg_write(pdphy, USB_PDPHY_BIST_MODE, 0);
567 pdphy->in_test_data_mode = false;
568
569 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, 0);
570 if (ret)
571 return;
572
573 ret = pdphy_reg_write(pdphy, USB_PDPHY_EN_CONTROL, 0);
574 if (ret)
575 return;
576
577 pdphy_enable_power(pdphy, false);
578}
579EXPORT_SYMBOL(pd_phy_close);
580
581static irqreturn_t pdphy_msg_tx_irq(int irq, void *data)
582{
583 struct usb_pdphy *pdphy = data;
584
585 if (irq == pdphy->msg_tx_irq) {
586 pdphy->msg_tx_cnt++;
587 pdphy->tx_status = 0;
588 } else if (irq == pdphy->msg_tx_discarded_irq) {
589 pdphy->msg_tx_discarded_cnt++;
590 pdphy->tx_status = -EBUSY;
591 } else if (irq == pdphy->msg_tx_failed_irq) {
592 pdphy->msg_tx_failed_cnt++;
593 pdphy->tx_status = -EFAULT;
594 } else {
595 dev_err(pdphy->dev, "spurious irq #%d received\n", irq);
596 return IRQ_NONE;
597 }
598
599 wake_up(&pdphy->tx_waitq);
600
601 return IRQ_HANDLED;
602}
603
604static irqreturn_t pdphy_msg_rx_discarded_irq(int irq, void *data)
605{
606 struct usb_pdphy *pdphy = data;
607
608 pdphy->msg_rx_discarded_cnt++;
609
610 return IRQ_HANDLED;
611}
612
613static irqreturn_t pdphy_sig_rx_irq_thread(int irq, void *data)
614{
615 u8 rx_status, frame_type;
616 int ret;
617 struct usb_pdphy *pdphy = data;
618
619 pdphy->sig_rx_cnt++;
620
621 ret = pdphy_reg_read(pdphy, &rx_status, USB_PDPHY_RX_STATUS, 1);
622 if (ret)
623 goto done;
624
625 frame_type = rx_status & RX_FRAME_TYPE;
626 if (frame_type != HARD_RESET_SIG) {
627 dev_err(pdphy->dev, "%s:unsupported frame type %d\n",
628 __func__, frame_type);
629 goto done;
630 }
631
632 /* Frame filter is reconfigured in pd_phy_open() */
633 ret = pdphy_reg_write(pdphy, USB_PDPHY_FRAME_FILTER, 0);
634
635 if (pdphy->signal_cb)
636 pdphy->signal_cb(pdphy->usbpd, frame_type);
637
638done:
639 return IRQ_HANDLED;
640}
641
642static irqreturn_t pdphy_sig_tx_irq_thread(int irq, void *data)
643{
644 struct usb_pdphy *pdphy = data;
645
646 /* in case of exit from BIST Carrier Mode 2, clear BIST_MODE */
647 pdphy_reg_write(pdphy, USB_PDPHY_BIST_MODE, 0);
648
649 pdphy->sig_tx_cnt++;
650 pdphy->tx_status = 0;
651 wake_up(&pdphy->tx_waitq);
652
653 return IRQ_HANDLED;
654}
655
656static int pd_phy_bist_mode(u8 bist_mode)
657{
658 struct usb_pdphy *pdphy = __pdphy;
659
660 dev_dbg(pdphy->dev, "%s: enter BIST mode %d\n", __func__, bist_mode);
661
662 pdphy_reg_write(pdphy, USB_PDPHY_BIST_MODE, 0);
663
664 udelay(5);
665
666 return pdphy_masked_write(pdphy, USB_PDPHY_BIST_MODE,
667 BIST_MODE_MASK | BIST_ENABLE, bist_mode | BIST_ENABLE);
668}
669
670static irqreturn_t pdphy_msg_rx_irq_thread(int irq, void *data)
671{
672 u8 size, rx_status, frame_type;
673 u8 buf[32];
674 int ret;
675 struct usb_pdphy *pdphy = data;
676
677 pdphy->msg_rx_cnt++;
678
679 ret = pdphy_reg_read(pdphy, &size, USB_PDPHY_RX_SIZE, 1);
680 if (ret)
681 goto done;
682
683 if (!size || size > 31) {
684 dev_err(pdphy->dev, "%s: invalid size %d\n", __func__, size);
685 goto done;
686 }
687
688 ret = pdphy_reg_read(pdphy, &rx_status, USB_PDPHY_RX_STATUS, 1);
689 if (ret)
690 goto done;
691
692 frame_type = rx_status & RX_FRAME_TYPE;
693 if (frame_type != SOP_MSG) {
694 dev_err(pdphy->dev, "%s:unsupported frame type %d\n",
695 __func__, frame_type);
696 goto done;
697 }
698
699 ret = pdphy_reg_read(pdphy, buf, USB_PDPHY_RX_BUFFER, size + 1);
700 if (ret)
701 goto done;
702
703 /* ack to change ownership of rx buffer back to PDPHY RX HW */
704 pdphy_reg_write(pdphy, USB_PDPHY_RX_ACKNOWLEDGE, 0);
705
706 if (((buf[0] & 0xf) == PD_MSG_BIST) && size >= 5) { /* BIST */
707 u8 mode = buf[5] >> 4; /* [31:28] of 1st data object */
708
709 pd_phy_bist_mode(mode);
710 pdphy_reg_write(pdphy, USB_PDPHY_RX_ACKNOWLEDGE, 0);
711
712 if (mode == PD_BIST_TEST_DATA_MODE) {
713 pdphy->in_test_data_mode = true;
714 disable_irq_nosync(irq);
715 }
716 goto done;
717 }
718
719 if (pdphy->msg_rx_cb)
720 pdphy->msg_rx_cb(pdphy->usbpd, frame_type, buf, size + 1);
721
722 print_hex_dump_debug("rx msg:", DUMP_PREFIX_NONE, 32, 4, buf, size + 1,
723 false);
724 pdphy->rx_bytes += size + 1;
725done:
726 return IRQ_HANDLED;
727}
728
729static int pdphy_request_irq(struct usb_pdphy *pdphy,
730 struct device_node *node,
731 int *irq_num, const char *irq_name,
732 irqreturn_t (irq_handler)(int irq, void *data),
733 irqreturn_t (thread_fn)(int irq, void *data),
734 int flags)
735{
736 int ret;
737
738 *irq_num = of_irq_get_byname(node, irq_name);
739 if (*irq_num < 0) {
740 dev_err(pdphy->dev, "Unable to get %s irqn", irq_name);
741 ret = -ENXIO;
742 }
743
744 irq_set_status_flags(*irq_num, IRQ_NOAUTOEN);
745 ret = devm_request_threaded_irq(pdphy->dev, *irq_num, irq_handler,
746 thread_fn, flags, irq_name, pdphy);
747 if (ret < 0) {
748 dev_err(pdphy->dev, "Unable to request %s irq: %dn",
749 irq_name, ret);
750 ret = -ENXIO;
751 }
752
753 return 0;
754}
755
756static int pdphy_probe(struct platform_device *pdev)
757{
758 int ret;
759 unsigned int base;
760 struct usb_pdphy *pdphy;
761
762 pdphy = devm_kzalloc(&pdev->dev, sizeof(*pdphy), GFP_KERNEL);
763 if (!pdphy)
764 return -ENOMEM;
765
766 pdphy->regmap = dev_get_regmap(pdev->dev.parent, NULL);
767 if (!pdphy->regmap) {
768 dev_err(&pdev->dev, "Couldn't get parent's regmap\n");
769 return -EINVAL;
770 }
771
772 dev_set_drvdata(&pdev->dev, pdphy);
773
774 ret = of_property_read_u32(pdev->dev.of_node, "reg", &base);
775 if (ret < 0) {
776 dev_err(&pdev->dev, "failed to get reg base address ret = %d\n",
777 ret);
778 return ret;
779 }
780
781 pdphy->base = base;
782 pdphy->dev = &pdev->dev;
783
784 init_waitqueue_head(&pdphy->tx_waitq);
785
786 pdphy->vdd_pdphy = devm_regulator_get(&pdev->dev, "vdd-pdphy");
787 if (IS_ERR(pdphy->vdd_pdphy)) {
788 dev_err(&pdev->dev, "unable to get vdd-pdphy\n");
789 return PTR_ERR(pdphy->vdd_pdphy);
790 }
791
792 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
793 &pdphy->sig_tx_irq, "sig-tx", NULL,
794 pdphy_sig_tx_irq_thread, (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
795 if (ret < 0)
796 return ret;
797
798 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
799 &pdphy->sig_rx_irq, "sig-rx", NULL,
800 pdphy_sig_rx_irq_thread, (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
801 if (ret < 0)
802 return ret;
803
804 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
805 &pdphy->msg_tx_irq, "msg-tx", pdphy_msg_tx_irq,
806 NULL, (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
807 if (ret < 0)
808 return ret;
809
810 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
Jack Phamf0c23392017-10-12 09:41:51 -0700811 &pdphy->msg_rx_irq, "msg-rx", NULL,
Jack Phamf4baeb12017-02-03 19:01:48 -0800812 pdphy_msg_rx_irq_thread, (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
813 if (ret < 0)
814 return ret;
815
816 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
817 &pdphy->msg_tx_failed_irq, "msg-tx-failed", pdphy_msg_tx_irq,
818 NULL, (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
819 if (ret < 0)
820 return ret;
821
822 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
823 &pdphy->msg_tx_discarded_irq, "msg-tx-discarded",
824 pdphy_msg_tx_irq, NULL,
825 (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
826 if (ret < 0)
827 return ret;
828
829 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
830 &pdphy->msg_rx_discarded_irq, "msg-rx-discarded",
831 pdphy_msg_rx_discarded_irq, NULL,
832 (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
833 if (ret < 0)
834 return ret;
835
836 ret = pdphy_reg_write(pdphy, USB_PDPHY_SEC_ACCESS, 0xA5);
837 if (ret)
838 return ret;
839
840 ret = pdphy_reg_write(pdphy, USB_PDPHY_TRIM_3, 0x2);
841 if (ret)
842 return ret;
843
844 /* usbpd_create() could call back to us, so have __pdphy ready */
845 __pdphy = pdphy;
846
847 pdphy->usbpd = usbpd_create(&pdev->dev);
848 if (IS_ERR(pdphy->usbpd)) {
849 dev_err(&pdev->dev, "usbpd_create failed: %ld\n",
850 PTR_ERR(pdphy->usbpd));
851 __pdphy = NULL;
852 return PTR_ERR(pdphy->usbpd);
853 }
854
855 pdphy_create_debugfs_entries(pdphy);
856
857 return 0;
858}
859
860static int pdphy_remove(struct platform_device *pdev)
861{
862 struct usb_pdphy *pdphy = platform_get_drvdata(pdev);
863
864 debugfs_remove_recursive(pdphy->debug_root);
865 usbpd_destroy(pdphy->usbpd);
866
867 if (pdphy->is_opened)
868 pd_phy_close();
869
870 __pdphy = NULL;
871
872 return 0;
873}
874
875static void pdphy_shutdown(struct platform_device *pdev)
876{
877 struct usb_pdphy *pdphy = platform_get_drvdata(pdev);
878
879 /* let protocol engine shutdown the pdphy synchronously */
880 if (pdphy->shutdown_cb)
881 pdphy->shutdown_cb(pdphy->usbpd);
882}
883
884static const struct of_device_id pdphy_match_table[] = {
885 {
886 .compatible = "qcom,qpnp-pdphy",
887 },
888 { },
889};
890MODULE_DEVICE_TABLE(of, pdphy_match_table);
891
892static struct platform_driver pdphy_driver = {
893 .driver = {
894 .name = "qpnp-pdphy",
895 .of_match_table = pdphy_match_table,
896 },
897 .probe = pdphy_probe,
898 .remove = pdphy_remove,
899 .shutdown = pdphy_shutdown,
900};
901
902module_platform_driver(pdphy_driver);
903
904MODULE_DESCRIPTION("QPNP PD PHY Driver");
905MODULE_LICENSE("GPL v2");
906MODULE_ALIAS("platform:qpnp-pdphy");