Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-pxa/time.c |
| 3 | * |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 4 | * PXA clocksource, clockevents, and OST interrupt handlers. |
| 5 | * Copyright (c) 2007 by Bill Gatliff <bgat@billgatliff.com>. |
| 6 | * |
| 7 | * Derived from Nicolas Pitre's PXA timer handler Copyright (c) 2001 |
| 8 | * by MontaVista Software, Inc. (Nico, your code rocks!) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | #include <linux/kernel.h> |
| 16 | #include <linux/init.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #include <linux/interrupt.h> |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 18 | #include <linux/clockchips.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | |
Nicolas Pitre | 6c3a158 | 2007-08-17 16:55:22 +0100 | [diff] [blame] | 20 | #include <asm/div64.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | #include <asm/mach/irq.h> |
| 22 | #include <asm/mach/time.h> |
Russell King | 7ce8301 | 2010-12-15 21:48:15 +0000 | [diff] [blame] | 23 | #include <asm/sched_clock.h> |
Eric Miao | 5bf3df3 | 2009-01-20 11:04:16 +0800 | [diff] [blame] | 24 | #include <mach/regs-ost.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | |
Nicolas Pitre | 6c3a158 | 2007-08-17 16:55:22 +0100 | [diff] [blame] | 26 | /* |
| 27 | * This is PXA's sched_clock implementation. This has a resolution |
| 28 | * of at least 308 ns and a maximum value of 208 days. |
| 29 | * |
| 30 | * The return value is guaranteed to be monotonic in that range as |
| 31 | * long as there is always less than 582 seconds between successive |
| 32 | * calls to sched_clock() which should always be the case in practice. |
| 33 | */ |
Nicolas Pitre | 6c3a158 | 2007-08-17 16:55:22 +0100 | [diff] [blame] | 34 | |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 35 | static u32 notrace pxa_read_sched_clock(void) |
Nicolas Pitre | 6c3a158 | 2007-08-17 16:55:22 +0100 | [diff] [blame] | 36 | { |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 37 | return OSCR; |
Nicolas Pitre | 6c3a158 | 2007-08-17 16:55:22 +0100 | [diff] [blame] | 38 | } |
| 39 | |
| 40 | |
Russell King | a88264c | 2007-11-12 22:45:16 +0000 | [diff] [blame] | 41 | #define MIN_OSCR_DELTA 16 |
| 42 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | static irqreturn_t |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 44 | pxa_ost0_interrupt(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | { |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 46 | struct clock_event_device *c = dev_id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | |
Russell King | a88264c | 2007-11-12 22:45:16 +0000 | [diff] [blame] | 48 | /* Disarm the compare/match, signal the event. */ |
| 49 | OIER &= ~OIER_E0; |
| 50 | OSSR = OSSR_M0; |
| 51 | c->event_handler(c); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
| 53 | return IRQ_HANDLED; |
| 54 | } |
| 55 | |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 56 | static int |
| 57 | pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev) |
| 58 | { |
Uwe Kleine-König | a602f0f | 2009-12-17 12:43:29 +0100 | [diff] [blame] | 59 | unsigned long next, oscr; |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 60 | |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 61 | OIER |= OIER_E0; |
Russell King | 91bc51d | 2007-11-08 23:35:46 +0000 | [diff] [blame] | 62 | next = OSCR + delta; |
| 63 | OSMR0 = next; |
| 64 | oscr = OSCR; |
Russell King | 91bc51d | 2007-11-08 23:35:46 +0000 | [diff] [blame] | 65 | |
| 66 | return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 67 | } |
| 68 | |
| 69 | static void |
| 70 | pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev) |
| 71 | { |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 72 | switch (mode) { |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 73 | case CLOCK_EVT_MODE_ONESHOT: |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 74 | OIER &= ~OIER_E0; |
Russell King | 91bc51d | 2007-11-08 23:35:46 +0000 | [diff] [blame] | 75 | OSSR = OSSR_M0; |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 76 | break; |
| 77 | |
| 78 | case CLOCK_EVT_MODE_UNUSED: |
| 79 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 80 | /* initializing, released, or preparing for suspend */ |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 81 | OIER &= ~OIER_E0; |
Russell King | 91bc51d | 2007-11-08 23:35:46 +0000 | [diff] [blame] | 82 | OSSR = OSSR_M0; |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 83 | break; |
Russell King | df43309 | 2007-10-27 15:15:49 +0100 | [diff] [blame] | 84 | |
| 85 | case CLOCK_EVT_MODE_RESUME: |
Russell King | a88264c | 2007-11-12 22:45:16 +0000 | [diff] [blame] | 86 | case CLOCK_EVT_MODE_PERIODIC: |
Russell King | df43309 | 2007-10-27 15:15:49 +0100 | [diff] [blame] | 87 | break; |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 88 | } |
| 89 | } |
| 90 | |
| 91 | static struct clock_event_device ckevt_pxa_osmr0 = { |
| 92 | .name = "osmr0", |
Russell King | a88264c | 2007-11-12 22:45:16 +0000 | [diff] [blame] | 93 | .features = CLOCK_EVT_FEAT_ONESHOT, |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 94 | .rating = 200, |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 95 | .set_next_event = pxa_osmr0_set_next_event, |
| 96 | .set_mode = pxa_osmr0_set_mode, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | }; |
| 98 | |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 99 | static struct irqaction pxa_ost0_irq = { |
| 100 | .name = "ost0", |
| 101 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
| 102 | .handler = pxa_ost0_interrupt, |
| 103 | .dev_id = &ckevt_pxa_osmr0, |
| 104 | }; |
| 105 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | static void __init pxa_timer_init(void) |
| 107 | { |
Eric Miao | 6769717 | 2008-12-18 11:10:32 +0800 | [diff] [blame] | 108 | unsigned long clock_tick_rate = get_clock_tick_rate(); |
Russell King | 08197f6 | 2007-09-01 21:12:50 +0100 | [diff] [blame] | 109 | |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 110 | OIER = 0; |
| 111 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | |
Marc Zyngier | 2f0778af | 2011-12-15 12:19:23 +0100 | [diff] [blame] | 113 | setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate); |
Nicolas Pitre | 6c3a158 | 2007-08-17 16:55:22 +0100 | [diff] [blame] | 114 | |
Haojian Zhuang | ccc46e2 | 2010-11-24 11:54:23 +0800 | [diff] [blame] | 115 | clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4); |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 116 | ckevt_pxa_osmr0.max_delta_ns = |
| 117 | clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); |
| 118 | ckevt_pxa_osmr0.min_delta_ns = |
Russell King | dd01b2f | 2008-01-23 12:34:16 +0000 | [diff] [blame] | 119 | clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1; |
Rusty Russell | 320ab2b | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 120 | ckevt_pxa_osmr0.cpumask = cpumask_of(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 122 | setup_irq(IRQ_OST0, &pxa_ost0_irq); |
| 123 | |
Russell King | 234b6ced | 2011-05-08 14:09:47 +0100 | [diff] [blame] | 124 | clocksource_mmio_init(&OSCR, "oscr0", clock_tick_rate, 200, 32, |
| 125 | clocksource_mmio_readl_up); |
Bill Gatliff | 7bbb18c | 2007-07-21 03:39:36 +0100 | [diff] [blame] | 126 | clockevents_register_device(&ckevt_pxa_osmr0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | } |
| 128 | |
| 129 | #ifdef CONFIG_PM |
Russell King | 4ae7806 | 2007-11-12 22:48:12 +0000 | [diff] [blame] | 130 | static unsigned long osmr[4], oier, oscr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | |
| 132 | static void pxa_timer_suspend(void) |
| 133 | { |
| 134 | osmr[0] = OSMR0; |
| 135 | osmr[1] = OSMR1; |
| 136 | osmr[2] = OSMR2; |
| 137 | osmr[3] = OSMR3; |
| 138 | oier = OIER; |
Russell King | 4ae7806 | 2007-11-12 22:48:12 +0000 | [diff] [blame] | 139 | oscr = OSCR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | } |
| 141 | |
| 142 | static void pxa_timer_resume(void) |
| 143 | { |
Russell King | 4ae7806 | 2007-11-12 22:48:12 +0000 | [diff] [blame] | 144 | /* |
| 145 | * Ensure that we have at least MIN_OSCR_DELTA between match |
| 146 | * register 0 and the OSCR, to guarantee that we will receive |
| 147 | * the one-shot timer interrupt. We adjust OSMR0 in preference |
| 148 | * to OSCR to guarantee that OSCR is monotonically incrementing. |
| 149 | */ |
| 150 | if (osmr[0] - oscr < MIN_OSCR_DELTA) |
| 151 | osmr[0] += MIN_OSCR_DELTA; |
| 152 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | OSMR0 = osmr[0]; |
| 154 | OSMR1 = osmr[1]; |
| 155 | OSMR2 = osmr[2]; |
| 156 | OSMR3 = osmr[3]; |
| 157 | OIER = oier; |
Russell King | 4ae7806 | 2007-11-12 22:48:12 +0000 | [diff] [blame] | 158 | OSCR = oscr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | } |
| 160 | #else |
| 161 | #define pxa_timer_suspend NULL |
| 162 | #define pxa_timer_resume NULL |
| 163 | #endif |
| 164 | |
| 165 | struct sys_timer pxa_timer = { |
| 166 | .init = pxa_timer_init, |
| 167 | .suspend = pxa_timer_suspend, |
| 168 | .resume = pxa_timer_resume, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | }; |