blob: f366482216c0e4ad0301426a8bc0ba2b27e435e9 [file] [log] [blame]
Tony Lindgrenf20b9332011-12-16 14:13:09 -08001/*
2 * Device Tree Source for OMAP2 SoC
3 *
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
Benoit Cousson4c94ac22012-10-24 10:47:52 +020015 interrupt-parent = <&intc>;
Tony Lindgrenf20b9332011-12-16 14:13:09 -080016
17 aliases {
18 serial0 = &uart1;
19 serial1 = &uart2;
20 serial2 = &uart3;
21 };
22
23 cpus {
24 cpu@0 {
25 compatible = "arm,arm1136jf-s";
26 };
27 };
28
29 soc {
30 compatible = "ti,omap-infra";
31 mpu {
32 compatible = "ti,omap2-mpu";
33 ti,hwmods = "mpu";
34 };
35 };
36
37 ocp {
38 compatible = "simple-bus";
39 #address-cells = <1>;
40 #size-cells = <1>;
41 ranges;
42 ti,hwmods = "l3_main";
43
44 intc: interrupt-controller@1 {
45 compatible = "ti,omap2-intc";
46 interrupt-controller;
47 #interrupt-cells = <1>;
Jon Hunter95dca122012-06-12 19:40:46 -050048 ti,intc-size = <96>;
49 reg = <0x480FE000 0x1000>;
Tony Lindgrenf20b9332011-12-16 14:13:09 -080050 };
51
52 uart1: serial@4806a000 {
53 compatible = "ti,omap2-uart";
54 ti,hwmods = "uart1";
55 clock-frequency = <48000000>;
56 };
57
58 uart2: serial@4806c000 {
59 compatible = "ti,omap2-uart";
60 ti,hwmods = "uart2";
61 clock-frequency = <48000000>;
62 };
63
64 uart3: serial@4806e000 {
65 compatible = "ti,omap2-uart";
66 ti,hwmods = "uart3";
67 clock-frequency = <48000000>;
68 };
69 };
70};