Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * GPMC support functions |
| 3 | * |
| 4 | * Copyright (C) 2005-2006 Nokia Corporation |
| 5 | * |
| 6 | * Author: Juha Yrjola |
| 7 | * |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 8 | * Copyright (C) 2009 Texas Instruments |
| 9 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 10 | * |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
| 14 | */ |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 15 | #undef DEBUG |
| 16 | |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 17 | #include <linux/irq.h> |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 18 | #include <linux/kernel.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/err.h> |
| 21 | #include <linux/clk.h> |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 22 | #include <linux/ioport.h> |
| 23 | #include <linux/spinlock.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 24 | #include <linux/io.h> |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 25 | #include <linux/module.h> |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 26 | #include <linux/interrupt.h> |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 27 | #include <linux/platform_device.h> |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 28 | #include <linux/of.h> |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 29 | #include <linux/of_address.h> |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 30 | #include <linux/of_mtd.h> |
| 31 | #include <linux/of_device.h> |
| 32 | #include <linux/mtd/nand.h> |
avinash philip | b3f5525 | 2013-06-12 16:30:56 +0530 | [diff] [blame] | 33 | #include <linux/pm_runtime.h> |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 34 | |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 35 | #include <linux/platform_data/mtd-nand-omap2.h> |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 36 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 37 | #include <asm/mach-types.h> |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 38 | |
Tony Lindgren | dbc0416 | 2012-08-31 10:59:07 -0700 | [diff] [blame] | 39 | #include "soc.h" |
Tony Lindgren | 7d7e1eb | 2012-08-27 17:43:01 -0700 | [diff] [blame] | 40 | #include "common.h" |
Tony Lindgren | 25c7d49 | 2012-10-02 17:25:48 -0700 | [diff] [blame] | 41 | #include "omap_device.h" |
Afzal Mohammed | 3ef5d00 | 2012-10-05 10:37:27 +0530 | [diff] [blame] | 42 | #include "gpmc.h" |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 43 | #include "gpmc-nand.h" |
Ezequiel Garcia | 75d3625 | 2013-01-25 09:23:11 -0300 | [diff] [blame] | 44 | #include "gpmc-onenand.h" |
Tony Lindgren | 7d7e1eb | 2012-08-27 17:43:01 -0700 | [diff] [blame] | 45 | |
Afzal Mohammed | 4be48fd | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 46 | #define DEVICE_NAME "omap-gpmc" |
| 47 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 48 | /* GPMC register offsets */ |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 49 | #define GPMC_REVISION 0x00 |
| 50 | #define GPMC_SYSCONFIG 0x10 |
| 51 | #define GPMC_SYSSTATUS 0x14 |
| 52 | #define GPMC_IRQSTATUS 0x18 |
| 53 | #define GPMC_IRQENABLE 0x1c |
| 54 | #define GPMC_TIMEOUT_CONTROL 0x40 |
| 55 | #define GPMC_ERR_ADDRESS 0x44 |
| 56 | #define GPMC_ERR_TYPE 0x48 |
| 57 | #define GPMC_CONFIG 0x50 |
| 58 | #define GPMC_STATUS 0x54 |
| 59 | #define GPMC_PREFETCH_CONFIG1 0x1e0 |
| 60 | #define GPMC_PREFETCH_CONFIG2 0x1e4 |
Thara Gopinath | 15e02a3 | 2008-04-28 16:55:01 +0530 | [diff] [blame] | 61 | #define GPMC_PREFETCH_CONTROL 0x1ec |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 62 | #define GPMC_PREFETCH_STATUS 0x1f0 |
| 63 | #define GPMC_ECC_CONFIG 0x1f4 |
| 64 | #define GPMC_ECC_CONTROL 0x1f8 |
| 65 | #define GPMC_ECC_SIZE_CONFIG 0x1fc |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 66 | #define GPMC_ECC1_RESULT 0x200 |
Ivan Djelic | 8d602cf | 2012-04-26 14:17:49 +0200 | [diff] [blame] | 67 | #define GPMC_ECC_BCH_RESULT_0 0x240 /* not available on OMAP2 */ |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 68 | #define GPMC_ECC_BCH_RESULT_1 0x244 /* not available on OMAP2 */ |
| 69 | #define GPMC_ECC_BCH_RESULT_2 0x248 /* not available on OMAP2 */ |
| 70 | #define GPMC_ECC_BCH_RESULT_3 0x24c /* not available on OMAP2 */ |
pekon gupta | 27c9fd6 | 2014-05-19 13:24:39 +0530 | [diff] [blame] | 71 | #define GPMC_ECC_BCH_RESULT_4 0x300 /* not available on OMAP2 */ |
| 72 | #define GPMC_ECC_BCH_RESULT_5 0x304 /* not available on OMAP2 */ |
| 73 | #define GPMC_ECC_BCH_RESULT_6 0x308 /* not available on OMAP2 */ |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 74 | |
Yegor Yefremov | 2c65e74 | 2012-05-09 08:32:49 -0700 | [diff] [blame] | 75 | /* GPMC ECC control settings */ |
| 76 | #define GPMC_ECC_CTRL_ECCCLEAR 0x100 |
| 77 | #define GPMC_ECC_CTRL_ECCDISABLE 0x000 |
| 78 | #define GPMC_ECC_CTRL_ECCREG1 0x001 |
| 79 | #define GPMC_ECC_CTRL_ECCREG2 0x002 |
| 80 | #define GPMC_ECC_CTRL_ECCREG3 0x003 |
| 81 | #define GPMC_ECC_CTRL_ECCREG4 0x004 |
| 82 | #define GPMC_ECC_CTRL_ECCREG5 0x005 |
| 83 | #define GPMC_ECC_CTRL_ECCREG6 0x006 |
| 84 | #define GPMC_ECC_CTRL_ECCREG7 0x007 |
| 85 | #define GPMC_ECC_CTRL_ECCREG8 0x008 |
| 86 | #define GPMC_ECC_CTRL_ECCREG9 0x009 |
| 87 | |
Roger Quadros | e378d22 | 2014-08-29 19:11:52 +0300 | [diff] [blame] | 88 | #define GPMC_CONFIG_LIMITEDADDRESS BIT(1) |
| 89 | |
Afzal Mohammed | 559d94b | 2012-05-28 17:51:37 +0530 | [diff] [blame] | 90 | #define GPMC_CONFIG2_CSEXTRADELAY BIT(7) |
| 91 | #define GPMC_CONFIG3_ADVEXTRADELAY BIT(7) |
| 92 | #define GPMC_CONFIG4_OEEXTRADELAY BIT(7) |
| 93 | #define GPMC_CONFIG4_WEEXTRADELAY BIT(23) |
| 94 | #define GPMC_CONFIG6_CYCLE2CYCLEDIFFCSEN BIT(6) |
| 95 | #define GPMC_CONFIG6_CYCLE2CYCLESAMECSEN BIT(7) |
| 96 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 97 | #define GPMC_CS0_OFFSET 0x60 |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 98 | #define GPMC_CS_SIZE 0x30 |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 99 | #define GPMC_BCH_SIZE 0x10 |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 100 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 101 | #define GPMC_MEM_END 0x3FFFFFFF |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 102 | |
| 103 | #define GPMC_CHUNK_SHIFT 24 /* 16 MB */ |
| 104 | #define GPMC_SECTION_SHIFT 28 /* 128 MB */ |
| 105 | |
vimal singh | 59e9c5a | 2009-07-13 16:26:24 +0530 | [diff] [blame] | 106 | #define CS_NUM_SHIFT 24 |
| 107 | #define ENABLE_PREFETCH (0x1 << 7) |
| 108 | #define DMA_MPU_MODE 2 |
| 109 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 110 | #define GPMC_REVISION_MAJOR(l) ((l >> 4) & 0xf) |
| 111 | #define GPMC_REVISION_MINOR(l) (l & 0xf) |
| 112 | |
| 113 | #define GPMC_HAS_WR_ACCESS 0x1 |
| 114 | #define GPMC_HAS_WR_DATA_MUX_BUS 0x2 |
Jon Hunter | aa8d476 | 2013-02-21 15:25:23 -0600 | [diff] [blame] | 115 | #define GPMC_HAS_MUX_AAD 0x4 |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 116 | |
Jon Hunter | 9f83315 | 2013-02-20 15:53:38 -0600 | [diff] [blame] | 117 | #define GPMC_NR_WAITPINS 4 |
| 118 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 119 | /* XXX: Only NAND irq has been considered,currently these are the only ones used |
| 120 | */ |
| 121 | #define GPMC_NR_IRQ 2 |
| 122 | |
| 123 | struct gpmc_client_irq { |
| 124 | unsigned irq; |
| 125 | u32 bitmask; |
| 126 | }; |
| 127 | |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 128 | /* Structure to save gpmc cs context */ |
| 129 | struct gpmc_cs_config { |
| 130 | u32 config1; |
| 131 | u32 config2; |
| 132 | u32 config3; |
| 133 | u32 config4; |
| 134 | u32 config5; |
| 135 | u32 config6; |
| 136 | u32 config7; |
| 137 | int is_valid; |
| 138 | }; |
| 139 | |
| 140 | /* |
| 141 | * Structure to save/restore gpmc context |
| 142 | * to support core off on OMAP3 |
| 143 | */ |
| 144 | struct omap3_gpmc_regs { |
| 145 | u32 sysconfig; |
| 146 | u32 irqenable; |
| 147 | u32 timeout_ctrl; |
| 148 | u32 config; |
| 149 | u32 prefetch_config1; |
| 150 | u32 prefetch_config2; |
| 151 | u32 prefetch_control; |
| 152 | struct gpmc_cs_config cs_context[GPMC_CS_NUM]; |
| 153 | }; |
| 154 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 155 | static struct gpmc_client_irq gpmc_client_irq[GPMC_NR_IRQ]; |
| 156 | static struct irq_chip gpmc_irq_chip; |
Chen Gang | af07219 | 2013-08-22 15:47:21 +0800 | [diff] [blame] | 157 | static int gpmc_irq_start; |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 158 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 159 | static struct resource gpmc_mem_root; |
| 160 | static struct resource gpmc_cs_mem[GPMC_CS_NUM]; |
Thomas Gleixner | 87b247c | 2007-05-10 22:33:04 -0700 | [diff] [blame] | 161 | static DEFINE_SPINLOCK(gpmc_mem_lock); |
Jon Hunter | 6797b4f | 2013-02-01 10:38:45 -0600 | [diff] [blame] | 162 | /* Define chip-selects as reserved by default until probe completes */ |
| 163 | static unsigned int gpmc_cs_map = ((1 << GPMC_CS_NUM) - 1); |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 164 | static unsigned int gpmc_cs_num = GPMC_CS_NUM; |
Jon Hunter | 9f83315 | 2013-02-20 15:53:38 -0600 | [diff] [blame] | 165 | static unsigned int gpmc_nr_waitpins; |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 166 | static struct device *gpmc_dev; |
| 167 | static int gpmc_irq; |
| 168 | static resource_size_t phys_base, mem_size; |
| 169 | static unsigned gpmc_capability; |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 170 | static void __iomem *gpmc_base; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 171 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 172 | static struct clk *gpmc_l3_clk; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 173 | |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 174 | static irqreturn_t gpmc_handle_irq(int irq, void *dev); |
| 175 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 176 | static void gpmc_write_reg(int idx, u32 val) |
| 177 | { |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 178 | writel_relaxed(val, gpmc_base + idx); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 179 | } |
| 180 | |
| 181 | static u32 gpmc_read_reg(int idx) |
| 182 | { |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 183 | return readl_relaxed(gpmc_base + idx); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 184 | } |
| 185 | |
| 186 | void gpmc_cs_write_reg(int cs, int idx, u32 val) |
| 187 | { |
| 188 | void __iomem *reg_addr; |
| 189 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 190 | reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 191 | writel_relaxed(val, reg_addr); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 192 | } |
| 193 | |
Ezequiel Garcia | 3fc089e | 2013-02-12 16:22:17 -0300 | [diff] [blame] | 194 | static u32 gpmc_cs_read_reg(int cs, int idx) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 195 | { |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 196 | void __iomem *reg_addr; |
| 197 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 198 | reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 199 | return readl_relaxed(reg_addr); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 200 | } |
| 201 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 202 | /* TODO: Add support for gpmc_fck to clock framework and use it */ |
Ezequiel Garcia | 3fc089e | 2013-02-12 16:22:17 -0300 | [diff] [blame] | 203 | static unsigned long gpmc_get_fclk_period(void) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 204 | { |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 205 | unsigned long rate = clk_get_rate(gpmc_l3_clk); |
| 206 | |
| 207 | if (rate == 0) { |
| 208 | printk(KERN_WARNING "gpmc_l3_clk not enabled\n"); |
| 209 | return 0; |
| 210 | } |
| 211 | |
| 212 | rate /= 1000; |
| 213 | rate = 1000000000 / rate; /* In picoseconds */ |
| 214 | |
| 215 | return rate; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 216 | } |
| 217 | |
Ezequiel Garcia | 3fc089e | 2013-02-12 16:22:17 -0300 | [diff] [blame] | 218 | static unsigned int gpmc_ns_to_ticks(unsigned int time_ns) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 219 | { |
| 220 | unsigned long tick_ps; |
| 221 | |
| 222 | /* Calculate in picosecs to yield more exact results */ |
| 223 | tick_ps = gpmc_get_fclk_period(); |
| 224 | |
| 225 | return (time_ns * 1000 + tick_ps - 1) / tick_ps; |
| 226 | } |
| 227 | |
Ezequiel Garcia | 3fc089e | 2013-02-12 16:22:17 -0300 | [diff] [blame] | 228 | static unsigned int gpmc_ps_to_ticks(unsigned int time_ps) |
Adrian Hunter | a3551f5 | 2010-12-09 10:48:27 +0200 | [diff] [blame] | 229 | { |
| 230 | unsigned long tick_ps; |
| 231 | |
| 232 | /* Calculate in picosecs to yield more exact results */ |
| 233 | tick_ps = gpmc_get_fclk_period(); |
| 234 | |
| 235 | return (time_ps + tick_ps - 1) / tick_ps; |
| 236 | } |
| 237 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 238 | unsigned int gpmc_ticks_to_ns(unsigned int ticks) |
| 239 | { |
| 240 | return ticks * gpmc_get_fclk_period() / 1000; |
| 241 | } |
| 242 | |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 243 | static unsigned int gpmc_ticks_to_ps(unsigned int ticks) |
| 244 | { |
| 245 | return ticks * gpmc_get_fclk_period(); |
| 246 | } |
| 247 | |
| 248 | static unsigned int gpmc_round_ps_to_ticks(unsigned int time_ps) |
| 249 | { |
| 250 | unsigned long ticks = gpmc_ps_to_ticks(time_ps); |
| 251 | |
| 252 | return ticks * gpmc_get_fclk_period(); |
| 253 | } |
| 254 | |
Afzal Mohammed | 559d94b | 2012-05-28 17:51:37 +0530 | [diff] [blame] | 255 | static inline void gpmc_cs_modify_reg(int cs, int reg, u32 mask, bool value) |
| 256 | { |
| 257 | u32 l; |
| 258 | |
| 259 | l = gpmc_cs_read_reg(cs, reg); |
| 260 | if (value) |
| 261 | l |= mask; |
| 262 | else |
| 263 | l &= ~mask; |
| 264 | gpmc_cs_write_reg(cs, reg, l); |
| 265 | } |
| 266 | |
| 267 | static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p) |
| 268 | { |
| 269 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG1, |
| 270 | GPMC_CONFIG1_TIME_PARA_GRAN, |
| 271 | p->time_para_granularity); |
| 272 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG2, |
| 273 | GPMC_CONFIG2_CSEXTRADELAY, p->cs_extra_delay); |
| 274 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG3, |
| 275 | GPMC_CONFIG3_ADVEXTRADELAY, p->adv_extra_delay); |
| 276 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4, |
| 277 | GPMC_CONFIG4_OEEXTRADELAY, p->oe_extra_delay); |
| 278 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4, |
| 279 | GPMC_CONFIG4_OEEXTRADELAY, p->we_extra_delay); |
| 280 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6, |
| 281 | GPMC_CONFIG6_CYCLE2CYCLESAMECSEN, |
| 282 | p->cycle2cyclesamecsen); |
| 283 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6, |
| 284 | GPMC_CONFIG6_CYCLE2CYCLEDIFFCSEN, |
| 285 | p->cycle2cyclediffcsen); |
| 286 | } |
| 287 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 288 | static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, |
Juha Yrjola | 2aab646 | 2006-06-26 16:16:21 -0700 | [diff] [blame] | 289 | int time, const char *name) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 290 | { |
| 291 | u32 l; |
| 292 | int ticks, mask, nr_bits; |
| 293 | |
| 294 | if (time == 0) |
| 295 | ticks = 0; |
| 296 | else |
| 297 | ticks = gpmc_ns_to_ticks(time); |
| 298 | nr_bits = end_bit - st_bit + 1; |
Roger Quadros | 8032374 | 2014-08-29 19:11:50 +0300 | [diff] [blame] | 299 | mask = (1 << nr_bits) - 1; |
| 300 | |
| 301 | if (ticks > mask) { |
| 302 | pr_err("%s: GPMC error! CS%d: %s: %d ns, %d ticks > %d\n", |
| 303 | __func__, cs, name, time, ticks, mask); |
| 304 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 305 | return -1; |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 306 | } |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 307 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 308 | l = gpmc_cs_read_reg(cs, reg); |
| 309 | #ifdef DEBUG |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 310 | printk(KERN_INFO |
| 311 | "GPMC CS%d: %-10s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n", |
Juha Yrjola | 2aab646 | 2006-06-26 16:16:21 -0700 | [diff] [blame] | 312 | cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000, |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 313 | (l >> st_bit) & mask, time); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 314 | #endif |
| 315 | l &= ~(mask << st_bit); |
| 316 | l |= ticks << st_bit; |
| 317 | gpmc_cs_write_reg(cs, reg, l); |
| 318 | |
| 319 | return 0; |
| 320 | } |
| 321 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 322 | #define GPMC_SET_ONE(reg, st, end, field) \ |
| 323 | if (set_gpmc_timing_reg(cs, (reg), (st), (end), \ |
| 324 | t->field, #field) < 0) \ |
| 325 | return -1 |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 326 | |
Afzal Mohammed | 1b47ca1 | 2012-08-19 18:29:45 +0530 | [diff] [blame] | 327 | int gpmc_calc_divider(unsigned int sync_clk) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 328 | { |
| 329 | int div; |
| 330 | u32 l; |
| 331 | |
Adrian Hunter | a3551f5 | 2010-12-09 10:48:27 +0200 | [diff] [blame] | 332 | l = sync_clk + (gpmc_get_fclk_period() - 1); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 333 | div = l / gpmc_get_fclk_period(); |
| 334 | if (div > 4) |
| 335 | return -1; |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 336 | if (div <= 0) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 337 | div = 1; |
| 338 | |
| 339 | return div; |
| 340 | } |
| 341 | |
| 342 | int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) |
| 343 | { |
| 344 | int div; |
| 345 | u32 l; |
| 346 | |
Afzal Mohammed | 1b47ca1 | 2012-08-19 18:29:45 +0530 | [diff] [blame] | 347 | div = gpmc_calc_divider(t->sync_clk); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 348 | if (div < 0) |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 349 | return div; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 350 | |
| 351 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 0, 3, cs_on); |
| 352 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 8, 12, cs_rd_off); |
| 353 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 16, 20, cs_wr_off); |
| 354 | |
| 355 | GPMC_SET_ONE(GPMC_CS_CONFIG3, 0, 3, adv_on); |
| 356 | GPMC_SET_ONE(GPMC_CS_CONFIG3, 8, 12, adv_rd_off); |
| 357 | GPMC_SET_ONE(GPMC_CS_CONFIG3, 16, 20, adv_wr_off); |
| 358 | |
| 359 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 0, 3, oe_on); |
| 360 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 8, 12, oe_off); |
| 361 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 16, 19, we_on); |
| 362 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 24, 28, we_off); |
| 363 | |
| 364 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 0, 4, rd_cycle); |
| 365 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 8, 12, wr_cycle); |
| 366 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 16, 20, access); |
| 367 | |
| 368 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access); |
| 369 | |
Afzal Mohammed | 559d94b | 2012-05-28 17:51:37 +0530 | [diff] [blame] | 370 | GPMC_SET_ONE(GPMC_CS_CONFIG6, 0, 3, bus_turnaround); |
| 371 | GPMC_SET_ONE(GPMC_CS_CONFIG6, 8, 11, cycle2cycle_delay); |
| 372 | |
| 373 | GPMC_SET_ONE(GPMC_CS_CONFIG1, 18, 19, wait_monitoring); |
| 374 | GPMC_SET_ONE(GPMC_CS_CONFIG1, 25, 26, clk_activation); |
| 375 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 376 | if (gpmc_capability & GPMC_HAS_WR_DATA_MUX_BUS) |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 377 | GPMC_SET_ONE(GPMC_CS_CONFIG6, 16, 19, wr_data_mux_bus); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 378 | if (gpmc_capability & GPMC_HAS_WR_ACCESS) |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 379 | GPMC_SET_ONE(GPMC_CS_CONFIG6, 24, 28, wr_access); |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 380 | |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 381 | /* caller is expected to have initialized CONFIG1 to cover |
| 382 | * at least sync vs async |
| 383 | */ |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 384 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 385 | if (l & (GPMC_CONFIG1_READTYPE_SYNC | GPMC_CONFIG1_WRITETYPE_SYNC)) { |
| 386 | #ifdef DEBUG |
| 387 | printk(KERN_INFO "GPMC CS%d CLK period is %lu ns (div %d)\n", |
| 388 | cs, (div * gpmc_get_fclk_period()) / 1000, div); |
| 389 | #endif |
| 390 | l &= ~0x03; |
| 391 | l |= (div - 1); |
| 392 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, l); |
| 393 | } |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 394 | |
Afzal Mohammed | 559d94b | 2012-05-28 17:51:37 +0530 | [diff] [blame] | 395 | gpmc_cs_bool_timings(cs, &t->bool_timings); |
| 396 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 397 | return 0; |
| 398 | } |
| 399 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame^] | 400 | static int gpmc_cs_set_memconf(int cs, u32 base, u32 size) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 401 | { |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 402 | u32 l; |
| 403 | u32 mask; |
| 404 | |
Jon Hunter | c71f8e9 | 2013-03-06 12:00:10 -0600 | [diff] [blame] | 405 | /* |
| 406 | * Ensure that base address is aligned on a |
| 407 | * boundary equal to or greater than size. |
| 408 | */ |
| 409 | if (base & (size - 1)) |
| 410 | return -EINVAL; |
| 411 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 412 | mask = (1 << GPMC_SECTION_SHIFT) - size; |
| 413 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
| 414 | l &= ~0x3f; |
| 415 | l = (base >> GPMC_CHUNK_SHIFT) & 0x3f; |
| 416 | l &= ~(0x0f << 8); |
| 417 | l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8; |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 418 | l |= GPMC_CONFIG7_CSVALID; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 419 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); |
Jon Hunter | c71f8e9 | 2013-03-06 12:00:10 -0600 | [diff] [blame] | 420 | |
| 421 | return 0; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 422 | } |
| 423 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame^] | 424 | static void gpmc_cs_enable_mem(int cs) |
| 425 | { |
| 426 | u32 l; |
| 427 | |
| 428 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
| 429 | l |= GPMC_CONFIG7_CSVALID; |
| 430 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); |
| 431 | } |
| 432 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 433 | static void gpmc_cs_disable_mem(int cs) |
| 434 | { |
| 435 | u32 l; |
| 436 | |
| 437 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 438 | l &= ~GPMC_CONFIG7_CSVALID; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 439 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); |
| 440 | } |
| 441 | |
| 442 | static void gpmc_cs_get_memconf(int cs, u32 *base, u32 *size) |
| 443 | { |
| 444 | u32 l; |
| 445 | u32 mask; |
| 446 | |
| 447 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
| 448 | *base = (l & 0x3f) << GPMC_CHUNK_SHIFT; |
| 449 | mask = (l >> 8) & 0x0f; |
| 450 | *size = (1 << GPMC_SECTION_SHIFT) - (mask << GPMC_CHUNK_SHIFT); |
| 451 | } |
| 452 | |
| 453 | static int gpmc_cs_mem_enabled(int cs) |
| 454 | { |
| 455 | u32 l; |
| 456 | |
| 457 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 458 | return l & GPMC_CONFIG7_CSVALID; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 459 | } |
| 460 | |
Ezequiel Garcia | f5d8eda | 2013-02-12 16:22:24 -0300 | [diff] [blame] | 461 | static void gpmc_cs_set_reserved(int cs, int reserved) |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 462 | { |
| 463 | gpmc_cs_map &= ~(1 << cs); |
| 464 | gpmc_cs_map |= (reserved ? 1 : 0) << cs; |
| 465 | } |
| 466 | |
Ezequiel Garcia | ae9d908 | 2013-02-12 16:22:19 -0300 | [diff] [blame] | 467 | static bool gpmc_cs_reserved(int cs) |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 468 | { |
| 469 | return gpmc_cs_map & (1 << cs); |
| 470 | } |
| 471 | |
| 472 | static unsigned long gpmc_mem_align(unsigned long size) |
| 473 | { |
| 474 | int order; |
| 475 | |
| 476 | size = (size - 1) >> (GPMC_CHUNK_SHIFT - 1); |
| 477 | order = GPMC_CHUNK_SHIFT - 1; |
| 478 | do { |
| 479 | size >>= 1; |
| 480 | order++; |
| 481 | } while (size); |
| 482 | size = 1 << order; |
| 483 | return size; |
| 484 | } |
| 485 | |
| 486 | static int gpmc_cs_insert_mem(int cs, unsigned long base, unsigned long size) |
| 487 | { |
| 488 | struct resource *res = &gpmc_cs_mem[cs]; |
| 489 | int r; |
| 490 | |
| 491 | size = gpmc_mem_align(size); |
| 492 | spin_lock(&gpmc_mem_lock); |
| 493 | res->start = base; |
| 494 | res->end = base + size - 1; |
| 495 | r = request_resource(&gpmc_mem_root, res); |
| 496 | spin_unlock(&gpmc_mem_lock); |
| 497 | |
| 498 | return r; |
| 499 | } |
| 500 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 501 | static int gpmc_cs_delete_mem(int cs) |
| 502 | { |
| 503 | struct resource *res = &gpmc_cs_mem[cs]; |
| 504 | int r; |
| 505 | |
| 506 | spin_lock(&gpmc_mem_lock); |
Tony Lindgren | efe8072 | 2014-04-21 19:26:13 -0700 | [diff] [blame] | 507 | r = release_resource(res); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 508 | res->start = 0; |
| 509 | res->end = 0; |
| 510 | spin_unlock(&gpmc_mem_lock); |
| 511 | |
| 512 | return r; |
| 513 | } |
| 514 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 515 | /** |
| 516 | * gpmc_cs_remap - remaps a chip-select physical base address |
| 517 | * @cs: chip-select to remap |
| 518 | * @base: physical base address to re-map chip-select to |
| 519 | * |
| 520 | * Re-maps a chip-select to a new physical base address specified by |
| 521 | * "base". Returns 0 on success and appropriate negative error code |
| 522 | * on failure. |
| 523 | */ |
| 524 | static int gpmc_cs_remap(int cs, u32 base) |
| 525 | { |
| 526 | int ret; |
| 527 | u32 old_base, size; |
| 528 | |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 529 | if (cs > gpmc_cs_num) { |
| 530 | pr_err("%s: requested chip-select is disabled\n", __func__); |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 531 | return -ENODEV; |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 532 | } |
Tony Lindgren | fb677ef | 2014-04-21 19:26:13 -0700 | [diff] [blame] | 533 | |
| 534 | /* |
| 535 | * Make sure we ignore any device offsets from the GPMC partition |
| 536 | * allocated for the chip select and that the new base confirms |
| 537 | * to the GPMC 16MB minimum granularity. |
| 538 | */ |
| 539 | base &= ~(SZ_16M - 1); |
| 540 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 541 | gpmc_cs_get_memconf(cs, &old_base, &size); |
| 542 | if (base == old_base) |
| 543 | return 0; |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame^] | 544 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 545 | ret = gpmc_cs_delete_mem(cs); |
| 546 | if (ret < 0) |
| 547 | return ret; |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame^] | 548 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 549 | ret = gpmc_cs_insert_mem(cs, base, size); |
| 550 | if (ret < 0) |
| 551 | return ret; |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 552 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame^] | 553 | ret = gpmc_cs_set_memconf(cs, base, size); |
| 554 | |
| 555 | return ret; |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 556 | } |
| 557 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 558 | int gpmc_cs_request(int cs, unsigned long size, unsigned long *base) |
| 559 | { |
| 560 | struct resource *res = &gpmc_cs_mem[cs]; |
| 561 | int r = -1; |
| 562 | |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 563 | if (cs > gpmc_cs_num) { |
| 564 | pr_err("%s: requested chip-select is disabled\n", __func__); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 565 | return -ENODEV; |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 566 | } |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 567 | size = gpmc_mem_align(size); |
| 568 | if (size > (1 << GPMC_SECTION_SHIFT)) |
| 569 | return -ENOMEM; |
| 570 | |
| 571 | spin_lock(&gpmc_mem_lock); |
| 572 | if (gpmc_cs_reserved(cs)) { |
| 573 | r = -EBUSY; |
| 574 | goto out; |
| 575 | } |
| 576 | if (gpmc_cs_mem_enabled(cs)) |
| 577 | r = adjust_resource(res, res->start & ~(size - 1), size); |
| 578 | if (r < 0) |
| 579 | r = allocate_resource(&gpmc_mem_root, res, size, 0, ~0, |
| 580 | size, NULL, NULL); |
| 581 | if (r < 0) |
| 582 | goto out; |
| 583 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame^] | 584 | /* Disable CS while changing base address and size mask */ |
| 585 | gpmc_cs_disable_mem(cs); |
| 586 | |
| 587 | r = gpmc_cs_set_memconf(cs, res->start, resource_size(res)); |
Jon Hunter | c71f8e9 | 2013-03-06 12:00:10 -0600 | [diff] [blame] | 588 | if (r < 0) { |
| 589 | release_resource(res); |
| 590 | goto out; |
| 591 | } |
| 592 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame^] | 593 | /* Enable CS */ |
| 594 | gpmc_cs_enable_mem(cs); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 595 | *base = res->start; |
| 596 | gpmc_cs_set_reserved(cs, 1); |
| 597 | out: |
| 598 | spin_unlock(&gpmc_mem_lock); |
| 599 | return r; |
| 600 | } |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 601 | EXPORT_SYMBOL(gpmc_cs_request); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 602 | |
| 603 | void gpmc_cs_free(int cs) |
| 604 | { |
Tony Lindgren | efe8072 | 2014-04-21 19:26:13 -0700 | [diff] [blame] | 605 | struct resource *res = &gpmc_cs_mem[cs]; |
| 606 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 607 | spin_lock(&gpmc_mem_lock); |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 608 | if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) { |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 609 | printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs); |
| 610 | BUG(); |
| 611 | spin_unlock(&gpmc_mem_lock); |
| 612 | return; |
| 613 | } |
| 614 | gpmc_cs_disable_mem(cs); |
Tony Lindgren | efe8072 | 2014-04-21 19:26:13 -0700 | [diff] [blame] | 615 | if (res->flags) |
| 616 | release_resource(res); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 617 | gpmc_cs_set_reserved(cs, 0); |
| 618 | spin_unlock(&gpmc_mem_lock); |
| 619 | } |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 620 | EXPORT_SYMBOL(gpmc_cs_free); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 621 | |
vimal singh | 59e9c5a | 2009-07-13 16:26:24 +0530 | [diff] [blame] | 622 | /** |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 623 | * gpmc_configure - write request to configure gpmc |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 624 | * @cmd: command type |
| 625 | * @wval: value to write |
| 626 | * @return status of the operation |
| 627 | */ |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 628 | int gpmc_configure(int cmd, int wval) |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 629 | { |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 630 | u32 regval; |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 631 | |
| 632 | switch (cmd) { |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 633 | case GPMC_ENABLE_IRQ: |
| 634 | gpmc_write_reg(GPMC_IRQENABLE, wval); |
| 635 | break; |
| 636 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 637 | case GPMC_SET_IRQ_STATUS: |
| 638 | gpmc_write_reg(GPMC_IRQSTATUS, wval); |
| 639 | break; |
| 640 | |
| 641 | case GPMC_CONFIG_WP: |
| 642 | regval = gpmc_read_reg(GPMC_CONFIG); |
| 643 | if (wval) |
| 644 | regval &= ~GPMC_CONFIG_WRITEPROTECT; /* WP is ON */ |
| 645 | else |
| 646 | regval |= GPMC_CONFIG_WRITEPROTECT; /* WP is OFF */ |
| 647 | gpmc_write_reg(GPMC_CONFIG, regval); |
| 648 | break; |
| 649 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 650 | default: |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 651 | pr_err("%s: command not supported\n", __func__); |
| 652 | return -EINVAL; |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 653 | } |
| 654 | |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 655 | return 0; |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 656 | } |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 657 | EXPORT_SYMBOL(gpmc_configure); |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 658 | |
Afzal Mohammed | 52bd138 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 659 | void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs) |
| 660 | { |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 661 | int i; |
| 662 | |
Afzal Mohammed | 52bd138 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 663 | reg->gpmc_status = gpmc_base + GPMC_STATUS; |
| 664 | reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET + |
| 665 | GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs; |
| 666 | reg->gpmc_nand_address = gpmc_base + GPMC_CS0_OFFSET + |
| 667 | GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs; |
| 668 | reg->gpmc_nand_data = gpmc_base + GPMC_CS0_OFFSET + |
| 669 | GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs; |
| 670 | reg->gpmc_prefetch_config1 = gpmc_base + GPMC_PREFETCH_CONFIG1; |
| 671 | reg->gpmc_prefetch_config2 = gpmc_base + GPMC_PREFETCH_CONFIG2; |
| 672 | reg->gpmc_prefetch_control = gpmc_base + GPMC_PREFETCH_CONTROL; |
| 673 | reg->gpmc_prefetch_status = gpmc_base + GPMC_PREFETCH_STATUS; |
| 674 | reg->gpmc_ecc_config = gpmc_base + GPMC_ECC_CONFIG; |
| 675 | reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL; |
| 676 | reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG; |
| 677 | reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT; |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 678 | |
| 679 | for (i = 0; i < GPMC_BCH_NUM_REMAINDER; i++) { |
| 680 | reg->gpmc_bch_result0[i] = gpmc_base + GPMC_ECC_BCH_RESULT_0 + |
| 681 | GPMC_BCH_SIZE * i; |
| 682 | reg->gpmc_bch_result1[i] = gpmc_base + GPMC_ECC_BCH_RESULT_1 + |
| 683 | GPMC_BCH_SIZE * i; |
| 684 | reg->gpmc_bch_result2[i] = gpmc_base + GPMC_ECC_BCH_RESULT_2 + |
| 685 | GPMC_BCH_SIZE * i; |
| 686 | reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 + |
| 687 | GPMC_BCH_SIZE * i; |
pekon gupta | 27c9fd6 | 2014-05-19 13:24:39 +0530 | [diff] [blame] | 688 | reg->gpmc_bch_result4[i] = gpmc_base + GPMC_ECC_BCH_RESULT_4 + |
| 689 | i * GPMC_BCH_SIZE; |
| 690 | reg->gpmc_bch_result5[i] = gpmc_base + GPMC_ECC_BCH_RESULT_5 + |
| 691 | i * GPMC_BCH_SIZE; |
| 692 | reg->gpmc_bch_result6[i] = gpmc_base + GPMC_ECC_BCH_RESULT_6 + |
| 693 | i * GPMC_BCH_SIZE; |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 694 | } |
Afzal Mohammed | 52bd138 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 695 | } |
| 696 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 697 | int gpmc_get_client_irq(unsigned irq_config) |
| 698 | { |
| 699 | int i; |
| 700 | |
| 701 | if (hweight32(irq_config) > 1) |
| 702 | return 0; |
| 703 | |
| 704 | for (i = 0; i < GPMC_NR_IRQ; i++) |
| 705 | if (gpmc_client_irq[i].bitmask & irq_config) |
| 706 | return gpmc_client_irq[i].irq; |
| 707 | |
| 708 | return 0; |
| 709 | } |
| 710 | |
| 711 | static int gpmc_irq_endis(unsigned irq, bool endis) |
| 712 | { |
| 713 | int i; |
| 714 | u32 regval; |
| 715 | |
| 716 | for (i = 0; i < GPMC_NR_IRQ; i++) |
| 717 | if (irq == gpmc_client_irq[i].irq) { |
| 718 | regval = gpmc_read_reg(GPMC_IRQENABLE); |
| 719 | if (endis) |
| 720 | regval |= gpmc_client_irq[i].bitmask; |
| 721 | else |
| 722 | regval &= ~gpmc_client_irq[i].bitmask; |
| 723 | gpmc_write_reg(GPMC_IRQENABLE, regval); |
| 724 | break; |
| 725 | } |
| 726 | |
| 727 | return 0; |
| 728 | } |
| 729 | |
| 730 | static void gpmc_irq_disable(struct irq_data *p) |
| 731 | { |
| 732 | gpmc_irq_endis(p->irq, false); |
| 733 | } |
| 734 | |
| 735 | static void gpmc_irq_enable(struct irq_data *p) |
| 736 | { |
| 737 | gpmc_irq_endis(p->irq, true); |
| 738 | } |
| 739 | |
| 740 | static void gpmc_irq_noop(struct irq_data *data) { } |
| 741 | |
| 742 | static unsigned int gpmc_irq_noop_ret(struct irq_data *data) { return 0; } |
| 743 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 744 | static int gpmc_setup_irq(void) |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 745 | { |
| 746 | int i; |
| 747 | u32 regval; |
| 748 | |
| 749 | if (!gpmc_irq) |
| 750 | return -EINVAL; |
| 751 | |
| 752 | gpmc_irq_start = irq_alloc_descs(-1, 0, GPMC_NR_IRQ, 0); |
Russell King | 7185684 | 2013-03-13 20:44:21 +0000 | [diff] [blame] | 753 | if (gpmc_irq_start < 0) { |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 754 | pr_err("irq_alloc_descs failed\n"); |
| 755 | return gpmc_irq_start; |
| 756 | } |
| 757 | |
| 758 | gpmc_irq_chip.name = "gpmc"; |
| 759 | gpmc_irq_chip.irq_startup = gpmc_irq_noop_ret; |
| 760 | gpmc_irq_chip.irq_enable = gpmc_irq_enable; |
| 761 | gpmc_irq_chip.irq_disable = gpmc_irq_disable; |
| 762 | gpmc_irq_chip.irq_shutdown = gpmc_irq_noop; |
| 763 | gpmc_irq_chip.irq_ack = gpmc_irq_noop; |
| 764 | gpmc_irq_chip.irq_mask = gpmc_irq_noop; |
| 765 | gpmc_irq_chip.irq_unmask = gpmc_irq_noop; |
| 766 | |
| 767 | gpmc_client_irq[0].bitmask = GPMC_IRQ_FIFOEVENTENABLE; |
| 768 | gpmc_client_irq[1].bitmask = GPMC_IRQ_COUNT_EVENT; |
| 769 | |
| 770 | for (i = 0; i < GPMC_NR_IRQ; i++) { |
| 771 | gpmc_client_irq[i].irq = gpmc_irq_start + i; |
| 772 | irq_set_chip_and_handler(gpmc_client_irq[i].irq, |
| 773 | &gpmc_irq_chip, handle_simple_irq); |
| 774 | set_irq_flags(gpmc_client_irq[i].irq, |
| 775 | IRQF_VALID | IRQF_NOAUTOEN); |
| 776 | } |
| 777 | |
| 778 | /* Disable interrupts */ |
| 779 | gpmc_write_reg(GPMC_IRQENABLE, 0); |
| 780 | |
| 781 | /* clear interrupts */ |
| 782 | regval = gpmc_read_reg(GPMC_IRQSTATUS); |
| 783 | gpmc_write_reg(GPMC_IRQSTATUS, regval); |
| 784 | |
| 785 | return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL); |
| 786 | } |
| 787 | |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 788 | static int gpmc_free_irq(void) |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 789 | { |
| 790 | int i; |
| 791 | |
| 792 | if (gpmc_irq) |
| 793 | free_irq(gpmc_irq, NULL); |
| 794 | |
| 795 | for (i = 0; i < GPMC_NR_IRQ; i++) { |
| 796 | irq_set_handler(gpmc_client_irq[i].irq, NULL); |
| 797 | irq_set_chip(gpmc_client_irq[i].irq, &no_irq_chip); |
| 798 | irq_modify_status(gpmc_client_irq[i].irq, 0, 0); |
| 799 | } |
| 800 | |
| 801 | irq_free_descs(gpmc_irq_start, GPMC_NR_IRQ); |
| 802 | |
| 803 | return 0; |
| 804 | } |
| 805 | |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 806 | static void gpmc_mem_exit(void) |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 807 | { |
| 808 | int cs; |
| 809 | |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 810 | for (cs = 0; cs < gpmc_cs_num; cs++) { |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 811 | if (!gpmc_cs_mem_enabled(cs)) |
| 812 | continue; |
| 813 | gpmc_cs_delete_mem(cs); |
| 814 | } |
| 815 | |
| 816 | } |
| 817 | |
Jon Hunter | 84b00f0 | 2013-03-06 14:36:47 -0600 | [diff] [blame] | 818 | static void gpmc_mem_init(void) |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 819 | { |
Jon Hunter | 84b00f0 | 2013-03-06 14:36:47 -0600 | [diff] [blame] | 820 | int cs; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 821 | |
Jon Hunter | bf23439 | 2013-03-06 14:12:59 -0600 | [diff] [blame] | 822 | /* |
| 823 | * The first 1MB of GPMC address space is typically mapped to |
| 824 | * the internal ROM. Never allocate the first page, to |
| 825 | * facilitate bug detection; even if we didn't boot from ROM. |
Kyungmin Park | 7f24516 | 2006-12-29 16:48:51 -0800 | [diff] [blame] | 826 | */ |
Jon Hunter | bf23439 | 2013-03-06 14:12:59 -0600 | [diff] [blame] | 827 | gpmc_mem_root.start = SZ_1M; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 828 | gpmc_mem_root.end = GPMC_MEM_END; |
| 829 | |
| 830 | /* Reserve all regions that has been set up by bootloader */ |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 831 | for (cs = 0; cs < gpmc_cs_num; cs++) { |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 832 | u32 base, size; |
| 833 | |
| 834 | if (!gpmc_cs_mem_enabled(cs)) |
| 835 | continue; |
| 836 | gpmc_cs_get_memconf(cs, &base, &size); |
Jon Hunter | 84b00f0 | 2013-03-06 14:36:47 -0600 | [diff] [blame] | 837 | if (gpmc_cs_insert_mem(cs, base, size)) { |
| 838 | pr_warn("%s: disabling cs %d mapped at 0x%x-0x%x\n", |
| 839 | __func__, cs, base, base + size); |
| 840 | gpmc_cs_disable_mem(cs); |
Jon Hunter | 8119024 | 2012-10-17 09:41:25 -0500 | [diff] [blame] | 841 | } |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 842 | } |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 843 | } |
| 844 | |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 845 | static u32 gpmc_round_ps_to_sync_clk(u32 time_ps, u32 sync_clk) |
| 846 | { |
| 847 | u32 temp; |
| 848 | int div; |
| 849 | |
| 850 | div = gpmc_calc_divider(sync_clk); |
| 851 | temp = gpmc_ps_to_ticks(time_ps); |
| 852 | temp = (temp + div - 1) / div; |
| 853 | return gpmc_ticks_to_ps(temp * div); |
| 854 | } |
| 855 | |
| 856 | /* XXX: can the cycles be avoided ? */ |
| 857 | static int gpmc_calc_sync_read_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 858 | struct gpmc_device_timings *dev_t, |
| 859 | bool mux) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 860 | { |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 861 | u32 temp; |
| 862 | |
| 863 | /* adv_rd_off */ |
| 864 | temp = dev_t->t_avdp_r; |
| 865 | /* XXX: mux check required ? */ |
| 866 | if (mux) { |
| 867 | /* XXX: t_avdp not to be required for sync, only added for tusb |
| 868 | * this indirectly necessitates requirement of t_avdp_r and |
| 869 | * t_avdp_w instead of having a single t_avdp |
| 870 | */ |
| 871 | temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_avdh); |
| 872 | temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); |
| 873 | } |
| 874 | gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); |
| 875 | |
| 876 | /* oe_on */ |
| 877 | temp = dev_t->t_oeasu; /* XXX: remove this ? */ |
| 878 | if (mux) { |
| 879 | temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_ach); |
| 880 | temp = max_t(u32, temp, gpmc_t->adv_rd_off + |
| 881 | gpmc_ticks_to_ps(dev_t->cyc_aavdh_oe)); |
| 882 | } |
| 883 | gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); |
| 884 | |
| 885 | /* access */ |
| 886 | /* XXX: any scope for improvement ?, by combining oe_on |
| 887 | * and clk_activation, need to check whether |
| 888 | * access = clk_activation + round to sync clk ? |
| 889 | */ |
| 890 | temp = max_t(u32, dev_t->t_iaa, dev_t->cyc_iaa * gpmc_t->sync_clk); |
| 891 | temp += gpmc_t->clk_activation; |
| 892 | if (dev_t->cyc_oe) |
| 893 | temp = max_t(u32, temp, gpmc_t->oe_on + |
| 894 | gpmc_ticks_to_ps(dev_t->cyc_oe)); |
| 895 | gpmc_t->access = gpmc_round_ps_to_ticks(temp); |
| 896 | |
| 897 | gpmc_t->oe_off = gpmc_t->access + gpmc_ticks_to_ps(1); |
| 898 | gpmc_t->cs_rd_off = gpmc_t->oe_off; |
| 899 | |
| 900 | /* rd_cycle */ |
| 901 | temp = max_t(u32, dev_t->t_cez_r, dev_t->t_oez); |
| 902 | temp = gpmc_round_ps_to_sync_clk(temp, gpmc_t->sync_clk) + |
| 903 | gpmc_t->access; |
| 904 | /* XXX: barter t_ce_rdyz with t_cez_r ? */ |
| 905 | if (dev_t->t_ce_rdyz) |
| 906 | temp = max_t(u32, temp, gpmc_t->cs_rd_off + dev_t->t_ce_rdyz); |
| 907 | gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); |
| 908 | |
| 909 | return 0; |
| 910 | } |
| 911 | |
| 912 | static int gpmc_calc_sync_write_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 913 | struct gpmc_device_timings *dev_t, |
| 914 | bool mux) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 915 | { |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 916 | u32 temp; |
| 917 | |
| 918 | /* adv_wr_off */ |
| 919 | temp = dev_t->t_avdp_w; |
| 920 | if (mux) { |
| 921 | temp = max_t(u32, temp, |
| 922 | gpmc_t->clk_activation + dev_t->t_avdh); |
| 923 | temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); |
| 924 | } |
| 925 | gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); |
| 926 | |
| 927 | /* wr_data_mux_bus */ |
| 928 | temp = max_t(u32, dev_t->t_weasu, |
| 929 | gpmc_t->clk_activation + dev_t->t_rdyo); |
| 930 | /* XXX: shouldn't mux be kept as a whole for wr_data_mux_bus ?, |
| 931 | * and in that case remember to handle we_on properly |
| 932 | */ |
| 933 | if (mux) { |
| 934 | temp = max_t(u32, temp, |
| 935 | gpmc_t->adv_wr_off + dev_t->t_aavdh); |
| 936 | temp = max_t(u32, temp, gpmc_t->adv_wr_off + |
| 937 | gpmc_ticks_to_ps(dev_t->cyc_aavdh_we)); |
| 938 | } |
| 939 | gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); |
| 940 | |
| 941 | /* we_on */ |
| 942 | if (gpmc_capability & GPMC_HAS_WR_DATA_MUX_BUS) |
| 943 | gpmc_t->we_on = gpmc_round_ps_to_ticks(dev_t->t_weasu); |
| 944 | else |
| 945 | gpmc_t->we_on = gpmc_t->wr_data_mux_bus; |
| 946 | |
| 947 | /* wr_access */ |
| 948 | /* XXX: gpmc_capability check reqd ? , even if not, will not harm */ |
| 949 | gpmc_t->wr_access = gpmc_t->access; |
| 950 | |
| 951 | /* we_off */ |
| 952 | temp = gpmc_t->we_on + dev_t->t_wpl; |
| 953 | temp = max_t(u32, temp, |
| 954 | gpmc_t->wr_access + gpmc_ticks_to_ps(1)); |
| 955 | temp = max_t(u32, temp, |
| 956 | gpmc_t->we_on + gpmc_ticks_to_ps(dev_t->cyc_wpl)); |
| 957 | gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); |
| 958 | |
| 959 | gpmc_t->cs_wr_off = gpmc_round_ps_to_ticks(gpmc_t->we_off + |
| 960 | dev_t->t_wph); |
| 961 | |
| 962 | /* wr_cycle */ |
| 963 | temp = gpmc_round_ps_to_sync_clk(dev_t->t_cez_w, gpmc_t->sync_clk); |
| 964 | temp += gpmc_t->wr_access; |
| 965 | /* XXX: barter t_ce_rdyz with t_cez_w ? */ |
| 966 | if (dev_t->t_ce_rdyz) |
| 967 | temp = max_t(u32, temp, |
| 968 | gpmc_t->cs_wr_off + dev_t->t_ce_rdyz); |
| 969 | gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); |
| 970 | |
| 971 | return 0; |
| 972 | } |
| 973 | |
| 974 | static int gpmc_calc_async_read_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 975 | struct gpmc_device_timings *dev_t, |
| 976 | bool mux) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 977 | { |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 978 | u32 temp; |
| 979 | |
| 980 | /* adv_rd_off */ |
| 981 | temp = dev_t->t_avdp_r; |
| 982 | if (mux) |
| 983 | temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); |
| 984 | gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); |
| 985 | |
| 986 | /* oe_on */ |
| 987 | temp = dev_t->t_oeasu; |
| 988 | if (mux) |
| 989 | temp = max_t(u32, temp, |
| 990 | gpmc_t->adv_rd_off + dev_t->t_aavdh); |
| 991 | gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); |
| 992 | |
| 993 | /* access */ |
| 994 | temp = max_t(u32, dev_t->t_iaa, /* XXX: remove t_iaa in async ? */ |
| 995 | gpmc_t->oe_on + dev_t->t_oe); |
| 996 | temp = max_t(u32, temp, |
| 997 | gpmc_t->cs_on + dev_t->t_ce); |
| 998 | temp = max_t(u32, temp, |
| 999 | gpmc_t->adv_on + dev_t->t_aa); |
| 1000 | gpmc_t->access = gpmc_round_ps_to_ticks(temp); |
| 1001 | |
| 1002 | gpmc_t->oe_off = gpmc_t->access + gpmc_ticks_to_ps(1); |
| 1003 | gpmc_t->cs_rd_off = gpmc_t->oe_off; |
| 1004 | |
| 1005 | /* rd_cycle */ |
| 1006 | temp = max_t(u32, dev_t->t_rd_cycle, |
| 1007 | gpmc_t->cs_rd_off + dev_t->t_cez_r); |
| 1008 | temp = max_t(u32, temp, gpmc_t->oe_off + dev_t->t_oez); |
| 1009 | gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); |
| 1010 | |
| 1011 | return 0; |
| 1012 | } |
| 1013 | |
| 1014 | static int gpmc_calc_async_write_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1015 | struct gpmc_device_timings *dev_t, |
| 1016 | bool mux) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1017 | { |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1018 | u32 temp; |
| 1019 | |
| 1020 | /* adv_wr_off */ |
| 1021 | temp = dev_t->t_avdp_w; |
| 1022 | if (mux) |
| 1023 | temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); |
| 1024 | gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); |
| 1025 | |
| 1026 | /* wr_data_mux_bus */ |
| 1027 | temp = dev_t->t_weasu; |
| 1028 | if (mux) { |
| 1029 | temp = max_t(u32, temp, gpmc_t->adv_wr_off + dev_t->t_aavdh); |
| 1030 | temp = max_t(u32, temp, gpmc_t->adv_wr_off + |
| 1031 | gpmc_ticks_to_ps(dev_t->cyc_aavdh_we)); |
| 1032 | } |
| 1033 | gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); |
| 1034 | |
| 1035 | /* we_on */ |
| 1036 | if (gpmc_capability & GPMC_HAS_WR_DATA_MUX_BUS) |
| 1037 | gpmc_t->we_on = gpmc_round_ps_to_ticks(dev_t->t_weasu); |
| 1038 | else |
| 1039 | gpmc_t->we_on = gpmc_t->wr_data_mux_bus; |
| 1040 | |
| 1041 | /* we_off */ |
| 1042 | temp = gpmc_t->we_on + dev_t->t_wpl; |
| 1043 | gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); |
| 1044 | |
| 1045 | gpmc_t->cs_wr_off = gpmc_round_ps_to_ticks(gpmc_t->we_off + |
| 1046 | dev_t->t_wph); |
| 1047 | |
| 1048 | /* wr_cycle */ |
| 1049 | temp = max_t(u32, dev_t->t_wr_cycle, |
| 1050 | gpmc_t->cs_wr_off + dev_t->t_cez_w); |
| 1051 | gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); |
| 1052 | |
| 1053 | return 0; |
| 1054 | } |
| 1055 | |
| 1056 | static int gpmc_calc_sync_common_timings(struct gpmc_timings *gpmc_t, |
| 1057 | struct gpmc_device_timings *dev_t) |
| 1058 | { |
| 1059 | u32 temp; |
| 1060 | |
| 1061 | gpmc_t->sync_clk = gpmc_calc_divider(dev_t->clk) * |
| 1062 | gpmc_get_fclk_period(); |
| 1063 | |
| 1064 | gpmc_t->page_burst_access = gpmc_round_ps_to_sync_clk( |
| 1065 | dev_t->t_bacc, |
| 1066 | gpmc_t->sync_clk); |
| 1067 | |
| 1068 | temp = max_t(u32, dev_t->t_ces, dev_t->t_avds); |
| 1069 | gpmc_t->clk_activation = gpmc_round_ps_to_ticks(temp); |
| 1070 | |
| 1071 | if (gpmc_calc_divider(gpmc_t->sync_clk) != 1) |
| 1072 | return 0; |
| 1073 | |
| 1074 | if (dev_t->ce_xdelay) |
| 1075 | gpmc_t->bool_timings.cs_extra_delay = true; |
| 1076 | if (dev_t->avd_xdelay) |
| 1077 | gpmc_t->bool_timings.adv_extra_delay = true; |
| 1078 | if (dev_t->oe_xdelay) |
| 1079 | gpmc_t->bool_timings.oe_extra_delay = true; |
| 1080 | if (dev_t->we_xdelay) |
| 1081 | gpmc_t->bool_timings.we_extra_delay = true; |
| 1082 | |
| 1083 | return 0; |
| 1084 | } |
| 1085 | |
| 1086 | static int gpmc_calc_common_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1087 | struct gpmc_device_timings *dev_t, |
| 1088 | bool sync) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1089 | { |
| 1090 | u32 temp; |
| 1091 | |
| 1092 | /* cs_on */ |
| 1093 | gpmc_t->cs_on = gpmc_round_ps_to_ticks(dev_t->t_ceasu); |
| 1094 | |
| 1095 | /* adv_on */ |
| 1096 | temp = dev_t->t_avdasu; |
| 1097 | if (dev_t->t_ce_avd) |
| 1098 | temp = max_t(u32, temp, |
| 1099 | gpmc_t->cs_on + dev_t->t_ce_avd); |
| 1100 | gpmc_t->adv_on = gpmc_round_ps_to_ticks(temp); |
| 1101 | |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1102 | if (sync) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1103 | gpmc_calc_sync_common_timings(gpmc_t, dev_t); |
| 1104 | |
| 1105 | return 0; |
| 1106 | } |
| 1107 | |
| 1108 | /* TODO: remove this function once all peripherals are confirmed to |
| 1109 | * work with generic timing. Simultaneously gpmc_cs_set_timings() |
| 1110 | * has to be modified to handle timings in ps instead of ns |
| 1111 | */ |
| 1112 | static void gpmc_convert_ps_to_ns(struct gpmc_timings *t) |
| 1113 | { |
| 1114 | t->cs_on /= 1000; |
| 1115 | t->cs_rd_off /= 1000; |
| 1116 | t->cs_wr_off /= 1000; |
| 1117 | t->adv_on /= 1000; |
| 1118 | t->adv_rd_off /= 1000; |
| 1119 | t->adv_wr_off /= 1000; |
| 1120 | t->we_on /= 1000; |
| 1121 | t->we_off /= 1000; |
| 1122 | t->oe_on /= 1000; |
| 1123 | t->oe_off /= 1000; |
| 1124 | t->page_burst_access /= 1000; |
| 1125 | t->access /= 1000; |
| 1126 | t->rd_cycle /= 1000; |
| 1127 | t->wr_cycle /= 1000; |
| 1128 | t->bus_turnaround /= 1000; |
| 1129 | t->cycle2cycle_delay /= 1000; |
| 1130 | t->wait_monitoring /= 1000; |
| 1131 | t->clk_activation /= 1000; |
| 1132 | t->wr_access /= 1000; |
| 1133 | t->wr_data_mux_bus /= 1000; |
| 1134 | } |
| 1135 | |
| 1136 | int gpmc_calc_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1137 | struct gpmc_settings *gpmc_s, |
| 1138 | struct gpmc_device_timings *dev_t) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1139 | { |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1140 | bool mux = false, sync = false; |
| 1141 | |
| 1142 | if (gpmc_s) { |
| 1143 | mux = gpmc_s->mux_add_data ? true : false; |
| 1144 | sync = (gpmc_s->sync_read || gpmc_s->sync_write); |
| 1145 | } |
| 1146 | |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1147 | memset(gpmc_t, 0, sizeof(*gpmc_t)); |
| 1148 | |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1149 | gpmc_calc_common_timings(gpmc_t, dev_t, sync); |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1150 | |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1151 | if (gpmc_s && gpmc_s->sync_read) |
| 1152 | gpmc_calc_sync_read_timings(gpmc_t, dev_t, mux); |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1153 | else |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1154 | gpmc_calc_async_read_timings(gpmc_t, dev_t, mux); |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1155 | |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1156 | if (gpmc_s && gpmc_s->sync_write) |
| 1157 | gpmc_calc_sync_write_timings(gpmc_t, dev_t, mux); |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1158 | else |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1159 | gpmc_calc_async_write_timings(gpmc_t, dev_t, mux); |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1160 | |
| 1161 | /* TODO: remove, see function definition */ |
| 1162 | gpmc_convert_ps_to_ns(gpmc_t); |
| 1163 | |
| 1164 | return 0; |
| 1165 | } |
| 1166 | |
Jon Hunter | aa8d476 | 2013-02-21 15:25:23 -0600 | [diff] [blame] | 1167 | /** |
| 1168 | * gpmc_cs_program_settings - programs non-timing related settings |
| 1169 | * @cs: GPMC chip-select to program |
| 1170 | * @p: pointer to GPMC settings structure |
| 1171 | * |
| 1172 | * Programs non-timing related settings for a GPMC chip-select, such as |
| 1173 | * bus-width, burst configuration, etc. Function should be called once |
| 1174 | * for each chip-select that is being used and must be called before |
| 1175 | * calling gpmc_cs_set_timings() as timing parameters in the CONFIG1 |
| 1176 | * register will be initialised to zero by this function. Returns 0 on |
| 1177 | * success and appropriate negative error code on failure. |
| 1178 | */ |
| 1179 | int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) |
| 1180 | { |
| 1181 | u32 config1; |
| 1182 | |
| 1183 | if ((!p->device_width) || (p->device_width > GPMC_DEVWIDTH_16BIT)) { |
| 1184 | pr_err("%s: invalid width %d!", __func__, p->device_width); |
| 1185 | return -EINVAL; |
| 1186 | } |
| 1187 | |
| 1188 | /* Address-data multiplexing not supported for NAND devices */ |
| 1189 | if (p->device_nand && p->mux_add_data) { |
| 1190 | pr_err("%s: invalid configuration!\n", __func__); |
| 1191 | return -EINVAL; |
| 1192 | } |
| 1193 | |
| 1194 | if ((p->mux_add_data > GPMC_MUX_AD) || |
| 1195 | ((p->mux_add_data == GPMC_MUX_AAD) && |
| 1196 | !(gpmc_capability & GPMC_HAS_MUX_AAD))) { |
| 1197 | pr_err("%s: invalid multiplex configuration!\n", __func__); |
| 1198 | return -EINVAL; |
| 1199 | } |
| 1200 | |
| 1201 | /* Page/burst mode supports lengths of 4, 8 and 16 bytes */ |
| 1202 | if (p->burst_read || p->burst_write) { |
| 1203 | switch (p->burst_len) { |
| 1204 | case GPMC_BURST_4: |
| 1205 | case GPMC_BURST_8: |
| 1206 | case GPMC_BURST_16: |
| 1207 | break; |
| 1208 | default: |
| 1209 | pr_err("%s: invalid page/burst-length (%d)\n", |
| 1210 | __func__, p->burst_len); |
| 1211 | return -EINVAL; |
| 1212 | } |
| 1213 | } |
| 1214 | |
Roger Quadros | 2b54057 | 2014-09-02 16:57:06 +0300 | [diff] [blame] | 1215 | if (p->wait_pin > gpmc_nr_waitpins) { |
Jon Hunter | aa8d476 | 2013-02-21 15:25:23 -0600 | [diff] [blame] | 1216 | pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin); |
| 1217 | return -EINVAL; |
| 1218 | } |
| 1219 | |
| 1220 | config1 = GPMC_CONFIG1_DEVICESIZE((p->device_width - 1)); |
| 1221 | |
| 1222 | if (p->sync_read) |
| 1223 | config1 |= GPMC_CONFIG1_READTYPE_SYNC; |
| 1224 | if (p->sync_write) |
| 1225 | config1 |= GPMC_CONFIG1_WRITETYPE_SYNC; |
| 1226 | if (p->wait_on_read) |
| 1227 | config1 |= GPMC_CONFIG1_WAIT_READ_MON; |
| 1228 | if (p->wait_on_write) |
| 1229 | config1 |= GPMC_CONFIG1_WAIT_WRITE_MON; |
| 1230 | if (p->wait_on_read || p->wait_on_write) |
| 1231 | config1 |= GPMC_CONFIG1_WAIT_PIN_SEL(p->wait_pin); |
| 1232 | if (p->device_nand) |
| 1233 | config1 |= GPMC_CONFIG1_DEVICETYPE(GPMC_DEVICETYPE_NAND); |
| 1234 | if (p->mux_add_data) |
| 1235 | config1 |= GPMC_CONFIG1_MUXTYPE(p->mux_add_data); |
| 1236 | if (p->burst_read) |
| 1237 | config1 |= GPMC_CONFIG1_READMULTIPLE_SUPP; |
| 1238 | if (p->burst_write) |
| 1239 | config1 |= GPMC_CONFIG1_WRITEMULTIPLE_SUPP; |
| 1240 | if (p->burst_read || p->burst_write) { |
| 1241 | config1 |= GPMC_CONFIG1_PAGE_LEN(p->burst_len >> 3); |
| 1242 | config1 |= p->burst_wrap ? GPMC_CONFIG1_WRAPBURST_SUPP : 0; |
| 1243 | } |
| 1244 | |
| 1245 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1); |
| 1246 | |
| 1247 | return 0; |
| 1248 | } |
| 1249 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1250 | #ifdef CONFIG_OF |
Uwe Kleine-König | 3195760 | 2014-09-10 10:26:17 +0200 | [diff] [blame] | 1251 | static const struct of_device_id gpmc_dt_ids[] = { |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1252 | { .compatible = "ti,omap2420-gpmc" }, |
| 1253 | { .compatible = "ti,omap2430-gpmc" }, |
| 1254 | { .compatible = "ti,omap3430-gpmc" }, /* omap3430 & omap3630 */ |
| 1255 | { .compatible = "ti,omap4430-gpmc" }, /* omap4430 & omap4460 & omap543x */ |
| 1256 | { .compatible = "ti,am3352-gpmc" }, /* am335x devices */ |
| 1257 | { } |
| 1258 | }; |
| 1259 | MODULE_DEVICE_TABLE(of, gpmc_dt_ids); |
| 1260 | |
Jon Hunter | 8c8a7771 | 2013-02-20 15:53:12 -0600 | [diff] [blame] | 1261 | /** |
| 1262 | * gpmc_read_settings_dt - read gpmc settings from device-tree |
| 1263 | * @np: pointer to device-tree node for a gpmc child device |
| 1264 | * @p: pointer to gpmc settings structure |
| 1265 | * |
| 1266 | * Reads the GPMC settings for a GPMC child device from device-tree and |
| 1267 | * stores them in the GPMC settings structure passed. The GPMC settings |
| 1268 | * structure is initialised to zero by this function and so any |
| 1269 | * previously stored settings will be cleared. |
| 1270 | */ |
| 1271 | void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) |
| 1272 | { |
| 1273 | memset(p, 0, sizeof(struct gpmc_settings)); |
| 1274 | |
| 1275 | p->sync_read = of_property_read_bool(np, "gpmc,sync-read"); |
| 1276 | p->sync_write = of_property_read_bool(np, "gpmc,sync-write"); |
Jon Hunter | 8c8a7771 | 2013-02-20 15:53:12 -0600 | [diff] [blame] | 1277 | of_property_read_u32(np, "gpmc,device-width", &p->device_width); |
| 1278 | of_property_read_u32(np, "gpmc,mux-add-data", &p->mux_add_data); |
| 1279 | |
| 1280 | if (!of_property_read_u32(np, "gpmc,burst-length", &p->burst_len)) { |
| 1281 | p->burst_wrap = of_property_read_bool(np, "gpmc,burst-wrap"); |
| 1282 | p->burst_read = of_property_read_bool(np, "gpmc,burst-read"); |
| 1283 | p->burst_write = of_property_read_bool(np, "gpmc,burst-write"); |
| 1284 | if (!p->burst_read && !p->burst_write) |
| 1285 | pr_warn("%s: page/burst-length set but not used!\n", |
| 1286 | __func__); |
| 1287 | } |
| 1288 | |
| 1289 | if (!of_property_read_u32(np, "gpmc,wait-pin", &p->wait_pin)) { |
| 1290 | p->wait_on_read = of_property_read_bool(np, |
| 1291 | "gpmc,wait-on-read"); |
| 1292 | p->wait_on_write = of_property_read_bool(np, |
| 1293 | "gpmc,wait-on-write"); |
| 1294 | if (!p->wait_on_read && !p->wait_on_write) |
Roger Quadros | 2b54057 | 2014-09-02 16:57:06 +0300 | [diff] [blame] | 1295 | pr_debug("%s: rd/wr wait monitoring not enabled!\n", |
| 1296 | __func__); |
Jon Hunter | 8c8a7771 | 2013-02-20 15:53:12 -0600 | [diff] [blame] | 1297 | } |
| 1298 | } |
| 1299 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1300 | static void __maybe_unused gpmc_read_timings_dt(struct device_node *np, |
| 1301 | struct gpmc_timings *gpmc_t) |
| 1302 | { |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1303 | struct gpmc_bool_timings *p; |
| 1304 | |
| 1305 | if (!np || !gpmc_t) |
| 1306 | return; |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1307 | |
| 1308 | memset(gpmc_t, 0, sizeof(*gpmc_t)); |
| 1309 | |
| 1310 | /* minimum clock period for syncronous mode */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1311 | of_property_read_u32(np, "gpmc,sync-clk-ps", &gpmc_t->sync_clk); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1312 | |
| 1313 | /* chip select timtings */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1314 | of_property_read_u32(np, "gpmc,cs-on-ns", &gpmc_t->cs_on); |
| 1315 | of_property_read_u32(np, "gpmc,cs-rd-off-ns", &gpmc_t->cs_rd_off); |
| 1316 | of_property_read_u32(np, "gpmc,cs-wr-off-ns", &gpmc_t->cs_wr_off); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1317 | |
| 1318 | /* ADV signal timings */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1319 | of_property_read_u32(np, "gpmc,adv-on-ns", &gpmc_t->adv_on); |
| 1320 | of_property_read_u32(np, "gpmc,adv-rd-off-ns", &gpmc_t->adv_rd_off); |
| 1321 | of_property_read_u32(np, "gpmc,adv-wr-off-ns", &gpmc_t->adv_wr_off); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1322 | |
| 1323 | /* WE signal timings */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1324 | of_property_read_u32(np, "gpmc,we-on-ns", &gpmc_t->we_on); |
| 1325 | of_property_read_u32(np, "gpmc,we-off-ns", &gpmc_t->we_off); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1326 | |
| 1327 | /* OE signal timings */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1328 | of_property_read_u32(np, "gpmc,oe-on-ns", &gpmc_t->oe_on); |
| 1329 | of_property_read_u32(np, "gpmc,oe-off-ns", &gpmc_t->oe_off); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1330 | |
| 1331 | /* access and cycle timings */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1332 | of_property_read_u32(np, "gpmc,page-burst-access-ns", |
| 1333 | &gpmc_t->page_burst_access); |
| 1334 | of_property_read_u32(np, "gpmc,access-ns", &gpmc_t->access); |
| 1335 | of_property_read_u32(np, "gpmc,rd-cycle-ns", &gpmc_t->rd_cycle); |
| 1336 | of_property_read_u32(np, "gpmc,wr-cycle-ns", &gpmc_t->wr_cycle); |
| 1337 | of_property_read_u32(np, "gpmc,bus-turnaround-ns", |
| 1338 | &gpmc_t->bus_turnaround); |
| 1339 | of_property_read_u32(np, "gpmc,cycle2cycle-delay-ns", |
| 1340 | &gpmc_t->cycle2cycle_delay); |
| 1341 | of_property_read_u32(np, "gpmc,wait-monitoring-ns", |
| 1342 | &gpmc_t->wait_monitoring); |
| 1343 | of_property_read_u32(np, "gpmc,clk-activation-ns", |
| 1344 | &gpmc_t->clk_activation); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1345 | |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1346 | /* only applicable to OMAP3+ */ |
| 1347 | of_property_read_u32(np, "gpmc,wr-access-ns", &gpmc_t->wr_access); |
| 1348 | of_property_read_u32(np, "gpmc,wr-data-mux-bus-ns", |
| 1349 | &gpmc_t->wr_data_mux_bus); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1350 | |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1351 | /* bool timing parameters */ |
| 1352 | p = &gpmc_t->bool_timings; |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1353 | |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1354 | p->cycle2cyclediffcsen = |
| 1355 | of_property_read_bool(np, "gpmc,cycle2cycle-diffcsen"); |
| 1356 | p->cycle2cyclesamecsen = |
| 1357 | of_property_read_bool(np, "gpmc,cycle2cycle-samecsen"); |
| 1358 | p->we_extra_delay = of_property_read_bool(np, "gpmc,we-extra-delay"); |
| 1359 | p->oe_extra_delay = of_property_read_bool(np, "gpmc,oe-extra-delay"); |
| 1360 | p->adv_extra_delay = of_property_read_bool(np, "gpmc,adv-extra-delay"); |
| 1361 | p->cs_extra_delay = of_property_read_bool(np, "gpmc,cs-extra-delay"); |
| 1362 | p->time_para_granularity = |
| 1363 | of_property_read_bool(np, "gpmc,time-para-granularity"); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1364 | } |
| 1365 | |
Pekon Gupta | 6b187b2 | 2014-01-28 11:42:40 +0530 | [diff] [blame] | 1366 | #if IS_ENABLED(CONFIG_MTD_NAND) |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1367 | |
Mark Jackson | 496c8a0 | 2013-04-19 21:08:28 +0100 | [diff] [blame] | 1368 | static const char * const nand_xfer_types[] = { |
| 1369 | [NAND_OMAP_PREFETCH_POLLED] = "prefetch-polled", |
| 1370 | [NAND_OMAP_POLLED] = "polled", |
| 1371 | [NAND_OMAP_PREFETCH_DMA] = "prefetch-dma", |
| 1372 | [NAND_OMAP_PREFETCH_IRQ] = "prefetch-irq", |
| 1373 | }; |
| 1374 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1375 | static int gpmc_probe_nand_child(struct platform_device *pdev, |
| 1376 | struct device_node *child) |
| 1377 | { |
| 1378 | u32 val; |
| 1379 | const char *s; |
| 1380 | struct gpmc_timings gpmc_t; |
| 1381 | struct omap_nand_platform_data *gpmc_nand_data; |
| 1382 | |
| 1383 | if (of_property_read_u32(child, "reg", &val) < 0) { |
| 1384 | dev_err(&pdev->dev, "%s has no 'reg' property\n", |
| 1385 | child->full_name); |
| 1386 | return -ENODEV; |
| 1387 | } |
| 1388 | |
| 1389 | gpmc_nand_data = devm_kzalloc(&pdev->dev, sizeof(*gpmc_nand_data), |
| 1390 | GFP_KERNEL); |
| 1391 | if (!gpmc_nand_data) |
| 1392 | return -ENOMEM; |
| 1393 | |
| 1394 | gpmc_nand_data->cs = val; |
| 1395 | gpmc_nand_data->of_node = child; |
| 1396 | |
Pekon Gupta | ac65caf | 2013-10-24 18:20:17 +0530 | [diff] [blame] | 1397 | /* Detect availability of ELM module */ |
| 1398 | gpmc_nand_data->elm_of_node = of_parse_phandle(child, "ti,elm-id", 0); |
| 1399 | if (gpmc_nand_data->elm_of_node == NULL) |
| 1400 | gpmc_nand_data->elm_of_node = |
| 1401 | of_parse_phandle(child, "elm_id", 0); |
| 1402 | if (gpmc_nand_data->elm_of_node == NULL) |
| 1403 | pr_warn("%s: ti,elm-id property not found\n", __func__); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1404 | |
Pekon Gupta | ac65caf | 2013-10-24 18:20:17 +0530 | [diff] [blame] | 1405 | /* select ecc-scheme for NAND */ |
| 1406 | if (of_property_read_string(child, "ti,nand-ecc-opt", &s)) { |
| 1407 | pr_err("%s: ti,nand-ecc-opt not found\n", __func__); |
| 1408 | return -ENODEV; |
| 1409 | } |
Roger Quadros | a3e83f0 | 2014-08-25 16:15:33 -0700 | [diff] [blame] | 1410 | |
| 1411 | if (!strcmp(s, "sw")) |
| 1412 | gpmc_nand_data->ecc_opt = OMAP_ECC_HAM1_CODE_SW; |
| 1413 | else if (!strcmp(s, "ham1") || |
| 1414 | !strcmp(s, "hw") || !strcmp(s, "hw-romcode")) |
Pekon Gupta | ac65caf | 2013-10-24 18:20:17 +0530 | [diff] [blame] | 1415 | gpmc_nand_data->ecc_opt = |
| 1416 | OMAP_ECC_HAM1_CODE_HW; |
| 1417 | else if (!strcmp(s, "bch4")) |
| 1418 | if (gpmc_nand_data->elm_of_node) |
| 1419 | gpmc_nand_data->ecc_opt = |
| 1420 | OMAP_ECC_BCH4_CODE_HW; |
| 1421 | else |
| 1422 | gpmc_nand_data->ecc_opt = |
| 1423 | OMAP_ECC_BCH4_CODE_HW_DETECTION_SW; |
| 1424 | else if (!strcmp(s, "bch8")) |
| 1425 | if (gpmc_nand_data->elm_of_node) |
| 1426 | gpmc_nand_data->ecc_opt = |
| 1427 | OMAP_ECC_BCH8_CODE_HW; |
| 1428 | else |
| 1429 | gpmc_nand_data->ecc_opt = |
| 1430 | OMAP_ECC_BCH8_CODE_HW_DETECTION_SW; |
pekon gupta | 27c9fd6 | 2014-05-19 13:24:39 +0530 | [diff] [blame] | 1431 | else if (!strcmp(s, "bch16")) |
| 1432 | if (gpmc_nand_data->elm_of_node) |
| 1433 | gpmc_nand_data->ecc_opt = |
| 1434 | OMAP_ECC_BCH16_CODE_HW; |
| 1435 | else |
| 1436 | pr_err("%s: BCH16 requires ELM support\n", __func__); |
Pekon Gupta | ac65caf | 2013-10-24 18:20:17 +0530 | [diff] [blame] | 1437 | else |
| 1438 | pr_err("%s: ti,nand-ecc-opt invalid value\n", __func__); |
| 1439 | |
| 1440 | /* select data transfer mode for NAND controller */ |
Mark Jackson | 496c8a0 | 2013-04-19 21:08:28 +0100 | [diff] [blame] | 1441 | if (!of_property_read_string(child, "ti,nand-xfer-type", &s)) |
| 1442 | for (val = 0; val < ARRAY_SIZE(nand_xfer_types); val++) |
| 1443 | if (!strcasecmp(s, nand_xfer_types[val])) { |
| 1444 | gpmc_nand_data->xfer_type = val; |
| 1445 | break; |
| 1446 | } |
| 1447 | |
Ezequiel GarcÃa | fef775c | 2014-09-11 12:02:08 -0300 | [diff] [blame] | 1448 | gpmc_nand_data->flash_bbt = of_get_nand_on_flash_bbt(child); |
| 1449 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1450 | val = of_get_nand_bus_width(child); |
| 1451 | if (val == 16) |
| 1452 | gpmc_nand_data->devsize = NAND_BUSWIDTH_16; |
| 1453 | |
| 1454 | gpmc_read_timings_dt(child, &gpmc_t); |
| 1455 | gpmc_nand_init(gpmc_nand_data, &gpmc_t); |
| 1456 | |
| 1457 | return 0; |
| 1458 | } |
| 1459 | #else |
| 1460 | static int gpmc_probe_nand_child(struct platform_device *pdev, |
| 1461 | struct device_node *child) |
| 1462 | { |
| 1463 | return 0; |
| 1464 | } |
| 1465 | #endif |
| 1466 | |
Pekon Gupta | 980386d | 2014-01-28 11:42:41 +0530 | [diff] [blame] | 1467 | #if IS_ENABLED(CONFIG_MTD_ONENAND) |
Ezequiel Garcia | 75d3625 | 2013-01-25 09:23:11 -0300 | [diff] [blame] | 1468 | static int gpmc_probe_onenand_child(struct platform_device *pdev, |
| 1469 | struct device_node *child) |
| 1470 | { |
| 1471 | u32 val; |
| 1472 | struct omap_onenand_platform_data *gpmc_onenand_data; |
| 1473 | |
| 1474 | if (of_property_read_u32(child, "reg", &val) < 0) { |
| 1475 | dev_err(&pdev->dev, "%s has no 'reg' property\n", |
| 1476 | child->full_name); |
| 1477 | return -ENODEV; |
| 1478 | } |
| 1479 | |
| 1480 | gpmc_onenand_data = devm_kzalloc(&pdev->dev, sizeof(*gpmc_onenand_data), |
| 1481 | GFP_KERNEL); |
| 1482 | if (!gpmc_onenand_data) |
| 1483 | return -ENOMEM; |
| 1484 | |
| 1485 | gpmc_onenand_data->cs = val; |
| 1486 | gpmc_onenand_data->of_node = child; |
| 1487 | gpmc_onenand_data->dma_channel = -1; |
| 1488 | |
| 1489 | if (!of_property_read_u32(child, "dma-channel", &val)) |
| 1490 | gpmc_onenand_data->dma_channel = val; |
| 1491 | |
| 1492 | gpmc_onenand_init(gpmc_onenand_data); |
| 1493 | |
| 1494 | return 0; |
| 1495 | } |
| 1496 | #else |
| 1497 | static int gpmc_probe_onenand_child(struct platform_device *pdev, |
| 1498 | struct device_node *child) |
| 1499 | { |
| 1500 | return 0; |
| 1501 | } |
| 1502 | #endif |
| 1503 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1504 | /** |
Javier Martinez Canillas | 3af91cf | 2013-03-14 16:09:21 +0100 | [diff] [blame] | 1505 | * gpmc_probe_generic_child - configures the gpmc for a child device |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1506 | * @pdev: pointer to gpmc platform device |
Javier Martinez Canillas | 3af91cf | 2013-03-14 16:09:21 +0100 | [diff] [blame] | 1507 | * @child: pointer to device-tree node for child device |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1508 | * |
Javier Martinez Canillas | 3af91cf | 2013-03-14 16:09:21 +0100 | [diff] [blame] | 1509 | * Allocates and configures a GPMC chip-select for a child device. |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1510 | * Returns 0 on success and appropriate negative error code on failure. |
| 1511 | */ |
Javier Martinez Canillas | 3af91cf | 2013-03-14 16:09:21 +0100 | [diff] [blame] | 1512 | static int gpmc_probe_generic_child(struct platform_device *pdev, |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1513 | struct device_node *child) |
| 1514 | { |
| 1515 | struct gpmc_settings gpmc_s; |
| 1516 | struct gpmc_timings gpmc_t; |
| 1517 | struct resource res; |
| 1518 | unsigned long base; |
| 1519 | int ret, cs; |
Roger Quadros | e378d22 | 2014-08-29 19:11:52 +0300 | [diff] [blame] | 1520 | u32 val; |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1521 | |
| 1522 | if (of_property_read_u32(child, "reg", &cs) < 0) { |
| 1523 | dev_err(&pdev->dev, "%s has no 'reg' property\n", |
| 1524 | child->full_name); |
| 1525 | return -ENODEV; |
| 1526 | } |
| 1527 | |
| 1528 | if (of_address_to_resource(child, 0, &res) < 0) { |
| 1529 | dev_err(&pdev->dev, "%s has malformed 'reg' property\n", |
| 1530 | child->full_name); |
| 1531 | return -ENODEV; |
| 1532 | } |
| 1533 | |
| 1534 | ret = gpmc_cs_request(cs, resource_size(&res), &base); |
| 1535 | if (ret < 0) { |
| 1536 | dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs); |
| 1537 | return ret; |
| 1538 | } |
| 1539 | |
| 1540 | /* |
Tony Lindgren | fd4446f | 2013-11-14 15:25:09 -0800 | [diff] [blame] | 1541 | * For some GPMC devices we still need to rely on the bootloader |
| 1542 | * timings because the devices can be connected via FPGA. So far |
| 1543 | * the list is smc91x on the omap2 SDP boards, and 8250 on zooms. |
| 1544 | * REVISIT: Add timing support from slls644g.pdf and from the |
| 1545 | * lan91c96 manual. |
| 1546 | */ |
| 1547 | if (of_device_is_compatible(child, "ns16550a") || |
| 1548 | of_device_is_compatible(child, "smsc,lan91c94") || |
| 1549 | of_device_is_compatible(child, "smsc,lan91c111")) { |
| 1550 | dev_warn(&pdev->dev, |
| 1551 | "%s using bootloader timings on CS%d\n", |
| 1552 | child->name, cs); |
| 1553 | goto no_timings; |
| 1554 | } |
| 1555 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame^] | 1556 | /* CS must be disabled while making changes to gpmc configuration */ |
| 1557 | gpmc_cs_disable_mem(cs); |
| 1558 | |
Tony Lindgren | fd4446f | 2013-11-14 15:25:09 -0800 | [diff] [blame] | 1559 | /* |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1560 | * FIXME: gpmc_cs_request() will map the CS to an arbitary |
| 1561 | * location in the gpmc address space. When booting with |
| 1562 | * device-tree we want the NOR flash to be mapped to the |
| 1563 | * location specified in the device-tree blob. So remap the |
| 1564 | * CS to this location. Once DT migration is complete should |
| 1565 | * just make gpmc_cs_request() map a specific address. |
| 1566 | */ |
| 1567 | ret = gpmc_cs_remap(cs, res.start); |
| 1568 | if (ret < 0) { |
Fabio Estevam | f70bf2a | 2013-09-18 12:01:59 -0700 | [diff] [blame] | 1569 | dev_err(&pdev->dev, "cannot remap GPMC CS %d to %pa\n", |
| 1570 | cs, &res.start); |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1571 | goto err; |
| 1572 | } |
| 1573 | |
| 1574 | gpmc_read_settings_dt(child, &gpmc_s); |
| 1575 | |
| 1576 | ret = of_property_read_u32(child, "bank-width", &gpmc_s.device_width); |
| 1577 | if (ret < 0) |
| 1578 | goto err; |
| 1579 | |
| 1580 | ret = gpmc_cs_program_settings(cs, &gpmc_s); |
| 1581 | if (ret < 0) |
| 1582 | goto err; |
| 1583 | |
| 1584 | gpmc_read_timings_dt(child, &gpmc_t); |
Roger Quadros | 7604baf | 2014-08-29 19:11:51 +0300 | [diff] [blame] | 1585 | ret = gpmc_cs_set_timings(cs, &gpmc_t); |
| 1586 | if (ret) { |
| 1587 | dev_err(&pdev->dev, "failed to set gpmc timings for: %s\n", |
| 1588 | child->name); |
| 1589 | goto err; |
| 1590 | } |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1591 | |
Roger Quadros | e378d22 | 2014-08-29 19:11:52 +0300 | [diff] [blame] | 1592 | /* Clear limited address i.e. enable A26-A11 */ |
| 1593 | val = gpmc_read_reg(GPMC_CONFIG); |
| 1594 | val &= ~GPMC_CONFIG_LIMITEDADDRESS; |
| 1595 | gpmc_write_reg(GPMC_CONFIG, val); |
| 1596 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame^] | 1597 | /* Enable CS region */ |
| 1598 | gpmc_cs_enable_mem(cs); |
| 1599 | |
Tony Lindgren | fd4446f | 2013-11-14 15:25:09 -0800 | [diff] [blame] | 1600 | no_timings: |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1601 | if (of_platform_device_create(child, NULL, &pdev->dev)) |
| 1602 | return 0; |
| 1603 | |
| 1604 | dev_err(&pdev->dev, "failed to create gpmc child %s\n", child->name); |
Javier Martinez Canillas | e8ffd6f | 2013-03-14 16:09:20 +0100 | [diff] [blame] | 1605 | ret = -ENODEV; |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1606 | |
| 1607 | err: |
| 1608 | gpmc_cs_free(cs); |
| 1609 | |
| 1610 | return ret; |
| 1611 | } |
| 1612 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1613 | static int gpmc_probe_dt(struct platform_device *pdev) |
| 1614 | { |
| 1615 | int ret; |
| 1616 | struct device_node *child; |
| 1617 | const struct of_device_id *of_id = |
| 1618 | of_match_device(gpmc_dt_ids, &pdev->dev); |
| 1619 | |
| 1620 | if (!of_id) |
| 1621 | return 0; |
| 1622 | |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 1623 | ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-cs", |
| 1624 | &gpmc_cs_num); |
| 1625 | if (ret < 0) { |
| 1626 | pr_err("%s: number of chip-selects not defined\n", __func__); |
| 1627 | return ret; |
| 1628 | } else if (gpmc_cs_num < 1) { |
| 1629 | pr_err("%s: all chip-selects are disabled\n", __func__); |
| 1630 | return -EINVAL; |
| 1631 | } else if (gpmc_cs_num > GPMC_CS_NUM) { |
| 1632 | pr_err("%s: number of supported chip-selects cannot be > %d\n", |
| 1633 | __func__, GPMC_CS_NUM); |
| 1634 | return -EINVAL; |
| 1635 | } |
| 1636 | |
Jon Hunter | 9f83315 | 2013-02-20 15:53:38 -0600 | [diff] [blame] | 1637 | ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-waitpins", |
| 1638 | &gpmc_nr_waitpins); |
| 1639 | if (ret < 0) { |
| 1640 | pr_err("%s: number of wait pins not found!\n", __func__); |
| 1641 | return ret; |
| 1642 | } |
| 1643 | |
Guido MartÃnez | 68e2eb5 | 2014-07-02 10:35:18 -0300 | [diff] [blame] | 1644 | for_each_available_child_of_node(pdev->dev.of_node, child) { |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1645 | |
Javier Martinez Canillas | f2b09f6 | 2013-04-17 22:34:11 +0200 | [diff] [blame] | 1646 | if (!child->name) |
| 1647 | continue; |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1648 | |
Javier Martinez Canillas | f2b09f6 | 2013-04-17 22:34:11 +0200 | [diff] [blame] | 1649 | if (of_node_cmp(child->name, "nand") == 0) |
| 1650 | ret = gpmc_probe_nand_child(pdev, child); |
| 1651 | else if (of_node_cmp(child->name, "onenand") == 0) |
| 1652 | ret = gpmc_probe_onenand_child(pdev, child); |
| 1653 | else if (of_node_cmp(child->name, "ethernet") == 0 || |
Tony Lindgren | fd4446f | 2013-11-14 15:25:09 -0800 | [diff] [blame] | 1654 | of_node_cmp(child->name, "nor") == 0 || |
| 1655 | of_node_cmp(child->name, "uart") == 0) |
Javier Martinez Canillas | f2b09f6 | 2013-04-17 22:34:11 +0200 | [diff] [blame] | 1656 | ret = gpmc_probe_generic_child(pdev, child); |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1657 | |
Javier Martinez Canillas | b327b36 | 2013-04-17 22:34:12 +0200 | [diff] [blame] | 1658 | if (WARN(ret < 0, "%s: probing gpmc child %s failed\n", |
| 1659 | __func__, child->full_name)) |
Javier Martinez Canillas | 5330dc1 | 2013-03-14 22:54:11 +0100 | [diff] [blame] | 1660 | of_node_put(child); |
Javier Martinez Canillas | 5330dc1 | 2013-03-14 22:54:11 +0100 | [diff] [blame] | 1661 | } |
| 1662 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1663 | return 0; |
| 1664 | } |
| 1665 | #else |
| 1666 | static int gpmc_probe_dt(struct platform_device *pdev) |
| 1667 | { |
| 1668 | return 0; |
| 1669 | } |
| 1670 | #endif |
| 1671 | |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 1672 | static int gpmc_probe(struct platform_device *pdev) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1673 | { |
Jon Hunter | 8119024 | 2012-10-17 09:41:25 -0500 | [diff] [blame] | 1674 | int rc; |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 1675 | u32 l; |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1676 | struct resource *res; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1677 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1678 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1679 | if (res == NULL) |
| 1680 | return -ENOENT; |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 1681 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1682 | phys_base = res->start; |
| 1683 | mem_size = resource_size(res); |
Kevin Hilman | 8d08436 | 2010-01-29 14:20:06 -0800 | [diff] [blame] | 1684 | |
Thierry Reding | 5857bd9 | 2013-01-21 11:08:55 +0100 | [diff] [blame] | 1685 | gpmc_base = devm_ioremap_resource(&pdev->dev, res); |
| 1686 | if (IS_ERR(gpmc_base)) |
| 1687 | return PTR_ERR(gpmc_base); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1688 | |
| 1689 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 1690 | if (res == NULL) |
| 1691 | dev_warn(&pdev->dev, "Failed to get resource: irq\n"); |
| 1692 | else |
| 1693 | gpmc_irq = res->start; |
| 1694 | |
| 1695 | gpmc_l3_clk = clk_get(&pdev->dev, "fck"); |
| 1696 | if (IS_ERR(gpmc_l3_clk)) { |
| 1697 | dev_err(&pdev->dev, "error: clk_get\n"); |
| 1698 | gpmc_irq = 0; |
| 1699 | return PTR_ERR(gpmc_l3_clk); |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 1700 | } |
| 1701 | |
avinash philip | b3f5525 | 2013-06-12 16:30:56 +0530 | [diff] [blame] | 1702 | pm_runtime_enable(&pdev->dev); |
| 1703 | pm_runtime_get_sync(&pdev->dev); |
Olof Johansson | 1daa8c1 | 2010-01-20 22:39:29 +0000 | [diff] [blame] | 1704 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1705 | gpmc_dev = &pdev->dev; |
| 1706 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1707 | l = gpmc_read_reg(GPMC_REVISION); |
Jon Hunter | aa8d476 | 2013-02-21 15:25:23 -0600 | [diff] [blame] | 1708 | |
| 1709 | /* |
| 1710 | * FIXME: Once device-tree migration is complete the below flags |
| 1711 | * should be populated based upon the device-tree compatible |
| 1712 | * string. For now just use the IP revision. OMAP3+ devices have |
| 1713 | * the wr_access and wr_data_mux_bus register fields. OMAP4+ |
| 1714 | * devices support the addr-addr-data multiplex protocol. |
| 1715 | * |
| 1716 | * GPMC IP revisions: |
| 1717 | * - OMAP24xx = 2.0 |
| 1718 | * - OMAP3xxx = 5.0 |
| 1719 | * - OMAP44xx/54xx/AM335x = 6.0 |
| 1720 | */ |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1721 | if (GPMC_REVISION_MAJOR(l) > 0x4) |
| 1722 | gpmc_capability = GPMC_HAS_WR_ACCESS | GPMC_HAS_WR_DATA_MUX_BUS; |
Jon Hunter | aa8d476 | 2013-02-21 15:25:23 -0600 | [diff] [blame] | 1723 | if (GPMC_REVISION_MAJOR(l) > 0x5) |
| 1724 | gpmc_capability |= GPMC_HAS_MUX_AAD; |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1725 | dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), |
| 1726 | GPMC_REVISION_MINOR(l)); |
| 1727 | |
Jon Hunter | 84b00f0 | 2013-03-06 14:36:47 -0600 | [diff] [blame] | 1728 | gpmc_mem_init(); |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 1729 | |
Russell King | 7185684 | 2013-03-13 20:44:21 +0000 | [diff] [blame] | 1730 | if (gpmc_setup_irq() < 0) |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1731 | dev_warn(gpmc_dev, "gpmc_setup_irq failed\n"); |
| 1732 | |
Jon Hunter | 31d9adc | 2013-02-18 07:57:39 -0600 | [diff] [blame] | 1733 | /* Now the GPMC is initialised, unreserve the chip-selects */ |
| 1734 | gpmc_cs_map = 0; |
| 1735 | |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 1736 | if (!pdev->dev.of_node) { |
| 1737 | gpmc_cs_num = GPMC_CS_NUM; |
Jon Hunter | 9f83315 | 2013-02-20 15:53:38 -0600 | [diff] [blame] | 1738 | gpmc_nr_waitpins = GPMC_NR_WAITPINS; |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 1739 | } |
Jon Hunter | 9f83315 | 2013-02-20 15:53:38 -0600 | [diff] [blame] | 1740 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1741 | rc = gpmc_probe_dt(pdev); |
| 1742 | if (rc < 0) { |
avinash philip | b3f5525 | 2013-06-12 16:30:56 +0530 | [diff] [blame] | 1743 | pm_runtime_put_sync(&pdev->dev); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1744 | clk_put(gpmc_l3_clk); |
| 1745 | dev_err(gpmc_dev, "failed to probe DT parameters\n"); |
| 1746 | return rc; |
| 1747 | } |
| 1748 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1749 | return 0; |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 1750 | } |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1751 | |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 1752 | static int gpmc_remove(struct platform_device *pdev) |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1753 | { |
| 1754 | gpmc_free_irq(); |
| 1755 | gpmc_mem_exit(); |
avinash philip | b3f5525 | 2013-06-12 16:30:56 +0530 | [diff] [blame] | 1756 | pm_runtime_put_sync(&pdev->dev); |
| 1757 | pm_runtime_disable(&pdev->dev); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1758 | gpmc_dev = NULL; |
| 1759 | return 0; |
| 1760 | } |
| 1761 | |
avinash philip | b536dd4 | 2013-06-18 00:16:38 +0530 | [diff] [blame] | 1762 | #ifdef CONFIG_PM_SLEEP |
| 1763 | static int gpmc_suspend(struct device *dev) |
| 1764 | { |
| 1765 | omap3_gpmc_save_context(); |
| 1766 | pm_runtime_put_sync(dev); |
| 1767 | return 0; |
| 1768 | } |
| 1769 | |
| 1770 | static int gpmc_resume(struct device *dev) |
| 1771 | { |
| 1772 | pm_runtime_get_sync(dev); |
| 1773 | omap3_gpmc_restore_context(); |
| 1774 | return 0; |
| 1775 | } |
| 1776 | #endif |
| 1777 | |
| 1778 | static SIMPLE_DEV_PM_OPS(gpmc_pm_ops, gpmc_suspend, gpmc_resume); |
| 1779 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1780 | static struct platform_driver gpmc_driver = { |
| 1781 | .probe = gpmc_probe, |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 1782 | .remove = gpmc_remove, |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1783 | .driver = { |
| 1784 | .name = DEVICE_NAME, |
| 1785 | .owner = THIS_MODULE, |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1786 | .of_match_table = of_match_ptr(gpmc_dt_ids), |
avinash philip | b536dd4 | 2013-06-18 00:16:38 +0530 | [diff] [blame] | 1787 | .pm = &gpmc_pm_ops, |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1788 | }, |
| 1789 | }; |
| 1790 | |
| 1791 | static __init int gpmc_init(void) |
| 1792 | { |
| 1793 | return platform_driver_register(&gpmc_driver); |
| 1794 | } |
| 1795 | |
| 1796 | static __exit void gpmc_exit(void) |
| 1797 | { |
| 1798 | platform_driver_unregister(&gpmc_driver); |
| 1799 | |
| 1800 | } |
| 1801 | |
Tony Lindgren | b76c8b1 | 2013-01-11 11:24:18 -0800 | [diff] [blame] | 1802 | omap_postcore_initcall(gpmc_init); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1803 | module_exit(gpmc_exit); |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 1804 | |
Afzal Mohammed | 4be48fd | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 1805 | static int __init omap_gpmc_init(void) |
| 1806 | { |
| 1807 | struct omap_hwmod *oh; |
| 1808 | struct platform_device *pdev; |
| 1809 | char *oh_name = "gpmc"; |
| 1810 | |
Daniel Mack | 2f98ca8 | 2012-12-14 11:36:40 +0100 | [diff] [blame] | 1811 | /* |
| 1812 | * if the board boots up with a populated DT, do not |
| 1813 | * manually add the device from this initcall |
| 1814 | */ |
| 1815 | if (of_have_populated_dt()) |
| 1816 | return -ENODEV; |
| 1817 | |
Afzal Mohammed | 4be48fd | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 1818 | oh = omap_hwmod_lookup(oh_name); |
| 1819 | if (!oh) { |
| 1820 | pr_err("Could not look up %s\n", oh_name); |
| 1821 | return -ENODEV; |
| 1822 | } |
| 1823 | |
Paul Walmsley | c1d1cd5 | 2013-01-26 00:48:53 -0700 | [diff] [blame] | 1824 | pdev = omap_device_build(DEVICE_NAME, -1, oh, NULL, 0); |
Afzal Mohammed | 4be48fd | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 1825 | WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name); |
| 1826 | |
Thomas Meyer | 1261674 | 2013-06-01 11:44:44 +0200 | [diff] [blame] | 1827 | return PTR_RET(pdev); |
Afzal Mohammed | 4be48fd | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 1828 | } |
Tony Lindgren | b76c8b1 | 2013-01-11 11:24:18 -0800 | [diff] [blame] | 1829 | omap_postcore_initcall(omap_gpmc_init); |
Afzal Mohammed | 4be48fd | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 1830 | |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 1831 | static irqreturn_t gpmc_handle_irq(int irq, void *dev) |
| 1832 | { |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 1833 | int i; |
| 1834 | u32 regval; |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 1835 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 1836 | regval = gpmc_read_reg(GPMC_IRQSTATUS); |
| 1837 | |
| 1838 | if (!regval) |
| 1839 | return IRQ_NONE; |
| 1840 | |
| 1841 | for (i = 0; i < GPMC_NR_IRQ; i++) |
| 1842 | if (regval & gpmc_client_irq[i].bitmask) |
| 1843 | generic_handle_irq(gpmc_client_irq[i].irq); |
| 1844 | |
| 1845 | gpmc_write_reg(GPMC_IRQSTATUS, regval); |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 1846 | |
| 1847 | return IRQ_HANDLED; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1848 | } |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 1849 | |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 1850 | static struct omap3_gpmc_regs gpmc_context; |
| 1851 | |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 1852 | void omap3_gpmc_save_context(void) |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 1853 | { |
| 1854 | int i; |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 1855 | |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 1856 | gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG); |
| 1857 | gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE); |
| 1858 | gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL); |
| 1859 | gpmc_context.config = gpmc_read_reg(GPMC_CONFIG); |
| 1860 | gpmc_context.prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1); |
| 1861 | gpmc_context.prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2); |
| 1862 | gpmc_context.prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL); |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 1863 | for (i = 0; i < gpmc_cs_num; i++) { |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 1864 | gpmc_context.cs_context[i].is_valid = gpmc_cs_mem_enabled(i); |
| 1865 | if (gpmc_context.cs_context[i].is_valid) { |
| 1866 | gpmc_context.cs_context[i].config1 = |
| 1867 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG1); |
| 1868 | gpmc_context.cs_context[i].config2 = |
| 1869 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG2); |
| 1870 | gpmc_context.cs_context[i].config3 = |
| 1871 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG3); |
| 1872 | gpmc_context.cs_context[i].config4 = |
| 1873 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG4); |
| 1874 | gpmc_context.cs_context[i].config5 = |
| 1875 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG5); |
| 1876 | gpmc_context.cs_context[i].config6 = |
| 1877 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG6); |
| 1878 | gpmc_context.cs_context[i].config7 = |
| 1879 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG7); |
| 1880 | } |
| 1881 | } |
| 1882 | } |
| 1883 | |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 1884 | void omap3_gpmc_restore_context(void) |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 1885 | { |
| 1886 | int i; |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 1887 | |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 1888 | gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig); |
| 1889 | gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable); |
| 1890 | gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl); |
| 1891 | gpmc_write_reg(GPMC_CONFIG, gpmc_context.config); |
| 1892 | gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context.prefetch_config1); |
| 1893 | gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context.prefetch_config2); |
| 1894 | gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context.prefetch_control); |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 1895 | for (i = 0; i < gpmc_cs_num; i++) { |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 1896 | if (gpmc_context.cs_context[i].is_valid) { |
| 1897 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG1, |
| 1898 | gpmc_context.cs_context[i].config1); |
| 1899 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG2, |
| 1900 | gpmc_context.cs_context[i].config2); |
| 1901 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG3, |
| 1902 | gpmc_context.cs_context[i].config3); |
| 1903 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG4, |
| 1904 | gpmc_context.cs_context[i].config4); |
| 1905 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG5, |
| 1906 | gpmc_context.cs_context[i].config5); |
| 1907 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG6, |
| 1908 | gpmc_context.cs_context[i].config6); |
| 1909 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG7, |
| 1910 | gpmc_context.cs_context[i].config7); |
| 1911 | } |
| 1912 | } |
| 1913 | } |