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Mika Westerbergd16a5aa2014-03-20 22:04:23 +08001/*
2 * Intel Low Power Subsystem PWM controller driver
3 *
4 * Copyright (C) 2014, Intel Corporation
5 * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
6 * Author: Chew Kean Ho <kean.ho.chew@intel.com>
7 * Author: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
8 * Author: Chew Chiau Ee <chiau.ee.chew@intel.com>
Alan Cox093e00b2014-04-18 19:17:40 +08009 * Author: Alan Cox <alan@linux.intel.com>
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080010 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
Thierry Redinge0c86a32014-08-23 00:22:45 +020016#include <linux/io.h>
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080017#include <linux/kernel.h>
18#include <linux/module.h>
Alan Cox093e00b2014-04-18 19:17:40 +080019
Andy Shevchenkoc558e392014-08-19 19:17:35 +030020#include "pwm-lpss.h"
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080021
22#define PWM 0x00000000
23#define PWM_ENABLE BIT(31)
24#define PWM_SW_UPDATE BIT(30)
25#define PWM_BASE_UNIT_SHIFT 8
26#define PWM_BASE_UNIT_MASK 0x00ffff00
27#define PWM_ON_TIME_DIV_MASK 0x000000ff
28#define PWM_DIVISION_CORRECTION 0x2
29#define PWM_LIMIT (0x8000 + PWM_DIVISION_CORRECTION)
30#define NSECS_PER_SEC 1000000000UL
31
Mika Westerberg4e11f5a2015-10-20 16:53:05 +030032/* Size of each PWM register space if multiple */
33#define PWM_SIZE 0x400
34
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080035struct pwm_lpss_chip {
36 struct pwm_chip chip;
37 void __iomem *regs;
Alan Cox093e00b2014-04-18 19:17:40 +080038 unsigned long clk_rate;
39};
40
Alan Cox093e00b2014-04-18 19:17:40 +080041/* BayTrail */
Andy Shevchenkoc558e392014-08-19 19:17:35 +030042const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
Mika Westerberg4e11f5a2015-10-20 16:53:05 +030043 .clk_rate = 25000000,
44 .npwm = 1,
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080045};
Andy Shevchenkoc558e392014-08-19 19:17:35 +030046EXPORT_SYMBOL_GPL(pwm_lpss_byt_info);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080047
Alan Cox373c5782014-08-19 17:18:29 +030048/* Braswell */
Andy Shevchenkoc558e392014-08-19 19:17:35 +030049const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
Mika Westerberg4e11f5a2015-10-20 16:53:05 +030050 .clk_rate = 19200000,
51 .npwm = 1,
Alan Cox373c5782014-08-19 17:18:29 +030052};
Andy Shevchenkoc558e392014-08-19 19:17:35 +030053EXPORT_SYMBOL_GPL(pwm_lpss_bsw_info);
Alan Cox373c5782014-08-19 17:18:29 +030054
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080055static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
56{
57 return container_of(chip, struct pwm_lpss_chip, chip);
58}
59
Mika Westerberg4e11f5a2015-10-20 16:53:05 +030060static inline u32 pwm_lpss_read(const struct pwm_device *pwm)
61{
62 struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
63
64 return readl(lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
65}
66
67static inline void pwm_lpss_write(const struct pwm_device *pwm, u32 value)
68{
69 struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
70
71 writel(value, lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
72}
73
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080074static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm,
75 int duty_ns, int period_ns)
76{
77 struct pwm_lpss_chip *lpwm = to_lpwm(chip);
78 u8 on_time_div;
79 unsigned long c;
80 unsigned long long base_unit, freq = NSECS_PER_SEC;
81 u32 ctrl;
82
83 do_div(freq, period_ns);
84
85 /* The equation is: base_unit = ((freq / c) * 65536) + correction */
86 base_unit = freq * 65536;
87
Alan Cox093e00b2014-04-18 19:17:40 +080088 c = lpwm->clk_rate;
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080089 if (!c)
90 return -EINVAL;
91
92 do_div(base_unit, c);
93 base_unit += PWM_DIVISION_CORRECTION;
94 if (base_unit > PWM_LIMIT)
95 return -EINVAL;
96
97 if (duty_ns <= 0)
98 duty_ns = 1;
99 on_time_div = 255 - (255 * duty_ns / period_ns);
100
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300101 ctrl = pwm_lpss_read(pwm);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800102 ctrl &= ~(PWM_BASE_UNIT_MASK | PWM_ON_TIME_DIV_MASK);
103 ctrl |= (u16) base_unit << PWM_BASE_UNIT_SHIFT;
104 ctrl |= on_time_div;
105 /* request PWM to update on next cycle */
106 ctrl |= PWM_SW_UPDATE;
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300107 pwm_lpss_write(pwm, ctrl);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800108
109 return 0;
110}
111
112static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm)
113{
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300114 pwm_lpss_write(pwm, pwm_lpss_read(pwm) | PWM_ENABLE);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800115 return 0;
116}
117
118static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm)
119{
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300120 pwm_lpss_write(pwm, pwm_lpss_read(pwm) & ~PWM_ENABLE);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800121}
122
123static const struct pwm_ops pwm_lpss_ops = {
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300124 .free = pwm_lpss_disable,
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800125 .config = pwm_lpss_config,
126 .enable = pwm_lpss_enable,
127 .disable = pwm_lpss_disable,
128 .owner = THIS_MODULE,
129};
130
Andy Shevchenkoc558e392014-08-19 19:17:35 +0300131struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
132 const struct pwm_lpss_boardinfo *info)
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800133{
134 struct pwm_lpss_chip *lpwm;
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800135 int ret;
136
Alan Cox093e00b2014-04-18 19:17:40 +0800137 lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800138 if (!lpwm)
Alan Cox093e00b2014-04-18 19:17:40 +0800139 return ERR_PTR(-ENOMEM);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800140
Alan Cox093e00b2014-04-18 19:17:40 +0800141 lpwm->regs = devm_ioremap_resource(dev, r);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800142 if (IS_ERR(lpwm->regs))
Thierry Reding89c03392014-05-07 10:27:57 +0200143 return ERR_CAST(lpwm->regs);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800144
Heikki Krogerus65accd82014-05-09 11:35:21 +0300145 lpwm->clk_rate = info->clk_rate;
Alan Cox093e00b2014-04-18 19:17:40 +0800146 lpwm->chip.dev = dev;
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800147 lpwm->chip.ops = &pwm_lpss_ops;
148 lpwm->chip.base = -1;
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300149 lpwm->chip.npwm = info->npwm;
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800150
151 ret = pwmchip_add(&lpwm->chip);
152 if (ret) {
Alan Cox093e00b2014-04-18 19:17:40 +0800153 dev_err(dev, "failed to add PWM chip: %d\n", ret);
154 return ERR_PTR(ret);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800155 }
156
Alan Cox093e00b2014-04-18 19:17:40 +0800157 return lpwm;
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800158}
Andy Shevchenkoc558e392014-08-19 19:17:35 +0300159EXPORT_SYMBOL_GPL(pwm_lpss_probe);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800160
Andy Shevchenkoc558e392014-08-19 19:17:35 +0300161int pwm_lpss_remove(struct pwm_lpss_chip *lpwm)
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800162{
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800163 return pwmchip_remove(&lpwm->chip);
164}
Andy Shevchenkoc558e392014-08-19 19:17:35 +0300165EXPORT_SYMBOL_GPL(pwm_lpss_remove);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800166
167MODULE_DESCRIPTION("PWM driver for Intel LPSS");
168MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
169MODULE_LICENSE("GPL v2");