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Sascha Hauer6c7b068502012-03-07 21:01:28 +01001#ifndef __MACH_IMX_CLK_H
2#define __MACH_IMX_CLK_H
3
4#include <linux/spinlock.h>
5#include <linux/clk-provider.h>
Sascha Hauer3a84d172012-09-11 08:50:00 +02006
7extern spinlock_t imx_ccm_lock;
Sascha Hauer6c7b068502012-03-07 21:01:28 +01008
Alexander Shiyan229be9c2014-06-10 19:40:26 +04009void imx_check_clocks(struct clk *clks[], unsigned int count);
Lucas Stach55adc612015-09-21 18:53:57 +020010void imx_register_uart_clocks(struct clk ** const clks[]);
Alexander Shiyan229be9c2014-06-10 19:40:26 +040011
Liu Yingdfd87142013-07-04 17:57:17 +080012extern void imx_cscmr1_fixup(u32 *val);
13
Shawn Guo3bec5f82015-04-26 13:33:39 +080014enum imx_pllv1_type {
15 IMX_PLLV1_IMX1,
16 IMX_PLLV1_IMX21,
17 IMX_PLLV1_IMX25,
18 IMX_PLLV1_IMX27,
19 IMX_PLLV1_IMX31,
20 IMX_PLLV1_IMX35,
21};
22
23struct clk *imx_clk_pllv1(enum imx_pllv1_type type, const char *name,
24 const char *parent, void __iomem *base);
Sascha Hauer6c7b068502012-03-07 21:01:28 +010025
Sascha Hauera547b812012-03-19 12:36:10 +010026struct clk *imx_clk_pllv2(const char *name, const char *parent,
27 void __iomem *base);
28
Shawn Guoa3f6b9d2012-04-04 16:02:28 +080029enum imx_pllv3_type {
30 IMX_PLLV3_GENERIC,
31 IMX_PLLV3_SYS,
32 IMX_PLLV3_USB,
Stefan Agner60ad8462014-12-02 17:59:42 +010033 IMX_PLLV3_USB_VF610,
Shawn Guoa3f6b9d2012-04-04 16:02:28 +080034 IMX_PLLV3_AV,
35 IMX_PLLV3_ENET,
Frank Lif5394742015-05-19 02:45:02 +080036 IMX_PLLV3_ENET_IMX7,
Shawn Guoa3f6b9d2012-04-04 16:02:28 +080037};
38
39struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
Sascha Hauer2b254692012-11-22 10:18:41 +010040 const char *parent_name, void __iomem *base, u32 div_mask);
Shawn Guoa3f6b9d2012-04-04 16:02:28 +080041
Sascha Hauerb75c0152011-04-19 08:33:45 +020042struct clk *clk_register_gate2(struct device *dev, const char *name,
43 const char *parent_name, unsigned long flags,
44 void __iomem *reg, u8 bit_idx,
Shawn Guof9f28cd2014-04-19 10:58:22 +080045 u8 clk_gate_flags, spinlock_t *lock,
46 unsigned int *share_count);
Sascha Hauerb75c0152011-04-19 08:33:45 +020047
Martin Fuzzey75f83d02013-04-23 20:16:59 +080048struct clk * imx_obtain_fixed_clock(
49 const char *name, unsigned long rate);
50
Shawn Guo19d86342014-08-26 15:06:33 +080051struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
52 void __iomem *reg, u8 shift, u32 exclusive_mask);
53
Sascha Hauerb75c0152011-04-19 08:33:45 +020054static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
55 void __iomem *reg, u8 shift)
56{
57 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
Shawn Guof9f28cd2014-04-19 10:58:22 +080058 shift, 0, &imx_ccm_lock, NULL);
59}
60
61static inline struct clk *imx_clk_gate2_shared(const char *name,
62 const char *parent, void __iomem *reg, u8 shift,
63 unsigned int *share_count)
64{
65 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
66 shift, 0, &imx_ccm_lock, share_count);
Sascha Hauerb75c0152011-04-19 08:33:45 +020067}
68
Shawn Guoa10bd672012-04-04 16:07:53 +080069struct clk *imx_clk_pfd(const char *name, const char *parent_name,
70 void __iomem *reg, u8 idx);
71
Shawn Guo32af7a82012-04-04 16:20:56 +080072struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
73 void __iomem *reg, u8 shift, u8 width,
74 void __iomem *busy_reg, u8 busy_shift);
75
76struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
77 u8 width, void __iomem *busy_reg, u8 busy_shift,
78 const char **parent_names, int num_parents);
79
Liu Yingcbe7fc82013-07-04 17:22:26 +080080struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
81 void __iomem *reg, u8 shift, u8 width,
82 void (*fixup)(u32 *val));
83
Liu Yinga49e6c42013-07-04 17:35:46 +080084struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
85 u8 shift, u8 width, const char **parents,
86 int num_parents, void (*fixup)(u32 *val));
87
Sascha Hauer6c7b068502012-03-07 21:01:28 +010088static inline struct clk *imx_clk_fixed(const char *name, int rate)
89{
90 return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
91}
92
93static inline struct clk *imx_clk_divider(const char *name, const char *parent,
94 void __iomem *reg, u8 shift, u8 width)
95{
96 return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
97 reg, shift, width, 0, &imx_ccm_lock);
98}
99
Philipp Zabel3ce92172013-03-27 18:30:40 +0100100static inline struct clk *imx_clk_divider_flags(const char *name,
101 const char *parent, void __iomem *reg, u8 shift, u8 width,
102 unsigned long flags)
103{
104 return clk_register_divider(NULL, name, parent, flags,
105 reg, shift, width, 0, &imx_ccm_lock);
106}
107
Sascha Hauer6c7b068502012-03-07 21:01:28 +0100108static inline struct clk *imx_clk_gate(const char *name, const char *parent,
109 void __iomem *reg, u8 shift)
110{
111 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
112 shift, 0, &imx_ccm_lock);
113}
114
Alexander Shiyan65251692014-06-22 17:17:06 +0400115static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
116 void __iomem *reg, u8 shift)
117{
118 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
119 shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
120}
121
Sascha Hauer6c7b068502012-03-07 21:01:28 +0100122static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
123 u8 shift, u8 width, const char **parents, int num_parents)
124{
James Hogan819c1de2013-07-29 12:25:01 +0100125 return clk_register_mux(NULL, name, parents, num_parents,
126 CLK_SET_RATE_NO_REPARENT, reg, shift,
Sascha Hauer6c7b068502012-03-07 21:01:28 +0100127 width, 0, &imx_ccm_lock);
128}
129
Philipp Zabel3ce92172013-03-27 18:30:40 +0100130static inline struct clk *imx_clk_mux_flags(const char *name,
131 void __iomem *reg, u8 shift, u8 width, const char **parents,
132 int num_parents, unsigned long flags)
133{
134 return clk_register_mux(NULL, name, parents, num_parents,
James Hogan819c1de2013-07-29 12:25:01 +0100135 flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
Philipp Zabel3ce92172013-03-27 18:30:40 +0100136 &imx_ccm_lock);
137}
138
Sascha Hauer6c7b068502012-03-07 21:01:28 +0100139static inline struct clk *imx_clk_fixed_factor(const char *name,
140 const char *parent, unsigned int mult, unsigned int div)
141{
142 return clk_register_fixed_factor(NULL, name, parent,
143 CLK_SET_RATE_PARENT, mult, div);
144}
145
Lucas Stache0fed512014-09-26 15:41:01 +0200146struct clk *imx_clk_cpu(const char *name, const char *parent_name,
147 struct clk *div, struct clk *mux, struct clk *pll,
148 struct clk *step);
149
Sascha Hauer6c7b068502012-03-07 21:01:28 +0100150#endif