Catalin Marinas | 4f04d8f | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 1 | Memory Layout on AArch64 Linux |
| 2 | ============================== |
| 3 | |
| 4 | Author: Catalin Marinas <catalin.marinas@arm.com> |
| 5 | Date : 20 February 2012 |
| 6 | |
| 7 | This document describes the virtual memory layout used by the AArch64 |
| 8 | Linux kernel. The architecture allows up to 4 levels of translation |
| 9 | tables with a 4KB page size and up to 3 levels with a 64KB page size. |
| 10 | |
Jungseok Lee | 4edae01 | 2014-05-12 10:40:44 +0100 | [diff] [blame^] | 11 | AArch64 Linux uses either 3 levels or 4 levels of translation tables with |
| 12 | the 4KB page configuration, allowing 39-bit (512GB) or 48-bit (256TB) |
| 13 | virtual addresses, respectively, for both user and kernel. With 64KB |
| 14 | pages, only 2 levels of translation tables, allowing 42-bit (4TB) |
| 15 | virtual address, are used but the memory layout is the same. |
Catalin Marinas | 4f04d8f | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 16 | |
| 17 | User addresses have bits 63:39 set to 0 while the kernel addresses have |
| 18 | the same bits set to 1. TTBRx selection is given by bit 63 of the |
| 19 | virtual address. The swapper_pg_dir contains only kernel (global) |
| 20 | mappings while the user pgd contains only user (non-global) mappings. |
| 21 | The swapper_pgd_dir address is written to TTBR1 and never written to |
| 22 | TTBR0. |
| 23 | |
| 24 | |
Jungseok Lee | 4edae01 | 2014-05-12 10:40:44 +0100 | [diff] [blame^] | 25 | AArch64 Linux memory layout with 4KB pages + 3 levels: |
Catalin Marinas | 4f04d8f | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 26 | |
| 27 | Start End Size Use |
| 28 | ----------------------------------------------------------------------- |
| 29 | 0000000000000000 0000007fffffffff 512GB user |
| 30 | |
Catalin Marinas | e3978cd | 2012-10-23 14:51:16 +0100 | [diff] [blame] | 31 | ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc |
Catalin Marinas | 4f04d8f | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 32 | |
Catalin Marinas | e3978cd | 2012-10-23 14:51:16 +0100 | [diff] [blame] | 33 | ffffffbbffff0000 ffffffbbffffffff 64KB [guard page] |
Catalin Marinas | 4f04d8f | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 34 | |
| 35 | ffffffbc00000000 ffffffbdffffffff 8GB vmemmap |
| 36 | |
Catalin Marinas | e3978cd | 2012-10-23 14:51:16 +0100 | [diff] [blame] | 37 | ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap] |
| 38 | |
Catalin Marinas | 22bd1c9 | 2014-02-04 16:37:59 +0000 | [diff] [blame] | 39 | ffffffbffa000000 ffffffbffaffffff 16MB PCI I/O space |
| 40 | |
| 41 | ffffffbffb000000 ffffffbffbbfffff 12MB [guard] |
| 42 | |
Mark Salter | bf4b558 | 2014-04-07 15:39:52 -0700 | [diff] [blame] | 43 | ffffffbffbc00000 ffffffbffbdfffff 2MB fixed mappings |
Catalin Marinas | 2475ff9 | 2012-10-23 14:55:08 +0100 | [diff] [blame] | 44 | |
Catalin Marinas | 22bd1c9 | 2014-02-04 16:37:59 +0000 | [diff] [blame] | 45 | ffffffbffbe00000 ffffffbffbffffff 2MB [guard] |
Catalin Marinas | 4f04d8f | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 46 | |
| 47 | ffffffbffc000000 ffffffbfffffffff 64MB modules |
| 48 | |
Tekkaman Ninja | 715a711 | 2012-10-28 03:30:20 +0000 | [diff] [blame] | 49 | ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map |
Catalin Marinas | 4f04d8f | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 50 | |
| 51 | |
Jungseok Lee | 4edae01 | 2014-05-12 10:40:44 +0100 | [diff] [blame^] | 52 | AArch64 Linux memory layout with 4KB pages + 4 levels: |
| 53 | |
| 54 | Start End Size Use |
| 55 | ----------------------------------------------------------------------- |
| 56 | 0000000000000000 0000ffffffffffff 256TB user |
| 57 | |
| 58 | ffff000000000000 ffff7bfffffeffff ~124TB vmalloc |
| 59 | |
| 60 | ffff7bffffff0000 ffff7bffffffffff 64KB [guard page] |
| 61 | |
| 62 | ffff7c0000000000 ffff7dffffffffff 2TB vmemmap |
| 63 | |
| 64 | ffff7e0000000000 ffff7ffffbbfffff ~2TB [guard, future vmmemap] |
| 65 | |
| 66 | ffff7ffffa000000 ffff7ffffaffffff 16MB PCI I/O space |
| 67 | |
| 68 | ffff7ffffb000000 ffff7ffffbbfffff 12MB [guard] |
| 69 | |
| 70 | ffff7ffffbc00000 ffff7ffffbdfffff 2MB fixed mappings |
| 71 | |
| 72 | ffff7ffffbe00000 ffff7ffffbffffff 2MB [guard] |
| 73 | |
| 74 | ffff7ffffc000000 ffff7fffffffffff 64MB modules |
| 75 | |
| 76 | ffff800000000000 ffffffffffffffff 128TB kernel logical memory map |
| 77 | |
| 78 | |
| 79 | AArch64 Linux memory layout with 64KB pages + 2 levels: |
Catalin Marinas | 847264fb | 2013-10-23 16:50:07 +0100 | [diff] [blame] | 80 | |
| 81 | Start End Size Use |
| 82 | ----------------------------------------------------------------------- |
| 83 | 0000000000000000 000003ffffffffff 4TB user |
| 84 | |
| 85 | fffffc0000000000 fffffdfbfffeffff ~2TB vmalloc |
| 86 | |
| 87 | fffffdfbffff0000 fffffdfbffffffff 64KB [guard page] |
| 88 | |
| 89 | fffffdfc00000000 fffffdfdffffffff 8GB vmemmap |
| 90 | |
| 91 | fffffdfe00000000 fffffdfffbbfffff ~8GB [guard, future vmmemap] |
| 92 | |
Catalin Marinas | 22bd1c9 | 2014-02-04 16:37:59 +0000 | [diff] [blame] | 93 | fffffdfffa000000 fffffdfffaffffff 16MB PCI I/O space |
| 94 | |
| 95 | fffffdfffb000000 fffffdfffbbfffff 12MB [guard] |
| 96 | |
Mark Salter | bf4b558 | 2014-04-07 15:39:52 -0700 | [diff] [blame] | 97 | fffffdfffbc00000 fffffdfffbdfffff 2MB fixed mappings |
Catalin Marinas | 847264fb | 2013-10-23 16:50:07 +0100 | [diff] [blame] | 98 | |
Catalin Marinas | 22bd1c9 | 2014-02-04 16:37:59 +0000 | [diff] [blame] | 99 | fffffdfffbe00000 fffffdfffbffffff 2MB [guard] |
Catalin Marinas | 847264fb | 2013-10-23 16:50:07 +0100 | [diff] [blame] | 100 | |
| 101 | fffffdfffc000000 fffffdffffffffff 64MB modules |
| 102 | |
| 103 | fffffe0000000000 ffffffffffffffff 2TB kernel logical memory map |
| 104 | |
| 105 | |
Jungseok Lee | 4edae01 | 2014-05-12 10:40:44 +0100 | [diff] [blame^] | 106 | Translation table lookup with 4KB pages + 3 levels: |
Catalin Marinas | 4f04d8f | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 107 | |
| 108 | +--------+--------+--------+--------+--------+--------+--------+--------+ |
| 109 | |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0| |
| 110 | +--------+--------+--------+--------+--------+--------+--------+--------+ |
| 111 | | | | | | | |
| 112 | | | | | | v |
| 113 | | | | | | [11:0] in-page offset |
| 114 | | | | | +-> [20:12] L3 index |
| 115 | | | | +-----------> [29:21] L2 index |
| 116 | | | +---------------------> [38:30] L1 index |
| 117 | | +-------------------------------> [47:39] L0 index (not used) |
| 118 | +-------------------------------------------------> [63] TTBR0/1 |
| 119 | |
| 120 | |
Jungseok Lee | 4edae01 | 2014-05-12 10:40:44 +0100 | [diff] [blame^] | 121 | Translation table lookup with 4KB pages + 4 levels: |
| 122 | |
| 123 | +--------+--------+--------+--------+--------+--------+--------+--------+ |
| 124 | |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0| |
| 125 | +--------+--------+--------+--------+--------+--------+--------+--------+ |
| 126 | | | | | | | |
| 127 | | | | | | v |
| 128 | | | | | | [11:0] in-page offset |
| 129 | | | | | +-> [20:12] L3 index |
| 130 | | | | +-----------> [29:21] L2 index |
| 131 | | | +---------------------> [38:30] L1 index |
| 132 | | +-------------------------------> [47:39] L0 index |
| 133 | +-------------------------------------------------> [63] TTBR0/1 |
| 134 | |
| 135 | |
| 136 | Translation table lookup with 64KB pages + 2 levels: |
Catalin Marinas | 4f04d8f | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 137 | |
| 138 | +--------+--------+--------+--------+--------+--------+--------+--------+ |
| 139 | |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0| |
| 140 | +--------+--------+--------+--------+--------+--------+--------+--------+ |
| 141 | | | | | | |
| 142 | | | | | v |
| 143 | | | | | [15:0] in-page offset |
| 144 | | | | +----------> [28:16] L3 index |
| 145 | | | +--------------------------> [41:29] L2 index (only 38:29 used) |
| 146 | | +-------------------------------> [47:42] L1 index (not used) |
| 147 | +-------------------------------------------------> [63] TTBR0/1 |
Marc Zyngier | aa4a73a | 2013-05-02 14:31:03 +0100 | [diff] [blame] | 148 | |
| 149 | When using KVM, the hypervisor maps kernel pages in EL2, at a fixed |
| 150 | offset from the kernel VA (top 24bits of the kernel VA set to zero): |
| 151 | |
| 152 | Start End Size Use |
| 153 | ----------------------------------------------------------------------- |
| 154 | 0000004000000000 0000007fffffffff 256GB kernel objects mapped in HYP |