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Catalin Marinas4f04d8f2012-03-05 11:49:27 +00001 Memory Layout on AArch64 Linux
2 ==============================
3
4Author: Catalin Marinas <catalin.marinas@arm.com>
5Date : 20 February 2012
6
7This document describes the virtual memory layout used by the AArch64
8Linux kernel. The architecture allows up to 4 levels of translation
9tables with a 4KB page size and up to 3 levels with a 64KB page size.
10
Jungseok Lee4edae012014-05-12 10:40:44 +010011AArch64 Linux uses either 3 levels or 4 levels of translation tables with
12the 4KB page configuration, allowing 39-bit (512GB) or 48-bit (256TB)
13virtual addresses, respectively, for both user and kernel. With 64KB
14pages, only 2 levels of translation tables, allowing 42-bit (4TB)
15virtual address, are used but the memory layout is the same.
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000016
17User addresses have bits 63:39 set to 0 while the kernel addresses have
18the same bits set to 1. TTBRx selection is given by bit 63 of the
19virtual address. The swapper_pg_dir contains only kernel (global)
20mappings while the user pgd contains only user (non-global) mappings.
21The swapper_pgd_dir address is written to TTBR1 and never written to
22TTBR0.
23
24
Jungseok Lee4edae012014-05-12 10:40:44 +010025AArch64 Linux memory layout with 4KB pages + 3 levels:
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000026
27Start End Size Use
28-----------------------------------------------------------------------
290000000000000000 0000007fffffffff 512GB user
30
Catalin Marinase3978cd2012-10-23 14:51:16 +010031ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000032
Catalin Marinase3978cd2012-10-23 14:51:16 +010033ffffffbbffff0000 ffffffbbffffffff 64KB [guard page]
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000034
35ffffffbc00000000 ffffffbdffffffff 8GB vmemmap
36
Catalin Marinase3978cd2012-10-23 14:51:16 +010037ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap]
38
Catalin Marinas22bd1c92014-02-04 16:37:59 +000039ffffffbffa000000 ffffffbffaffffff 16MB PCI I/O space
40
41ffffffbffb000000 ffffffbffbbfffff 12MB [guard]
42
Mark Salterbf4b5582014-04-07 15:39:52 -070043ffffffbffbc00000 ffffffbffbdfffff 2MB fixed mappings
Catalin Marinas2475ff92012-10-23 14:55:08 +010044
Catalin Marinas22bd1c92014-02-04 16:37:59 +000045ffffffbffbe00000 ffffffbffbffffff 2MB [guard]
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000046
47ffffffbffc000000 ffffffbfffffffff 64MB modules
48
Tekkaman Ninja715a7112012-10-28 03:30:20 +000049ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000050
51
Jungseok Lee4edae012014-05-12 10:40:44 +010052AArch64 Linux memory layout with 4KB pages + 4 levels:
53
54Start End Size Use
55-----------------------------------------------------------------------
560000000000000000 0000ffffffffffff 256TB user
57
58ffff000000000000 ffff7bfffffeffff ~124TB vmalloc
59
60ffff7bffffff0000 ffff7bffffffffff 64KB [guard page]
61
62ffff7c0000000000 ffff7dffffffffff 2TB vmemmap
63
64ffff7e0000000000 ffff7ffffbbfffff ~2TB [guard, future vmmemap]
65
66ffff7ffffa000000 ffff7ffffaffffff 16MB PCI I/O space
67
68ffff7ffffb000000 ffff7ffffbbfffff 12MB [guard]
69
70ffff7ffffbc00000 ffff7ffffbdfffff 2MB fixed mappings
71
72ffff7ffffbe00000 ffff7ffffbffffff 2MB [guard]
73
74ffff7ffffc000000 ffff7fffffffffff 64MB modules
75
76ffff800000000000 ffffffffffffffff 128TB kernel logical memory map
77
78
79AArch64 Linux memory layout with 64KB pages + 2 levels:
Catalin Marinas847264fb2013-10-23 16:50:07 +010080
81Start End Size Use
82-----------------------------------------------------------------------
830000000000000000 000003ffffffffff 4TB user
84
85fffffc0000000000 fffffdfbfffeffff ~2TB vmalloc
86
87fffffdfbffff0000 fffffdfbffffffff 64KB [guard page]
88
89fffffdfc00000000 fffffdfdffffffff 8GB vmemmap
90
91fffffdfe00000000 fffffdfffbbfffff ~8GB [guard, future vmmemap]
92
Catalin Marinas22bd1c92014-02-04 16:37:59 +000093fffffdfffa000000 fffffdfffaffffff 16MB PCI I/O space
94
95fffffdfffb000000 fffffdfffbbfffff 12MB [guard]
96
Mark Salterbf4b5582014-04-07 15:39:52 -070097fffffdfffbc00000 fffffdfffbdfffff 2MB fixed mappings
Catalin Marinas847264fb2013-10-23 16:50:07 +010098
Catalin Marinas22bd1c92014-02-04 16:37:59 +000099fffffdfffbe00000 fffffdfffbffffff 2MB [guard]
Catalin Marinas847264fb2013-10-23 16:50:07 +0100100
101fffffdfffc000000 fffffdffffffffff 64MB modules
102
103fffffe0000000000 ffffffffffffffff 2TB kernel logical memory map
104
105
Jungseok Lee4edae012014-05-12 10:40:44 +0100106Translation table lookup with 4KB pages + 3 levels:
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000107
108+--------+--------+--------+--------+--------+--------+--------+--------+
109|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
110+--------+--------+--------+--------+--------+--------+--------+--------+
111 | | | | | |
112 | | | | | v
113 | | | | | [11:0] in-page offset
114 | | | | +-> [20:12] L3 index
115 | | | +-----------> [29:21] L2 index
116 | | +---------------------> [38:30] L1 index
117 | +-------------------------------> [47:39] L0 index (not used)
118 +-------------------------------------------------> [63] TTBR0/1
119
120
Jungseok Lee4edae012014-05-12 10:40:44 +0100121Translation table lookup with 4KB pages + 4 levels:
122
123+--------+--------+--------+--------+--------+--------+--------+--------+
124|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
125+--------+--------+--------+--------+--------+--------+--------+--------+
126 | | | | | |
127 | | | | | v
128 | | | | | [11:0] in-page offset
129 | | | | +-> [20:12] L3 index
130 | | | +-----------> [29:21] L2 index
131 | | +---------------------> [38:30] L1 index
132 | +-------------------------------> [47:39] L0 index
133 +-------------------------------------------------> [63] TTBR0/1
134
135
136Translation table lookup with 64KB pages + 2 levels:
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000137
138+--------+--------+--------+--------+--------+--------+--------+--------+
139|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
140+--------+--------+--------+--------+--------+--------+--------+--------+
141 | | | | |
142 | | | | v
143 | | | | [15:0] in-page offset
144 | | | +----------> [28:16] L3 index
145 | | +--------------------------> [41:29] L2 index (only 38:29 used)
146 | +-------------------------------> [47:42] L1 index (not used)
147 +-------------------------------------------------> [63] TTBR0/1
Marc Zyngieraa4a73a2013-05-02 14:31:03 +0100148
149When using KVM, the hypervisor maps kernel pages in EL2, at a fixed
150offset from the kernel VA (top 24bits of the kernel VA set to zero):
151
152Start End Size Use
153-----------------------------------------------------------------------
1540000004000000000 0000007fffffffff 256GB kernel objects mapped in HYP