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Santosh Shilimkar501f0c72011-01-01 19:56:04 +05301/*
2 * omap4-sar-layout.h: OMAP4 SAR RAM layout header file
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef OMAP_ARCH_OMAP4_SAR_LAYOUT_H
12#define OMAP_ARCH_OMAP4_SAR_LAYOUT_H
13
14/*
Santosh Shilimkar247c4452012-05-09 20:38:35 +053015 * SAR BANK offsets from base address OMAP44XX/54XX_SAR_RAM_BASE
Santosh Shilimkar501f0c72011-01-01 19:56:04 +053016 */
17#define SAR_BANK1_OFFSET 0x0000
18#define SAR_BANK2_OFFSET 0x1000
19#define SAR_BANK3_OFFSET 0x2000
20#define SAR_BANK4_OFFSET 0x3000
21
Santosh Shilimkarb2b97622010-06-16 22:19:48 +053022/* Scratch pad memory offsets from SAR_BANK1 */
23#define SCU_OFFSET0 0xd00
24#define SCU_OFFSET1 0xd04
25#define OMAP_TYPE_OFFSET 0xd10
Santosh Shilimkar5e94c6e32011-01-09 02:59:09 +053026#define L2X0_SAVE_OFFSET0 0xd14
27#define L2X0_SAVE_OFFSET1 0xd18
28#define L2X0_AUXCTRL_OFFSET 0xd1c
29#define L2X0_PREFETCH_CTRL_OFFSET 0xd20
Santosh Shilimkarb2b97622010-06-16 22:19:48 +053030
31/* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */
32#define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04
33#define CPU1_WAKEUP_NS_PA_ADDR_OFFSET 0xa08
34
Santosh Shilimkar0f3cf2e2010-06-16 23:29:31 +053035#define SAR_BACKUP_STATUS_OFFSET (SAR_BANK3_OFFSET + 0x500)
36#define SAR_SECURE_RAM_SIZE_OFFSET (SAR_BANK3_OFFSET + 0x504)
37#define SAR_SECRAM_SAVED_AT_OFFSET (SAR_BANK3_OFFSET + 0x508)
38
39/* WakeUpGen save restore offset from OMAP44XX_SAR_RAM_BASE */
40#define WAKEUPGENENB_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x684)
41#define WAKEUPGENENB_SECURE_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x694)
42#define WAKEUPGENENB_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x6a4)
43#define WAKEUPGENENB_SECURE_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x6b4)
44#define AUXCOREBOOT0_OFFSET (SAR_BANK3_OFFSET + 0x6c4)
45#define AUXCOREBOOT1_OFFSET (SAR_BANK3_OFFSET + 0x6c8)
46#define PTMSYNCREQ_MASK_OFFSET (SAR_BANK3_OFFSET + 0x6cc)
47#define PTMSYNCREQ_EN_OFFSET (SAR_BANK3_OFFSET + 0x6d0)
48#define SAR_BACKUP_STATUS_WAKEUPGEN 0x10
49
Santosh Shilimkar247c4452012-05-09 20:38:35 +053050/* WakeUpGen save restore offset from OMAP54XX_SAR_RAM_BASE */
51#define OMAP5_WAKEUPGENENB_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x8d4)
52#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x8e8)
53#define OMAP5_WAKEUPGENENB_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x8fc)
54#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x910)
55#define OMAP5_AUXCOREBOOT0_OFFSET (SAR_BANK3_OFFSET + 0x924)
56#define OMAP5_AUXCOREBOOT1_OFFSET (SAR_BANK3_OFFSET + 0x928)
57#define OMAP5_AMBA_IF_MODE_OFFSET (SAR_BANK3_OFFSET + 0x92c)
58#define OMAP5_SAR_BACKUP_STATUS_OFFSET (SAR_BANK3_OFFSET + 0x800)
59
Santosh Shilimkar501f0c72011-01-01 19:56:04 +053060#endif