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Huang Shijie10a2bca2011-09-08 10:47:09 +08001/*
2 * Freescale GPMI NAND Flash Driver
3 *
4 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5 * Copyright (C) 2008 Embedded Alley Solutions, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
Fabio Estevam3d100952012-09-05 10:27:33 -030021
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
Huang Shijie10a2bca2011-09-08 10:47:09 +080024#include <linux/clk.h>
25#include <linux/slab.h>
26#include <linux/interrupt.h>
Wolfram Sangdf16c862011-11-23 15:57:06 +010027#include <linux/module.h>
Huang Shijie10a2bca2011-09-08 10:47:09 +080028#include <linux/mtd/partitions.h>
Huang Shijiee10db1f2012-05-04 21:42:05 -040029#include <linux/of.h>
30#include <linux/of_device.h>
Huang Shijiec50c6942012-07-03 16:24:32 +080031#include <linux/of_mtd.h>
Huang Shijie10a2bca2011-09-08 10:47:09 +080032#include "gpmi-nand.h"
33
Huang Shijie5de0b522012-10-13 13:03:29 -040034/* Resource names for the GPMI NAND driver. */
35#define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
36#define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch"
37#define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch"
Huang Shijie5de0b522012-10-13 13:03:29 -040038
Huang Shijie10a2bca2011-09-08 10:47:09 +080039/* add our owner bbt descriptor */
40static uint8_t scan_ff_pattern[] = { 0xff };
41static struct nand_bbt_descr gpmi_bbt_descr = {
42 .options = 0,
43 .offs = 0,
44 .len = 1,
45 .pattern = scan_ff_pattern
46};
47
48/* We will use all the (page + OOB). */
49static struct nand_ecclayout gpmi_hw_ecclayout = {
50 .eccbytes = 0,
51 .eccpos = { 0, },
52 .oobfree = { {.offset = 0, .length = 0} }
53};
54
55static irqreturn_t bch_irq(int irq, void *cookie)
56{
57 struct gpmi_nand_data *this = cookie;
58
59 gpmi_clear_bch(this);
60 complete(&this->bch_done);
61 return IRQ_HANDLED;
62}
63
64/*
65 * Calculate the ECC strength by hand:
66 * E : The ECC strength.
67 * G : the length of Galois Field.
68 * N : The chunk count of per page.
69 * O : the oobsize of the NAND chip.
70 * M : the metasize of per page.
71 *
72 * The formula is :
73 * E * G * N
74 * ------------ <= (O - M)
75 * 8
76 *
77 * So, we get E by:
78 * (O - M) * 8
79 * E <= -------------
80 * G * N
81 */
82static inline int get_ecc_strength(struct gpmi_nand_data *this)
83{
84 struct bch_geometry *geo = &this->bch_geometry;
85 struct mtd_info *mtd = &this->mtd;
86 int ecc_strength;
87
88 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
89 / (geo->gf_len * geo->ecc_chunk_count);
90
91 /* We need the minor even number. */
92 return round_down(ecc_strength, 2);
93}
94
Huang Shijie92d0e092013-01-29 09:23:38 +080095static inline bool gpmi_check_ecc(struct gpmi_nand_data *this)
96{
97 struct bch_geometry *geo = &this->bch_geometry;
98
99 /* Do the sanity check. */
100 if (GPMI_IS_MX23(this) || GPMI_IS_MX28(this)) {
101 /* The mx23/mx28 only support the GF13. */
102 if (geo->gf_len == 14)
103 return false;
104
105 if (geo->ecc_strength > MXS_ECC_STRENGTH_MAX)
106 return false;
107 } else if (GPMI_IS_MX6Q(this)) {
108 if (geo->ecc_strength > MX6_ECC_STRENGTH_MAX)
109 return false;
110 }
111 return true;
112}
113
Huang Shijie10a2bca2011-09-08 10:47:09 +0800114int common_nfc_set_geometry(struct gpmi_nand_data *this)
115{
116 struct bch_geometry *geo = &this->bch_geometry;
117 struct mtd_info *mtd = &this->mtd;
118 unsigned int metadata_size;
119 unsigned int status_size;
120 unsigned int block_mark_bit_offset;
121
122 /*
123 * The size of the metadata can be changed, though we set it to 10
124 * bytes now. But it can't be too large, because we have to save
125 * enough space for BCH.
126 */
127 geo->metadata_size = 10;
128
129 /* The default for the length of Galois Field. */
130 geo->gf_len = 13;
131
Huang Shijie9ff16f02013-01-25 14:04:07 +0800132 /* The default for chunk size. */
Huang Shijie10a2bca2011-09-08 10:47:09 +0800133 geo->ecc_chunk_size = 512;
Huang Shijie9ff16f02013-01-25 14:04:07 +0800134 while (geo->ecc_chunk_size < mtd->oobsize) {
Huang Shijie10a2bca2011-09-08 10:47:09 +0800135 geo->ecc_chunk_size *= 2; /* keep C >= O */
Huang Shijie9ff16f02013-01-25 14:04:07 +0800136 geo->gf_len = 14;
137 }
Huang Shijie10a2bca2011-09-08 10:47:09 +0800138
139 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
140
141 /* We use the same ECC strength for all chunks. */
142 geo->ecc_strength = get_ecc_strength(this);
Huang Shijie92d0e092013-01-29 09:23:38 +0800143 if (!gpmi_check_ecc(this)) {
144 dev_err(this->dev,
145 "We can not support this nand chip."
146 " Its required ecc strength(%d) is beyond our"
147 " capability(%d).\n", geo->ecc_strength,
148 (GPMI_IS_MX6Q(this) ? MX6_ECC_STRENGTH_MAX
149 : MXS_ECC_STRENGTH_MAX));
Huang Shijie10a2bca2011-09-08 10:47:09 +0800150 return -EINVAL;
151 }
152
153 geo->page_size = mtd->writesize + mtd->oobsize;
154 geo->payload_size = mtd->writesize;
155
156 /*
157 * The auxiliary buffer contains the metadata and the ECC status. The
158 * metadata is padded to the nearest 32-bit boundary. The ECC status
159 * contains one byte for every ECC chunk, and is also padded to the
160 * nearest 32-bit boundary.
161 */
162 metadata_size = ALIGN(geo->metadata_size, 4);
163 status_size = ALIGN(geo->ecc_chunk_count, 4);
164
165 geo->auxiliary_size = metadata_size + status_size;
166 geo->auxiliary_status_offset = metadata_size;
167
168 if (!this->swap_block_mark)
169 return 0;
170
171 /*
172 * We need to compute the byte and bit offsets of
173 * the physical block mark within the ECC-based view of the page.
174 *
175 * NAND chip with 2K page shows below:
176 * (Block Mark)
177 * | |
178 * | D |
179 * |<---->|
180 * V V
181 * +---+----------+-+----------+-+----------+-+----------+-+
182 * | M | data |E| data |E| data |E| data |E|
183 * +---+----------+-+----------+-+----------+-+----------+-+
184 *
185 * The position of block mark moves forward in the ECC-based view
186 * of page, and the delta is:
187 *
188 * E * G * (N - 1)
189 * D = (---------------- + M)
190 * 8
191 *
192 * With the formula to compute the ECC strength, and the condition
193 * : C >= O (C is the ecc chunk size)
194 *
195 * It's easy to deduce to the following result:
196 *
197 * E * G (O - M) C - M C - M
198 * ----------- <= ------- <= -------- < ---------
199 * 8 N N (N - 1)
200 *
201 * So, we get:
202 *
203 * E * G * (N - 1)
204 * D = (---------------- + M) < C
205 * 8
206 *
207 * The above inequality means the position of block mark
208 * within the ECC-based view of the page is still in the data chunk,
209 * and it's NOT in the ECC bits of the chunk.
210 *
211 * Use the following to compute the bit position of the
212 * physical block mark within the ECC-based view of the page:
213 * (page_size - D) * 8
214 *
215 * --Huang Shijie
216 */
217 block_mark_bit_offset = mtd->writesize * 8 -
218 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
219 + geo->metadata_size * 8);
220
221 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
222 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
223 return 0;
224}
225
226struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
227{
228 int chipnr = this->current_chip;
229
230 return this->dma_chans[chipnr];
231}
232
233/* Can we use the upper's buffer directly for DMA? */
234void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr)
235{
236 struct scatterlist *sgl = &this->data_sgl;
237 int ret;
238
239 this->direct_dma_map_ok = true;
240
241 /* first try to map the upper buffer directly */
242 sg_init_one(sgl, this->upper_buf, this->upper_len);
243 ret = dma_map_sg(this->dev, sgl, 1, dr);
244 if (ret == 0) {
245 /* We have to use our own DMA buffer. */
246 sg_init_one(sgl, this->data_buffer_dma, PAGE_SIZE);
247
248 if (dr == DMA_TO_DEVICE)
249 memcpy(this->data_buffer_dma, this->upper_buf,
250 this->upper_len);
251
252 ret = dma_map_sg(this->dev, sgl, 1, dr);
253 if (ret == 0)
Vikram Narayanan2d350e52012-09-23 15:18:32 +0530254 pr_err("DMA mapping failed.\n");
Huang Shijie10a2bca2011-09-08 10:47:09 +0800255
256 this->direct_dma_map_ok = false;
257 }
258}
259
260/* This will be called after the DMA operation is finished. */
261static void dma_irq_callback(void *param)
262{
263 struct gpmi_nand_data *this = param;
264 struct completion *dma_c = &this->dma_done;
265
266 complete(dma_c);
267
268 switch (this->dma_type) {
269 case DMA_FOR_COMMAND:
270 dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE);
271 break;
272
273 case DMA_FOR_READ_DATA:
274 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE);
275 if (this->direct_dma_map_ok == false)
276 memcpy(this->upper_buf, this->data_buffer_dma,
277 this->upper_len);
278 break;
279
280 case DMA_FOR_WRITE_DATA:
281 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE);
282 break;
283
284 case DMA_FOR_READ_ECC_PAGE:
285 case DMA_FOR_WRITE_ECC_PAGE:
286 /* We have to wait the BCH interrupt to finish. */
287 break;
288
289 default:
290 pr_err("in wrong DMA operation.\n");
291 }
292}
293
294int start_dma_without_bch_irq(struct gpmi_nand_data *this,
295 struct dma_async_tx_descriptor *desc)
296{
297 struct completion *dma_c = &this->dma_done;
298 int err;
299
300 init_completion(dma_c);
301
302 desc->callback = dma_irq_callback;
303 desc->callback_param = this;
304 dmaengine_submit(desc);
Shawn Guod04525e2012-04-11 13:29:31 +0800305 dma_async_issue_pending(get_dma_chan(this));
Huang Shijie10a2bca2011-09-08 10:47:09 +0800306
307 /* Wait for the interrupt from the DMA block. */
308 err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000));
309 if (!err) {
310 pr_err("DMA timeout, last DMA :%d\n", this->last_dma_type);
311 gpmi_dump_info(this);
312 return -ETIMEDOUT;
313 }
314 return 0;
315}
316
317/*
318 * This function is used in BCH reading or BCH writing pages.
319 * It will wait for the BCH interrupt as long as ONE second.
320 * Actually, we must wait for two interrupts :
321 * [1] firstly the DMA interrupt and
322 * [2] secondly the BCH interrupt.
323 */
324int start_dma_with_bch_irq(struct gpmi_nand_data *this,
325 struct dma_async_tx_descriptor *desc)
326{
327 struct completion *bch_c = &this->bch_done;
328 int err;
329
330 /* Prepare to receive an interrupt from the BCH block. */
331 init_completion(bch_c);
332
333 /* start the DMA */
334 start_dma_without_bch_irq(this, desc);
335
336 /* Wait for the interrupt from the BCH block. */
337 err = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000));
338 if (!err) {
339 pr_err("BCH timeout, last DMA :%d\n", this->last_dma_type);
340 gpmi_dump_info(this);
341 return -ETIMEDOUT;
342 }
343 return 0;
344}
345
Greg Kroah-Hartmand8929942012-12-21 13:19:05 -0800346static int acquire_register_block(struct gpmi_nand_data *this,
347 const char *res_name)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800348{
349 struct platform_device *pdev = this->pdev;
350 struct resources *res = &this->resources;
351 struct resource *r;
Huang Shijie513d57e2012-07-17 14:14:02 +0800352 void __iomem *p;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800353
354 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
355 if (!r) {
356 pr_err("Can't get resource for %s\n", res_name);
357 return -ENXIO;
358 }
359
360 p = ioremap(r->start, resource_size(r));
361 if (!p) {
362 pr_err("Can't remap %s\n", res_name);
363 return -ENOMEM;
364 }
365
366 if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME))
367 res->gpmi_regs = p;
368 else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME))
369 res->bch_regs = p;
370 else
371 pr_err("unknown resource name : %s\n", res_name);
372
373 return 0;
374}
375
376static void release_register_block(struct gpmi_nand_data *this)
377{
378 struct resources *res = &this->resources;
379 if (res->gpmi_regs)
380 iounmap(res->gpmi_regs);
381 if (res->bch_regs)
382 iounmap(res->bch_regs);
383 res->gpmi_regs = NULL;
384 res->bch_regs = NULL;
385}
386
Greg Kroah-Hartmand8929942012-12-21 13:19:05 -0800387static int acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800388{
389 struct platform_device *pdev = this->pdev;
390 struct resources *res = &this->resources;
391 const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME;
392 struct resource *r;
393 int err;
394
395 r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
396 if (!r) {
397 pr_err("Can't get resource for %s\n", res_name);
398 return -ENXIO;
399 }
400
401 err = request_irq(r->start, irq_h, 0, res_name, this);
402 if (err) {
403 pr_err("Can't own %s\n", res_name);
404 return err;
405 }
406
407 res->bch_low_interrupt = r->start;
408 res->bch_high_interrupt = r->end;
409 return 0;
410}
411
412static void release_bch_irq(struct gpmi_nand_data *this)
413{
414 struct resources *res = &this->resources;
415 int i = res->bch_low_interrupt;
416
417 for (; i <= res->bch_high_interrupt; i++)
418 free_irq(i, this);
419}
420
Huang Shijie10a2bca2011-09-08 10:47:09 +0800421static void release_dma_channels(struct gpmi_nand_data *this)
422{
423 unsigned int i;
424 for (i = 0; i < DMA_CHANS; i++)
425 if (this->dma_chans[i]) {
426 dma_release_channel(this->dma_chans[i]);
427 this->dma_chans[i] = NULL;
428 }
429}
430
Bill Pemberton06f25512012-11-19 13:23:07 -0500431static int acquire_dma_channels(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800432{
433 struct platform_device *pdev = this->pdev;
Huang Shijiee10db1f2012-05-04 21:42:05 -0400434 struct dma_chan *dma_chan;
Huang Shijiee10db1f2012-05-04 21:42:05 -0400435
436 /* request dma channel */
Shawn Guo5fac0e12013-02-26 11:44:28 +0800437 dma_chan = dma_request_slave_channel(&pdev->dev, "rx-tx");
Huang Shijiee10db1f2012-05-04 21:42:05 -0400438 if (!dma_chan) {
Vikram Narayanan2d350e52012-09-23 15:18:32 +0530439 pr_err("Failed to request DMA channel.\n");
Huang Shijiee10db1f2012-05-04 21:42:05 -0400440 goto acquire_err;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800441 }
442
Huang Shijiee10db1f2012-05-04 21:42:05 -0400443 this->dma_chans[0] = dma_chan;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800444 return 0;
445
446acquire_err:
Huang Shijie10a2bca2011-09-08 10:47:09 +0800447 release_dma_channels(this);
448 return -EINVAL;
449}
450
Huang Shijieff506172012-07-02 21:39:32 -0400451static void gpmi_put_clks(struct gpmi_nand_data *this)
452{
453 struct resources *r = &this->resources;
454 struct clk *clk;
455 int i;
456
457 for (i = 0; i < GPMI_CLK_MAX; i++) {
458 clk = r->clock[i];
459 if (clk) {
460 clk_put(clk);
461 r->clock[i] = NULL;
462 }
463 }
464}
465
466static char *extra_clks_for_mx6q[GPMI_CLK_MAX] = {
467 "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch",
468};
469
Bill Pemberton06f25512012-11-19 13:23:07 -0500470static int gpmi_get_clks(struct gpmi_nand_data *this)
Huang Shijieff506172012-07-02 21:39:32 -0400471{
472 struct resources *r = &this->resources;
473 char **extra_clks = NULL;
474 struct clk *clk;
Michał Mirosławd1cb5562013-05-04 15:19:35 +0200475 int err, i;
Huang Shijieff506172012-07-02 21:39:32 -0400476
477 /* The main clock is stored in the first. */
478 r->clock[0] = clk_get(this->dev, "gpmi_io");
Michał Mirosławd1cb5562013-05-04 15:19:35 +0200479 if (IS_ERR(r->clock[0])) {
480 err = PTR_ERR(r->clock[0]);
Huang Shijieff506172012-07-02 21:39:32 -0400481 goto err_clock;
Michał Mirosławd1cb5562013-05-04 15:19:35 +0200482 }
Huang Shijieff506172012-07-02 21:39:32 -0400483
484 /* Get extra clocks */
485 if (GPMI_IS_MX6Q(this))
486 extra_clks = extra_clks_for_mx6q;
487 if (!extra_clks)
488 return 0;
489
490 for (i = 1; i < GPMI_CLK_MAX; i++) {
491 if (extra_clks[i - 1] == NULL)
492 break;
493
494 clk = clk_get(this->dev, extra_clks[i - 1]);
Michał Mirosławd1cb5562013-05-04 15:19:35 +0200495 if (IS_ERR(clk)) {
496 err = PTR_ERR(clk);
Huang Shijieff506172012-07-02 21:39:32 -0400497 goto err_clock;
Michał Mirosławd1cb5562013-05-04 15:19:35 +0200498 }
Huang Shijieff506172012-07-02 21:39:32 -0400499
500 r->clock[i] = clk;
501 }
502
Huang Shijiee1ca95e2012-09-13 14:57:58 +0800503 if (GPMI_IS_MX6Q(this))
Huang Shijieff506172012-07-02 21:39:32 -0400504 /*
Huang Shijiee1ca95e2012-09-13 14:57:58 +0800505 * Set the default value for the gpmi clock in mx6q:
Huang Shijieff506172012-07-02 21:39:32 -0400506 *
Huang Shijiee1ca95e2012-09-13 14:57:58 +0800507 * If you want to use the ONFI nand which is in the
508 * Synchronous Mode, you should change the clock as you need.
Huang Shijieff506172012-07-02 21:39:32 -0400509 */
510 clk_set_rate(r->clock[0], 22000000);
Huang Shijiee1ca95e2012-09-13 14:57:58 +0800511
Huang Shijieff506172012-07-02 21:39:32 -0400512 return 0;
513
514err_clock:
515 dev_dbg(this->dev, "failed in finding the clocks.\n");
516 gpmi_put_clks(this);
Michał Mirosławd1cb5562013-05-04 15:19:35 +0200517 return err;
Huang Shijieff506172012-07-02 21:39:32 -0400518}
519
Bill Pemberton06f25512012-11-19 13:23:07 -0500520static int acquire_resources(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800521{
Huang Shijie10a2bca2011-09-08 10:47:09 +0800522 int ret;
523
524 ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME);
525 if (ret)
526 goto exit_regs;
527
528 ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME);
529 if (ret)
530 goto exit_regs;
531
532 ret = acquire_bch_irq(this, bch_irq);
533 if (ret)
534 goto exit_regs;
535
536 ret = acquire_dma_channels(this);
537 if (ret)
538 goto exit_dma_channels;
539
Huang Shijieff506172012-07-02 21:39:32 -0400540 ret = gpmi_get_clks(this);
541 if (ret)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800542 goto exit_clock;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800543 return 0;
544
545exit_clock:
546 release_dma_channels(this);
547exit_dma_channels:
548 release_bch_irq(this);
549exit_regs:
550 release_register_block(this);
551 return ret;
552}
553
554static void release_resources(struct gpmi_nand_data *this)
555{
Huang Shijieff506172012-07-02 21:39:32 -0400556 gpmi_put_clks(this);
Huang Shijie10a2bca2011-09-08 10:47:09 +0800557 release_register_block(this);
558 release_bch_irq(this);
559 release_dma_channels(this);
560}
561
Bill Pemberton06f25512012-11-19 13:23:07 -0500562static int init_hardware(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800563{
564 int ret;
565
566 /*
567 * This structure contains the "safe" GPMI timing that should succeed
568 * with any NAND Flash device
569 * (although, with less-than-optimal performance).
570 */
571 struct nand_timing safe_timing = {
572 .data_setup_in_ns = 80,
573 .data_hold_in_ns = 60,
574 .address_setup_in_ns = 25,
575 .gpmi_sample_delay_in_ns = 6,
576 .tREA_in_ns = -1,
577 .tRLOH_in_ns = -1,
578 .tRHOH_in_ns = -1,
579 };
580
581 /* Initialize the hardwares. */
582 ret = gpmi_init(this);
583 if (ret)
584 return ret;
585
586 this->timing = safe_timing;
587 return 0;
588}
589
590static int read_page_prepare(struct gpmi_nand_data *this,
591 void *destination, unsigned length,
592 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
593 void **use_virt, dma_addr_t *use_phys)
594{
595 struct device *dev = this->dev;
596
597 if (virt_addr_valid(destination)) {
598 dma_addr_t dest_phys;
599
600 dest_phys = dma_map_single(dev, destination,
601 length, DMA_FROM_DEVICE);
602 if (dma_mapping_error(dev, dest_phys)) {
603 if (alt_size < length) {
Vikram Narayanan2d350e52012-09-23 15:18:32 +0530604 pr_err("%s, Alternate buffer is too small\n",
605 __func__);
Huang Shijie10a2bca2011-09-08 10:47:09 +0800606 return -ENOMEM;
607 }
608 goto map_failed;
609 }
610 *use_virt = destination;
611 *use_phys = dest_phys;
612 this->direct_dma_map_ok = true;
613 return 0;
614 }
615
616map_failed:
617 *use_virt = alt_virt;
618 *use_phys = alt_phys;
619 this->direct_dma_map_ok = false;
620 return 0;
621}
622
623static inline void read_page_end(struct gpmi_nand_data *this,
624 void *destination, unsigned length,
625 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
626 void *used_virt, dma_addr_t used_phys)
627{
628 if (this->direct_dma_map_ok)
629 dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE);
630}
631
632static inline void read_page_swap_end(struct gpmi_nand_data *this,
633 void *destination, unsigned length,
634 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
635 void *used_virt, dma_addr_t used_phys)
636{
637 if (!this->direct_dma_map_ok)
638 memcpy(destination, alt_virt, length);
639}
640
641static int send_page_prepare(struct gpmi_nand_data *this,
642 const void *source, unsigned length,
643 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
644 const void **use_virt, dma_addr_t *use_phys)
645{
646 struct device *dev = this->dev;
647
648 if (virt_addr_valid(source)) {
649 dma_addr_t source_phys;
650
651 source_phys = dma_map_single(dev, (void *)source, length,
652 DMA_TO_DEVICE);
653 if (dma_mapping_error(dev, source_phys)) {
654 if (alt_size < length) {
Vikram Narayanan2d350e52012-09-23 15:18:32 +0530655 pr_err("%s, Alternate buffer is too small\n",
656 __func__);
Huang Shijie10a2bca2011-09-08 10:47:09 +0800657 return -ENOMEM;
658 }
659 goto map_failed;
660 }
661 *use_virt = source;
662 *use_phys = source_phys;
663 return 0;
664 }
665map_failed:
666 /*
667 * Copy the content of the source buffer into the alternate
668 * buffer and set up the return values accordingly.
669 */
670 memcpy(alt_virt, source, length);
671
672 *use_virt = alt_virt;
673 *use_phys = alt_phys;
674 return 0;
675}
676
677static void send_page_end(struct gpmi_nand_data *this,
678 const void *source, unsigned length,
679 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
680 const void *used_virt, dma_addr_t used_phys)
681{
682 struct device *dev = this->dev;
683 if (used_virt == source)
684 dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE);
685}
686
687static void gpmi_free_dma_buffer(struct gpmi_nand_data *this)
688{
689 struct device *dev = this->dev;
690
691 if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt))
692 dma_free_coherent(dev, this->page_buffer_size,
693 this->page_buffer_virt,
694 this->page_buffer_phys);
695 kfree(this->cmd_buffer);
696 kfree(this->data_buffer_dma);
697
698 this->cmd_buffer = NULL;
699 this->data_buffer_dma = NULL;
700 this->page_buffer_virt = NULL;
701 this->page_buffer_size = 0;
702}
703
704/* Allocate the DMA buffers */
705static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
706{
707 struct bch_geometry *geo = &this->bch_geometry;
708 struct device *dev = this->dev;
709
710 /* [1] Allocate a command buffer. PAGE_SIZE is enough. */
Huang Shijie513d57e2012-07-17 14:14:02 +0800711 this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL);
Huang Shijie10a2bca2011-09-08 10:47:09 +0800712 if (this->cmd_buffer == NULL)
713 goto error_alloc;
714
715 /* [2] Allocate a read/write data buffer. PAGE_SIZE is enough. */
Huang Shijie513d57e2012-07-17 14:14:02 +0800716 this->data_buffer_dma = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL);
Huang Shijie10a2bca2011-09-08 10:47:09 +0800717 if (this->data_buffer_dma == NULL)
718 goto error_alloc;
719
720 /*
721 * [3] Allocate the page buffer.
722 *
723 * Both the payload buffer and the auxiliary buffer must appear on
724 * 32-bit boundaries. We presume the size of the payload buffer is a
725 * power of two and is much larger than four, which guarantees the
726 * auxiliary buffer will appear on a 32-bit boundary.
727 */
728 this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
729 this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
730 &this->page_buffer_phys, GFP_DMA);
731 if (!this->page_buffer_virt)
732 goto error_alloc;
733
734
735 /* Slice up the page buffer. */
736 this->payload_virt = this->page_buffer_virt;
737 this->payload_phys = this->page_buffer_phys;
738 this->auxiliary_virt = this->payload_virt + geo->payload_size;
739 this->auxiliary_phys = this->payload_phys + geo->payload_size;
740 return 0;
741
742error_alloc:
743 gpmi_free_dma_buffer(this);
Vikram Narayanan2d350e52012-09-23 15:18:32 +0530744 pr_err("Error allocating DMA buffers!\n");
Huang Shijie10a2bca2011-09-08 10:47:09 +0800745 return -ENOMEM;
746}
747
748static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
749{
750 struct nand_chip *chip = mtd->priv;
751 struct gpmi_nand_data *this = chip->priv;
752 int ret;
753
754 /*
755 * Every operation begins with a command byte and a series of zero or
756 * more address bytes. These are distinguished by either the Address
757 * Latch Enable (ALE) or Command Latch Enable (CLE) signals being
758 * asserted. When MTD is ready to execute the command, it will deassert
759 * both latch enables.
760 *
761 * Rather than run a separate DMA operation for every single byte, we
762 * queue them up and run a single DMA operation for the entire series
763 * of command and data bytes. NAND_CMD_NONE means the END of the queue.
764 */
765 if ((ctrl & (NAND_ALE | NAND_CLE))) {
766 if (data != NAND_CMD_NONE)
767 this->cmd_buffer[this->command_length++] = data;
768 return;
769 }
770
771 if (!this->command_length)
772 return;
773
774 ret = gpmi_send_command(this);
775 if (ret)
776 pr_err("Chip: %u, Error %d\n", this->current_chip, ret);
777
778 this->command_length = 0;
779}
780
781static int gpmi_dev_ready(struct mtd_info *mtd)
782{
783 struct nand_chip *chip = mtd->priv;
784 struct gpmi_nand_data *this = chip->priv;
785
786 return gpmi_is_ready(this, this->current_chip);
787}
788
789static void gpmi_select_chip(struct mtd_info *mtd, int chipnr)
790{
791 struct nand_chip *chip = mtd->priv;
792 struct gpmi_nand_data *this = chip->priv;
793
794 if ((this->current_chip < 0) && (chipnr >= 0))
795 gpmi_begin(this);
796 else if ((this->current_chip >= 0) && (chipnr < 0))
797 gpmi_end(this);
798
799 this->current_chip = chipnr;
800}
801
802static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
803{
804 struct nand_chip *chip = mtd->priv;
805 struct gpmi_nand_data *this = chip->priv;
806
807 pr_debug("len is %d\n", len);
808 this->upper_buf = buf;
809 this->upper_len = len;
810
811 gpmi_read_data(this);
812}
813
814static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
815{
816 struct nand_chip *chip = mtd->priv;
817 struct gpmi_nand_data *this = chip->priv;
818
819 pr_debug("len is %d\n", len);
820 this->upper_buf = (uint8_t *)buf;
821 this->upper_len = len;
822
823 gpmi_send_data(this);
824}
825
826static uint8_t gpmi_read_byte(struct mtd_info *mtd)
827{
828 struct nand_chip *chip = mtd->priv;
829 struct gpmi_nand_data *this = chip->priv;
830 uint8_t *buf = this->data_buffer_dma;
831
832 gpmi_read_buf(mtd, buf, 1);
833 return buf[0];
834}
835
836/*
837 * Handles block mark swapping.
838 * It can be called in swapping the block mark, or swapping it back,
839 * because the the operations are the same.
840 */
841static void block_mark_swapping(struct gpmi_nand_data *this,
842 void *payload, void *auxiliary)
843{
844 struct bch_geometry *nfc_geo = &this->bch_geometry;
845 unsigned char *p;
846 unsigned char *a;
847 unsigned int bit;
848 unsigned char mask;
849 unsigned char from_data;
850 unsigned char from_oob;
851
852 if (!this->swap_block_mark)
853 return;
854
855 /*
856 * If control arrives here, we're swapping. Make some convenience
857 * variables.
858 */
859 bit = nfc_geo->block_mark_bit_offset;
860 p = payload + nfc_geo->block_mark_byte_offset;
861 a = auxiliary;
862
863 /*
864 * Get the byte from the data area that overlays the block mark. Since
865 * the ECC engine applies its own view to the bits in the page, the
866 * physical block mark won't (in general) appear on a byte boundary in
867 * the data.
868 */
869 from_data = (p[0] >> bit) | (p[1] << (8 - bit));
870
871 /* Get the byte from the OOB. */
872 from_oob = a[0];
873
874 /* Swap them. */
875 a[0] = from_data;
876
877 mask = (0x1 << bit) - 1;
878 p[0] = (p[0] & mask) | (from_oob << bit);
879
880 mask = ~0 << bit;
881 p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
882}
883
884static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -0700885 uint8_t *buf, int oob_required, int page)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800886{
887 struct gpmi_nand_data *this = chip->priv;
888 struct bch_geometry *nfc_geo = &this->bch_geometry;
889 void *payload_virt;
890 dma_addr_t payload_phys;
891 void *auxiliary_virt;
892 dma_addr_t auxiliary_phys;
893 unsigned int i;
894 unsigned char *status;
Zach Sadeckib23b7462012-12-13 20:36:29 -0600895 unsigned int max_bitflips = 0;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800896 int ret;
897
898 pr_debug("page number is : %d\n", page);
899 ret = read_page_prepare(this, buf, mtd->writesize,
900 this->payload_virt, this->payload_phys,
901 nfc_geo->payload_size,
902 &payload_virt, &payload_phys);
903 if (ret) {
904 pr_err("Inadequate DMA buffer\n");
905 ret = -ENOMEM;
906 return ret;
907 }
908 auxiliary_virt = this->auxiliary_virt;
909 auxiliary_phys = this->auxiliary_phys;
910
911 /* go! */
912 ret = gpmi_read_page(this, payload_phys, auxiliary_phys);
913 read_page_end(this, buf, mtd->writesize,
914 this->payload_virt, this->payload_phys,
915 nfc_geo->payload_size,
916 payload_virt, payload_phys);
917 if (ret) {
918 pr_err("Error in ECC-based read: %d\n", ret);
Zach Sadeckib23b7462012-12-13 20:36:29 -0600919 return ret;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800920 }
921
922 /* handle the block mark swapping */
923 block_mark_swapping(this, payload_virt, auxiliary_virt);
924
925 /* Loop over status bytes, accumulating ECC status. */
Zach Sadeckib23b7462012-12-13 20:36:29 -0600926 status = auxiliary_virt + nfc_geo->auxiliary_status_offset;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800927
928 for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) {
929 if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED))
930 continue;
931
932 if (*status == STATUS_UNCORRECTABLE) {
Zach Sadeckib23b7462012-12-13 20:36:29 -0600933 mtd->ecc_stats.failed++;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800934 continue;
935 }
Zach Sadeckib23b7462012-12-13 20:36:29 -0600936 mtd->ecc_stats.corrected += *status;
937 max_bitflips = max_t(unsigned int, max_bitflips, *status);
Huang Shijie10a2bca2011-09-08 10:47:09 +0800938 }
939
Brian Norris7725cc82012-05-02 10:15:02 -0700940 if (oob_required) {
941 /*
942 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob()
943 * for details about our policy for delivering the OOB.
944 *
945 * We fill the caller's buffer with set bits, and then copy the
946 * block mark to th caller's buffer. Note that, if block mark
947 * swapping was necessary, it has already been done, so we can
948 * rely on the first byte of the auxiliary buffer to contain
949 * the block mark.
950 */
951 memset(chip->oob_poi, ~0, mtd->oobsize);
952 chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];
Brian Norris7725cc82012-05-02 10:15:02 -0700953 }
Sascha Hauer6023813a2012-06-26 17:26:16 +0200954
955 read_page_swap_end(this, buf, mtd->writesize,
956 this->payload_virt, this->payload_phys,
957 nfc_geo->payload_size,
958 payload_virt, payload_phys);
Zach Sadeckib23b7462012-12-13 20:36:29 -0600959
960 return max_bitflips;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800961}
962
Josh Wufdbad98d2012-06-25 18:07:45 +0800963static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -0700964 const uint8_t *buf, int oob_required)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800965{
966 struct gpmi_nand_data *this = chip->priv;
967 struct bch_geometry *nfc_geo = &this->bch_geometry;
968 const void *payload_virt;
969 dma_addr_t payload_phys;
970 const void *auxiliary_virt;
971 dma_addr_t auxiliary_phys;
972 int ret;
973
974 pr_debug("ecc write page.\n");
975 if (this->swap_block_mark) {
976 /*
977 * If control arrives here, we're doing block mark swapping.
978 * Since we can't modify the caller's buffers, we must copy them
979 * into our own.
980 */
981 memcpy(this->payload_virt, buf, mtd->writesize);
982 payload_virt = this->payload_virt;
983 payload_phys = this->payload_phys;
984
985 memcpy(this->auxiliary_virt, chip->oob_poi,
986 nfc_geo->auxiliary_size);
987 auxiliary_virt = this->auxiliary_virt;
988 auxiliary_phys = this->auxiliary_phys;
989
990 /* Handle block mark swapping. */
991 block_mark_swapping(this,
992 (void *) payload_virt, (void *) auxiliary_virt);
993 } else {
994 /*
995 * If control arrives here, we're not doing block mark swapping,
996 * so we can to try and use the caller's buffers.
997 */
998 ret = send_page_prepare(this,
999 buf, mtd->writesize,
1000 this->payload_virt, this->payload_phys,
1001 nfc_geo->payload_size,
1002 &payload_virt, &payload_phys);
1003 if (ret) {
1004 pr_err("Inadequate payload DMA buffer\n");
Josh Wufdbad98d2012-06-25 18:07:45 +08001005 return 0;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001006 }
1007
1008 ret = send_page_prepare(this,
1009 chip->oob_poi, mtd->oobsize,
1010 this->auxiliary_virt, this->auxiliary_phys,
1011 nfc_geo->auxiliary_size,
1012 &auxiliary_virt, &auxiliary_phys);
1013 if (ret) {
1014 pr_err("Inadequate auxiliary DMA buffer\n");
1015 goto exit_auxiliary;
1016 }
1017 }
1018
1019 /* Ask the NFC. */
1020 ret = gpmi_send_page(this, payload_phys, auxiliary_phys);
1021 if (ret)
1022 pr_err("Error in ECC-based write: %d\n", ret);
1023
1024 if (!this->swap_block_mark) {
1025 send_page_end(this, chip->oob_poi, mtd->oobsize,
1026 this->auxiliary_virt, this->auxiliary_phys,
1027 nfc_geo->auxiliary_size,
1028 auxiliary_virt, auxiliary_phys);
1029exit_auxiliary:
1030 send_page_end(this, buf, mtd->writesize,
1031 this->payload_virt, this->payload_phys,
1032 nfc_geo->payload_size,
1033 payload_virt, payload_phys);
1034 }
Josh Wufdbad98d2012-06-25 18:07:45 +08001035
1036 return 0;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001037}
1038
1039/*
1040 * There are several places in this driver where we have to handle the OOB and
1041 * block marks. This is the function where things are the most complicated, so
1042 * this is where we try to explain it all. All the other places refer back to
1043 * here.
1044 *
1045 * These are the rules, in order of decreasing importance:
1046 *
1047 * 1) Nothing the caller does can be allowed to imperil the block mark.
1048 *
1049 * 2) In read operations, the first byte of the OOB we return must reflect the
1050 * true state of the block mark, no matter where that block mark appears in
1051 * the physical page.
1052 *
1053 * 3) ECC-based read operations return an OOB full of set bits (since we never
1054 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1055 * return).
1056 *
1057 * 4) "Raw" read operations return a direct view of the physical bytes in the
1058 * page, using the conventional definition of which bytes are data and which
1059 * are OOB. This gives the caller a way to see the actual, physical bytes
1060 * in the page, without the distortions applied by our ECC engine.
1061 *
1062 *
1063 * What we do for this specific read operation depends on two questions:
1064 *
1065 * 1) Are we doing a "raw" read, or an ECC-based read?
1066 *
1067 * 2) Are we using block mark swapping or transcription?
1068 *
1069 * There are four cases, illustrated by the following Karnaugh map:
1070 *
1071 * | Raw | ECC-based |
1072 * -------------+-------------------------+-------------------------+
1073 * | Read the conventional | |
1074 * | OOB at the end of the | |
1075 * Swapping | page and return it. It | |
1076 * | contains exactly what | |
1077 * | we want. | Read the block mark and |
1078 * -------------+-------------------------+ return it in a buffer |
1079 * | Read the conventional | full of set bits. |
1080 * | OOB at the end of the | |
1081 * | page and also the block | |
1082 * Transcribing | mark in the metadata. | |
1083 * | Copy the block mark | |
1084 * | into the first byte of | |
1085 * | the OOB. | |
1086 * -------------+-------------------------+-------------------------+
1087 *
1088 * Note that we break rule #4 in the Transcribing/Raw case because we're not
1089 * giving an accurate view of the actual, physical bytes in the page (we're
1090 * overwriting the block mark). That's OK because it's more important to follow
1091 * rule #2.
1092 *
1093 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1094 * easy. When reading a page, for example, the NAND Flash MTD code calls our
1095 * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an
1096 * ECC-based or raw view of the page is implicit in which function it calls
1097 * (there is a similar pair of ECC-based/raw functions for writing).
1098 *
Brian Norris271b874b2012-05-11 13:30:35 -07001099 * FIXME: The following paragraph is incorrect, now that there exist
1100 * ecc.read_oob_raw and ecc.write_oob_raw functions.
1101 *
Huang Shijie10a2bca2011-09-08 10:47:09 +08001102 * Since MTD assumes the OOB is not covered by ECC, there is no pair of
1103 * ECC-based/raw functions for reading or or writing the OOB. The fact that the
1104 * caller wants an ECC-based or raw view of the page is not propagated down to
1105 * this driver.
1106 */
1107static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001108 int page)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001109{
1110 struct gpmi_nand_data *this = chip->priv;
1111
1112 pr_debug("page number is %d\n", page);
1113 /* clear the OOB buffer */
1114 memset(chip->oob_poi, ~0, mtd->oobsize);
1115
1116 /* Read out the conventional OOB. */
1117 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1118 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1119
1120 /*
1121 * Now, we want to make sure the block mark is correct. In the
1122 * Swapping/Raw case, we already have it. Otherwise, we need to
1123 * explicitly read it.
1124 */
1125 if (!this->swap_block_mark) {
1126 /* Read the block mark into the first byte of the OOB buffer. */
1127 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1128 chip->oob_poi[0] = chip->read_byte(mtd);
1129 }
1130
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001131 return 0;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001132}
1133
1134static int
1135gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
1136{
1137 /*
1138 * The BCH will use all the (page + oob).
1139 * Our gpmi_hw_ecclayout can only prohibit the JFFS2 to write the oob.
1140 * But it can not stop some ioctls such MEMWRITEOOB which uses
Brian Norris0612b9d2011-08-30 18:45:40 -07001141 * MTD_OPS_PLACE_OOB. So We have to implement this function to prohibit
Huang Shijie10a2bca2011-09-08 10:47:09 +08001142 * these ioctls too.
1143 */
1144 return -EPERM;
1145}
1146
1147static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
1148{
1149 struct nand_chip *chip = mtd->priv;
1150 struct gpmi_nand_data *this = chip->priv;
Brian Norris5a0edb22013-07-30 17:52:58 -07001151 int ret = 0;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001152 uint8_t *block_mark;
1153 int column, page, status, chipnr;
1154
Brian Norris5a0edb22013-07-30 17:52:58 -07001155 chipnr = (int)(ofs >> chip->chip_shift);
1156 chip->select_chip(mtd, chipnr);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001157
Brian Norris5a0edb22013-07-30 17:52:58 -07001158 column = this->swap_block_mark ? mtd->writesize : 0;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001159
Brian Norris5a0edb22013-07-30 17:52:58 -07001160 /* Write the block mark. */
1161 block_mark = this->data_buffer_dma;
1162 block_mark[0] = 0; /* bad block marker */
Huang Shijie10a2bca2011-09-08 10:47:09 +08001163
Brian Norris5a0edb22013-07-30 17:52:58 -07001164 /* Shift to get page */
1165 page = (int)(ofs >> chip->page_shift);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001166
Brian Norris5a0edb22013-07-30 17:52:58 -07001167 chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page);
1168 chip->write_buf(mtd, block_mark, 1);
1169 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001170
Brian Norris5a0edb22013-07-30 17:52:58 -07001171 status = chip->waitfunc(mtd, chip);
1172 if (status & NAND_STATUS_FAIL)
1173 ret = -EIO;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001174
Brian Norris5a0edb22013-07-30 17:52:58 -07001175 chip->select_chip(mtd, -1);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001176
1177 return ret;
1178}
1179
Wolfram Sanga78da282012-03-21 19:29:17 +01001180static int nand_boot_set_geometry(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001181{
1182 struct boot_rom_geometry *geometry = &this->rom_geometry;
1183
1184 /*
1185 * Set the boot block stride size.
1186 *
1187 * In principle, we should be reading this from the OTP bits, since
1188 * that's where the ROM is going to get it. In fact, we don't have any
1189 * way to read the OTP bits, so we go with the default and hope for the
1190 * best.
1191 */
1192 geometry->stride_size_in_pages = 64;
1193
1194 /*
1195 * Set the search area stride exponent.
1196 *
1197 * In principle, we should be reading this from the OTP bits, since
1198 * that's where the ROM is going to get it. In fact, we don't have any
1199 * way to read the OTP bits, so we go with the default and hope for the
1200 * best.
1201 */
1202 geometry->search_area_stride_exponent = 2;
1203 return 0;
1204}
1205
1206static const char *fingerprint = "STMP";
Wolfram Sanga78da282012-03-21 19:29:17 +01001207static int mx23_check_transcription_stamp(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001208{
1209 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1210 struct device *dev = this->dev;
1211 struct mtd_info *mtd = &this->mtd;
1212 struct nand_chip *chip = &this->nand;
1213 unsigned int search_area_size_in_strides;
1214 unsigned int stride;
1215 unsigned int page;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001216 uint8_t *buffer = chip->buffers->databuf;
1217 int saved_chip_number;
1218 int found_an_ncb_fingerprint = false;
1219
1220 /* Compute the number of strides in a search area. */
1221 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1222
1223 saved_chip_number = this->current_chip;
1224 chip->select_chip(mtd, 0);
1225
1226 /*
1227 * Loop through the first search area, looking for the NCB fingerprint.
1228 */
1229 dev_dbg(dev, "Scanning for an NCB fingerprint...\n");
1230
1231 for (stride = 0; stride < search_area_size_in_strides; stride++) {
Huang Shijie513d57e2012-07-17 14:14:02 +08001232 /* Compute the page addresses. */
Huang Shijie10a2bca2011-09-08 10:47:09 +08001233 page = stride * rom_geo->stride_size_in_pages;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001234
1235 dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page);
1236
1237 /*
1238 * Read the NCB fingerprint. The fingerprint is four bytes long
1239 * and starts in the 12th byte of the page.
1240 */
1241 chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page);
1242 chip->read_buf(mtd, buffer, strlen(fingerprint));
1243
1244 /* Look for the fingerprint. */
1245 if (!memcmp(buffer, fingerprint, strlen(fingerprint))) {
1246 found_an_ncb_fingerprint = true;
1247 break;
1248 }
1249
1250 }
1251
1252 chip->select_chip(mtd, saved_chip_number);
1253
1254 if (found_an_ncb_fingerprint)
1255 dev_dbg(dev, "\tFound a fingerprint\n");
1256 else
1257 dev_dbg(dev, "\tNo fingerprint found\n");
1258 return found_an_ncb_fingerprint;
1259}
1260
1261/* Writes a transcription stamp. */
Wolfram Sanga78da282012-03-21 19:29:17 +01001262static int mx23_write_transcription_stamp(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001263{
1264 struct device *dev = this->dev;
1265 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1266 struct mtd_info *mtd = &this->mtd;
1267 struct nand_chip *chip = &this->nand;
1268 unsigned int block_size_in_pages;
1269 unsigned int search_area_size_in_strides;
1270 unsigned int search_area_size_in_pages;
1271 unsigned int search_area_size_in_blocks;
1272 unsigned int block;
1273 unsigned int stride;
1274 unsigned int page;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001275 uint8_t *buffer = chip->buffers->databuf;
1276 int saved_chip_number;
1277 int status;
1278
1279 /* Compute the search area geometry. */
1280 block_size_in_pages = mtd->erasesize / mtd->writesize;
1281 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1282 search_area_size_in_pages = search_area_size_in_strides *
1283 rom_geo->stride_size_in_pages;
1284 search_area_size_in_blocks =
1285 (search_area_size_in_pages + (block_size_in_pages - 1)) /
1286 block_size_in_pages;
1287
1288 dev_dbg(dev, "Search Area Geometry :\n");
1289 dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks);
1290 dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides);
1291 dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages);
1292
1293 /* Select chip 0. */
1294 saved_chip_number = this->current_chip;
1295 chip->select_chip(mtd, 0);
1296
1297 /* Loop over blocks in the first search area, erasing them. */
1298 dev_dbg(dev, "Erasing the search area...\n");
1299
1300 for (block = 0; block < search_area_size_in_blocks; block++) {
1301 /* Compute the page address. */
1302 page = block * block_size_in_pages;
1303
1304 /* Erase this block. */
1305 dev_dbg(dev, "\tErasing block 0x%x\n", block);
1306 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1307 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1308
1309 /* Wait for the erase to finish. */
1310 status = chip->waitfunc(mtd, chip);
1311 if (status & NAND_STATUS_FAIL)
1312 dev_err(dev, "[%s] Erase failed.\n", __func__);
1313 }
1314
1315 /* Write the NCB fingerprint into the page buffer. */
1316 memset(buffer, ~0, mtd->writesize);
1317 memset(chip->oob_poi, ~0, mtd->oobsize);
1318 memcpy(buffer + 12, fingerprint, strlen(fingerprint));
1319
1320 /* Loop through the first search area, writing NCB fingerprints. */
1321 dev_dbg(dev, "Writing NCB fingerprints...\n");
1322 for (stride = 0; stride < search_area_size_in_strides; stride++) {
Huang Shijie513d57e2012-07-17 14:14:02 +08001323 /* Compute the page addresses. */
Huang Shijie10a2bca2011-09-08 10:47:09 +08001324 page = stride * rom_geo->stride_size_in_pages;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001325
1326 /* Write the first page of the current stride. */
1327 dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page);
1328 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
Brian Norris1fbb9382012-05-02 10:14:55 -07001329 chip->ecc.write_page_raw(mtd, chip, buffer, 0);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001330 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1331
1332 /* Wait for the write to finish. */
1333 status = chip->waitfunc(mtd, chip);
1334 if (status & NAND_STATUS_FAIL)
1335 dev_err(dev, "[%s] Write failed.\n", __func__);
1336 }
1337
1338 /* Deselect chip 0. */
1339 chip->select_chip(mtd, saved_chip_number);
1340 return 0;
1341}
1342
Wolfram Sanga78da282012-03-21 19:29:17 +01001343static int mx23_boot_init(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001344{
1345 struct device *dev = this->dev;
1346 struct nand_chip *chip = &this->nand;
1347 struct mtd_info *mtd = &this->mtd;
1348 unsigned int block_count;
1349 unsigned int block;
1350 int chipnr;
1351 int page;
1352 loff_t byte;
1353 uint8_t block_mark;
1354 int ret = 0;
1355
1356 /*
1357 * If control arrives here, we can't use block mark swapping, which
1358 * means we're forced to use transcription. First, scan for the
1359 * transcription stamp. If we find it, then we don't have to do
1360 * anything -- the block marks are already transcribed.
1361 */
1362 if (mx23_check_transcription_stamp(this))
1363 return 0;
1364
1365 /*
1366 * If control arrives here, we couldn't find a transcription stamp, so
1367 * so we presume the block marks are in the conventional location.
1368 */
1369 dev_dbg(dev, "Transcribing bad block marks...\n");
1370
1371 /* Compute the number of blocks in the entire medium. */
1372 block_count = chip->chipsize >> chip->phys_erase_shift;
1373
1374 /*
1375 * Loop over all the blocks in the medium, transcribing block marks as
1376 * we go.
1377 */
1378 for (block = 0; block < block_count; block++) {
1379 /*
1380 * Compute the chip, page and byte addresses for this block's
1381 * conventional mark.
1382 */
1383 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift);
1384 page = block << (chip->phys_erase_shift - chip->page_shift);
1385 byte = block << chip->phys_erase_shift;
1386
1387 /* Send the command to read the conventional block mark. */
1388 chip->select_chip(mtd, chipnr);
1389 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1390 block_mark = chip->read_byte(mtd);
1391 chip->select_chip(mtd, -1);
1392
1393 /*
1394 * Check if the block is marked bad. If so, we need to mark it
1395 * again, but this time the result will be a mark in the
1396 * location where we transcribe block marks.
1397 */
1398 if (block_mark != 0xff) {
1399 dev_dbg(dev, "Transcribing mark in block %u\n", block);
1400 ret = chip->block_markbad(mtd, byte);
1401 if (ret)
1402 dev_err(dev, "Failed to mark block bad with "
1403 "ret %d\n", ret);
1404 }
1405 }
1406
1407 /* Write the stamp that indicates we've transcribed the block marks. */
1408 mx23_write_transcription_stamp(this);
1409 return 0;
1410}
1411
Wolfram Sanga78da282012-03-21 19:29:17 +01001412static int nand_boot_init(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001413{
1414 nand_boot_set_geometry(this);
1415
1416 /* This is ROM arch-specific initilization before the BBT scanning. */
1417 if (GPMI_IS_MX23(this))
1418 return mx23_boot_init(this);
1419 return 0;
1420}
1421
Wolfram Sanga78da282012-03-21 19:29:17 +01001422static int gpmi_set_geometry(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001423{
1424 int ret;
1425
1426 /* Free the temporary DMA memory for reading ID. */
1427 gpmi_free_dma_buffer(this);
1428
1429 /* Set up the NFC geometry which is used by BCH. */
1430 ret = bch_set_geometry(this);
1431 if (ret) {
Vikram Narayanan2d350e52012-09-23 15:18:32 +05301432 pr_err("Error setting BCH geometry : %d\n", ret);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001433 return ret;
1434 }
1435
1436 /* Alloc the new DMA buffers according to the pagesize and oobsize */
1437 return gpmi_alloc_dma_buffer(this);
1438}
1439
1440static int gpmi_pre_bbt_scan(struct gpmi_nand_data *this)
1441{
1442 int ret;
1443
1444 /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */
1445 if (GPMI_IS_MX23(this))
1446 this->swap_block_mark = false;
1447 else
1448 this->swap_block_mark = true;
1449
1450 /* Set up the medium geometry */
1451 ret = gpmi_set_geometry(this);
1452 if (ret)
1453 return ret;
1454
Marek Vasut5636ce02012-05-21 22:59:27 +02001455 /* Adjust the ECC strength according to the chip. */
1456 this->nand.ecc.strength = this->bch_geometry.ecc_strength;
1457 this->mtd.ecc_strength = this->bch_geometry.ecc_strength;
Huang Shijiee0dd89c2012-07-03 16:24:33 +08001458 this->mtd.bitflip_threshold = this->bch_geometry.ecc_strength;
Marek Vasut5636ce02012-05-21 22:59:27 +02001459
Huang Shijie10a2bca2011-09-08 10:47:09 +08001460 /* NAND boot init, depends on the gpmi_set_geometry(). */
1461 return nand_boot_init(this);
1462}
1463
1464static int gpmi_scan_bbt(struct mtd_info *mtd)
1465{
1466 struct nand_chip *chip = mtd->priv;
1467 struct gpmi_nand_data *this = chip->priv;
1468 int ret;
1469
1470 /* Prepare for the BBT scan. */
1471 ret = gpmi_pre_bbt_scan(this);
1472 if (ret)
1473 return ret;
1474
Huang Shijie995fbbf2012-09-13 14:57:59 +08001475 /*
1476 * Can we enable the extra features? such as EDO or Sync mode.
1477 *
1478 * We do not check the return value now. That's means if we fail in
1479 * enable the extra features, we still can run in the normal way.
1480 */
1481 gpmi_extra_init(this);
1482
Huang Shijie10a2bca2011-09-08 10:47:09 +08001483 /* use the default BBT implementation */
1484 return nand_default_bbt(mtd);
1485}
1486
Huang Shijie513d57e2012-07-17 14:14:02 +08001487static void gpmi_nfc_exit(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001488{
1489 nand_release(&this->mtd);
1490 gpmi_free_dma_buffer(this);
1491}
1492
Bill Pemberton06f25512012-11-19 13:23:07 -05001493static int gpmi_nfc_init(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001494{
Huang Shijie10a2bca2011-09-08 10:47:09 +08001495 struct mtd_info *mtd = &this->mtd;
1496 struct nand_chip *chip = &this->nand;
Huang Shijiee10db1f2012-05-04 21:42:05 -04001497 struct mtd_part_parser_data ppdata = {};
Huang Shijie10a2bca2011-09-08 10:47:09 +08001498 int ret;
1499
1500 /* init current chip */
1501 this->current_chip = -1;
1502
1503 /* init the MTD data structures */
1504 mtd->priv = chip;
1505 mtd->name = "gpmi-nand";
1506 mtd->owner = THIS_MODULE;
1507
1508 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
1509 chip->priv = this;
1510 chip->select_chip = gpmi_select_chip;
1511 chip->cmd_ctrl = gpmi_cmd_ctrl;
1512 chip->dev_ready = gpmi_dev_ready;
1513 chip->read_byte = gpmi_read_byte;
1514 chip->read_buf = gpmi_read_buf;
1515 chip->write_buf = gpmi_write_buf;
1516 chip->ecc.read_page = gpmi_ecc_read_page;
1517 chip->ecc.write_page = gpmi_ecc_write_page;
1518 chip->ecc.read_oob = gpmi_ecc_read_oob;
1519 chip->ecc.write_oob = gpmi_ecc_write_oob;
1520 chip->scan_bbt = gpmi_scan_bbt;
1521 chip->badblock_pattern = &gpmi_bbt_descr;
1522 chip->block_markbad = gpmi_block_markbad;
1523 chip->options |= NAND_NO_SUBPAGE_WRITE;
1524 chip->ecc.mode = NAND_ECC_HW;
1525 chip->ecc.size = 1;
Marek Vasut5636ce02012-05-21 22:59:27 +02001526 chip->ecc.strength = 8;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001527 chip->ecc.layout = &gpmi_hw_ecclayout;
Huang Shijiec50c6942012-07-03 16:24:32 +08001528 if (of_get_nand_on_flash_bbt(this->dev->of_node))
1529 chip->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001530
1531 /* Allocate a temporary DMA buffer for reading ID in the nand_scan() */
1532 this->bch_geometry.payload_size = 1024;
1533 this->bch_geometry.auxiliary_size = 128;
1534 ret = gpmi_alloc_dma_buffer(this);
1535 if (ret)
1536 goto err_out;
1537
Huang Shijiee10db1f2012-05-04 21:42:05 -04001538 ret = nand_scan(mtd, 1);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001539 if (ret) {
1540 pr_err("Chip scan failed\n");
1541 goto err_out;
1542 }
1543
Huang Shijiee10db1f2012-05-04 21:42:05 -04001544 ppdata.of_node = this->pdev->dev.of_node;
1545 ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001546 if (ret)
1547 goto err_out;
1548 return 0;
1549
1550err_out:
1551 gpmi_nfc_exit(this);
1552 return ret;
1553}
1554
Huang Shijiee10db1f2012-05-04 21:42:05 -04001555static const struct platform_device_id gpmi_ids[] = {
1556 { .name = "imx23-gpmi-nand", .driver_data = IS_MX23, },
1557 { .name = "imx28-gpmi-nand", .driver_data = IS_MX28, },
Huang Shijie9013bb42012-05-04 21:42:06 -04001558 { .name = "imx6q-gpmi-nand", .driver_data = IS_MX6Q, },
Huang Shijiee10db1f2012-05-04 21:42:05 -04001559 {},
1560};
1561
1562static const struct of_device_id gpmi_nand_id_table[] = {
1563 {
1564 .compatible = "fsl,imx23-gpmi-nand",
1565 .data = (void *)&gpmi_ids[IS_MX23]
1566 }, {
1567 .compatible = "fsl,imx28-gpmi-nand",
1568 .data = (void *)&gpmi_ids[IS_MX28]
Huang Shijie9013bb42012-05-04 21:42:06 -04001569 }, {
1570 .compatible = "fsl,imx6q-gpmi-nand",
1571 .data = (void *)&gpmi_ids[IS_MX6Q]
Huang Shijiee10db1f2012-05-04 21:42:05 -04001572 }, {}
1573};
1574MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
1575
Bill Pemberton06f25512012-11-19 13:23:07 -05001576static int gpmi_nand_probe(struct platform_device *pdev)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001577{
Huang Shijie10a2bca2011-09-08 10:47:09 +08001578 struct gpmi_nand_data *this;
Huang Shijiee10db1f2012-05-04 21:42:05 -04001579 const struct of_device_id *of_id;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001580 int ret;
1581
Huang Shijiee10db1f2012-05-04 21:42:05 -04001582 of_id = of_match_device(gpmi_nand_id_table, &pdev->dev);
1583 if (of_id) {
1584 pdev->id_entry = of_id->data;
1585 } else {
1586 pr_err("Failed to find the right device id.\n");
1587 return -ENOMEM;
1588 }
1589
Huang Shijie10a2bca2011-09-08 10:47:09 +08001590 this = kzalloc(sizeof(*this), GFP_KERNEL);
1591 if (!this) {
1592 pr_err("Failed to allocate per-device memory\n");
1593 return -ENOMEM;
1594 }
1595
1596 platform_set_drvdata(pdev, this);
1597 this->pdev = pdev;
1598 this->dev = &pdev->dev;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001599
1600 ret = acquire_resources(this);
1601 if (ret)
1602 goto exit_acquire_resources;
1603
1604 ret = init_hardware(this);
1605 if (ret)
1606 goto exit_nfc_init;
1607
1608 ret = gpmi_nfc_init(this);
1609 if (ret)
1610 goto exit_nfc_init;
1611
Fabio Estevam490e2802012-09-05 11:35:24 -03001612 dev_info(this->dev, "driver registered.\n");
1613
Huang Shijie10a2bca2011-09-08 10:47:09 +08001614 return 0;
1615
1616exit_nfc_init:
1617 release_resources(this);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001618exit_acquire_resources:
Fabio Estevam490e2802012-09-05 11:35:24 -03001619 dev_err(this->dev, "driver registration failed: %d\n", ret);
Huang Shijie26738dd2013-01-23 16:20:53 +08001620 kfree(this);
Fabio Estevam490e2802012-09-05 11:35:24 -03001621
Huang Shijie10a2bca2011-09-08 10:47:09 +08001622 return ret;
1623}
1624
Bill Pemberton810b7e02012-11-19 13:26:04 -05001625static int gpmi_nand_remove(struct platform_device *pdev)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001626{
1627 struct gpmi_nand_data *this = platform_get_drvdata(pdev);
1628
1629 gpmi_nfc_exit(this);
1630 release_resources(this);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001631 kfree(this);
1632 return 0;
1633}
1634
Huang Shijie10a2bca2011-09-08 10:47:09 +08001635static struct platform_driver gpmi_nand_driver = {
1636 .driver = {
1637 .name = "gpmi-nand",
Huang Shijiee10db1f2012-05-04 21:42:05 -04001638 .of_match_table = gpmi_nand_id_table,
Huang Shijie10a2bca2011-09-08 10:47:09 +08001639 },
1640 .probe = gpmi_nand_probe,
Bill Pemberton5153b882012-11-19 13:21:24 -05001641 .remove = gpmi_nand_remove,
Huang Shijie10a2bca2011-09-08 10:47:09 +08001642 .id_table = gpmi_ids,
1643};
Fabio Estevam490e2802012-09-05 11:35:24 -03001644module_platform_driver(gpmi_nand_driver);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001645
1646MODULE_AUTHOR("Freescale Semiconductor, Inc.");
1647MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver");
1648MODULE_LICENSE("GPL");