blob: d9dc4c874ffa6ff500545bf079e426f406f33fc9 [file] [log] [blame]
Huang Shijie10a2bca2011-09-08 10:47:09 +08001/*
2 * Freescale GPMI NAND Flash Driver
3 *
4 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5 * Copyright (C) 2008 Embedded Alley Solutions, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21#include <linux/clk.h>
22#include <linux/slab.h>
23#include <linux/interrupt.h>
Wolfram Sangdf16c862011-11-23 15:57:06 +010024#include <linux/module.h>
Huang Shijie10a2bca2011-09-08 10:47:09 +080025#include <linux/mtd/gpmi-nand.h>
26#include <linux/mtd/partitions.h>
Huang Shijiee10db1f2012-05-04 21:42:05 -040027#include <linux/of.h>
28#include <linux/of_device.h>
Huang Shijie10a2bca2011-09-08 10:47:09 +080029#include "gpmi-nand.h"
30
31/* add our owner bbt descriptor */
32static uint8_t scan_ff_pattern[] = { 0xff };
33static struct nand_bbt_descr gpmi_bbt_descr = {
34 .options = 0,
35 .offs = 0,
36 .len = 1,
37 .pattern = scan_ff_pattern
38};
39
40/* We will use all the (page + OOB). */
41static struct nand_ecclayout gpmi_hw_ecclayout = {
42 .eccbytes = 0,
43 .eccpos = { 0, },
44 .oobfree = { {.offset = 0, .length = 0} }
45};
46
47static irqreturn_t bch_irq(int irq, void *cookie)
48{
49 struct gpmi_nand_data *this = cookie;
50
51 gpmi_clear_bch(this);
52 complete(&this->bch_done);
53 return IRQ_HANDLED;
54}
55
56/*
57 * Calculate the ECC strength by hand:
58 * E : The ECC strength.
59 * G : the length of Galois Field.
60 * N : The chunk count of per page.
61 * O : the oobsize of the NAND chip.
62 * M : the metasize of per page.
63 *
64 * The formula is :
65 * E * G * N
66 * ------------ <= (O - M)
67 * 8
68 *
69 * So, we get E by:
70 * (O - M) * 8
71 * E <= -------------
72 * G * N
73 */
74static inline int get_ecc_strength(struct gpmi_nand_data *this)
75{
76 struct bch_geometry *geo = &this->bch_geometry;
77 struct mtd_info *mtd = &this->mtd;
78 int ecc_strength;
79
80 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
81 / (geo->gf_len * geo->ecc_chunk_count);
82
83 /* We need the minor even number. */
84 return round_down(ecc_strength, 2);
85}
86
87int common_nfc_set_geometry(struct gpmi_nand_data *this)
88{
89 struct bch_geometry *geo = &this->bch_geometry;
90 struct mtd_info *mtd = &this->mtd;
91 unsigned int metadata_size;
92 unsigned int status_size;
93 unsigned int block_mark_bit_offset;
94
95 /*
96 * The size of the metadata can be changed, though we set it to 10
97 * bytes now. But it can't be too large, because we have to save
98 * enough space for BCH.
99 */
100 geo->metadata_size = 10;
101
102 /* The default for the length of Galois Field. */
103 geo->gf_len = 13;
104
105 /* The default for chunk size. There is no oobsize greater then 512. */
106 geo->ecc_chunk_size = 512;
107 while (geo->ecc_chunk_size < mtd->oobsize)
108 geo->ecc_chunk_size *= 2; /* keep C >= O */
109
110 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
111
112 /* We use the same ECC strength for all chunks. */
113 geo->ecc_strength = get_ecc_strength(this);
114 if (!geo->ecc_strength) {
115 pr_err("We get a wrong ECC strength.\n");
116 return -EINVAL;
117 }
118
119 geo->page_size = mtd->writesize + mtd->oobsize;
120 geo->payload_size = mtd->writesize;
121
122 /*
123 * The auxiliary buffer contains the metadata and the ECC status. The
124 * metadata is padded to the nearest 32-bit boundary. The ECC status
125 * contains one byte for every ECC chunk, and is also padded to the
126 * nearest 32-bit boundary.
127 */
128 metadata_size = ALIGN(geo->metadata_size, 4);
129 status_size = ALIGN(geo->ecc_chunk_count, 4);
130
131 geo->auxiliary_size = metadata_size + status_size;
132 geo->auxiliary_status_offset = metadata_size;
133
134 if (!this->swap_block_mark)
135 return 0;
136
137 /*
138 * We need to compute the byte and bit offsets of
139 * the physical block mark within the ECC-based view of the page.
140 *
141 * NAND chip with 2K page shows below:
142 * (Block Mark)
143 * | |
144 * | D |
145 * |<---->|
146 * V V
147 * +---+----------+-+----------+-+----------+-+----------+-+
148 * | M | data |E| data |E| data |E| data |E|
149 * +---+----------+-+----------+-+----------+-+----------+-+
150 *
151 * The position of block mark moves forward in the ECC-based view
152 * of page, and the delta is:
153 *
154 * E * G * (N - 1)
155 * D = (---------------- + M)
156 * 8
157 *
158 * With the formula to compute the ECC strength, and the condition
159 * : C >= O (C is the ecc chunk size)
160 *
161 * It's easy to deduce to the following result:
162 *
163 * E * G (O - M) C - M C - M
164 * ----------- <= ------- <= -------- < ---------
165 * 8 N N (N - 1)
166 *
167 * So, we get:
168 *
169 * E * G * (N - 1)
170 * D = (---------------- + M) < C
171 * 8
172 *
173 * The above inequality means the position of block mark
174 * within the ECC-based view of the page is still in the data chunk,
175 * and it's NOT in the ECC bits of the chunk.
176 *
177 * Use the following to compute the bit position of the
178 * physical block mark within the ECC-based view of the page:
179 * (page_size - D) * 8
180 *
181 * --Huang Shijie
182 */
183 block_mark_bit_offset = mtd->writesize * 8 -
184 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
185 + geo->metadata_size * 8);
186
187 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
188 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
189 return 0;
190}
191
192struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
193{
194 int chipnr = this->current_chip;
195
196 return this->dma_chans[chipnr];
197}
198
199/* Can we use the upper's buffer directly for DMA? */
200void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr)
201{
202 struct scatterlist *sgl = &this->data_sgl;
203 int ret;
204
205 this->direct_dma_map_ok = true;
206
207 /* first try to map the upper buffer directly */
208 sg_init_one(sgl, this->upper_buf, this->upper_len);
209 ret = dma_map_sg(this->dev, sgl, 1, dr);
210 if (ret == 0) {
211 /* We have to use our own DMA buffer. */
212 sg_init_one(sgl, this->data_buffer_dma, PAGE_SIZE);
213
214 if (dr == DMA_TO_DEVICE)
215 memcpy(this->data_buffer_dma, this->upper_buf,
216 this->upper_len);
217
218 ret = dma_map_sg(this->dev, sgl, 1, dr);
219 if (ret == 0)
220 pr_err("map failed.\n");
221
222 this->direct_dma_map_ok = false;
223 }
224}
225
226/* This will be called after the DMA operation is finished. */
227static void dma_irq_callback(void *param)
228{
229 struct gpmi_nand_data *this = param;
230 struct completion *dma_c = &this->dma_done;
231
232 complete(dma_c);
233
234 switch (this->dma_type) {
235 case DMA_FOR_COMMAND:
236 dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE);
237 break;
238
239 case DMA_FOR_READ_DATA:
240 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE);
241 if (this->direct_dma_map_ok == false)
242 memcpy(this->upper_buf, this->data_buffer_dma,
243 this->upper_len);
244 break;
245
246 case DMA_FOR_WRITE_DATA:
247 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE);
248 break;
249
250 case DMA_FOR_READ_ECC_PAGE:
251 case DMA_FOR_WRITE_ECC_PAGE:
252 /* We have to wait the BCH interrupt to finish. */
253 break;
254
255 default:
256 pr_err("in wrong DMA operation.\n");
257 }
258}
259
260int start_dma_without_bch_irq(struct gpmi_nand_data *this,
261 struct dma_async_tx_descriptor *desc)
262{
263 struct completion *dma_c = &this->dma_done;
264 int err;
265
266 init_completion(dma_c);
267
268 desc->callback = dma_irq_callback;
269 desc->callback_param = this;
270 dmaengine_submit(desc);
Shawn Guod04525e2012-04-11 13:29:31 +0800271 dma_async_issue_pending(get_dma_chan(this));
Huang Shijie10a2bca2011-09-08 10:47:09 +0800272
273 /* Wait for the interrupt from the DMA block. */
274 err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000));
275 if (!err) {
276 pr_err("DMA timeout, last DMA :%d\n", this->last_dma_type);
277 gpmi_dump_info(this);
278 return -ETIMEDOUT;
279 }
280 return 0;
281}
282
283/*
284 * This function is used in BCH reading or BCH writing pages.
285 * It will wait for the BCH interrupt as long as ONE second.
286 * Actually, we must wait for two interrupts :
287 * [1] firstly the DMA interrupt and
288 * [2] secondly the BCH interrupt.
289 */
290int start_dma_with_bch_irq(struct gpmi_nand_data *this,
291 struct dma_async_tx_descriptor *desc)
292{
293 struct completion *bch_c = &this->bch_done;
294 int err;
295
296 /* Prepare to receive an interrupt from the BCH block. */
297 init_completion(bch_c);
298
299 /* start the DMA */
300 start_dma_without_bch_irq(this, desc);
301
302 /* Wait for the interrupt from the BCH block. */
303 err = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000));
304 if (!err) {
305 pr_err("BCH timeout, last DMA :%d\n", this->last_dma_type);
306 gpmi_dump_info(this);
307 return -ETIMEDOUT;
308 }
309 return 0;
310}
311
312static int __devinit
313acquire_register_block(struct gpmi_nand_data *this, const char *res_name)
314{
315 struct platform_device *pdev = this->pdev;
316 struct resources *res = &this->resources;
317 struct resource *r;
318 void *p;
319
320 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
321 if (!r) {
322 pr_err("Can't get resource for %s\n", res_name);
323 return -ENXIO;
324 }
325
326 p = ioremap(r->start, resource_size(r));
327 if (!p) {
328 pr_err("Can't remap %s\n", res_name);
329 return -ENOMEM;
330 }
331
332 if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME))
333 res->gpmi_regs = p;
334 else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME))
335 res->bch_regs = p;
336 else
337 pr_err("unknown resource name : %s\n", res_name);
338
339 return 0;
340}
341
342static void release_register_block(struct gpmi_nand_data *this)
343{
344 struct resources *res = &this->resources;
345 if (res->gpmi_regs)
346 iounmap(res->gpmi_regs);
347 if (res->bch_regs)
348 iounmap(res->bch_regs);
349 res->gpmi_regs = NULL;
350 res->bch_regs = NULL;
351}
352
353static int __devinit
354acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h)
355{
356 struct platform_device *pdev = this->pdev;
357 struct resources *res = &this->resources;
358 const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME;
359 struct resource *r;
360 int err;
361
362 r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
363 if (!r) {
364 pr_err("Can't get resource for %s\n", res_name);
365 return -ENXIO;
366 }
367
368 err = request_irq(r->start, irq_h, 0, res_name, this);
369 if (err) {
370 pr_err("Can't own %s\n", res_name);
371 return err;
372 }
373
374 res->bch_low_interrupt = r->start;
375 res->bch_high_interrupt = r->end;
376 return 0;
377}
378
379static void release_bch_irq(struct gpmi_nand_data *this)
380{
381 struct resources *res = &this->resources;
382 int i = res->bch_low_interrupt;
383
384 for (; i <= res->bch_high_interrupt; i++)
385 free_irq(i, this);
386}
387
388static bool gpmi_dma_filter(struct dma_chan *chan, void *param)
389{
390 struct gpmi_nand_data *this = param;
Huang Shijiee10db1f2012-05-04 21:42:05 -0400391 int dma_channel = (int)this->private;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800392
393 if (!mxs_dma_is_apbh(chan))
394 return false;
395 /*
396 * only catch the GPMI dma channels :
397 * for mx23 : MX23_DMA_GPMI0 ~ MX23_DMA_GPMI3
398 * (These four channels share the same IRQ!)
399 *
400 * for mx28 : MX28_DMA_GPMI0 ~ MX28_DMA_GPMI7
401 * (These eight channels share the same IRQ!)
402 */
Huang Shijiee10db1f2012-05-04 21:42:05 -0400403 if (dma_channel == chan->chan_id) {
Huang Shijie10a2bca2011-09-08 10:47:09 +0800404 chan->private = &this->dma_data;
405 return true;
406 }
407 return false;
408}
409
410static void release_dma_channels(struct gpmi_nand_data *this)
411{
412 unsigned int i;
413 for (i = 0; i < DMA_CHANS; i++)
414 if (this->dma_chans[i]) {
415 dma_release_channel(this->dma_chans[i]);
416 this->dma_chans[i] = NULL;
417 }
418}
419
420static int __devinit acquire_dma_channels(struct gpmi_nand_data *this)
421{
422 struct platform_device *pdev = this->pdev;
Huang Shijiee10db1f2012-05-04 21:42:05 -0400423 struct resource *r_dma;
424 struct device_node *dn;
425 int dma_channel;
426 unsigned int ret;
427 struct dma_chan *dma_chan;
428 dma_cap_mask_t mask;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800429
Huang Shijiee10db1f2012-05-04 21:42:05 -0400430 /* dma channel, we only use the first one. */
431 dn = pdev->dev.of_node;
432 ret = of_property_read_u32(dn, "fsl,gpmi-dma-channel", &dma_channel);
433 if (ret) {
434 pr_err("unable to get DMA channel from dt.\n");
435 goto acquire_err;
436 }
437 this->private = (void *)dma_channel;
438
439 /* gpmi dma interrupt */
Huang Shijie10a2bca2011-09-08 10:47:09 +0800440 r_dma = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
441 GPMI_NAND_DMA_INTERRUPT_RES_NAME);
Huang Shijiee10db1f2012-05-04 21:42:05 -0400442 if (!r_dma) {
Huang Shijie10a2bca2011-09-08 10:47:09 +0800443 pr_err("Can't get resource for DMA\n");
Huang Shijiee10db1f2012-05-04 21:42:05 -0400444 goto acquire_err;
445 }
446 this->dma_data.chan_irq = r_dma->start;
447
448 /* request dma channel */
449 dma_cap_zero(mask);
450 dma_cap_set(DMA_SLAVE, mask);
451
452 dma_chan = dma_request_channel(mask, gpmi_dma_filter, this);
453 if (!dma_chan) {
454 pr_err("dma_request_channel failed.\n");
455 goto acquire_err;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800456 }
457
Huang Shijiee10db1f2012-05-04 21:42:05 -0400458 this->dma_chans[0] = dma_chan;
Huang Shijie10a2bca2011-09-08 10:47:09 +0800459 return 0;
460
461acquire_err:
Huang Shijie10a2bca2011-09-08 10:47:09 +0800462 release_dma_channels(this);
463 return -EINVAL;
464}
465
466static int __devinit acquire_resources(struct gpmi_nand_data *this)
467{
468 struct resources *res = &this->resources;
469 int ret;
470
471 ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME);
472 if (ret)
473 goto exit_regs;
474
475 ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME);
476 if (ret)
477 goto exit_regs;
478
479 ret = acquire_bch_irq(this, bch_irq);
480 if (ret)
481 goto exit_regs;
482
483 ret = acquire_dma_channels(this);
484 if (ret)
485 goto exit_dma_channels;
486
487 res->clock = clk_get(&this->pdev->dev, NULL);
488 if (IS_ERR(res->clock)) {
489 pr_err("can not get the clock\n");
490 ret = -ENOENT;
491 goto exit_clock;
492 }
493 return 0;
494
495exit_clock:
496 release_dma_channels(this);
497exit_dma_channels:
498 release_bch_irq(this);
499exit_regs:
500 release_register_block(this);
501 return ret;
502}
503
504static void release_resources(struct gpmi_nand_data *this)
505{
506 struct resources *r = &this->resources;
507
508 clk_put(r->clock);
509 release_register_block(this);
510 release_bch_irq(this);
511 release_dma_channels(this);
512}
513
514static int __devinit init_hardware(struct gpmi_nand_data *this)
515{
516 int ret;
517
518 /*
519 * This structure contains the "safe" GPMI timing that should succeed
520 * with any NAND Flash device
521 * (although, with less-than-optimal performance).
522 */
523 struct nand_timing safe_timing = {
524 .data_setup_in_ns = 80,
525 .data_hold_in_ns = 60,
526 .address_setup_in_ns = 25,
527 .gpmi_sample_delay_in_ns = 6,
528 .tREA_in_ns = -1,
529 .tRLOH_in_ns = -1,
530 .tRHOH_in_ns = -1,
531 };
532
533 /* Initialize the hardwares. */
534 ret = gpmi_init(this);
535 if (ret)
536 return ret;
537
538 this->timing = safe_timing;
539 return 0;
540}
541
542static int read_page_prepare(struct gpmi_nand_data *this,
543 void *destination, unsigned length,
544 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
545 void **use_virt, dma_addr_t *use_phys)
546{
547 struct device *dev = this->dev;
548
549 if (virt_addr_valid(destination)) {
550 dma_addr_t dest_phys;
551
552 dest_phys = dma_map_single(dev, destination,
553 length, DMA_FROM_DEVICE);
554 if (dma_mapping_error(dev, dest_phys)) {
555 if (alt_size < length) {
556 pr_err("Alternate buffer is too small\n");
557 return -ENOMEM;
558 }
559 goto map_failed;
560 }
561 *use_virt = destination;
562 *use_phys = dest_phys;
563 this->direct_dma_map_ok = true;
564 return 0;
565 }
566
567map_failed:
568 *use_virt = alt_virt;
569 *use_phys = alt_phys;
570 this->direct_dma_map_ok = false;
571 return 0;
572}
573
574static inline void read_page_end(struct gpmi_nand_data *this,
575 void *destination, unsigned length,
576 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
577 void *used_virt, dma_addr_t used_phys)
578{
579 if (this->direct_dma_map_ok)
580 dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE);
581}
582
583static inline void read_page_swap_end(struct gpmi_nand_data *this,
584 void *destination, unsigned length,
585 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
586 void *used_virt, dma_addr_t used_phys)
587{
588 if (!this->direct_dma_map_ok)
589 memcpy(destination, alt_virt, length);
590}
591
592static int send_page_prepare(struct gpmi_nand_data *this,
593 const void *source, unsigned length,
594 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
595 const void **use_virt, dma_addr_t *use_phys)
596{
597 struct device *dev = this->dev;
598
599 if (virt_addr_valid(source)) {
600 dma_addr_t source_phys;
601
602 source_phys = dma_map_single(dev, (void *)source, length,
603 DMA_TO_DEVICE);
604 if (dma_mapping_error(dev, source_phys)) {
605 if (alt_size < length) {
606 pr_err("Alternate buffer is too small\n");
607 return -ENOMEM;
608 }
609 goto map_failed;
610 }
611 *use_virt = source;
612 *use_phys = source_phys;
613 return 0;
614 }
615map_failed:
616 /*
617 * Copy the content of the source buffer into the alternate
618 * buffer and set up the return values accordingly.
619 */
620 memcpy(alt_virt, source, length);
621
622 *use_virt = alt_virt;
623 *use_phys = alt_phys;
624 return 0;
625}
626
627static void send_page_end(struct gpmi_nand_data *this,
628 const void *source, unsigned length,
629 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
630 const void *used_virt, dma_addr_t used_phys)
631{
632 struct device *dev = this->dev;
633 if (used_virt == source)
634 dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE);
635}
636
637static void gpmi_free_dma_buffer(struct gpmi_nand_data *this)
638{
639 struct device *dev = this->dev;
640
641 if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt))
642 dma_free_coherent(dev, this->page_buffer_size,
643 this->page_buffer_virt,
644 this->page_buffer_phys);
645 kfree(this->cmd_buffer);
646 kfree(this->data_buffer_dma);
647
648 this->cmd_buffer = NULL;
649 this->data_buffer_dma = NULL;
650 this->page_buffer_virt = NULL;
651 this->page_buffer_size = 0;
652}
653
654/* Allocate the DMA buffers */
655static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
656{
657 struct bch_geometry *geo = &this->bch_geometry;
658 struct device *dev = this->dev;
659
660 /* [1] Allocate a command buffer. PAGE_SIZE is enough. */
661 this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA);
662 if (this->cmd_buffer == NULL)
663 goto error_alloc;
664
665 /* [2] Allocate a read/write data buffer. PAGE_SIZE is enough. */
666 this->data_buffer_dma = kzalloc(PAGE_SIZE, GFP_DMA);
667 if (this->data_buffer_dma == NULL)
668 goto error_alloc;
669
670 /*
671 * [3] Allocate the page buffer.
672 *
673 * Both the payload buffer and the auxiliary buffer must appear on
674 * 32-bit boundaries. We presume the size of the payload buffer is a
675 * power of two and is much larger than four, which guarantees the
676 * auxiliary buffer will appear on a 32-bit boundary.
677 */
678 this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
679 this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
680 &this->page_buffer_phys, GFP_DMA);
681 if (!this->page_buffer_virt)
682 goto error_alloc;
683
684
685 /* Slice up the page buffer. */
686 this->payload_virt = this->page_buffer_virt;
687 this->payload_phys = this->page_buffer_phys;
688 this->auxiliary_virt = this->payload_virt + geo->payload_size;
689 this->auxiliary_phys = this->payload_phys + geo->payload_size;
690 return 0;
691
692error_alloc:
693 gpmi_free_dma_buffer(this);
694 pr_err("allocate DMA buffer ret!!\n");
695 return -ENOMEM;
696}
697
698static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
699{
700 struct nand_chip *chip = mtd->priv;
701 struct gpmi_nand_data *this = chip->priv;
702 int ret;
703
704 /*
705 * Every operation begins with a command byte and a series of zero or
706 * more address bytes. These are distinguished by either the Address
707 * Latch Enable (ALE) or Command Latch Enable (CLE) signals being
708 * asserted. When MTD is ready to execute the command, it will deassert
709 * both latch enables.
710 *
711 * Rather than run a separate DMA operation for every single byte, we
712 * queue them up and run a single DMA operation for the entire series
713 * of command and data bytes. NAND_CMD_NONE means the END of the queue.
714 */
715 if ((ctrl & (NAND_ALE | NAND_CLE))) {
716 if (data != NAND_CMD_NONE)
717 this->cmd_buffer[this->command_length++] = data;
718 return;
719 }
720
721 if (!this->command_length)
722 return;
723
724 ret = gpmi_send_command(this);
725 if (ret)
726 pr_err("Chip: %u, Error %d\n", this->current_chip, ret);
727
728 this->command_length = 0;
729}
730
731static int gpmi_dev_ready(struct mtd_info *mtd)
732{
733 struct nand_chip *chip = mtd->priv;
734 struct gpmi_nand_data *this = chip->priv;
735
736 return gpmi_is_ready(this, this->current_chip);
737}
738
739static void gpmi_select_chip(struct mtd_info *mtd, int chipnr)
740{
741 struct nand_chip *chip = mtd->priv;
742 struct gpmi_nand_data *this = chip->priv;
743
744 if ((this->current_chip < 0) && (chipnr >= 0))
745 gpmi_begin(this);
746 else if ((this->current_chip >= 0) && (chipnr < 0))
747 gpmi_end(this);
748
749 this->current_chip = chipnr;
750}
751
752static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
753{
754 struct nand_chip *chip = mtd->priv;
755 struct gpmi_nand_data *this = chip->priv;
756
757 pr_debug("len is %d\n", len);
758 this->upper_buf = buf;
759 this->upper_len = len;
760
761 gpmi_read_data(this);
762}
763
764static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
765{
766 struct nand_chip *chip = mtd->priv;
767 struct gpmi_nand_data *this = chip->priv;
768
769 pr_debug("len is %d\n", len);
770 this->upper_buf = (uint8_t *)buf;
771 this->upper_len = len;
772
773 gpmi_send_data(this);
774}
775
776static uint8_t gpmi_read_byte(struct mtd_info *mtd)
777{
778 struct nand_chip *chip = mtd->priv;
779 struct gpmi_nand_data *this = chip->priv;
780 uint8_t *buf = this->data_buffer_dma;
781
782 gpmi_read_buf(mtd, buf, 1);
783 return buf[0];
784}
785
786/*
787 * Handles block mark swapping.
788 * It can be called in swapping the block mark, or swapping it back,
789 * because the the operations are the same.
790 */
791static void block_mark_swapping(struct gpmi_nand_data *this,
792 void *payload, void *auxiliary)
793{
794 struct bch_geometry *nfc_geo = &this->bch_geometry;
795 unsigned char *p;
796 unsigned char *a;
797 unsigned int bit;
798 unsigned char mask;
799 unsigned char from_data;
800 unsigned char from_oob;
801
802 if (!this->swap_block_mark)
803 return;
804
805 /*
806 * If control arrives here, we're swapping. Make some convenience
807 * variables.
808 */
809 bit = nfc_geo->block_mark_bit_offset;
810 p = payload + nfc_geo->block_mark_byte_offset;
811 a = auxiliary;
812
813 /*
814 * Get the byte from the data area that overlays the block mark. Since
815 * the ECC engine applies its own view to the bits in the page, the
816 * physical block mark won't (in general) appear on a byte boundary in
817 * the data.
818 */
819 from_data = (p[0] >> bit) | (p[1] << (8 - bit));
820
821 /* Get the byte from the OOB. */
822 from_oob = a[0];
823
824 /* Swap them. */
825 a[0] = from_data;
826
827 mask = (0x1 << bit) - 1;
828 p[0] = (p[0] & mask) | (from_oob << bit);
829
830 mask = ~0 << bit;
831 p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
832}
833
834static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -0700835 uint8_t *buf, int oob_required, int page)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800836{
837 struct gpmi_nand_data *this = chip->priv;
838 struct bch_geometry *nfc_geo = &this->bch_geometry;
839 void *payload_virt;
840 dma_addr_t payload_phys;
841 void *auxiliary_virt;
842 dma_addr_t auxiliary_phys;
843 unsigned int i;
844 unsigned char *status;
845 unsigned int failed;
846 unsigned int corrected;
847 int ret;
848
849 pr_debug("page number is : %d\n", page);
850 ret = read_page_prepare(this, buf, mtd->writesize,
851 this->payload_virt, this->payload_phys,
852 nfc_geo->payload_size,
853 &payload_virt, &payload_phys);
854 if (ret) {
855 pr_err("Inadequate DMA buffer\n");
856 ret = -ENOMEM;
857 return ret;
858 }
859 auxiliary_virt = this->auxiliary_virt;
860 auxiliary_phys = this->auxiliary_phys;
861
862 /* go! */
863 ret = gpmi_read_page(this, payload_phys, auxiliary_phys);
864 read_page_end(this, buf, mtd->writesize,
865 this->payload_virt, this->payload_phys,
866 nfc_geo->payload_size,
867 payload_virt, payload_phys);
868 if (ret) {
869 pr_err("Error in ECC-based read: %d\n", ret);
870 goto exit_nfc;
871 }
872
873 /* handle the block mark swapping */
874 block_mark_swapping(this, payload_virt, auxiliary_virt);
875
876 /* Loop over status bytes, accumulating ECC status. */
877 failed = 0;
878 corrected = 0;
879 status = auxiliary_virt + nfc_geo->auxiliary_status_offset;
880
881 for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) {
882 if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED))
883 continue;
884
885 if (*status == STATUS_UNCORRECTABLE) {
886 failed++;
887 continue;
888 }
889 corrected += *status;
890 }
891
892 /*
893 * Propagate ECC status to the owning MTD only when failed or
894 * corrected times nearly reaches our ECC correction threshold.
895 */
896 if (failed || corrected >= (nfc_geo->ecc_strength - 1)) {
897 mtd->ecc_stats.failed += failed;
898 mtd->ecc_stats.corrected += corrected;
899 }
900
Brian Norris7725cc82012-05-02 10:15:02 -0700901 if (oob_required) {
902 /*
903 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob()
904 * for details about our policy for delivering the OOB.
905 *
906 * We fill the caller's buffer with set bits, and then copy the
907 * block mark to th caller's buffer. Note that, if block mark
908 * swapping was necessary, it has already been done, so we can
909 * rely on the first byte of the auxiliary buffer to contain
910 * the block mark.
911 */
912 memset(chip->oob_poi, ~0, mtd->oobsize);
913 chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];
Huang Shijie10a2bca2011-09-08 10:47:09 +0800914
Brian Norris7725cc82012-05-02 10:15:02 -0700915 read_page_swap_end(this, buf, mtd->writesize,
916 this->payload_virt, this->payload_phys,
917 nfc_geo->payload_size,
918 payload_virt, payload_phys);
919 }
Huang Shijie10a2bca2011-09-08 10:47:09 +0800920exit_nfc:
921 return ret;
922}
923
Brian Norris1fbb9382012-05-02 10:14:55 -0700924static void gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
925 const uint8_t *buf, int oob_required)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800926{
927 struct gpmi_nand_data *this = chip->priv;
928 struct bch_geometry *nfc_geo = &this->bch_geometry;
929 const void *payload_virt;
930 dma_addr_t payload_phys;
931 const void *auxiliary_virt;
932 dma_addr_t auxiliary_phys;
933 int ret;
934
935 pr_debug("ecc write page.\n");
936 if (this->swap_block_mark) {
937 /*
938 * If control arrives here, we're doing block mark swapping.
939 * Since we can't modify the caller's buffers, we must copy them
940 * into our own.
941 */
942 memcpy(this->payload_virt, buf, mtd->writesize);
943 payload_virt = this->payload_virt;
944 payload_phys = this->payload_phys;
945
946 memcpy(this->auxiliary_virt, chip->oob_poi,
947 nfc_geo->auxiliary_size);
948 auxiliary_virt = this->auxiliary_virt;
949 auxiliary_phys = this->auxiliary_phys;
950
951 /* Handle block mark swapping. */
952 block_mark_swapping(this,
953 (void *) payload_virt, (void *) auxiliary_virt);
954 } else {
955 /*
956 * If control arrives here, we're not doing block mark swapping,
957 * so we can to try and use the caller's buffers.
958 */
959 ret = send_page_prepare(this,
960 buf, mtd->writesize,
961 this->payload_virt, this->payload_phys,
962 nfc_geo->payload_size,
963 &payload_virt, &payload_phys);
964 if (ret) {
965 pr_err("Inadequate payload DMA buffer\n");
966 return;
967 }
968
969 ret = send_page_prepare(this,
970 chip->oob_poi, mtd->oobsize,
971 this->auxiliary_virt, this->auxiliary_phys,
972 nfc_geo->auxiliary_size,
973 &auxiliary_virt, &auxiliary_phys);
974 if (ret) {
975 pr_err("Inadequate auxiliary DMA buffer\n");
976 goto exit_auxiliary;
977 }
978 }
979
980 /* Ask the NFC. */
981 ret = gpmi_send_page(this, payload_phys, auxiliary_phys);
982 if (ret)
983 pr_err("Error in ECC-based write: %d\n", ret);
984
985 if (!this->swap_block_mark) {
986 send_page_end(this, chip->oob_poi, mtd->oobsize,
987 this->auxiliary_virt, this->auxiliary_phys,
988 nfc_geo->auxiliary_size,
989 auxiliary_virt, auxiliary_phys);
990exit_auxiliary:
991 send_page_end(this, buf, mtd->writesize,
992 this->payload_virt, this->payload_phys,
993 nfc_geo->payload_size,
994 payload_virt, payload_phys);
995 }
996}
997
998/*
999 * There are several places in this driver where we have to handle the OOB and
1000 * block marks. This is the function where things are the most complicated, so
1001 * this is where we try to explain it all. All the other places refer back to
1002 * here.
1003 *
1004 * These are the rules, in order of decreasing importance:
1005 *
1006 * 1) Nothing the caller does can be allowed to imperil the block mark.
1007 *
1008 * 2) In read operations, the first byte of the OOB we return must reflect the
1009 * true state of the block mark, no matter where that block mark appears in
1010 * the physical page.
1011 *
1012 * 3) ECC-based read operations return an OOB full of set bits (since we never
1013 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1014 * return).
1015 *
1016 * 4) "Raw" read operations return a direct view of the physical bytes in the
1017 * page, using the conventional definition of which bytes are data and which
1018 * are OOB. This gives the caller a way to see the actual, physical bytes
1019 * in the page, without the distortions applied by our ECC engine.
1020 *
1021 *
1022 * What we do for this specific read operation depends on two questions:
1023 *
1024 * 1) Are we doing a "raw" read, or an ECC-based read?
1025 *
1026 * 2) Are we using block mark swapping or transcription?
1027 *
1028 * There are four cases, illustrated by the following Karnaugh map:
1029 *
1030 * | Raw | ECC-based |
1031 * -------------+-------------------------+-------------------------+
1032 * | Read the conventional | |
1033 * | OOB at the end of the | |
1034 * Swapping | page and return it. It | |
1035 * | contains exactly what | |
1036 * | we want. | Read the block mark and |
1037 * -------------+-------------------------+ return it in a buffer |
1038 * | Read the conventional | full of set bits. |
1039 * | OOB at the end of the | |
1040 * | page and also the block | |
1041 * Transcribing | mark in the metadata. | |
1042 * | Copy the block mark | |
1043 * | into the first byte of | |
1044 * | the OOB. | |
1045 * -------------+-------------------------+-------------------------+
1046 *
1047 * Note that we break rule #4 in the Transcribing/Raw case because we're not
1048 * giving an accurate view of the actual, physical bytes in the page (we're
1049 * overwriting the block mark). That's OK because it's more important to follow
1050 * rule #2.
1051 *
1052 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1053 * easy. When reading a page, for example, the NAND Flash MTD code calls our
1054 * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an
1055 * ECC-based or raw view of the page is implicit in which function it calls
1056 * (there is a similar pair of ECC-based/raw functions for writing).
1057 *
1058 * Since MTD assumes the OOB is not covered by ECC, there is no pair of
1059 * ECC-based/raw functions for reading or or writing the OOB. The fact that the
1060 * caller wants an ECC-based or raw view of the page is not propagated down to
1061 * this driver.
1062 */
1063static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
1064 int page, int sndcmd)
1065{
1066 struct gpmi_nand_data *this = chip->priv;
1067
1068 pr_debug("page number is %d\n", page);
1069 /* clear the OOB buffer */
1070 memset(chip->oob_poi, ~0, mtd->oobsize);
1071
1072 /* Read out the conventional OOB. */
1073 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1074 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1075
1076 /*
1077 * Now, we want to make sure the block mark is correct. In the
1078 * Swapping/Raw case, we already have it. Otherwise, we need to
1079 * explicitly read it.
1080 */
1081 if (!this->swap_block_mark) {
1082 /* Read the block mark into the first byte of the OOB buffer. */
1083 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1084 chip->oob_poi[0] = chip->read_byte(mtd);
1085 }
1086
1087 /*
1088 * Return true, indicating that the next call to this function must send
1089 * a command.
1090 */
1091 return true;
1092}
1093
1094static int
1095gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
1096{
1097 /*
1098 * The BCH will use all the (page + oob).
1099 * Our gpmi_hw_ecclayout can only prohibit the JFFS2 to write the oob.
1100 * But it can not stop some ioctls such MEMWRITEOOB which uses
Brian Norris0612b9d2011-08-30 18:45:40 -07001101 * MTD_OPS_PLACE_OOB. So We have to implement this function to prohibit
Huang Shijie10a2bca2011-09-08 10:47:09 +08001102 * these ioctls too.
1103 */
1104 return -EPERM;
1105}
1106
1107static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
1108{
1109 struct nand_chip *chip = mtd->priv;
1110 struct gpmi_nand_data *this = chip->priv;
1111 int block, ret = 0;
1112 uint8_t *block_mark;
1113 int column, page, status, chipnr;
1114
1115 /* Get block number */
1116 block = (int)(ofs >> chip->bbt_erase_shift);
1117 if (chip->bbt)
1118 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1119
1120 /* Do we have a flash based bad block table ? */
Wolfram Sang52899662012-01-31 13:10:43 +01001121 if (chip->bbt_options & NAND_BBT_USE_FLASH)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001122 ret = nand_update_bbt(mtd, ofs);
1123 else {
1124 chipnr = (int)(ofs >> chip->chip_shift);
1125 chip->select_chip(mtd, chipnr);
1126
1127 column = this->swap_block_mark ? mtd->writesize : 0;
1128
1129 /* Write the block mark. */
1130 block_mark = this->data_buffer_dma;
1131 block_mark[0] = 0; /* bad block marker */
1132
1133 /* Shift to get page */
1134 page = (int)(ofs >> chip->page_shift);
1135
1136 chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page);
1137 chip->write_buf(mtd, block_mark, 1);
1138 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1139
1140 status = chip->waitfunc(mtd, chip);
1141 if (status & NAND_STATUS_FAIL)
1142 ret = -EIO;
1143
1144 chip->select_chip(mtd, -1);
1145 }
1146 if (!ret)
1147 mtd->ecc_stats.badblocks++;
1148
1149 return ret;
1150}
1151
Wolfram Sanga78da282012-03-21 19:29:17 +01001152static int nand_boot_set_geometry(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001153{
1154 struct boot_rom_geometry *geometry = &this->rom_geometry;
1155
1156 /*
1157 * Set the boot block stride size.
1158 *
1159 * In principle, we should be reading this from the OTP bits, since
1160 * that's where the ROM is going to get it. In fact, we don't have any
1161 * way to read the OTP bits, so we go with the default and hope for the
1162 * best.
1163 */
1164 geometry->stride_size_in_pages = 64;
1165
1166 /*
1167 * Set the search area stride exponent.
1168 *
1169 * In principle, we should be reading this from the OTP bits, since
1170 * that's where the ROM is going to get it. In fact, we don't have any
1171 * way to read the OTP bits, so we go with the default and hope for the
1172 * best.
1173 */
1174 geometry->search_area_stride_exponent = 2;
1175 return 0;
1176}
1177
1178static const char *fingerprint = "STMP";
Wolfram Sanga78da282012-03-21 19:29:17 +01001179static int mx23_check_transcription_stamp(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001180{
1181 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1182 struct device *dev = this->dev;
1183 struct mtd_info *mtd = &this->mtd;
1184 struct nand_chip *chip = &this->nand;
1185 unsigned int search_area_size_in_strides;
1186 unsigned int stride;
1187 unsigned int page;
1188 loff_t byte;
1189 uint8_t *buffer = chip->buffers->databuf;
1190 int saved_chip_number;
1191 int found_an_ncb_fingerprint = false;
1192
1193 /* Compute the number of strides in a search area. */
1194 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1195
1196 saved_chip_number = this->current_chip;
1197 chip->select_chip(mtd, 0);
1198
1199 /*
1200 * Loop through the first search area, looking for the NCB fingerprint.
1201 */
1202 dev_dbg(dev, "Scanning for an NCB fingerprint...\n");
1203
1204 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1205 /* Compute the page and byte addresses. */
1206 page = stride * rom_geo->stride_size_in_pages;
1207 byte = page * mtd->writesize;
1208
1209 dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page);
1210
1211 /*
1212 * Read the NCB fingerprint. The fingerprint is four bytes long
1213 * and starts in the 12th byte of the page.
1214 */
1215 chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page);
1216 chip->read_buf(mtd, buffer, strlen(fingerprint));
1217
1218 /* Look for the fingerprint. */
1219 if (!memcmp(buffer, fingerprint, strlen(fingerprint))) {
1220 found_an_ncb_fingerprint = true;
1221 break;
1222 }
1223
1224 }
1225
1226 chip->select_chip(mtd, saved_chip_number);
1227
1228 if (found_an_ncb_fingerprint)
1229 dev_dbg(dev, "\tFound a fingerprint\n");
1230 else
1231 dev_dbg(dev, "\tNo fingerprint found\n");
1232 return found_an_ncb_fingerprint;
1233}
1234
1235/* Writes a transcription stamp. */
Wolfram Sanga78da282012-03-21 19:29:17 +01001236static int mx23_write_transcription_stamp(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001237{
1238 struct device *dev = this->dev;
1239 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1240 struct mtd_info *mtd = &this->mtd;
1241 struct nand_chip *chip = &this->nand;
1242 unsigned int block_size_in_pages;
1243 unsigned int search_area_size_in_strides;
1244 unsigned int search_area_size_in_pages;
1245 unsigned int search_area_size_in_blocks;
1246 unsigned int block;
1247 unsigned int stride;
1248 unsigned int page;
1249 loff_t byte;
1250 uint8_t *buffer = chip->buffers->databuf;
1251 int saved_chip_number;
1252 int status;
1253
1254 /* Compute the search area geometry. */
1255 block_size_in_pages = mtd->erasesize / mtd->writesize;
1256 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1257 search_area_size_in_pages = search_area_size_in_strides *
1258 rom_geo->stride_size_in_pages;
1259 search_area_size_in_blocks =
1260 (search_area_size_in_pages + (block_size_in_pages - 1)) /
1261 block_size_in_pages;
1262
1263 dev_dbg(dev, "Search Area Geometry :\n");
1264 dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks);
1265 dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides);
1266 dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages);
1267
1268 /* Select chip 0. */
1269 saved_chip_number = this->current_chip;
1270 chip->select_chip(mtd, 0);
1271
1272 /* Loop over blocks in the first search area, erasing them. */
1273 dev_dbg(dev, "Erasing the search area...\n");
1274
1275 for (block = 0; block < search_area_size_in_blocks; block++) {
1276 /* Compute the page address. */
1277 page = block * block_size_in_pages;
1278
1279 /* Erase this block. */
1280 dev_dbg(dev, "\tErasing block 0x%x\n", block);
1281 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1282 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1283
1284 /* Wait for the erase to finish. */
1285 status = chip->waitfunc(mtd, chip);
1286 if (status & NAND_STATUS_FAIL)
1287 dev_err(dev, "[%s] Erase failed.\n", __func__);
1288 }
1289
1290 /* Write the NCB fingerprint into the page buffer. */
1291 memset(buffer, ~0, mtd->writesize);
1292 memset(chip->oob_poi, ~0, mtd->oobsize);
1293 memcpy(buffer + 12, fingerprint, strlen(fingerprint));
1294
1295 /* Loop through the first search area, writing NCB fingerprints. */
1296 dev_dbg(dev, "Writing NCB fingerprints...\n");
1297 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1298 /* Compute the page and byte addresses. */
1299 page = stride * rom_geo->stride_size_in_pages;
1300 byte = page * mtd->writesize;
1301
1302 /* Write the first page of the current stride. */
1303 dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page);
1304 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
Brian Norris1fbb9382012-05-02 10:14:55 -07001305 chip->ecc.write_page_raw(mtd, chip, buffer, 0);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001306 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1307
1308 /* Wait for the write to finish. */
1309 status = chip->waitfunc(mtd, chip);
1310 if (status & NAND_STATUS_FAIL)
1311 dev_err(dev, "[%s] Write failed.\n", __func__);
1312 }
1313
1314 /* Deselect chip 0. */
1315 chip->select_chip(mtd, saved_chip_number);
1316 return 0;
1317}
1318
Wolfram Sanga78da282012-03-21 19:29:17 +01001319static int mx23_boot_init(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001320{
1321 struct device *dev = this->dev;
1322 struct nand_chip *chip = &this->nand;
1323 struct mtd_info *mtd = &this->mtd;
1324 unsigned int block_count;
1325 unsigned int block;
1326 int chipnr;
1327 int page;
1328 loff_t byte;
1329 uint8_t block_mark;
1330 int ret = 0;
1331
1332 /*
1333 * If control arrives here, we can't use block mark swapping, which
1334 * means we're forced to use transcription. First, scan for the
1335 * transcription stamp. If we find it, then we don't have to do
1336 * anything -- the block marks are already transcribed.
1337 */
1338 if (mx23_check_transcription_stamp(this))
1339 return 0;
1340
1341 /*
1342 * If control arrives here, we couldn't find a transcription stamp, so
1343 * so we presume the block marks are in the conventional location.
1344 */
1345 dev_dbg(dev, "Transcribing bad block marks...\n");
1346
1347 /* Compute the number of blocks in the entire medium. */
1348 block_count = chip->chipsize >> chip->phys_erase_shift;
1349
1350 /*
1351 * Loop over all the blocks in the medium, transcribing block marks as
1352 * we go.
1353 */
1354 for (block = 0; block < block_count; block++) {
1355 /*
1356 * Compute the chip, page and byte addresses for this block's
1357 * conventional mark.
1358 */
1359 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift);
1360 page = block << (chip->phys_erase_shift - chip->page_shift);
1361 byte = block << chip->phys_erase_shift;
1362
1363 /* Send the command to read the conventional block mark. */
1364 chip->select_chip(mtd, chipnr);
1365 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1366 block_mark = chip->read_byte(mtd);
1367 chip->select_chip(mtd, -1);
1368
1369 /*
1370 * Check if the block is marked bad. If so, we need to mark it
1371 * again, but this time the result will be a mark in the
1372 * location where we transcribe block marks.
1373 */
1374 if (block_mark != 0xff) {
1375 dev_dbg(dev, "Transcribing mark in block %u\n", block);
1376 ret = chip->block_markbad(mtd, byte);
1377 if (ret)
1378 dev_err(dev, "Failed to mark block bad with "
1379 "ret %d\n", ret);
1380 }
1381 }
1382
1383 /* Write the stamp that indicates we've transcribed the block marks. */
1384 mx23_write_transcription_stamp(this);
1385 return 0;
1386}
1387
Wolfram Sanga78da282012-03-21 19:29:17 +01001388static int nand_boot_init(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001389{
1390 nand_boot_set_geometry(this);
1391
1392 /* This is ROM arch-specific initilization before the BBT scanning. */
1393 if (GPMI_IS_MX23(this))
1394 return mx23_boot_init(this);
1395 return 0;
1396}
1397
Wolfram Sanga78da282012-03-21 19:29:17 +01001398static int gpmi_set_geometry(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001399{
1400 int ret;
1401
1402 /* Free the temporary DMA memory for reading ID. */
1403 gpmi_free_dma_buffer(this);
1404
1405 /* Set up the NFC geometry which is used by BCH. */
1406 ret = bch_set_geometry(this);
1407 if (ret) {
1408 pr_err("set geometry ret : %d\n", ret);
1409 return ret;
1410 }
1411
1412 /* Alloc the new DMA buffers according to the pagesize and oobsize */
1413 return gpmi_alloc_dma_buffer(this);
1414}
1415
1416static int gpmi_pre_bbt_scan(struct gpmi_nand_data *this)
1417{
1418 int ret;
1419
1420 /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */
1421 if (GPMI_IS_MX23(this))
1422 this->swap_block_mark = false;
1423 else
1424 this->swap_block_mark = true;
1425
1426 /* Set up the medium geometry */
1427 ret = gpmi_set_geometry(this);
1428 if (ret)
1429 return ret;
1430
1431 /* NAND boot init, depends on the gpmi_set_geometry(). */
1432 return nand_boot_init(this);
1433}
1434
1435static int gpmi_scan_bbt(struct mtd_info *mtd)
1436{
1437 struct nand_chip *chip = mtd->priv;
1438 struct gpmi_nand_data *this = chip->priv;
1439 int ret;
1440
1441 /* Prepare for the BBT scan. */
1442 ret = gpmi_pre_bbt_scan(this);
1443 if (ret)
1444 return ret;
1445
1446 /* use the default BBT implementation */
1447 return nand_default_bbt(mtd);
1448}
1449
1450void gpmi_nfc_exit(struct gpmi_nand_data *this)
1451{
1452 nand_release(&this->mtd);
1453 gpmi_free_dma_buffer(this);
1454}
1455
1456static int __devinit gpmi_nfc_init(struct gpmi_nand_data *this)
1457{
Huang Shijie10a2bca2011-09-08 10:47:09 +08001458 struct mtd_info *mtd = &this->mtd;
1459 struct nand_chip *chip = &this->nand;
Huang Shijiee10db1f2012-05-04 21:42:05 -04001460 struct mtd_part_parser_data ppdata = {};
Huang Shijie10a2bca2011-09-08 10:47:09 +08001461 int ret;
1462
1463 /* init current chip */
1464 this->current_chip = -1;
1465
1466 /* init the MTD data structures */
1467 mtd->priv = chip;
1468 mtd->name = "gpmi-nand";
1469 mtd->owner = THIS_MODULE;
1470
1471 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
1472 chip->priv = this;
1473 chip->select_chip = gpmi_select_chip;
1474 chip->cmd_ctrl = gpmi_cmd_ctrl;
1475 chip->dev_ready = gpmi_dev_ready;
1476 chip->read_byte = gpmi_read_byte;
1477 chip->read_buf = gpmi_read_buf;
1478 chip->write_buf = gpmi_write_buf;
1479 chip->ecc.read_page = gpmi_ecc_read_page;
1480 chip->ecc.write_page = gpmi_ecc_write_page;
1481 chip->ecc.read_oob = gpmi_ecc_read_oob;
1482 chip->ecc.write_oob = gpmi_ecc_write_oob;
1483 chip->scan_bbt = gpmi_scan_bbt;
1484 chip->badblock_pattern = &gpmi_bbt_descr;
1485 chip->block_markbad = gpmi_block_markbad;
1486 chip->options |= NAND_NO_SUBPAGE_WRITE;
1487 chip->ecc.mode = NAND_ECC_HW;
1488 chip->ecc.size = 1;
1489 chip->ecc.layout = &gpmi_hw_ecclayout;
1490
1491 /* Allocate a temporary DMA buffer for reading ID in the nand_scan() */
1492 this->bch_geometry.payload_size = 1024;
1493 this->bch_geometry.auxiliary_size = 128;
1494 ret = gpmi_alloc_dma_buffer(this);
1495 if (ret)
1496 goto err_out;
1497
Huang Shijiee10db1f2012-05-04 21:42:05 -04001498 ret = nand_scan(mtd, 1);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001499 if (ret) {
1500 pr_err("Chip scan failed\n");
1501 goto err_out;
1502 }
1503
Huang Shijiee10db1f2012-05-04 21:42:05 -04001504 ppdata.of_node = this->pdev->dev.of_node;
1505 ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001506 if (ret)
1507 goto err_out;
1508 return 0;
1509
1510err_out:
1511 gpmi_nfc_exit(this);
1512 return ret;
1513}
1514
Huang Shijiee10db1f2012-05-04 21:42:05 -04001515static const struct platform_device_id gpmi_ids[] = {
1516 { .name = "imx23-gpmi-nand", .driver_data = IS_MX23, },
1517 { .name = "imx28-gpmi-nand", .driver_data = IS_MX28, },
1518 {},
1519};
1520
1521static const struct of_device_id gpmi_nand_id_table[] = {
1522 {
1523 .compatible = "fsl,imx23-gpmi-nand",
1524 .data = (void *)&gpmi_ids[IS_MX23]
1525 }, {
1526 .compatible = "fsl,imx28-gpmi-nand",
1527 .data = (void *)&gpmi_ids[IS_MX28]
1528 }, {}
1529};
1530MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
1531
Huang Shijie10a2bca2011-09-08 10:47:09 +08001532static int __devinit gpmi_nand_probe(struct platform_device *pdev)
1533{
Huang Shijie10a2bca2011-09-08 10:47:09 +08001534 struct gpmi_nand_data *this;
Huang Shijiee10db1f2012-05-04 21:42:05 -04001535 const struct of_device_id *of_id;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001536 int ret;
1537
Huang Shijiee10db1f2012-05-04 21:42:05 -04001538 of_id = of_match_device(gpmi_nand_id_table, &pdev->dev);
1539 if (of_id) {
1540 pdev->id_entry = of_id->data;
1541 } else {
1542 pr_err("Failed to find the right device id.\n");
1543 return -ENOMEM;
1544 }
1545
Huang Shijie10a2bca2011-09-08 10:47:09 +08001546 this = kzalloc(sizeof(*this), GFP_KERNEL);
1547 if (!this) {
1548 pr_err("Failed to allocate per-device memory\n");
1549 return -ENOMEM;
1550 }
1551
1552 platform_set_drvdata(pdev, this);
1553 this->pdev = pdev;
1554 this->dev = &pdev->dev;
Huang Shijie10a2bca2011-09-08 10:47:09 +08001555
1556 ret = acquire_resources(this);
1557 if (ret)
1558 goto exit_acquire_resources;
1559
1560 ret = init_hardware(this);
1561 if (ret)
1562 goto exit_nfc_init;
1563
1564 ret = gpmi_nfc_init(this);
1565 if (ret)
1566 goto exit_nfc_init;
1567
1568 return 0;
1569
1570exit_nfc_init:
1571 release_resources(this);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001572exit_acquire_resources:
1573 platform_set_drvdata(pdev, NULL);
1574 kfree(this);
1575 return ret;
1576}
1577
1578static int __exit gpmi_nand_remove(struct platform_device *pdev)
1579{
1580 struct gpmi_nand_data *this = platform_get_drvdata(pdev);
1581
1582 gpmi_nfc_exit(this);
1583 release_resources(this);
1584 platform_set_drvdata(pdev, NULL);
1585 kfree(this);
1586 return 0;
1587}
1588
Huang Shijie10a2bca2011-09-08 10:47:09 +08001589static struct platform_driver gpmi_nand_driver = {
1590 .driver = {
1591 .name = "gpmi-nand",
Huang Shijiee10db1f2012-05-04 21:42:05 -04001592 .of_match_table = gpmi_nand_id_table,
Huang Shijie10a2bca2011-09-08 10:47:09 +08001593 },
1594 .probe = gpmi_nand_probe,
1595 .remove = __exit_p(gpmi_nand_remove),
1596 .id_table = gpmi_ids,
1597};
1598
1599static int __init gpmi_nand_init(void)
1600{
1601 int err;
1602
1603 err = platform_driver_register(&gpmi_nand_driver);
1604 if (err == 0)
1605 printk(KERN_INFO "GPMI NAND driver registered. (IMX)\n");
1606 else
1607 pr_err("i.MX GPMI NAND driver registration failed\n");
1608 return err;
1609}
1610
1611static void __exit gpmi_nand_exit(void)
1612{
1613 platform_driver_unregister(&gpmi_nand_driver);
1614}
1615
1616module_init(gpmi_nand_init);
1617module_exit(gpmi_nand_exit);
1618
1619MODULE_AUTHOR("Freescale Semiconductor, Inc.");
1620MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver");
1621MODULE_LICENSE("GPL");